Features
VND7N04, VND7N04-1
VNK7N04FM
"OMNIFET":
Fully autoprotected power MOSFET
Type V
VND7N04
VND7N04-1
VNK7N04FM
■
Linear current limitation
■
Thermal shut down
■
Short circuit protection
■
Integrated clamp
■
Low current drawn from input pin
■
Diagnostic feedback through input pin
■
ESD protection
■
Direct access to the gate of the power
clamp
42 V
42 V
42 V
R
DS(on)
0.14 Ω
0.14 Ω
0.14 Ω
MOSFET (analog driving)
■
Compatible with standard power MOSFET
I
lim
7 A
7 A
7 A
Description
The VND7N04, VND7N04-1 and VNK7N04FM
are monolithic devices made using
STMicroeletronics VIPower M0 Technology,
intended for replacement of standard power
MOSFETS in DC to 50 KHz applications. Built-in
thermal shut-down, linear current limitation and
overvoltage clamp protect the chip in harsh
enviroments.
Fault feedback can be detected by monitoring the
voltage at the input pin.
Table 1. Device summary
Part number Order code
VND7N04, VND7N04-1-E,
VND7N04
VND7N04-1 VND7N04-1
VNK7N04FM VNK7N04FM
March 2009 Rev 1 1/17
VND7N04-E, VND7N0413TR,
VND7N04TR-E
www.st.com
17
Contents VND7N04, VND7N04-1, VNK7N04FM
Contents
1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Absolute maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2/17
VND7N04, VND7N04-1, VNK7N04FM Block diagram
1 Block diagram
Figure 1. Block diagram
3/17
Electrical specification VND7N04, VND7N04-1, VNK7N04FM
2 Electrical specification
2.1 Absolute maximum rating
Table 2. Absolute maximum rating
Value
Symbol Parameter
V
DS
V
I
D
I
R
V
esd
P
tot
T
T
T
stg
Drain-source voltage (Vin = 0) Internally clamped V
in
Input voltage 18 V
Drain current Internally limited A
Reverse DC output current -7 A
Electrostatic discharge (C = 100 pF,
R=1.5 KΩ)
Total dissipation at Tc = 25 °C 60 9 W
j
Operating junction temperature Internally limited °C
c
Case operating temperature Internally limited °
Storage temperature -55 to 150 °
2.2 Thermal data
Table 3. Thermal data
R
thj-case
R
thj-amb
Thermal resistance junction-case max 3.75 14 °C/W
Thermal resistance junction-ambient max 100 100 °C/W
DPAK
IPAK
SOT-82FM
2000 V
DPAK/IPAK SOT82-FM
Unit
C
C
2.3 Electrical characteristics
Table 4. Electrical characteristics: off
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
CLAMP
V
CLTH
V
INCL
I
DSS
I
ISS
4/17
(-40 < Tj < 125 °C unless otherwise specified)
Drain-source clamp voltage ID = 200 mA Vin = 0 32 42 52 V
Drain-source clamp threshold voltage ID = 2 mA Vin = 0 31 V
Input-source reverse clamp voltage Iin = -1 mA -1.1 -0.25 V
Zero input voltage drain current (Vin = 0)
VDS = 13 V Vin = 0
VDS = 25 V Vin = 0
Supply current from input pin VDS = 0 V Vin = 10 V 250 550 µA
75
200
µA
µA
VND7N04, VND7N04-1, VNK7N04FM Electrical specification
Table 5. Electrical characteristics: on
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
IN(th)
R
DS(on)
Input threshold voltage VDS = Vin ID + Iin = 1 mA 0.8 3 V
Static drain-source on resistance
Vin = 10 V ID = 3.5 A
Vin = 5 V ID = 3.5 A
-40 < Tj < 25 °C
Vin = 10 V ID = 3.5 A
Vin = 5 V ID = 3.5 A
0.14
0.28
0.28
0.56
Tj = 125 °C
Table 6. Electrical characteristics: dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit
gfs
C
oss
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
Table 7. Electrical characteristics: switching
transconductance
Output capacitance VDS = 13 V f = 1 MHz Vin = 0 250 500 pF
VDS = 13 V ID = 3.5 A 2 5 S
Forward
(1)
Symbol Parameter Test conditions Min. Typ. Max. Unit
Ω
Ω
Ω
Ω
td(on)
t
td(off)
t
td(on)
t
td(off)
t
(di/dt)on Turn-on current slope
Q
Table 8. Electrical characteristics: source drain diode
Turn-on delay time
Rise time
r
Turn-off delay time
Fall time
f
Turn-on delay time
Rise time
r
Turn-off delay time
Fall time
f
Total input charge VDD = 12 V ID = 3.5 A Vin = 10 V 18 nC
i
VDD = 15 V Id = 3.5 A
V
= 10 V R
gen
gen
= 10 Ω
(see Figure 26)
VDD = 15 V Id = 3.5 A
V
= 10 V R
gen
= 1000 Ω
gen
(see Figure 26)
VDD = 15 V ID = 3.5 A
Vin = 10 V R
gen
= 10 Ω
50
60
130
50
140
0.4
2.5
1
50 A/µs
150
180
300
200
500
1.1
7
4
Symbol Parameter Test conditions Min. Typ. Max. Unit
(1)
VSD
trr
Qrr
I
RRM
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
2. Parameters guaranteed by design/characterization
Forward on voltage ISD = 3.5 A Vin = 0 1.7 V
(2)
Reverse recovery time
(2)
Reverse recovery charge
(2)
Reverse recovery current
ISD = 3.5 A di/dt = 100 A/µs
VDD = 30 V Tj = 25 °C
(see test circuit, Figure 28)
40
0.2
3.6
ns
ns
ns
ns
ns
µs
µs
µs
ns
µC
A
5/17
Electrical specification VND7N04, VND7N04-1, VNK7N04FM
Table 9. Electrical characteristics: protection
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
lim
t
dlim
T
jsh
T
jrs
I
gf
Eas
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
Drain current limit
Step response
(1)
Current limit
Overtemperature
(1)
shutdown
(1)
Overtemperature reset 135 °
(1)
Fault sink current
Single pulse avalanche
(1)
energy
Vin = 10 V VDS = 13 V
Vin = 5 V VDS = 13 V
Vin = 10 V
Vin = 5 V
Vin = 10 V VDS = 13 V
Vin = 5 V VDS = 13 V
starting Tj = 25°C VDD = 20 V
Vin = 10 V R
= 1 KΩ L = 30 mH
gen
4
4
13
15
7
7
11
11
20
25
150 °C
50
20
mA
mA
0.4 J
A
A
µs
µs
C
6/17
VND7N04, VND7N04-1, VNK7N04FM Protection features
3 Protection features
During normal operation, the Input pin is electrically connected to the gate of the internal
power MOSFET. The device then behaves like a standard power MOSFET and can be used
as a switch from DC to 50 KHz. The only difference from the user’s standpoint is that a small
DC current (I
The device integrates:
●
Overvoltage clamp protection: internally set at 42 V, along with the rugged avalanche
characteristics of the Power MOSFET stage give this device unrivalled ruggedness and
energy handling capability. This feature is mainly important when driving inductive
loads.
●
Linear current limiter circuit: limits the drain current Id to Ilim whatever the Input pin
voltage. When the current limiter is active, the device operates in the linear region, so
power dissipation may exceed the capability of the heatsink. Both case and junction
temperatures increase, and if this phase lasts long enough, junction temperature may
reach the overtemperature threshold T
●
Overtemperature and short circuit protection: these are based on sensing the chip
temperature and are not dependent on the input voltage. The location of the sensing
element on the chip in the power stage area ensures fast, accurate detection of the
junction temperature. Overtemperature cutout occurs at minimum 150 °C. The device
is automatically restarted when the chip temperature falls below 135 °C.
●
Status feedback: in the case of an overtemperature fault condition, a Status Feedback
is provided through the Input pin. The internal protection circuit disconnects the input
from the gate and connects it instead to ground via an equivalent resistance of 100 Ω.
The failure can be detected by monitoring the voltage at the Input pin, which will be
close to ground potential.
iss
) flows into the Input pin in order to supply the internal circuitry.
jsh
.
Additional features of this device are ESD protection according to the Human Body model
and the ability to be driven from a TTL Logic circuit (with a small increase in R
DS(on)
).
7/17
Protection features VND7N04, VND7N04-1, VNK7N04FM
Figure 2. Thermal impedance for DPAK /
Figure 3. Derating curve
IPAK
Figure 4. Output characteristics Figure 5. Transconductance
Figure 6. Static drain-source on resistance
vs input voltage
8/17
Figure 7. Static drain-source on resistance
(part 1/2)
VND7N04, VND7N04-1, VNK7N04FM Protection features
Figure 8. Static drain-source on resistance
Figure 9. Input charge vs input voltage
(part 2/2)
Figure 10. Capacitance variations Figure 11. Normalized input threshold voltage
vs temperature
Figure 12. Normalized on resistance vs
temperature (part 1/2)
Figure 13. Normalized on resistance vs
temperature (part 2/2)
9/17
Protection features VND7N04, VND7N04-1, VNK7N04FM
Figure 14. Turn-on current slope(part 1/2) Figure 15. Turn-on current slope(part 2/2)
Figure 16. Turn-off drain-source voltage slope
(part 1/2)
Figure 18. Switching time resistive load (part
1/3)
Figure 17. Turn-off drain-source voltage slope
(part 2/2)
Figure 19. Switching time resistive load (part
2/3)
10/17
VND7N04, VND7N04-1, VNK7N04FM Protection features
Figure 20. Switching time resistive load (part
3/3)
Figure 21. Current limit vs junction
temperature
Figure 22. Step response current limit Figure 23. Source drain diode forward
characteristics
11/17
Protection features VND7N04, VND7N04-1, VNK7N04FM
Figure 24. Unclamped inductive load test
circuits
Figure 26. Switching times test circuits for
resistive load
Figure 25. Unclamped inductive waveforms
Figure 27. Input charge test circuit
Figure 28. Test circuit for inductive load
switching and diode recovery times
12/17
Figure 29. Waveforms
VND7N04, VND7N04-1, VNK7N04FM Package information
4 Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK
®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Figure 30.
TO-252 (DPAK) mechanical data
13/17
Package information VND7N04, VND7N04-1, VNK7N04FM
Figure 31. TO-251 (IPAK) mechanical data
14/17
VND7N04, VND7N04-1, VNK7N04FM Package information
Figure 32. SOT-82FM mechanical data
15/17
Revision history VND7N04, VND7N04-1, VNK7N04FM
5 Revision history
Table 10. Document revision history
Date Revision Changes
21-Jun-2004 0.1 Initial release.
Document reformatted.
18-Mar-2009 1
Added Table 1: Device summary on page 1.
Updated Section 4: Package information on page 13
16/17
VND7N04, VND7N04-1, VNK7N04FM
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