SONY KE-42TS2E, KE-42TS2E-2U Service Manual

KE-42TS2U/42TS2E

UC Model

PANEL MODULE SERVICE MANUAL

AEP Model

PDP Module Name

FPF42C128127UB-73

UK Model HK Model

FLAT PANEL COLOR TV

１１１１．．．．Outline

Outline

OutlineOutline

1.1 Out view ･･････････････････････････････････････････････１

1.2 Feature ･･･････････････････････････････････････････････１

1.3 Specification

1.3.1 Functional specification ･･････････････････････････２

1.3.2 Display quality ･･･････････････････････････････････２

1.3.3 Ｉ／Ｏ Interface specification ････････････････････３

２２２２．．．．Notes on safe handling of the plasma display

Notes on safe handling of the plasma display

Notes on safe handling of the plasma display Notes on safe handling of the plasma display

2.1 Notes to follow during servicing ･････････････････････８

３３３３．．．．Name and Function

Name and Function

Name and FunctionName and Function

１１１１．．．．Out line

Out line

Out lineOut line

The module is a plasma display module which can be designed in there is no

fan in addition to a general feature of the plasma display such as a flat type, lightness, and high-viewing-angle and terrestrial magnetism.

１１１１．．．．１１１１ Out view

Out view

Out viewOut view

994

921.6

585

522.24

１１１１．．．．２２２２ Feature

Feature

FeatureFeature

Pixel pitch(horizontal)

0.90mm

RGB

Pixelpitch(Vertical)

RGB

0.51 mm

RGB

Sub- pixel pitch(horizontal)

0.30mm

RGB

１．For high definition television by ALIS method ２．For FAN Less design(Low consumption electric power）３．Flat type・Lightness ４．Customizing of module equipped with communication function

1

１１１１．．．．３３３３ Specification １１１１．．．．３３３３．．．．１１１１ Functional specification

Display panel

Color Grayscale(standard) 9 RGB each color

BrightNess

Chromaticity Coordinates Contrast Contrast in Darkroom（60Hz） 15 400:1 ← (1000:1) Data signal

Powersupply

Noise Shade noise at 18dB(A) or

Guarantee environment

Specification

SpecificationSpecification

Functional specification

Functional specificationFunctional specification

Item NO

Module size 1 994×585×66mm ← ← Externals Weight 2 18kg ← ← Display size 3 921.60×522.24mm

Resolution 4 1024×1024 pixel ← ← Pixel pitch 5 0.90(H)×0.51(V)mm ← ← Sub pixel pitch 6 0.30(H)×0.51(V)mm ← ←

White(display load Ratio 100%) White(display load Ratio 1%, standard)

(x,y)､white 10% 14 (0.300,0.290) ← (0.300,0.300)

Video signal (RGB each color) Dot clock（max） 17 52MHz ← ←

Horizontal Sync Signal（max） 18 50KHz(LVDS) ← ← Sync Signal Vertical Sync Signal 19 50Hz±1.9／60±1.7Hz(LVDS) ← ← Input voltage/current 20 100-120/200-240VAC

Standby electric power（max） 21 1W －－

less Temperature(operation) 23 0～45℃ ← ← Temperature(storage) 24 0～45℃ ← ← Humidity(operation) 25 20～85%RH(no condensation) ← ← Humidity(storage) 26 20～80%RH(no condensation) ← ←

(42inch: 16:9)

256 Grayscale

11 140cd/㎡ ← ・・・

12 700cd/㎡ ← (1000) cd/㎡

16 LVDS(8bit) ← ←

4.5/2.0A 50/60Hz

22 25dB(A)orless ← ←

ＵＢ－０x ＵＢ－５x ＵＢ－７x

Specification

+3.3/+5/+75-90/+50

-70V

DC 0.05/6/4/2A

← ←

←

※It is made to give priority when there is a delivery specification according to the customer.

１１１１．．．．３３３３．．．．２２２２ Display quality specification

Non-lighting cell defect

hing cell defect

cell defect

High intensity cell defect

variation

Color variation

Display quality specification

Display quality specificationDisplay quality specification

Item NO

Total number（subpixel） 1 15 or less ← ← Density（subpixel/c ㎡） 2 2 or less

Size（H×V）（subpixel） 31×2 or less, Or 2×1 or less ← ← Total number(subpixel) 4 6 or less（each color 2 or less） ← ← Non-extinguis Density（subpixel/c ㎡） 5 Each color 2 cells max

Flickering lighting cell defect（sub pixel/c ㎡） Flickering non-extinguishing cell defect Twice or more bright point 8 ０ ← ←

White block of 10% load [9 point]（％） In area adjacent 20mm [White]（％） White block of 10% load [9 point]

（However,1 continuousness or less）

6 5 or less ← ← Flickering

7 Number on inside of Non-extinguishing

cell defect

9 20 or less ← ← Brightness

10 10 or less ← ←

11 ｘ：Average±0.015

ｙ：Average±0.015

ＵＢ－０x ＵＢ－５x ＵＢ－７x

Specification

← ←

※It is made to give priority when there is a delivery specification according to the customer.

2

１１１１．．．．３３３３．．．．３３３３Ｉ／Ｏ

Ｉ／Ｏ Interface

Ｉ／ＯＩ／Ｏ

（１）Ｉ／Ｏｓｉｇｎａｌ

No

.

１

２

Item Signal Name

Reflection signal Timing Signal

Display data

Clock

Power down Signal

Communication

ＭＰＵ Communi cation/ Control

Control

Interface Specification

Interface Interface

Specification

Specification Specification

Number

of

signals

RXIN0RXIN0+ RXIN1RXIN1+ RXIN2RXIN2+ RXIN3RXIN3+

RXCLKINRXCLKIN+

PDWN 1 Input LVTTL

SDA 1 I/O

SCL 1 I/O

CPUGO 1 Input LVTTL

PDPGO 1 Input LVTTL

IRQ 1 Output LVTTL

1 1 1 1 1 1 1 1

1 1

Input

I/O Form Content of definition

Differential serial data signal.

LVDS Different ial

Input video and timing signals after differential serial conversion using a dedicated transceiver.

The serial data signal is transmitted seven times faster than the base signal．

Differential clock signal.

LVDS Different ial

Input the clock signal after differential conversion using a dedicated transceiver.

The clock signal is transmitted at the same speed as the base signal.

Low :LVDS receiver

outputs are all L.

High:Input signals are

active.

I2C bus serial data

LVTTL (I

communication signal.

2

Communication with the

C)

control MPU of this product is enabled. Low power consumption mode of the control MPU of this product is released.

“High”：

This product is started.

(CPUGO=“High” Effective) It changes into "Low" → "High" when this product enters the undermentioned state. １．Vcc/Va/Vs output decrease ２．Circuit abnormality detection

3

（２）LVDS Signal Definition and Function

A video signal (display data signal and control signal) is converted from parallel data to serial data with the LVDS transmitter and further converted into four sets of differential signals before input to this product.

These signals are transmitted seven times faster than dot clock signals.

The dot clock signal is converted into one set of differential signals by the transmitter before input to this product.

The LVDS signal definition and function are summarized below:

Signal name

Video signal Timing signal

Transmission line

Clock transmission line RXCLKIN-

Symbol Number of

signals

RXIN0RXIN0+

RXIN1RXIN1+

RXIN2RXIN2+

RXIN3RXIN3+

RXCLKIN+

１１

Signal definition and function

Display data signal

Ｒ０、Ｒ１、Ｒ２、Ｒ３、Ｒ４、Ｒ５、Ｇ０

Display data signal

Ｇ１、Ｇ２、Ｇ３、Ｇ４、Ｇ５、Ｂ０、Ｂ１

Display data signal，Sync Signal，Control signal

Ｂ２、Ｂ３、Ｂ４、Ｂ５＿＿＿＿＿＿＿＿＿＿＿＿＿＿＿Ｈｓｙｎｃ，Ｖｓｙｎｃ、ＢＬＡＮＫ

Display data signal，Control signal

Ｒ６、Ｒ７、Ｇ６、Ｇ７、Ｂ６、Ｂ７、ＰＡＲＩＴＹ

Clock signal

＿＿＿＿ＤＣＬＫ

4

:

n

（３） Video Signal Definition and Function

The table below summarizes the definitions and functions of input video signals before LVDS conversion.

Number

Item Signal name

Original Display signal (before LVDS transmit tance)

＊１）This product does not correspond to the progressive display mode by the parity signal fixation.

Video signal (digital RGB)

Data Clock

Horizontal sync signal

Vertical sync signal

Parity signal PARITY 1 Input

Blanking signal

When the parity signal is fixed, this product is reversed arbitrarily internally and used.

DATA-R DATA-G DATA-B

DCLK

_____ Hsync

_____ Vsync

BLANK

of

signal

１ Input

Input/ output

s

8 8 8

1 Input

Input

Signal definition and function

Display data signal R7/G7/B7 is the highest intensity bit. R0/G0/B0 is the lowest intensity bit. Display data timing signal: Data are read when DCLK is low. DCLK is continuously input.

Regulates one horizontal line of data: Begins control of the next screen when Hsync is lowered. Screen starts up control timing signal Begins control of the next screen whe Vsync is lowered. Input the same frequency in both odd-numbered and even-numbered fields.

This signal specifies the display

field. H: Odd-numbered field L: Even-numbered field

Parity signal should be alternated in every Vsync cycle.

Display period timing signal. H indicates the display period and L indicates the non display period. Note: Set this timing properly like followings, as is used internally for signal processing. ・Set the blanking period so that the number of effective display data items in one horizontal period is 852. ・Set the number of blanking signals in one vertical period to 512, which is one half the number of effective scan lines. If the BLANK changes when the Vsync frequency is switched, the screen display may be disturbed or brightness may change. The screen display is restored to the normal state later when the BLANK length is constant again.

5

（４）Connector Specifications

The connector specification is shown below. Please do not connect anything with

the terminal NC.

（ⅰ）Signal connector CN1: DF13-20DP-1.25 V (tin-plated) (Maker: HIROSE DENKI)

1 RXIN0- 2 GND 3 RXIN0+ 4 SCL 5 RXIN1- 6 GND 7 RXIN1+ 8 SDA 9 RXIN2- 10 GND 11 RXIN2+ 12 CPUGO 13 RXCLKIN- 14 PDPGO 15 RXCLKIN+ 16 IRQ 17 RXIN3- 18 PDWN 19 RXIN3+ 20 GND

Pin No. Signal name Pin No. Signal name

[Conforming connector] Housing: DF13-20DS-1.25C

Contact: DF13-2630SCF

（ⅱ）Power Source Connectors（Only UB-01 Type）

（ａ）Power input connector （ｂ）Power supply output connector for system

CN61:B06P-VH CN62:B03P-VH

(Maker: JST) (Maker: JST)

Pin No. Symbol

１ AC(L) ２ N.C ３ AC(N) ４ N.C

５

６ F.G

[Conforming connector]

Housing:VHR-06N(or M) Contact:SVH-21T-P1.1

N.C

１ V ２ N.C ３ GND

Pin No. Symbol

ＡＵＸ

[Conforming connector]

Housing:VHR-03N(or M) Contact:SVH-21T-P1.1

（ｃ）Power supply output connector for system

CN63:B5B-XH-A

(Maker: JST)

Pin No. Symbol

１ Vpr1 ２ N.C. ３ Vpr2 ４ N.C. ５ GND

[Conforming connector]

Housing:XHP-5 Contact:SXH-001T-P0.6

6

（ⅲ）

Power Source Connectors

Power supply output (b)Power supply output (c)Power supply output

(a)

connector for system

connector for system connector for system

CN6: B6B-PH-SM3-TB(JST) CN23: B10P-VH(JST) CN33: B9PS-VH(JST)

Pin No. Symbol Pin No. Symbol

1 Vpr2 1 Va 1 Vcc 2 N.C. 2 N.C. 2 GND 3 GND 3 Vcc 3 GND 4 GND 4 GND 4 GND

5 N.C. 5 GND 5 GND 6 Vcc 6 GND 6 N.C.

[Conforming connector]

Housing：PHR-6 Contact：SPH-002T-P0.5L

10 Vs

7 N.C. 7 Vs 8 Vs 9 Vs 9 Vs

[Conforming connector]

Housing：VHR-10N Contact：SVH-21T-

P1.1

Pin No. Symbol

8 Vs

[Conforming connector]

Housing：VHR-9N Contact：SVH-21T-P1.1

(d)Power supply output (e)Power supply output

connector for system

CN42: S7B-PH-SM3-TB(JST) CN52: S7B-PH-SM3-TB(JST)

Pin No. Symbol Pin No. Symbol

1 Va 1 Va 2 N.C. 2 N.C. 3 N.C. 3 N.C. 4 GND 4 GND 5 GND 5 GND 6 N.C. 6 N.C. 7 Vcc 7 Vcc

[Conforming connector]

Housing：PHR-7 Contact：SPH-002T-P0.5L

[Conforming connector]

Housing：PHR-7 Contact：SPH-002T-P0.5L

(f)Power supply output

connector for system

CN7: 00 6200 520 330 000 [ZIF Right Angle Connector](kyousera elco)

Pin No. Symbol Pin No. Symbol

1 N.C. 11 GND 2 N.C. 12 Vra 3 N.C. 13 GND 4 N.C. 14 Vrs 5 GND 15 GND 6 VSAGO 16 Iak 7 GND 17 GND 8 VCEGO 18 Vak 9 GND 19 GND

10 PFCGO 20 Vsk

7

2. Notes on safe handling of the plasma display

2. 1 Notes to follow during servicing

 The work procedures shown with the Note indication are important for ensuring the safety of

the product and the servicing work. Be sure to follow these instructions.

 Before starting the work, secure a sufficient working space.

 At all times other than when adjusting and checking the product, be sure to turn OFF the main

POWER switch and disconnect the power cable from the power source of the display (jig or the display itself) during servicing.

 To prevent electric shock and breakage of PC board, start the servicing work at least 30 seconds after

the main power has been turned off. Especially when installing and removing the power supply PC board and the SUS PC board in which high voltages are applied, start servicing at least 2 minutes after the main power has been turned off.

 While the main power is on, do not touch any parts or circuits other than the ones specified.

The high voltage power supply block within the PDP module has a floating ground. If any connection other than the one specified is made between the measuring equipment and the high voltage power supply block, it can result in electric shock or activation of the leakage-detection circuit breaker.



When installing the PDP module in, and removing it from the packing carton, be sure to have at least two persons perform the work while being careful to ensure that the flexible printed-circuit cable of the PDP module does not get caught by the packing carton.

 When the surface of the panel comes into contact with the cushioning materials, be sure to confirm

that there is no foreign matter on top of the cushioning materials before the surface of the panel comes into contact with the cushioning materials. Failure to observe this precaution may result in the surface of the panel being scratched by foreign matter.

 When handling the circuit PC board, be sure to remove static electricity from your body before

handling the circuit PC board.

 Be sure to handle the circuit PC board by holding the such large parts as the heat sink or

transformer. Failure to observe this precaution may result in the occurrence of an abnormality in the soldered areas.

 Do not stack the circuit PC boards.

Failure to observe this precaution may result in problems resulting from scratches on the parts, the deformation of parts, and short-circuits due to residual electric charge.

 Routing of the wires and fixing them in position must be done in accordance with the original

routing and fixing configuration when servicing is completed.

All the wires are routed far away from the areas that become hot (such as the heat sink). These wires are fixed in position with the wire clamps so that the wires do not move, thereby ensuring that they are not damaged and their materials do not deteriorate over long periods of time. Therefore, route the cables and fix the cables to the original position and states using the wire clamps.



Perform a safety check when servicing is completed.

Verify that the peripherals of the serviced points have not undergone any deterioration during servicing. Also verify that the screws, parts and cables removed for servicing purposes have all been returned to their proper locations in accordance with the original setup.

8

３３３３．．．．Name and Function

３．１ Configuration

Panel chassis Serial Id label

Scan module

⑧Ps cable

Name and Function

Name and FunctionName and Function

Product label

③Y-SUS board

⑥PSU board *1

②X-SUS board

⑩Signal

cable

⑪Signal cable

⑨Signal cable

⑩PSU Signal

ADM1

④ABUSL board

ADM2

ADM3

①LOGIC board

ADM4

ADM5

ADM6

ADM7

ADM8

Address module(ADM)

⑤ABUSR board

XBB

The figure shows the article number in the parts information table of clause 7.

*1:Power supply(jig)

9

YYYY

X

３．２ Block Diagrams ３．２．１ signal Diagrams

----SUS

SUS B.

SUSSUS

Y-SUS

EVEN SW

Y-SCAN

EVEN SW

Y-SUS

ODD SW

Y-SCAN

ODD SW

POS /NEG

B.

B. B.

SSSS

DDDD

MMMM

SSSS

DDDD

MMMM

ADM1 ADM2 ADM3 ADM5 ADM6 ADM7 ADM8ADM4

ABUSL

ABUSL BBBB．

ABUSLABUSL

CN51 CN41

．

．．

ABUSR B.

ABUSR B.ABUSR B.

XXXX BBBB BBBB

X----SUS

SUS

X

SUSSUS

X-SUS

X-SCAN

EVEN SW

X-SUS

X-SCAN

POS

CN31

SIGNAL INPUT

LOGIC

LOGIC B.

OSC

80MHz

Vrs Vra Vrw Vrx

LOGICLOGIC

CONTROLLER

TIMMING

CN3 CN2

SCAN CONTROLLER

OSC

24MHz

CN1

LVDS

Ｉ2C

Analog Sw

OSC

10MHz

DATA PROCESSOR

γ comp.

V-SYNC cont.

Ｆailure DET.

RGB GAIN

ＳＣＩ.

FLASH

DITHER

MPU

APC cont.

Ｉ／Ｏ

DATA CONVERTER

SUB FIELD

PRC.

OSC

40MHz

EEPROM

D/A

MEMORY

FRAME

MEMORY

B.

B. B.

CN21

CN5

CN4

*1:Power supply(jig)

CN7

10

CN69

PFCgo Vsago Vcego

PSU

PSU B.

B.

PSUPSU

B. B.

*

YYYY

X

V

SW

O

SW

O

SW

RES

SW

g

V

RES

SW

V

p

A

V

３．２．２ Power Diagrams

----SUS

SUS B.

B.

SUSSUS

B. B.

Y-SUS

EVEN SW

Y-SCAN

EVEN SW

Y-SUS

ODD SW

Y-SCAN

ODD SW

POS/NEG

ET

Vw 180V Vb –5V

SSSS

DDDD

MMMM

SSSS

DDDD

MMMM

ADM1 ADM2 ADM3 ADM5 ADM6 ADM7 ADM8ADM4

ABUSL

ABUSL BBBB．

ABUSLABUSL

Vcc 5V Vcc 5VVa 60V Va 60V

CN32 CN22

．

．．

X----SUS

SUS

X

SUSSUS

XXXX BBBB BBBB

ABUSR B.

ABUSR B.ABUSR B.

CN42CN52

Va

Vxwgo

X-SUS

E

EN

X-SCAN

EVEN SW

X-SUS

DD

X-SCAN

DD

POS

ET

Vx

45V

DC/DC

CONVERTER

YFVCC1 YFVCC2 FVE5H

5V 5V 18V

YFVE1 YFVE2 VE

18V 18V 17V

DC/DC

CONVERTER

Vcc 5V

CN33

AC100

～240V

Vs 80V

10A

CN61

D/

CPUgo PDPgo

ＭＰ

Vcc 5V

Vpr2 3.3V

LOGIC

LOGIC B.

LOGICLOGIC

CN6

PFC

Servce

SW

o

PFC

Ｖrst

Vra Vrs Vrw Vrx

Va

Vsago

Vcc

Vce

Vs

B.

B. B.

XFVCC1 XFVCC2

5V 5V

XFVE1 XFVE2 VE 18V 18V 17V

RST

CN65

o

80V

CN68

CN67

Vs 60V

DC/DC

CONVERTER

Vcc 5V

Vs 80V

CN23

pr2 3.3V

r1 5V

CN66

CN64

*1:Power supply(jig)

ra

11

PFCgo

Vsago Vcego

5/3.3V

control

PSU

PSU B.

B. *1

PSUPSU

B. B.

*1

*1 *1

Vsa

o

３３３３．．．．３３３３３３３３．．．．３３３３．．．．１１１１ Logic board Function （１）Data Processor ・γ adjustment（１／２．２／２．４／２．６／２．８）・NTSC/EBU format（Color matrix）Switch ・RGB gain Control（White balance adjustment、Amplitude limitation）・Error Diffusion Technology(Grayscale adjustment) ・Dither(Grayscale adjustment) ・Burn-in Pattern generation

（２）Data Converter ・Quasi out-line adjustment (luminous pattern control)

（３）Scan Controller ・Address driver control signal generator（ＡＤＭ）・scan driver control signal generator（ＳＤＭ）・X/Y sustain control signal generator

（４）Waveform ROM ・Waveform Pattern for drive / Timing memory

（５）MPU ・Synchronous detection ・System control ・Driving voltage（Ｖａ、Ｖｓ、Ｖｒ、Ｖｗ） Minute adjustment ・Abnormal watch (breakdown detection)/abnormal processing ・Is(sustain) current control (sustain pulse control) ・Ia(address) current control (sub-field control) ・External communication control ・Flash memory (firmware)

（６）EEPROM ・Control parameter memory ・The accumulation energizing time (Every hour). ・Abnormal status memory (16 careers)

Function

FunctionFunction

Logic board Function

Logic board Function Logic board Function

12

Sub

Address

Data

bit

00 7-0 MAPVER

7 ERRF update of

01

02 7-0 ERRC ERRor Code

03

04

20

6 OHRF

5 PSDF

4-0 CNDC

7-0 OHRH

7-0 OHRL

7 PATSEL

6 PATON

5 ADEN

4 - -

3 - -

3 DSPPRT

2 IFON

Symbol Item Function

address MAP VERsion

ERRor Flag

update of Operation HouRs Flag

Power Shut

Down Flag

CoNDition Code

Operation HouRs Higher bits

Operation HouRs Lower bits

Selecting patterns

Built-in pattern display is set to ON.

Address data enable

DiSPlay PaRiTy

Interface power supply ON

Indicates the version number of the address map.

Indicates that an error has occurred.

It can be cleared with the ErrRST setting.

If this flag is set,

• Error code is written.

• Cannot enter the PDP-ON mode.

Indicates that the drive hours are counted.

Indicates that shutdown of the AC power is detected and the PDP has executed the OFF-sequence. It can be cleared with the PSDRST setting.

Indicates status of the module.

Indicates error code.

The error codes of as many as 16 errors in the past can be retrieved with the ERRS setting. . Same error code is not stored

continuously.

Indicates the higher 8 bits of the module driving hours.

Indicates the lower 8 bits of the module driving hours.

It selects the built-in test pattern signals of this display. This setting is valid when the PATON setting is 1.

Display of the built-in pattern signal in this product is turned ON/OFF.

The black screen is displayed.

0 is set when the input video signal has disturbance.

Be sure to use the display with the setting fixed to 0.

Be sure to use the display with the setting fixed to 1.

Input reflection polarity setting

Switches the interface power ON/OFF.

Use this item when you want turn ON the main power of the interface side only when the PDPON is set to 0. This setting is invalid when PDPON is set to 1.

Setting [hex]

RANGE INITIAL value

01

00 ~ FF

0: Not updated

1: Updated

0: Not updated

1: Updated

0: Not detected

1: Detected

Refer to 4.11.2.6

condition codes.

00~FF 00

00~FF

0: The single

color display is switched every 2 seconds. A total of 8 colors are displayed.

1: All white

(Different from actual white.)

0: Displaying the

input signal

1: Displaying the

built-in pattern

0: Blank

1: Displaying the

input signal

0~1 0

0~1 1【UB0x/5x】

0:Emits light by

LOW

1:Emits light by

High

0: Power OFF

1: Power ON

【UB0x/5x】 02【UB7x 】

0

irregular

00

0

1

1【UB7x 】

0

13

Sub

Address

21

Data

bit

1 PDPON

Symbol Item Function

0

7-5 - -

7-6 - -

4 CCFMD

3 DCBON

2 HAON

1 - -

0 DSETEN

7 CCFON

6 CCFORM

5-3 - -

High voltage power supply

ON

Color correction mode

Dynamic Color Balance

Heat APC function

Data set enable

Color correction

Color correction format

Switches ON/OFF the high voltage power supply of PDP.

Be sure to use the display with the setting fixed to 1.

Be sure to use the display with the setting fixed to 0.

Selecting the color correction modes. Valid when the CCFON setting is 1

Tracking correction of white balance between the high luminance and the low luminance.

When a picture with high luminance/small area is displayed for about 3 minutes or longer, the number of pulses is reduced to about 20% at a maximum. This item can be used to reduce panel temperature/extend useful life when the display is used to show a still image.

Be sure to use the display with the setting fixed to 0.

Whether the register value is reflected to the operating status of this product, selected by this item.

The following switch is executed.

0: The received register value is reflected

from the next field.

1: The received register value is stored so

that the DSET setting is reflected from the next field. (DSET setting: Setting bit 0 of address FF)

Color collection process is turned

ON/OFF.

Color collection process is switched.

This item is valid when CCFON setting is

1.

Be sure to use the display with the setting fixed to 0.

Setting [hex]

RANGE INITIAL value

0: Power OFF

1: Power ON

0~1 1

0~7 1【UB0x/5x】

0~7 0【UB7x】

0: Luminance

has priority.

1: Gradation has

priority

0: OFF

1: ON

0: OFF

1: ON

0~1 0

0: Invalid

1: Valid

0: OFF

1: ON

0: NTSC

1: EBU

0~7 0

0

0【UB7x】

0

1

0

22

2-0 GAMSEL

Selecting the reverse γ correction

Reverse γ correction level is set.

The setup 7 is the test mode. Do not select the setup 7.

When the setup 6 is selected, setting of the addressed in the range of 31~51 become valid.

14

0: OFF

1: 1.0 th power

2: 2.2 nd power

3: 2.4 th power

4: 2.6 th power

5: 2.8 th power

6: USER

7: TEST

2

Sub

Address

Data

bit

23

24 7-0 R-RATIO R ratio 00~FF FF

25 7-0 G-RATIO G ratio 00~FF FF

26 7-0 B-RATIO B ratio

27

28

7-0 CONTrast

7 IRQRST

6 ERRRST

5 - -

5 OHRRST

4 PSDRST Clearing the

3-0 ERRS Error code

7-6 - -

7 PWMP

6 - -

5-4 PWMAX

5-4

Symbol Item Function

Peak luminance is adjusted.

PWMAX

Peak luminance

Clearing the IRQ output signal

Clearing the ERRF flag

Clearing the OHRF flag

PSDF flag

selection

Power Maximam peek control

Maximum power consumption

When the display picture load is heavy, the peak luminance is automatically limited.

White balance is adjusted.

Use the display with at least one item being set to FF (hex).

This item implements control to return the IRQ signal from "HIGH" to "Low" level when an error occurs. When this item is set to 1, the IRQ signal is returned to "Low" level.

This item implements control to return the ERRF flag to 0 when an error occurs.

When this item is set to 1, this setting automatically returns to 0 after returning the ERRF flag to 0.

Be sure to use the display with the setting fixed to 0.

The control by which the OHRF flag is returned to 0 is done. This setting automatically returns to the state of 0 after returning 0 the ERRF flag when this setting is set to one.

This item exercise control to return the PSDF flag to 0 when this machine performs the OFF sequence at AC power shutdown.

When this item is set to 1, this setting automatically returns to 0 after returning the PSDF flag to 0.

When this setting is changed and the ERRC setting is read out, the error contents (as many as 16 errors) of the module that have occurred in the past can be checked.

If more than 16 errors have occurred, the error code is updated starting from the oldest error.

Be sure to use the display with the setting fixed to 0.

The PWMAX setting is switched to constant brightness (peak electric power) control. The password setting is necessary to turn on this setting.

Be sure to use the display with the setting fixed to 0.

Sets the maximum power consumption. Set this item in accordance with the status

of the machine. Make sure that the respective parts'

temperature/panel temperature stays within the specifications. If the setting is set to 3, power consumption increases to a level exceeding the standard consumption. Be sure to execute the heat dissipation design so that respective parts' temperature/panel temperature stay within the specifications.

PWMP=0 Setting of the maximum

electric power.

0: Normal

1: IRQ signal

0: Normal

1: ERRF

0: Normal

1: OHRF

0: Normal

1: PSDF

0: Latest error 1: Previous error 2: | E: F: Oldest error

When password

0:OFF 1:ON

0-3 0【UB7x】

0: -20W

1: -10W 2: ±0W

3: +10W

0: 0W

1: +20W

2: +30W

3:+40W

Setting [hex]

RANGE INITIAL value

00~FF

00~FF FF

clear

flag clear

0~1 0【UB0x/5x】

0【UB7x】

flag clear

0~3 0【UB0x/5x】

is set

0【UB7x】

2【UB0x/5x】

0【UB7x】

FF

0

15

Sub

Address

Data

bit

29

2C 7-0 PsTPW

2D

31 7-0 GAM00

32

33 7-0 GAM01[7: 0]

34

35 7-0 GAM02[7: 0]

36

37 7-0 GAM03 [7: 0] 00~FF 58

3-0 - -

7-0

7-0 PsTTM Ps-Tank TiMe

7-2 - <no use> -

1-0 GAM01[9: 8]

7-3 - <no use> -

2-0

7-4 - <no use> -

3-0 GAM03[11:8]

Symbol Item Function

PWMP=1 Setting of peak electric

Be sure to use the display with the setting fixed to 0.

Password of peak electric power

PWM

PASS

GAM02[10: 8]

Password of peak electric power setting

Ps-Tank PoWer

Reverse γ correction DC

Reverse γ coefficient 01

Reverse γ correction 02

Reverse γ correction 03

setting.The password is described to the delivery specifications. When the password setting is normally done, the reading value of the real thing ground becomes 51.

The maximum electric power setting:

The maximum over electric power from +10W

Time which can operate by the maximum over electric power (*10sec)

Sets the input level that implements the forced 0 [LSB] output.

Reverse γ coefficient value is set. Input Output value of 8 [LSB]

Reverse γ coefficient value is set. Input Output value of 16 [LSB]

Reverse γ coefficient value is set. Input Output value of 24 [LSB]

power. Electric power by which electric power is permitted in addition to improve practical brightness to the maximum electric power set 3:+10W

When the amount of an over electric power becomes PsTPW× PsTTM or less at PWMP=1, the control by which brightness is lowered is done.

0: -40W

1: -20W 2: ±0W

3: +20W

51: Permission of

Another:

Prohibition

Setting [hex]

RANGE INITIAL value

0~F 0

PWMP ON

00-FF 1E【UB7x】

00-FF

00~FF 1F

00~FF

00~FF 04

00~FF 00

00~FF 24

00~FF 00

FF【UB7x】

3C【UB7x】

00

38

39 7-0

3A

3B

3C

3D

7-4 - <no use> -

GAM04[11:

3-0

7-5 - <no use> -

4-0

7-1 GAM05[7: 1]

0 - <no use> -

7-5 - <no use> -

4-0

7-1

8]

GAM04

GAM05[12:

8]

GAM06

8]

GAM06

[7: 0]

[12:

[7: 1]

Reverse γ correction 04

00~FF A7

Reverse γ correction 05

Reverse γ correction 06

Reverse γ coefficient value is set. Input Output value of 32 [LSB]

Reverse γ coefficient value is set. Input Output value of 40 [LSB]

Reverse γ coefficient value is set. Input Output value of 48 [LSB]

16

00~FF 00

00~FF 01

00~FF

00~FF 01

00~FF 9A

12

Sub

Address

Data

bit

0 - <no use> -

7-5 - <no use> -

3E

4-0

7-2

3F

1-0

7-5 - <no use> -

40

4-0

7-2

41

1-0

7-6 - <no use> -

42

5-0

7-4

43

3-0

7-6 - <no use> -

44

45

46

47

48

49

4A

4B

4C

4D

4E

4F

5-0

7-4

3-0

7-6 - <no use> -

5-0

7-4

3-0

7-6 - <no use> -

5-0

7-4

3-0

7-6 - <no use> -

5-0

7-4

3-0 - <no use> -

7-6 - <no use> -

5-0

7-4

3-0

7-6 - <no use> -

5-0

7-4

Symbol Item Function

GAM07

8]

GAM07

- <no use> -

GAM08

8]

GAM08

- <no use> -

GAM09

8]

GAM09

- <no use> -

GAM11[13:

8]

GAM11

- <no use> -

GAM11

8]

GAM11

- <no use> -

GAM12

8]

GAM12

- <no use> -

GAM13[13:

8]

GAM13

GAM14[13:

8]

GAM14

- <no use> -

GAM15

8]

GAM15

[12:

Reverse γ correction 07

Reverse γ coefficient value is set. Input Output value of 56 [LSB]

[7: 2]

[12:

Reverse γ correction 08

Reverse γ coefficient value is set. Input Output value of 64 [LSB]

[7: 2]

[13:

Reverse γ correction 09

Reverse γ coefficient value is set. Input Output value of 80 [LSB]

[7: 4]

Reverse γ correction 10

Reverse γ coefficient value is set. Input Output value of 96 [LSB]

[7: 4]

[13:

Reverse γ correction 11

Reverse γ coefficient value is set. Input Output value of 112 [LSB]

[7: 4]

[13:

Reverse γ correction 12

Reverse γ coefficient value is set. Input Output value of 128 [LSB]

[7: 4]

Reverse γ correction 13

Reverse γ coefficient value is set. Input Output value of 160 [LSB]

[7: 4]

Reverse γ correction 14

Reverse γ coefficient value is set. Input Output value of 192 [LSB]

[7: 4]

[13:

Reverse γ correction 15

Reverse γ coefficient value is set. Input Output value of 224 [LSB]

[7: 4]

Setting [hex]

RANGE INITIAL value

00~FF 02

00~FF

00~FF 03

00~FF 04

00~FF

00~FF 07

00~FF

00~FF 0A

00~FF

00~FF 0D

00~FF

00~FF 16

00~FF

00~FF 21

00~FF

00~FF 2F

00~FF 90

40

F0

60

50

D0

A0

E0

17

Sub

Address

50

51

Data

bit

3-0

7 - <no use> -

6-0

7-5

4-0

Symbol Item Function

- <no use> -

GAM16

8]

GAM16[7: 5]

- <no use> -

[14:

Reverse γ correction 16

Reverse γ coefficient Input Output value of 256 [LSB]

Setting [hex]

RANGE INITIAL value

00~FF 40

00~FF 00

E5 7-0

E6

7-0

7-3 －－

2

FE

1

0

UVrs USER Vrs

UVra USER Vra

Setting Vrs voltage Standard

equation: Vrs=2.99*UVrs/255

Setting Vra voltage Standard

equation: Vra=2.99*UVra/255

Be sure to use the display with

Resetting the UVrs, UVra in both of

RCLVr

UVrs/UVra

RECALL

UVrs/UVra

EWRVr

Write

register and EEPROM to the initial value

by setting RCLVr to 1.

This setting automatically returns to 0

after resetting the UVrs,Uvra.

Storing the UVrs,UVra in register to

EEPROM by setting EWRVr to 1.

This setting automatically returns to 0

after resetting the UVrs,UVra.

Be sure to use the display with

－－

the setting fixed to 0.

00

~AA

00

~AA

0 0

0:Normal

1: UVrs,UVra

initialized

0:Normal

1: UVrs,UVra

stored in

EEPROM

0 0

Adjusted in

factory

Adjusted in

factory

0

7-1 －－

0 0

the setting fixed to 0.

When the DSETEN setting is 1, setting

this bit causes all the register setups that

Be sure to use the display with

FF

0 DSET Data setup

have been set up to now, to be reflected to

the operation status of this product. They

are reflected from the next field after this

bit is accepted.

18

0: Normal

0

1: Execute

3.3.2 Function of X-SUS Board

(1) DC/DC power supply block

Vs (+60V) →Vw (+185V)/Vx (+45V)

Vcc (+5V) →XFvcc (+5V, floating)/XFve (+18V, floating)/Ve (+17V)/Vb(-5)

(2) X switching block

Switching during address period

Switching during sustain period

Switching during reset period

(3) Current detector block

Isx (sustain) current detection

3.3.3 Function of Y-SUS Board

(1) DC/DC power supply block

Vcc (+5V) →Y Fvcc (+5V, floating)/Y Fve (+18V, floating)/Ve (+17V)

(2) Switching block

Switching during address period

Switching during sustain period

Switching during reset period

(3) Current detector block

Isy (sustain) current detection

Isp (SDM) current detection

3.3.4 Function of PSU Board

(1) Standby power supply block

AC100–200 →Vpr1 (+5V)/Vpr2 (+3.3v)

(2) PFC block (AD/DC power supply block)

AC100–200 →+380V

(3) AD/DC power supply block

+380V → Vcc (+5V) / Vs (+80V)/Va (+60V)

(4) Current detection block

Ia (address) current detection

(5) Abnormal voltage monitoring

Vs excess voltage monitoring

Va excess voltage monitoring

19

３３３３．．．．５５５５ Protection function

Abnormality part

Vw

Vx

Vs

Va

Vex Vey

Vcc

Vpr1

Vpr2

Vaux

PSU Heat sink

Protection function

Protection function Protection function

State of protection operation（×:State change、There is no change at the blank.）

State Vw, Vx Vs Va Vex Vey Vcc

Overvoltage Stop（no latch） × × × × × × × ○ ○

Overcurrent Delay Latch

Overvoltage Stop（no latch）

Overcurrent Delay Latch

Overvoltage Latch

Low voltage Latch

Overcurrent Delay Latch

Overvoltage Latch

Low voltage Latch

Overcurrent Delay Latch

Overvoltage Stop（no latch）

Overcurrent

Overvoltage Latch

Overcurrent Delay Latch

Overvoltage Latch

Overcurrent

Overvoltage

Overcurrent (Note 2)

Temperature

Voltage pendency （no latch）

Delay Latch × × × × × × × × × ○

Latch × × × × × × × × × ○

Voltage pendency

（no latch）

Latch

× × × × × × ×

× × × × × × × × × ○

× × × × × × ×

× × × × × × × × × ○

Reactivation

condition when

abnormal content is

excluded

Vau

Vpr

x

○ ○

AC

Re-turni

ng on

○ ○

PFCgo Reset

20

d

b

k

p

d

m

t

d

4. Problem Analysis

4. 1 Outline of Repair Flow

Client

Product

manufacturer

(Repair center)

Client claim

Repair produc

and Claim contents match

Y

Product block/PDP module block

Locating cause of problem

Y

Is PDP module

Defective ?

Is the Panel defective ?

PDP module sent to factory

Repair product an

claim contents match

loc

Y

Recheck the problem description

N

Product problem analysis/Repair

N

PC board replacement/Parts

replacement

Operation normal ?

Recheck proble

description

Y

Repair center

Product

manufacturer

(Repair center)

Is the panel faulty?

PC boar

unacceptable (NG) ?

Processing to prevent recurrence

Packing/Shipment

Installation in product

N

Product runs normally ?

Return of repaired product

Y

N

Y

replacement/Parts

N

Y

Operation normal ?

Panel replacement/IC

module re

PC boar

replacement

Heat run

lacement

N

Client

End of repair

21

4.2 Outline of PDP Module Repair Flow

Receipt of returned product

(Chapter 4.3)

returned product agree with ID

Does ID of

of actual

Yes

Appearance check

Yes

Appearance unacceptable

(NG) ?

Yes

Repair of appearance

requested ?

Yes

Repair defective spots

No

Repair description and returned

product rechecked.

Perform operation test

(Chapter 4.4).

Problem recurred ?

2

Check description of

Yes

repair request.

No

4

Contents match ?

Yes

13

No

Problem symptom nonrecurrence

analysis mode

5

22

p

1

Fault mode classification (Chapter 4.5)

Fault analysis (Chapter 4.6)

Repair of faulty spots (Chapter 5)

Replace LOGIC PC board or

anel chassis ?

No

3

Perform operation test (Chapter 4.4)

Problem repaired?

Yes

Warranty test (Running)

End of repair

Yes

Adjustment (Chapter 6)

No

Shipment

23

N

5

Implement module tapping

Problem recurs ?

Problem symptom nonrecurrence analysis mode/Shipment process mode

o

Yes

Turn off the main power

2

Perform running test (Burn-in pattern)

Problem recurs ?

Yes

No

3

24

4.3 Checking the Product Requested for Repair

Check the serial ID number of the product requested for repair before starting the problem

analysis and repair.

Structure of serial ID number is shown below.

(1) Checking serial ID number of PDP module (14 digits)

The serial ID number of the product that is brought in for service and that of the completed

panel chassis has the structure as shown below.

The serial ID number is shown on the bar code label that is attached to the rear of the chassis

(aluminum).

N7A 1 01 001A1 01A Version No.: 01 ~ 99 A ~ Z (excluding I and O) Lot No.: 001 ~ 999 A ~ Z (excluding I and O) 1 ~ 3 Production week code: 01 ~ 53 Production year (low digit): 0 ~ 9 Product code: N7A model 42 H1/2 type

Module product label Serial ID label of panel chassis

※ The module serial ID number and the serial ID number of the completed chassis (product

requested for repair) are usually the same when the product is brought in for repair for the first time.

(2) Checking serial ID number of constituent PC boards (12 digits)

The serial ID number of the module constituent PC boards has the following structure.

The serial ID number is shown on the bar code label that is attached to each PC board. Cs 1 01 00001 1A Version No.: 1 ~ 9 , a~z A ~ Z (excluding I and O) Lot No.: 00001 ~ Z9999 Production week code: 01 ~ 53 Production year (low digit): 0 ~ 9 Product code: Cs:X-SUS board : Ct:Y-SUS board : CR : ABUSR board : CS : ABUSL board : Cv:LOGIC board : CU : PSU board

25

4.4

Operation Test Procedure

(1) Prepare the test equipment and the module requested for repair.

(2) Affix to the stand (jig) the module requested for repair.

(3) Connect LOGIC board connector CN1 of the module to the

Interface board (jig)CN5 with the dedicated signal cable.

(4) Connect the AC power cable to CN61 on the PSU board of the

module requested for repair.

(5) Turn on the AC power to the interface board (jig).

(6) Select the signal used when a problem occurs, or an all white

(7) Set the PDP go switch on the Interface board (jig) to ON.

(The main power of the module is turned on.)

CN5

Check Fault Symptom

CN1

PDP go Switch

ON

OFF

26

4.5 Fault Symptom

NO

Fault

Fault status Suspected

contents

1

2

Entire

screen

does not

light.

After momentarily going on, the screen becomes black immediately or after a few seconds. (Main power is turned off.)

Screen lights dimly even on

the back screen.

3 Single vertical line (of

Vertical

line

different color)

4

Vertical line from the middle of effective scan area (Vertical line of different color)

5

Vertical

bar

Bar width of 1/7 of horizontal size or in multiples of 1/7, is displayed. Abnormal display.

6

Bar width of 3/7 or 4/7 of the screen width, is displayed. Abnormal display. (Vertical line of different color)

7

Horizontal

line

Single horizontal line (No light) or single horizontal line does not light among the effective scanning area. Single horizontal line does not light.

8

Every other line(No light) Entire screen

Analysis

fault

location

X-SUS

Y- S US

PSU

procedure

and measure

Refer to

Chapter

Panel chassis

LOGIC

ABUSL

ABUSR

LOGIC Replace

Panel chassis

LOGIC

4.6.1

LOGIC

board

Refer to

Chapter

4.6.2

Panel chassis Replace

panel

chassis

Panel chassis

ABUSL

ABUSR

LOGIC

Above boards are

connected

.

ABUSL

ABUSR

LOGIC

Above boards are

connected.

Refer to

Chapter

4.6.2

Refer to

Chapter

4.6.2

Panel chassis Replace

panel

chassis

X-SUS

Y- S US

Replace

X-SUS

Y-SUS

board

27

NO

Fault

Fault status Suspected

contents

9

Horizontal

bar

Bar width of 1/8 or multiples of 1/8 of the screen height, is displayed. Abnormal (Screen does not light)

10

Bar width of 1/2 of the screen height. Abnormal display (Screen does not light)

Analysis

fault

location

Panel chassis Replace

procedure

and measure

panel

chassis

Panel chassis

Y- S US

X-SUS

Above boards are

connected.

Refer to

Chapter

4.6.3

11 Image

sticking

Fixed display contents are always displayed.

12 Stains Oval-shaped points having

abnormal luminance are scattered in the upper or lower part of screen.

13 Twinkle The entire screen

momentarily becomes brighter or darker.

ABCDEF

Panel chassis Perform all

white heat

run. After judgment,

replace

panel

chassis

Panel chassis Perform all

white heat

run. After

judgment, replace panel chassis

14 Flicker The entire screen flickers

continuously.

15 Luminanc

e is abnor mal

16 Chrom i na

nce is ab

Screen is too dark or too bright. (Out of specifications)

Colors cannot be displayed correctly.

normal

28

Poor

connector

contact

（CN2,3,21,31）

connector /

cable re-co

nnection or Cable exc

hange

LOGIC Replace

LOGIC

board

17 Sync is

disturbed

LOGIC Replace

18 Picture

distorted

LOGIC Replace

19

Steps of gradatio n are skipped

Luminance linearity is poor.

LOGIC Replace

20 Abnormal

sound

21 Control on

external communic ation is

Contrast, color temperature

LOGIC adjustment and ϒ cannot be changed.

PSU

X-SUS

Y- S US

(Core is broken,

or transformer is

abnormal.)

abnormal

LOGIC

board

LOGIC

board

LOGIC

board

Locate cause

of

abnormality

from

listening and

viewing.

Replace the

cause of

problem.

Replace

LOGIC

board

29

(

defective.

N

(

p

defective.

N

4.6 Problem Analysis Procedure

4.6.1 "The entire screen does not light.（Main power is turned off）" Problem analysis procedure

The entire screen does not light.

(Main power is turned off.)

PC for analysis

Connected?

Y

Analysis using PC

Chapter 4.7

Remove CN6 (LOGIC)

Turn on AC power.

PSU board Vpr2

3.3V) exists?

PSU board is

Turn off AC power.

Connect CN 6 (LOGIC).

Turn on AC power

Y

STANDBY power

supply has

abnormality.

Turn off the AC power.

Remove the following power connectors (4 locations):

CN 23 (X-SUS） CN 33 (Y-SUS) CN 42 (ABUSR) CN 52

PSU board

V

r2 (3.3V) exists?

ABUSL)

LOGIC board is

Y

STANDBY power supply (MPU

power supply) system has

short-circuit.

Turn off the AC

power.

End of analysis

1

30

1

CN23

3

4

6

8

: Vcc

: GND

: Vs

CN33

: Vcc

1

2

5

7

: GND

: Vs

CN23

CN33

X-SUS board

3― 4

6― 8

are shorted.

N

Y-SUS board

1― 2

7― 5

are shorted.

N

pins or

pins

pins or

pins

Y

Remove SDM from the following (2) connectors.※ CN 34 CN 35

X-SUS board is defective.

Switching circuit (power

supply) has a short-circuit.

* Refer to Chapter 5.3 for

SDM removal. procedure.

SDM is defective

(Panel chassis is

defective.)

CN33

Y-SUS board

1― 2 7― 5

shorted.

pins or

pins are

Y

CN52

: Va

1

4

5

7

: GND

: Vcc

CN52

ABUSL board

1― 4

5― 7

are shorted.

pins or

pins

Y

Remove ADM from the following (2) connectors.※ CN 53 CN 54 CN 55

SDM chip/Flexible shorted

Y-SUS board is

defective.

Switching circuit (power

supply) has short-circuit.

* Refer to Chapter 5.4 for

ADM removal. procedure.

CN52

ABUSL board

1― 4

5― 7

are shorted.

pins or

pins

N

ADM is defective

(Panel chassis is

defective.)

Y

2

Power supply circuit has a short-circuit.

31

ADM chip/Flexible shorted

ABUSL board is

defective.

End of analysis

2

CN42

1

4

5

7

: Va

: GND

: Vcc

ABUSL board

CN42

1― 4

CN42

are shorted.

5― 7

pins or

pins

N

Y

Remove ADM from the following (4) connectors.

CN 43 CN 44 CN 45 CN 46

* Refer to Chapter 5.5for

ADM removal. procedure.

ABUSL board

CN42

1― 4

5― 7

are shorted.

pins or

pins

N

ADM chip/Flexible shorted

ADM is defective

(Panel chassis is

defective.)

Y

ABUSR board is

defective.

Turn on AC power.

Turn on the Jig PDP go switch.

Power supply circuit has short-circuit.

PSU board

Vcc (5V) exists?

N

Y

Control logic power system has short-circuit.

3

End of analysis

LOGIC board is

defective.

Turn off the AC power.

End of analysis

32

3

Turn off the AC power.

Connect CN 42(ABUSR).

Turn on AC power.

PSU board

Vcc (5V) exists ?

N

ABUSR board is

defective.

Turn off the AC power.

Connect CN 52(ABUSL).

Turn on AC power.

Y

Logic buffer circuit has abnormality.

PSU board

Vcc (5V) exists ?

N

Y

ABUSL board is

defective.

Logic buffer circuit has abnormality.

Turn off the AC power.

Connect CN 23(X-SUS).

Turn on AC power.

PSU board

Vcc (5V) exists ?

N

X-SUS board is

defective.

Y

Turn off the AC power.

Connect CN 33(Y-SUS).

Turn on AC power.

N

PSU board

Vcc (5V) exists ?

Y

Turn off the AC power.

DC/DC power supply circuit or control logic circuit has abnormality.

Y-SUS board is

defective.

DC/DC power supply circuit or control logic circuit has abnormality.

Turn off the AC power.

Remove ADM 1 – 8

End of analysis

4

33

4

Turn on AC power.

PSU board

Va (60) exists ?

Y

N

ADM is defective

(Panel chassis is

defective.)

ADM chip operation is abnormal.

Turn off the AC power.

ABUSR board

Disconnect connector CN42.

Turn on AC power.

PSU board

Va (60) exists ?

Turn off the AC power.

N

Y

ABUSR board

is defective.

Power supply system (capacitor, etc.,)

has abnormality.

ABUSL board

Disconnect connector CN52.

Turn on AC power.

PSU board

Va (60) exists ?

Y

ABUSR board

is defective.

N

5

Power supply system (capacitor, etc.,)

has abnormality.

34

Turn off the AC. power

End of analysis

5

PSU board

Vs(80V) exists？

Y

PSU board

(Va block) is defective.

(Panel chassis is

defective.)

N

Turn off the AC power.

Turn off the AC. power

End of analysis

Connect SDM/Y-SUS board

Disconnect connector.

Measure resistance of SDM power line

(Between A1-A2 , B1-B2, C1-C2 and D1-D2.)

SDM power supply

line is

shorted.

Y

SDM is faulty.

(Panel chassis is

defective.)

N

Turn on AC power.

N

SDM chip is shorted.

Turn off the AC

power.

N

PSU board Vs

/Vccis output

Y

Turn off the AC

power.

6

A1A2

35

B1

B2

D1

D2

C2

C1

6

Disconnect connection from

XBB/X-SUS board.

Measure resistance of XBB line.

(Between A1-B1,B1-A2,

A2-B2 ,B2-A3,A3-B3,B3-A4,A4-B4)

XBB line has

short-circuit.

Y

N

XBB is faulty

(Panel chassis is

defective.)

X-SUS board

is defective.

Y-SUS board

is defective.

X-SUS board

is defective.

End of analysis

A1

B1 A2

B2 A3

B3 A4

B4

36

pp

4. 6. 2 "Vertical line/Vertical bar" Problem analysis procedure

Vertical line/Vertical bar

LOGIC ~ ABUS board signal cable has

abnormal appearance?

Y

Signal cable is defective.

N

ADM flexible has abnormal a

earance?

Y

ADM is defective.

(Panel chassis is

defective.)

N

Turn on the main power.

End of analysis

Y

One vertical line？

Tap lightly on ADM flexible

heat-melted junction.

N

Heat-melted junction is

Any changes?

Y

defective (Panel chassis

is defective.)

N

Turn off the main

power.

Panel address has open circuit or

ADM IC chip is defective.(Panel

chassis is defective.)

End of analysis

1

37

1

Bar of 1/2 width on the

left does not light?

N

Y

Voltage exists at ABUSL board CN 52.

N

Y

LOGIC board is

defective.

Turn off the main power.

Disconnect CN52 from ABUSL board.

Turn on the main power.

Voltage exists at

PSU Side?

Y

ABUSL board is defective.

N

Bar of 1/2 width in

right does not light?

Y

PSU cable is defective.

Connector has poor

connection

(LOGIC board is

defective.)

N

Voltage exists at ABUSR board CN42?

Y

LOGIC board is

defective.

N

Turn off the main power.

Disconnect CN42 from ABUSL board.

Turn on the main power.

Voltage exists at

PSU Side?

N

2

Y

PSU cable is defective. Connector

ABUSR board is

defective.

has poor connection.

(PSU board is defective.)

Turn off the main power.

End of analysis

38

2

Vertical line of

different color?

Y

N

Exists in left 1/2

area.

N

Y

Turn off the main power.

Replace ABUSL board (Backup part).

Turn on the main power.

Normal?

Y

ABUSL board is

defective.

N

Turn off the main power.

Replace LOGIC board (Backup part)

Turn on the main power.

Y

Normal?

N

Turn off the main power.

Replace LOGIC ~ ABUSL signal cable.

Turn on the main power.

Normal?

Y

N

LOGIC board is

defective.

Signal cable is

defective.

ADM is defective.

(Panel chassis is

defective.)

Turn off the main power.

End of analysis

3

4

39

3 4

Turn off the main power.

Replace ABUSR board (Backup part).

Turn on the main power.

Y

Turn off the main power.

Replace LOGIC board (Backup part).

Turn on the main power.

Normal?

N

ABUSR board is

defective.

Normal?

N

Y

LOGIC board is

defective.

Turn off the main power.

Replace signal cables LOGIC ~ ABUSR.

Turn on the main power.

Y

Normal?

Signal cable is

defective.

N

ADM is defective.

(Panel chassis is

defective.)

Panel is defective.

(Panel chassis is

defective.)

Turn off the main power.

End of analysis

40

4.6.3 "Horizontal bar" Problem analysis procedure

Horizontal bar

Replace X-SUS0 board (Defective product).

Turn off the main power.

Replace X-SUS board (Backup parts).

Turn on the main power.

N

Normal?

Y

N

Turn off the main power.

Replace Y-SUS board (Backup parts)

Turn on the main power.

Y

X-SUS board is

defective.

Normal?

N

Y

Y-SUS board is

defective.

Panel chassis is

defective.

Turn off the main power.

End of analysis

41

4.7 Problem Analysis Using a Personal Computer

4.7.1 Connecting a computer

(1) Set the module in accordance with Chapter 4.4.

(2) Connect the RS-232C terminal of the computer to the RS-232C terminal of the interface board.

(3) Turn on the main power to the interface board.(Red LED goes on.)

4.7.2 Preparing a computer

(1) Turn on the main power to the computer.

(2) Set the PDPgo switch on the interface board to ON and turn on the main power to the module.

(3) For computer running DOS/V:

C : ¥ >FHPH2<ENTER>

For computer running WINDOWS:

Start menu → Run → FHPH2<ENTER>

(4) The following menu screen appears.

42H2 Main menu <Rev. SVH2E 1.0>

** Module information menu POWER ON menu Problem analysis menu Voltage adjustment menu Accumulated power-on time menu Logic board change menu

EXIT

POWER indicator (red LED)

42

*1: Use COM1: for the computer's communication port.

*2: Set the communication setup as follows.

Speed: 9600 bps

Data: 7 bits

Parity: none

Stop bit: 1 bit

In Windows, restart the computer after setting the communication setup.

*3: If the program starts up while the module standby power is not yet turned on, the menu screen

will not be displayed.

4.7.3 Problem Analysis Procedure

(1) Select the problem analysis menu from the main menu using the ↑key or ↓key and press

<ENTER> key to start the program.

42H2 Main menu <Rev. SVH2E 1.0>

Module information menu POWER ON menu ** Problem analysis menu Voltage adjustment menu Accumulated power-on time menu Logic board change menu

EXIT

43

(2) Check the error code (hexadecimal number) from the Latest error code read-out menu and locate

the faulty position from the following table.

42H2 Problem analysis menu

**_Condition code :** (Hex) Latest error code :** (Hex) Previous error Code :** (Hex) 2nd previous error code :** (Hex) 3rd previous error code :** (Hex) 4th previous error code :** (Hex) 5th previous error code :** (Hex) 6th previous error code :** (Hex) 7th previous error code :** (Hex) 8th previous error code :** (Hex) 9th previous error code :** (Hex) 10th previous error code :** (Hex) 11th previous error code :** (Hex) 12th previous error code :** (Hex) 13th previous error code :** (Hex) 14th previous error code :** (Hex) 15th previous error code :** (Hex) Error code clear / execute

RETURN EXIT

故障解析メニューの表示例

Example of displaying breakdown analysis

モジュールの状態

The state of the module is shown.

を示します。

5.1 Exploded View

3

2

6

8

7

12

9

11

1

10

5

4

47

5.2 X-SUS Circuit Board Removal/Installation Procedure

Note

(3)CN22

When removing the circuit board after the main power is turned on/off, wait for at least

one minute before starting to remove the circuit board.

If the circuit board removal is started immediately after turning off the main power,

it can result in electric shock or damage to the circuit due to residual electric charge.

Remove the circuit board following the steps below. To install the circuit board, reverse

the removal procedure.

(1) Remove the fixing screws (M3×8) at 9 locations.

(2) Release the lock of the FPC connector (CN21) and disconnect the signal cable.

(3) Disconnect the cables from the VH connectors (CN22, CN23).

(4) Pull out the XSUS board horizontally and disconnect the connectors (CN24, CN25).

(4)CN25

(3)CN23

(2)CN21

Note

* On handling the FPC connector

To release the lock, release it by gently flipping

Pull out

(4)CN24

Pull out

it with the nail of the thumb or forefinger.

Never pinch the lock lever with fingers or hook on it (especially with a fingernail). Doing so might damage the lock lever.

48

(5) Remove the X-SUS board.

Make sure that you do not to hold the heat sink when removing the Y-SUS board.

2

49

N

5.3 Y-SUS Circuit Board Removal/Installation Procedure

Note

(4)CN35

When removing the circuit board after the main power is turned on/off, wait for at least

one minute before starting to remove the circuit board.

If the circuit board removal is started immediately after turning off the main power,

it can result in electric shock or damage to the circuit due to residual electric charge.

Remove the circuit board by following the steps below. To install the circuit board,

reverse the removal procedure.

(1) Remove the fixing screws (M3×8) at 9 locations.

(2) Release the lock of the FPC connector (CN31) and disconnect the signal cable.

(3) Disconnect the cables from the VH connectors (CN32, CN33).

(4) Pull out the YSUS board horizontally and disconnect the connectors (CN34, CN35).

(3)CN32

(3)CN33

Pull out

(4)CN34

Pull out

* On handling the FPC connector

To release the lock, release it by gently flipping it with the nail of the thumb or forefinger.

ever pinch the lock lever with fingers or hook onto it

(especially with fingernails). Doing so might damage the lock lever.

(2)CN31

50

(5)Remove the Y-SUS board.

Make sure that you do not to hold the heat sink when removing the Y-SUS board.

3

51

5.4 ABUS-L Circuit Board Removal/Installation Procedure

Note

(1)CN52

When removing the circuit board after the main power is turned on/off, wait for at least

one minute before starting to remove the circuit board.

If the circuit board removal is started immediately after turning off the main power,

it can result in electric shock or damage of the circuit due to residual electric charge.

Remove the circuit board by following the steps below. To install the circuit board,

reverse the removal procedure.

(1) Disconnect the connector CN52 from the ABUS-L board.

(2) Raise the lock of the FPC connectors CN53, CN54, CN55 and CN56 to release it and remove the

ADM flexible board.

(3) Release the lock of the FPC connector CN51 and disconnect the signal cable (FPC).

(3)CN51

Note

* On handling the FPC connector

To release the lock, release it by pulling up the lever. Never pinch the lock lever with the fingers or push hard on it without a cable in it. Doing so might damage the lock lever.

(2)CN56

(2)CN55

(2)CN54

(2)CN53

52

(4) Remove the screws (M3X8) fixing the ADM at the 8 locations.

(5) Remove the screws (M3X8) fixing the ABUS-L board at the 3 locations.

(6) Remove the ABUS-L board

(7) When installing the ABUS-Lboard, place it so that the ABUS-Lboard is locked by the tabs for

fixing it in position (at 3 locations).

ADM(4 locations)

53

r

5.5 ABUS-R Circuit Board Removal/Installation Procedure

Note

When removing the circuit board after the main power is turned on/off, wait for at least one minute

before starting to remove the circuit board.

If the circuit board removal is started immediately after turning off the main power, it can result in

electric shock or damage of the circuit due to residual electric charge.

Remove the circuit board by following the steps below. To install the circuit board, reverse the removal

procedure.

(1) Disconnect the connector CN42 on the ABUS-R board.

(2) Raise the lock of the FPC connectors CN43, CN44, CN45, CN46 to release it and disconnect the

(3) Release the lock of the FPC connector CN41 and disconnect the signal cable (FPC).

(3)CN41

ADM flexible board.

(1)CN42

Note

(2)CN43

(2)CN44

* On handling the FPC connecto

To release the lock, release it by pulling up the lever.

Never pinch the lock lever with the fingers or push hard on it without a cable in it. Doing so might damage the lock lever.

(2)CN46

(2)CN45

54

(4) Remove the screws (M3X8) fixing the ADM at the 8 locations.

(5) Remove the screws (M3X8) fixing the ABUS-R board at the 3 locations.

(6) Remove the ABUS-R board.

5

ADM(4 locations)

(7) When installing the ABUS-R board, place it so that the ABUS-R board is locked by the

tabs for fixing it in position (at 3 locations).

55

r

5.6 LOGIC Board Removal/Installation Procedure

Remove the circuit board by following the steps below. To install the circuit board, reverse

the removal procedure.

(1) Disconnect the EH connector CN6.

(2) Release the lock of the FPC connectors CN2, CN3, CN4, CN5 and disconnect the signal cable

(FPC).

(3) Slide the lock of the FPC connector CN7 toward the PSU board side, then press it down toward

the front and remove the PSU signal cable.

（3）CN7

（2）CN3

（1）CN6

（2）CN2

Note

* On handling the FPC connecto

To release the lock, release it by gently flipping it. Never pinch the lock lever with the fingers or hook onto it (especially with fingernails). Doing so might damage the lock lever.

（2）CN5

（2）CN4

56

(4) Remove the screws (M3×8) fixing the LOGIC board in position at 2 locations.

(5) Remove the LOGIC board.

1

(6) When installing the LOGIC board, place it so that the LOGIC board is locked by the tabs for

fixing it in position (at 3 locations).

57

)

5.7 PSU Board Removal/Installation Procedure

Note

When removing the circuit board after the main power is turned on/off, wait for at least two minute

before starting to remove the circuit board.

If the circuit board removal is started immediately after turning off the main power, it can result in

electric shock or damage to the circuit due to residual electric charge.

Remove the circuit board by following the steps below. To install the circuit board, reverse the removal

procedure.

(1) Release the lock of the cable clamp (large) .(At 4 locations) (2) Disconnect the X-SUS board connector CN23. (3) Disconnect the Y-SUS board connector CN33. (4) Disconnect the ABUSR board connector CN42. (5) Disconnect the ABUSL board connector CN52. (6) Remove the wires (4), (5) from the cable clamp (small) . (7) Disconnect the LOGIC board connector CN6. (8) Disconnect the PSU signal cable from the PSU board connector CN69 side.

(8)CN69

(3)CN33

(1) Cable clamps

(4 locations

(2)CN23

(7)CN6

58

(4)CN52

(6) Cable clamps

(4)CN42

(2 locations)

59

(9) Remove the screws (M3×8) fixing the PSU board in position. (9 locations)

(10) Use cutting pliers to cut the nylon bands tying the following 5 power cables.

z CN64 (PSU) ~ CN32 (Y-SUS) :

z CN65 (PSU) ~ CN23 (X-SUS) :

z CN66 (PSU) ~ CN42 (ABUSR) :

z CN67 (PSU) ~ CN52 (ABUSL) :

z CN22 (X-SUS) ~ CN32 (Y-SUS) :

(11) Remove the PSU board.

6

60

5.8 Panel Chassis Replacement Procedure

(1) Remove the 6 types of printed-circuit board (X-SUS, Y-SUS, ABUSL, ABUSR, LOGIC, PSU)

that are installed in the panel module.

For the removal procedure, refer to Section 5.2 to 5.7.

* Before removing the above 6 types of board, be sure to remove both ends of the single power

cable (BLU) and those of the five FPC cables (WHT) that are used to connect the circuit boards.

61

(2) ***Install the printed-circuit board that was removed in step (1) and fix it in position.

(Refer to the exploded view shown in Section 5.1.)

(3) Print the serial ID number of the product to be repaired on the product label which is prepared

separately. Attach the product label to the panel chassis on top of the Y-SUS board (See the photo).

62

(4) When the installation of the board is complete, route the wires as shown below.

Pass the CN52 cable (RED/ BLK) under the signal cable.

Enlarge

Route it on top of the PSU signal

cable.

Pass the CN42 cable (YEL/BLK)

under the signal cable.

CN63

63

6 Operation Check and Adjustment Method

6.1 List of Check and Adjustment Items

Adjustment item

(Major item)

VR adjustment

Parameter adjustment

Default setting

Adjustment item

(Minor item)

Is detection adjustment X-SUS board VR1 1 1 Ve voltage adjustment X-SUS board VR4 1 1 Vw voltage adjustment X-SUS board VR3 1 1 Ve voltage adjustment Y-SUS board VR1 1 1 Is detection adjustment Y-SUS board VR2 1 1 PFC voltage adjustment PSU board RV301 1 1 Vs adj1 PSU board RV801 1 1 Vs adj2 PSU board RV802 1 1 Va adj2 PSU board RV803 1 1 Vs f min PSU board RV901 1 1 Vpr adj PSU sub-board RV201 1 1 Vcc f min PSU sub-board RV150 1 1 Vcc adj PSU sub-board RV270 1 1 Va adj1 PSU sub-board RV860 1 1 Vaa PSU sub-board RV861 1 1 Va f min PSU sub-board RV950 Vs voltage adjustment LOGIC board(Vsvolt) 〇〇 1 1 Va voltage adjustment LOGIC board(Vavolt) 〇〇 1 1 Vw voltage adjustment LOGIC board(Vwvolt) 〇〇 1 1 Vx voltage adjustment LOGIC board(Vxvolt)

Error history clear LOGIC board (EEPROM) 〇〇〇〇〇〇 1 1

Accumulated power-on time clear

Adjustment position

(Name of the part) When PDP

LOGIC board (EEPROM)

panel is replaced

Check and adjustment Required timing

When X-SUS

board is replaced

When Y-SUS

board

is replaced

Be sure to keep the default setup set at the factory. (Do not change the VR control settings.)

〇〇

〇

When LOGIC

board

is replaced

When ABUS

board

is replaced

When PSU

board

is replaced

Jig/tools

Digital voltmeter , screwdriver

Interface board, personal computer, Digital voltmeter Interface board, personal computer

Labor required

Labor

(persons)

1 1

Time (minutes)

{ : Check, adjustment, or setup

64

(

6.2 Check and Adjustment Method

6.2.1 Check and adjustment procedure

Check and adjustment

Was LOGIC board

replaced?

N

Y

Logic board data transfer

(Section 6.2.5)

Was Panel chassis

replaced?

N

Y

Parameter adjustment

(Section 6.2.2)

Operation/performance check

(Section 6.2.3)

No abnormality?

N

Y

Burn-in mode setting

(Section 6.2.4)

Heat run

Section 6.2.4)

Abnormal

Y

N

Was Panel chassis

replaced?

Y

Accumulated power-on time

reset

(Section 6.2.6)

N

Default setup (Error history clear)

Section 6.2.7)

End

Re-analysis

To Section 4.2

65

6.2.2 Parameter adjustment

List of parameter adjustment items

Item Adjustment items Measurement point Adjustment value

(conditions)

Remarks

1 Vs voltage adjustment PSU board TP5 Voltage setting label

indication value*

±1% (all black)

2 Va voltage adjustment PSU board TP4 Voltage setting label

indication value*

±1% (all black)

3 Vw voltage adjustment X-SUS board connector

CN26 6-pin

4 Vx voltage adjustment X-SUS board connector

CN26 1-pin

Voltage setting label indication value*

±1% (all black)

Voltage setting label indication value*

±1% (all black)

*: Voltage setting label shows the following messages at the top left of the back of the chassis.

< LOT >

Vs = . V Va = . V Vw = . V Vx = . V

CN26①(Vx)

TP5(Vs)

CN26⑥(Vw)

TP4(Va)

TP6(GND)

66

(1) From the main menu, select the voltage adjustment menu with the ↑ key or ↓ key and press

the <ENTER> key.

42H2 Main menu Module information menu Power ON menu Problem analysis menu ** Voltage adjustment menu Accumulated power-on time menu Logic board change menu

EXIT

(2) From the voltage adjustment menu, adjust parameters in the order starting from Vs, Va, Vw, and

Vx.

Select parameter with the ↑ key or ↓ key and adjust the parameter with the → key (increment) or ← key (decrement). The adjustment values are shown on the voltage label that is attached to the panel chassis.

42H2 Voltage adjustment menu ** Voltage adjustment / Vs[V] : **.** Voltage adjustment / Va[V] : **.** Voltage adjustment / Vw[V] : **.** Voltage adjustment / Vx[V] : ***.**

RETURN EXIT

** numbers are shown in decimal values.

Input the numeric value/dot and press the <ENTER> key and then press

the <ENTER> key again to set the adjustment value directly.

(3) Select RETURN with the ↑ key or ↓ key and press the <ENTER> key to return to the menu

screen.

67

6.2.3 Operation performance check items

(1) Environmental conditions

Temperature: Room temperature Judgment distance: 1 meter from panel screen Preheat run: 5 minutes with entire screen lit (white)

(2) Test patterns:

PSEL

H 0 White screen

H 1 Cross slash Large 24 × 24

H 2 Vertical stripe Every other dot

H 3 Horizontal stripe Every other line

H 4 Color bars Vertical bar H_blk divided in 8

H 5 Gray scale Horiz. direction Every 3 dots

H 6 Color gray scale Horiz. direction Every 3 dots

H 7 Divided WINDOW 9 blocks Follow the ROM

L 0 1% WINDOW Center Follow the ROM

L 1 Cross slash Small 12 × 12

L 2 Vertical stripe Every other cell

L 3 Horizontal stripe Every 2 lines

L 4 Color bars Horizontal bar V_blk divided in 8

L 5 Gray scale Vert. direction Every 4 dots

L 6 Color gray scale Vert. direction Every 4 dots *2

L 7 Divided WINDOW 16 blocks Follow ROM *3

Push SW Display pattern Size Details

PDPGO SW CPUGO SW

68

(3) Judgment

Item Test items Test signal Judgment criterion

1 Brightness

non-unifor

mity

2 Black

noise

White screen (W) Brightness non-uniformity in the form of

stripes must not be visible in vertical and

horizontal directions.

Horizontal gray scale

(Each color of

R/G/B)

Rank 3 or higher in the 5-step evaluation. <Rank> 5: No noise 4: Small noise is intermittently visible 3: Noise of 1 line is not visible continuously 2: Noise occurs continuously 1: Much noise occurs continuously

3 Number of

defects

4 Number of

extra dots

5 Number of

flickering

The entire screen

lights

(Each color of

W/R/G/B)

Conforms to Section 1.3.2 Display quality

specifications.

However, when Delivery Specifications

Sheets are prepared for each client, the

specifications shown in the Delivery

Specifications Sheet must be met.

dots

(4) Power ON/OFF

・ Power ON

Set both PDPGO-SW and CPUGO-SW to CN.

・ Power OFF

Set only PDPGO-SW to OFF.(The CPUGO-SW remains ON.)

69

6.2.4 Heat Run Test

(1) Set the module by following the same procedure as that for Problem Analysis in Section 4.7.

(2) From the main menu, select the POWER ON menu with the ↑ key or ↓ key and press the

<ENTER> key.

42H2 Main menu Module information menu ** Power ON menu Problem analysis menu Voltage adjustment menu Accumulated power-on time menu Logic board change menu

EXIT

(3) From the POWER ON menu, select Internal pattern generation with the ↑ key or ↓ key and

press the <ENTER> key. When you press the → key, the main power of the module is turned on. (When you press the ← key, the main power is turned off.)

42H2 Power ON menu ** nternal pattern selection :** 00 - changing colors (full picture) 01 - blue 02 - green or red 03 - syan or magenta 04 - red or green 05 - magenta or syan 06 - yellow 07 - white 08 - black 10 - facrory pattern (OLD) F6 - facrory pattern Burn–in start / execute RETURN EXIT

(4) To change the internal pattern, select the internal pattern selection from the POWER ON menu

using the ↑(up) or ↓(down) key, and press the <ENTER> key.

Setup value 00 01 to 08 patterns are

Display pattern Setup

value 05 Entire screen is cyan

Display pattern

displayed every 2 seconds. 01 Entire screen is blue 06 Entire screen is yellow 02 Entire screen is red 07 Entire screen is white 03 Entire screen is magenta 08 Entire screen is black 04 Entire screen is green F6 Plant burn-in pattern

(5) From the POWER ON menu, select Burn-in start with the ↑ key or ↓ key

and press the <ENTER> key. The display pattern is automatically generated in PDP.

(6) Select RETURN with ↑ key or ↓ key and press <ENTER> key to return to the menu screen.

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6.2.5 Logic board parameter forwarding

(1) The module is set according to the same to failure analysis procedure in

clause 4.7.

The logic board before being exchanged is installed in the module.

(2) From the main menu, select change Logic board menu with the ↑ key or ↓ key

and press the <ENTER> key.

42H2 Main menu Module information menu ** Power ON menu Problem analysis menu Voltage adjustment menu Accumulated power-on time menu Logic board change menu

EXIT

(3) From the logic board change menu, select data copy with the ↑ key or ↓ key and

press the <ENTER> key. Data is read before the Logic board is exchanged.

42H2 Logic board change menu ** Data copy (PDP -> Temp.FILE)/execute Data Paste (PDP -> Temp.FILE)/execute RETURN EXIT

(4) The Logic board is exchanged.

(5) From the logic board change menu, select data paste with the ↑ key or ↓ key and

press the <ENTER> key. Data is written in the exchanged Logic board.

42H2 Logic board change menu Data copy (PDP -> Temp.FILE)/execute ** Data Paste (PDP -> Temp.FILE)/execute RETURN EXIT

(6) Select RETURN with ↑ key or ↓ key and press <ENTER> key to return to the

menu screen.

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6.2.6 Accumulation time reset

(1) The module is set according to the same to failure analysis procedure in clause 4.7.

(2) From the main menu, select Power-on time menu with the ↑ key or ↓ key and

press the <ENTER> key.

42H2 Main menu Module information menu Power ON menu Problem analysis menu Voltage adjustment menu ** Accumulated power-on time menu Logic board change menu

EXIT

(3) From the Power-on time menu, select Operation hours with the ↑ key or ↓ key and

press the <ENTER> key. The Operation hour is input. *It is not possible to change in

the energizing time according to the version of the service software.

42H2 Accumulated power-on time menu ** Running time indication:[hh:mm:ss]=

RETURN EXIT

(4) "minute" is continuously input and < ENTER > key is pushed.

(5) "Second" is continuously input and < ENTER > key is pushed.

(6) Select RETURN with ↑key or ↓key and press <ENTER> key to return to the menu

screen.

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6.2.7 Setup Before Shipment

Before shipment from service, perform the following setup or initialization.

1) Initial values that are shown in the List of EEPROM contents in Section 3.3.1. (Main power of the module is turned off.)

2) Clearing the error codes

(1) From the each menu, select EXIT menu with the ↑ key or ↓key and press the

<ENTER> key.

(2) Shipping the set screen is displayed, and “Y" is pushed.

In shipping the set processing, there is a thing that the power supply of the

module turns on automatically.

The shipment setting ends, and when the power supply of the module is on, the

power supply is turned off automatically.

“N" When the key is pushed, the shipment setting is not done, and the power supply is

Shipment from service setting?(input the "Y" or "N" key)

turned off.

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7. The parts information

Model name Module name Parts No. Parts name Others

1 KE-42TS2 FPF42C128127UB-73 9-885-048-57 FPF16R-XSS5008 BOARD

2 9-885-048-58 FPF16R-YSS5009 BOARD

3 9-885-048-59 FPF16R-LGC5007 BOARD

4 9-885-048-60 FPF16R-ABR5011 BOARD

5 9-885-048-61 FPF16R-ABL5010 BOARD

6 9-885-053-26 FPF42C128127UB-73

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9-878-212-01

Sony EMCS Corporation

Ichinomiya TEC

2003LL08-Data

Made in Japan

 2003. 12

SONY KE-42TS2E, KE-42TS2E-2U Service Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

Contents

１１１１．．．．Out line

Out view

Feature

Specification

Specification

Display quality specification

（１）Ｉ／Ｏ ｓｉｇｎａｌ

（２）LVDS Signal Definition and Function

（３） Video Signal Definition and Function

（４）Connector Specifications

2. 1 Notes to follow during servicing

３３３３．．．．Name and Function

３．１ Configuration

３．２ Block Diagrams ３．２．１ signal Diagrams

３．２．２ Power Diagrams

Function

Logic board Function

3.3.2 Function of X-SUS Board

3.3.3 Function of Y-SUS Board

3.3.4 Function of PSU Board

Protection function

4. Problem Analysis

4. 1 Outline of Repair Flow

4.2 Outline of PDP Module Repair Flow

4.3 Checking the Product Requested for Repair

Operation Test Procedure

4.5 Fault Symptom

4.6 Problem Analysis Procedure

4.6.1 "The entire screen does not light.（Main power is turned off）" Problem analysis procedure

4. 6. 2 "Vertical line/Vertical bar" Problem analysis procedure

4.6.3 "Horizontal bar" Problem analysis procedure

4.7 Problem Analysis Using a Personal Computer

4.7.1 Connecting a computer

4.7.2 Preparing a computer

4.7.3 Problem Analysis Procedure

5.1 Exploded View

5.2 X-SUS Circuit Board Removal/Installation Procedure

5.3 Y-SUS Circuit Board Removal/Installation Procedure

5.4 ABUS-L Circuit Board Removal/Installation Procedure

5.5 ABUS-R Circuit Board Removal/Installation Procedure

5.6 LOGIC Board Removal/Installation Procedure

5.7 PSU Board Removal/Installation Procedure

6.1 List of Check and Adjustment Items

6.2 Check and Adjustment Method

6.2.1 Check and adjustment procedure

6.2.2 Parameter adjustment

6.2.3 Operation performance check items

6.2.4 Heat Run Test

6.2.5 Logic board parameter forwarding

6.2.6 Accumulation time reset

6.2.7 Setup Before Shipment

（１）Ｉ／Ｏｓｉｇｎａｌ