Sony CDX-C4900R, CDX-C5000R, CDX-C5000RX Schematic

SERVICE MANUAL
Ver 1.2 2001. 05
Photo: CDX-C5000R
• The tuner and CD sections have no adjustments.
SPECIFICATIONS
AEP Model
UK Model
Model Name Using Similar Mechanism NEW CD Drive Mechanism Type MG-383Z-121//Q Optical Pick-up Name KSS-720A
CD player section
Signal-to-noise ratio 90 dB Frequency response 10 – 20,000 Hz Wow and flutter Below measurable limit
Tuner section
FM
Tuning range 87.5 – 108.0 MHz Aerial terminal External aerial connector Intermediate frequency 10.7 MHz/450 kHz Usable sensitivity 8 dBf Selectivity 75 dB at 400 kHz Signal-to-noise ratio 66 dB (stereo),
72 dB (mono)
Harmonic distortion at 1 kHz
0.6% (stereo),
0.3% (mono) Separation 35 dB at 1 kHz Frequency response 30 – 15,000 Hz
MW/LW
Tuning range MW: 531 – 1,602 kHz
LW: 153 – 279 kHz Aerial terminal External aerial connector Intermediate frequency 10.7 MHz/450 kHz Sensitivity MW: 30 µV
LW : 40 µV
Power amplifier section
Outputs Speaker outputs
(sure seal connectors) Speaker impedance 4 – 8 ohms Maximum power output 50 W × 4 (at 4 ohms)
General
Outputs Audio outputs
Tone controls Bass ±9 dB at 100 Hz
Power requirements 12 V DC car battery Dimensions Approx. 178 × 50 × 183 mm Mounting dimension Approx. 182 × 53 × 162 mm
Mass Approx. 1.2 kg Supplied accessories Parts for installation and
*1
Equipped with front and rear outputs: CDX-C5000RX/C5000R only Equipped with rear outputs: CDX-C4900R
*2
CDX-C5000RX/C5000R only
Design and specifications are subject to change without notice.
Power aerial relay control lead Power amplifier control lead Telephone ATT control lead
Treble ±9 dB at 10 kHz
(negative ground)
(w/h/d)
(w/h/d)
connections (1 set) Front panel case (1)
*1
*2
9-870-070-12
2001E0400-1 © 2001. 5
FM/MW/LW COMPACT DISC PLAYER
Sony Corporation
e Vehicle Company
Shinagawa Tec Service Manual Production Group
1
Ver 1.1 2000. 08
SERVICE NOTES
This product is classified as a CLASS 1 LASER PRODUCT. This label is located on the bottom of the chassis.
This label is located on the drive unit's internal chassis.
When replacing the chassis (T) of mechanism deck which have the “CAUTION LABEL” attached, please be sure to put a new CAUTION LABEL (3-223-913-11) to the chassis (T).
NOTES ON HANDLING THE OPTICAL PICK-UP BLOCK OR BASE UNIT
The laser diode in the optical pick-up block may suffer electrostatic breakdown because of the potential difference generated by the charged electrostatic load, etc. on clothing and the human body. During repair, pay attention to electrostatic breakdown and also use the procedure in the printed matter which is included in the repair parts. The flexible board is easily damaged and should be handled with care.
NOTES ON LASER DIODE EMISSION CHECK
The laser beam on this model is concentrated so as to be focused on the disc reflective surface by the objective lens in the optical pick­up block. Therefore, when checking the laser diode emission, ob­serve from more than 30 cm away from the objective lens.
Notes on Chip Component Replacement
Never reuse a disconnected chip component.
Notice that the minus side of a tantalum capacitor may be dam-
aged by heat.
TABLE OF CONTENTS
1. GENERAL
Location of controls................................................................. 3
Getting Started......................................................................... 3
Setting the clock ...................................................................... 3
CD Player CD/MD unit ........................................................... 4
Radio ....................................................................................... 5
RDS ......................................................................................... 6
Other Functions ....................................................................... 7
Connections ............................................................................. 8
2. DISASSEMBLY
2-1. Sub Panel Assy.................................................................. 12
2-2. CD Mechanism Block ....................................................... 12
2-3. Main Board ....................................................................... 13
2-4. Heat Sink ........................................................................... 13
2-5. Chassis (T) Assy................................................................14
2-6. Lever Assy......................................................................... 14
2-7. Servo Board....................................................................... 15
2-8. ARM Roller Assy .............................................................. 15
2-9. Chassis (OP) Assy............................................................. 16
2-10. Optical Pick-up Block ....................................................... 16
3. DIAGRAMS
3-1. IC Pin Descriptions ........................................................... 17
3-2. Block Diagram –CD Section–........................................... 23
3-3. Block Diagram –Tuner Section–....................................... 24
3-4. Block Diagram –Display Section–.................................... 25
3-5. Circuit Boards Location .................................................... 25
3-6. Printed Wiring Boards –CD Mechanism Section–............26
3-7. Schematic Diagram –CD Mechanism Section (1/2)– ....... 28
3-8. Schematic Diagram –CD Mechanism Section (2/2)– ....... 29
3-9. Printed Wiring Board –Main Section–.............................. 30
3-10. Schematic Diagram –Main Section (1/3)– ........................ 32
3-11. Schematic Diagram –Main Section (2/3)– ........................ 33
3-12. Schematic Diagram –Main Section (3/3)– ........................ 34
3-13. Schematic Diagram –Sub (CD) Section–.......................... 35
3-14. Printed Wiring Board –Sub (CD) Section–....................... 36
3-15. Printed Wiring Board –Key Section–................................ 37
3-16. Schematic Diagram –Key Section–................................... 38
4. EXPLODED VIEWS
4-1. Chassis Section ................................................................. 42
4-2. Front Panel Section ...........................................................43
4-3. CD Mechanism Section (1) ............................................... 44
4-4. CD Mechanism Section (2) ............................................... 45
4-5. CD Mechanism Section (3) ............................................... 46
SAFETY-RELATED COMPONENT WARNING!!
COMPONENTS IDENTIFIED BY MARK 0 OR DOTTED LINE WITH MARK 0 ON THE SCHEMATIC DIAGRAMS AND IN THE PARTS LIST ARE CRITICAL TO SAFE OPERATION. REPLACE THESE COMPONENTS WITH SONY P ARTS WHOSE PART NUMBERS APPEAR AS SHOWN IN THIS MANUAL OR IN SUPPLEMENTS PUBLISHED BY SONY.
2
5. ELECTRICAL PARTS LIST ........................................ 47
6
SECTION 2
DISASSEMBLY
Note : Follow the disassembly procedure in the numerical order given.
2-1. SUB PANEL ASSY
4 two claws
6 sub panel assy
2 PTT 2.6x8
2-2. CD MECHANISM BLOCK
5 CD mechanism block
2 PTT 2.6x6
3 claw
5 CN500
1 PTT 2.6x8
7 bracket (CD)
6 PTT 2.6x6
12
3
4 CN301
1 PTT 2.6x
8
8
2-3. MAIN BOARD
6 MAIN board
5 ground point screws
(PTT 2.6x6)
4 ground point screw (PTT 2.6x6)
3 PTT 2.6x
2 PTT 2.6x8
1 PTT 2.6x8
2-4. HEAT SINK
6 heat sink
5 PTT 2.6x
4 PTT 2.6x8
3 PTT 2.6x12
1 PTT 2.6x8
2 PTT 2.6x8
13
2-5. CHASSIS (T) ASSY
2 P 2x3
3 P 2x3
2-6. LEVER ASSY
1 Unsolder the lead wires.
4 chassis (T) assy
black
red
white
4 claws
5 guide (disc)
6 lever (R) assy
3 tension spring (LR)
7 lever (L) assy
1 PS 2x4
2 DISC IN SW board
14
Fig. 1
3 PS 2x3
4 LOAD SW board
1 tension spring (RA)
2 arm roller assy
washer
arm
arm
washer
washer washer
2-7. SERVO BOARD
7 PS 2x4
8 PS 2x4
3 Removal the solders.
1 CN3
5 P 2x3
6 loading motor assy
(M903)
2 CN2
9 SERVO board
4 Removal the solders.
2-8. ARM ROLLER ASSY
When installing, take note of the positions
arm (roller) and washers. (Fig. 1)
15
2-9. CHASSIS (OP) ASSY
8 compression spring (FL)
1 tension spring (KF1)
7 chassis (OP) assy
9 compression spring (FL)
2 tension spring (KR1)
5 Fit lever (D) in the
direction of the arrow.
6 Turn loading ring in the direction of the arrow.
4 damper (T)
2-10. OPTICAL PICK-UP BLOCK
1 P 2x3
2 sled motor assy
(M902)
3 damper (T)
3 optical pick-up block
16
SECTION 3
DIAGRAMS
3-1. IC PIN DESCRIPTIONS
IC501 CXD2598Q (DIGITAL SERVO, DIGITAL SIGNAL PROCESSOR) (SERVO BOARD)
Pin No. Pin Name I/O Pin Description
1 DVDD Digital power supply pin 2 DVSS Digital ground 3 SOUT O Servo brock serial data output (Not used.) 4 SOCK O Servo brock serial data read clock output (Not used.) 5 XOLT O Servo brock serial data latch output (Not used.) 6 SQSO O Sub Q 80 bit, PCM peak and level data output. CD TEXT data output 7 SQCK I Clock input from SQSO read output. 8 SCSY I Fixed at “L”.
9 SBSO O Serial output of sub-P to W. (Not used.) 10 EXCK I Clock input from SBSO read output. (Fixed at L) 11 XRST I System reset (“L”: Reset) 12 STSM I System mute input (Fixed at “L”) 13 DATA I Serial data input from CPU. 14 XLAT I Latch input from CPU. Latch serial data at the falling edge. 15 CLOK I Serial data transfer clock input from CPU. 16 SENS O SENS output for CPU. 17 SCLK I Clock input from SENS serial data read. 18 ATSK I/O Input/output for anti-shock. 19 WFCK O WFCK (Write Flame Clock) output (Not used.) 20 XUGF O XUGF output (Not used.) 21 XPCK O XPCK output (Not used.) 22 GFS O GFS output 23 C2PO O C2PO output (Not used.) 24 SCOR O “H” output at either detection, sub code sync S0 or S1. 25 C4M O 4.2336 MHz output (Not used.) 26 WDCK O Word clock input f=2Fs (Not used.) 27 COUT I/O Track number count signal input/output (Not used.) 28 MIRR I/O Mirror signal input/output (Not used.) 29 DVSS Digital ground 30 DVDD Digital power supply pin 31 DFCT I/O Diffect signal input/output (Not used.) 32 FOK I/O Focus OK signal output 33 PWM1 I External control input of spindle motor. 34 LOCK I/O Lock signal input/output 35 MDP O Servo control output of spindle motor. 36 SSTP I Disc most inner track detection signal input 37 FSTIO I/O 2/3 frequency division output of pins ih and ij. (Not used.) 38 SFDR O Sled drive output 39 SRDR O Sled drive output 40 TFDR O Tracking drive output 41 TRDR O Tracking drive output 42 FFDR O Focus drive output 43 FRDR O Focus drive output 44 DVDD Digital power supply pin 45 DVSS Digital ground 46 TEST I Test pin (Fixed at “L”) 47 TES1 I Test pin (Fixed at “L”) 48 XTSL I X’tal select input (“L”: 16.9344 MHz, “H”: 33.8688 MHz) 49 VC I Center voltage input 50 FE I Focus error signal input 51 SE I Sled error signal input
17
Pin No. Pin Name I/O Pin Description
52 TE I Tracking error signal input 53 CE I Center servo analog input 54 RFDC I RF signal input 55 ADIO O Test pin (Not used.) 56 AVSSO Analog ground 57 IGEN I Constant current input from OP amplifier. 58 AVDDO Analog ground 59 ASYO O EFM full-swing output (“L”: VSS, “H”: VDD) 60 ASYI I Asymmetry comparate voltage input 61 RFAC I EFM signal input 62 AVSS3 Analog ground 63 CLTV I VCO control voltage input from master. 64 FILO O Filter output for master PLL (slave=digital PLL) 65 FILI I Filter input from master PLL. 66 PCO O Charge pump output for master PLL. 67 AVDD3 Analog power supply pin 68 BIAS I Asymmetry circuit constant current input 69 VCTL I VCO2 control input from wideband EFM PLL. (Not used.) 70 V16M O VCO2 oscillator output for wideband EFM PLL. (Not used.) 71 VPCO O Charge pump output for wideband EFM PLL. (Not used.) 72 DVSS Digital ground 73 MD2 I Digital out ON/OFF control input (“L”: OFF, “H”: ON) 74 DOUT O Digital out output 75 ASYE I Asymmetry circuit ON/OFF input (“L”: OFF, “H”: ON) 76 DVDD Digital power supply pin 77 LRCK O D/A interface LR clock output (f=Fs) 78 LRCKI I D/A interface LR clock input 79 PCMD O D/A interface serial data output (2s COMP, MSB fast) 80 PCMD I D/A interface serial data input (2s COMP, MSB fast) 81 BCK O D/A interface bit clock output 82 BCKI I D/A interface bit clock input 83 EMPH O Emphasis ON/OFF signal output 84 EMPHI I Emphasis ON/OFF signal input (H: ON, L: OFF) 85 XVDD Power supply for master clock. 86 XTAI I Xtal oscillator input from master clock (16.9344 MHz). 87 XTAO O Xtal oscillator output for master clock (16.9344 MHz). 88 XVSS Ground pin for master clock. 89 AVDD1 Analog power supply pin 90 AOUT1 O Lch analog output 91 AIN1 I Lch OPAMP input 92 LOUT1 O Lch LINE output 93 AVSS1 Analog ground 94 AVSS2 Analog ground 95 LOUT2 O Rch LINE output 96 AIN2 I Rch OPAMP input 97 AOUT2 O Rch analog output 98 AVDD2 Analog power supply pin 99 RMUT O Rch 0 detect Flug (Not used.)
100 LMUT O Lch “0” detect Flug (Not used.)
18
IC5 CXP84640-063Q (CD SYSTEM CONTROL) (SERVO BOARD)
Pin No. Pin Name I/O Pin Description
1 ITRPT Not used in this set.
2, 3 ——Not used in this set. 4, 5 NCO Not used in this set.
6 OPEN I Front panel open detection input
7 CLOSE O Front panel close control output
8 LINKOFF I Bus interface link input
9 NCO Not used in this set. 10 D SW I Down switch input (SW4) 11 SSTP I Limit switch input (SW3)
12, 13 NCO Not used in this set. 14, 15 ——Not used in this set.
16 EMPH O O De-emphasis ON/OFF control output 17 CDMON O CD mechanism deck power control output 18 CD ON O CD power control output 19 A MUT O System attenuate control output 20 LD ON O Laser power ON/OFF control output 21 CD RST O CD system reset output 22 HOLD O Hold switch output 23 AGC CONT O AGC control output 24 ——Not used in this set. 25 PH3 I Not used in this set. 26 TSTIN0 I Not used in this set. 27 TSTIN1 I Not used in this set. 28 TST.CLV I Not used in this set. 29 NCO Not used in this set. 30 RESET I System reset input (“L”=Reset) 31 X IN I Xtal oscillator input from system clock. (10 MHz) 32 X OUT O Xtal oscillator output for system clock. (10 MHz) 33 GND Analog ground 34 XT OUT O Not used in this set. 35 XT IN I Not used in this set. 36 AVSS A/D converter ground 37 AVREF I A/D converter reference voltage input 38 TEP L I Not used in this set. 39 TEP H I Not used in this set. 40 SLED– I Sled drive input 41 PH2 I Not used in this set. 42 SEK/SMET I Fixed at “H” in this set. 43 GFS/MNT2 SEL I Fixed at “H” in this set. 44 SC-JIG ON/OFF I Fixed at “H” in this set. 45 SCLK O CD-TEXT data read clock output 46 LOCK I/O Lock signal input/output 47 ——Not used in this set. 48 SCK2 O Sub Q read clock output 49 SI2 I Sub Q 80 bit, PCM peak and level data 16 bit input. 50 ——Not used in this set. 51 BUS CLK I/O Bus system serial clock input/output 52 BUS SI I Bus system serial interface input 53 BUS SO O Bus system serial interface output 54 F OK I Focus OK signal input 55 GFS I GFS signal detection input 56 TEST MODE I Fixed at “H” in this set.
19
Pin No. Pin Name I/O Pin Description
57 SENS I SENS signal input 58 ——Not used in this set. 59 ——Not used in this set. 60 BU.IN I Back-up power detection input 61 BUSON I Bus on control input 62 IN SW I Disc in switch input (SW1) 63 SELF SW I Self switch input (SW2) 64 SCOR O Sub-code sync output 65 CD-CKO O CD signal process serial clock input 66 LM LOD O Loading motor control output 67 CD DATA O CD signal process serial data output 68 CD-XLAT O CD signal process serial data latch output 69 LM-EJ O Loading motor control output 70 DRV-OE O Focus/tracking coil/sled motor control output 71 MD2 O Digital out ON/OFF control output (“L”: OFF, “H”: ON) 72 VDD Power supply pin 73 NIH I Fixed at “H” in this set. 74 V/Z I Fixed at “H” in this set. 75 PH1 I Not used in this set. 76 ——Not used in this set. 77 DOUT-SEL I Fixed at “H” in this set.
78 – 80 ——Not used in this set.
20
IC501 MB90574PMT-G-266-BND (SYSTEM CONTROL) (MAIN BOARD)
Pin No. Pin Name I/O Pin Description
1 TUNON O Tuner power control output (+5 V)
2 ——Not used. (Open)
3 BUSON O SONY-BUS ON control output
4 – 6 ——Not used. (Open)
7 ILLON O Illumination power control output
8 VCC Power supply pin (+5 V)
9 E2P SIO I/O E2P SONY-BUS serial data input/output 10 E2P CKO I/O E2P SONY-BUS serial clock input/output 11 SYSRST O SONY-BUS system reset output 12 DOORSW (WRITE OUT) I DOOR OPEN/CLOSE detection input (L: CLOSE, H: OPEN) 13 LCDSO (WRITE IN) O LCD serial data output 14 LCDCKO O LCD serial clock output 15 LCDCE O LCD chip enable output 16 BEEP O BEEP output 17 UNISI I SONY-BUS serial data input 18 UNISO O SONY-BUS serial data output 19 UNICKO O SONY-BUS serial clock output 20 UNICKI I SONY-BUS serial clock input 21 CD MD I CD/MD select input (“L”: CD, “H”: MD) (Fixed at “L” in this set) 22 FLASHW I Flash memory write mode detection input 23 ——Not used. (Open) 24 SIRCS I Remote commander (infrared ray reception) input
25 – 28 ——Not used. (Open)
29 DOORIND O DOOR indicator output 30 IFWIDTH O Not used in this set. 31 ——Not used. (Open) 32 NS MASK O Noise mask output 33 VSS Ground 34 C Condenser connection pin of power stabilization. 35 AD ON O Power control output for A/D converter.
36, 37 REIN0, 1 I Rotary encoder 0, 1 input
38 DVCC D/A converter Vref pin (+5 V) 39 DVSS D/A converter ground pin
40, 41 ——Not used. (Open)
42 AVCC Analog power supply pin (+5 V) 43 AVRH A/D converter Vref+ pin (+5 V) 44 AVRL A/D converter Vref– pin 45 AVSS Analog ground
46, 47 KEYIN0, 1 I Key 0, 1 input
48 RCIN0 I Rotary commander key input 49 DSTSEL I Destination setting input (Fixed at “L” in this set) 50 QUALITY I Noise detection input 51 FMAGC I FM AGC detection input 52 MPTH I Multi path detection input 53 VSM I Signal meter detection input 54 VCC Power supply pin (+5 V) 55 RAMBU I RAM reset detection input 56 TUNATT O TUNER mute control output 57 VOLATT O Electric volume mute output 58 ATT O LINE mute output 59 AMPON O Power amplifier standby control output 60 AMPATT O Power amplifier mute control output
21
Pin No. Pin Name I/O Pin Description
61 COLSW I
62 COLSEL I Illumination color select input (“L”: AMBER, “H”: GREEN) (Fixed at “L” in this set) 63 VSS Ground 64 DAVN I Block synchronization detection input of RDS data. 65 FILE I Custom file setting input 66 TEXT I CD text setting input 67 NOSESW I Front panel attachment detection input
68, 69 ——Not used. (Open)
70 I2C SIO I/O I2C BUS serial data input/output 71 I2C CKO I/O I2C BUS serial clock input/output 72 ——Not used. (Open) 73 X1A Low speed oscillation connecting pin (32.768 kHz) 74 X0A Low speed oscillation connecting pin (32.768 kHz) 75 ——Not used. (Open) 76 KEYACK I Key acknowledge input 77 BUIN I Backup voltage detection input 78 ILLIN I Illumination (ILLIN) detection input (Fixed at “L” in this set) 79 TELATT I Telephone (TEL) detection input (Fixed at “L” in CDX-C4900R) 80 ——Not used. (Open) 81 TEST IN I Test mode setting input 82 ACC IN I Accessory power supply (ACC) detection input 83 ——Not used. (Open) 84 LOCKIN I MD LOCK detection input 85 RCIN1 I Rotary commander SHIFT input 86 HSTX I Hardware standby setting input 87 MD2 I Connect to VSS in this set.
88, 89 MD1, 0 I Connect to VCC in this set.
90 RSTX I Reset input 91 VSS Ground 92 X0 High speed oscillation connecting pin (3.68 MHz) 93 X1 High speed oscillation connecting pin (3.68 MHz) 94 VCC Power supply pin (+5 V)
95 – 97 ——Not used. (Open)
98 DIM SEL I 99 TAP CD I TAPE/CD select input (“L”: CD, “H”: TAPE) (Fixed at “L” in this set)
100 – 118 ——Not used. (Open)
119 VSS Ground 120 PW ON O System power control output
Illumination color switch input (“L”: 2 colors, “H”: 1 color) (Fixed at “L” in CDX-C4900R/C5000R, H in CDX-C5000RX)
Dimmer select input (“L”: With dimmer select, “H”: Without dimmer select) (Fixed at “L” in this set)
22
3-2. BLOCK DIAGRAM — CD SECTION —
CDX-C4900R/C5000R/C5000RX
PD
LD
TRACKING
04
OPTICAL PICKUP
KSS-720A
A
C B
D
CONV.
E F
FOCUS
COIL
COIL
I-V
M902 SLED
MOTOR
M901
SPINDLE
MOTOR
M903
LOADING
MOTOR
A
5
C
7
B
6
D
8
FOCUS ERROR
E
11
TRACKING
F
ERROR
10
PD
4
LD
LD
DRIVE
Q101
TRACKING/FOCUS COIL DRIVE
SLED/SPINDLE/LOADING MOTOR DRIVE
10 11
12 13
AMP
LD
3
IC7
FOCUS
COIL
DRIVE
TRACKING
8
COIL
DRIVE
9
SLED
6
MOTOR
7
DRIVE
SPINDLE
MOTOR
DRIVE
LOADING
5
MOTOR
4
DRIVE
RF AMP, LD APC,
ERROR AMP
IC1
22 21
25 24
31 32
18
1 2
MUTE 1
34
MUTE 2
35
RFO RFAC
RF
EQ
FE
TE
LD ON
HOLD SW
AGC CONT
16
14
13
22 21 20
DIGITAL SERVO,
DIGITAL SIGNAL PROCESSOR
IC501
(Page 24)
Q706
(Page 24)
B
SW503
(RESET)
TUNER
SECTION
SYSTEM CONTROL
58 12
20 19 17 18
3 11 77
90 86
1 3
BUS INTERFACE
10 3
13 2
12
9
8
8
IC501 (1/3)
ATT DOOR SW
UNI CKI UNI CKO UNI SI UNI SO BUS ON SYS RST BU IN
RSTX HSTX
IC652
RESET
BATT (H)
CHECK
Q701
IC701
BATT (L)
CHECK
RESET
RESET
DATA
CLK
1
6
4
BU 5V
BATT
BATT
Q705
• Signal path
SIRCS
8
6
3
5
2
4
1
7
CN701
BUS
CONTROL IN
C
DISPLAY SECTION
(Page 25)
LOUT1 LOUT2
LOCK
SQSO SQCK SCOR
XRST DATA XLAT SCLK CLOK SENS
XTALI
XTALO
MD2
GFS FOK
92 95
34
6 7
24
73 11 13 14 17 15 16 22 32
86
87
11V REG
Q361
SW4
(LIMIT)
SW1
(DISC IN)
SW3
(LOAD IN)
SW2
(SELF)
RFDC
FE
TE
SE
FFDR FRDR
TFDR TRDR
SFDR SRDR
MDP
CD 5V
CD 6V
EFM DEM
SERVO
CTL
61
54
50
52
51
42 43
40 41
38 39
35
5V REG
Q364
D/A
I/F
DIGITAL
CLV
D/A
CONV.
SUB
CODE
PROCESS
POWER
CONT Q365
6V REG
Q362
X2
16MHz
POWER
CONT Q363
CD L
R-CH
BATT
TUNER
A
SECTION
CD SYSTEM CONTROL
LOCK
46
SI2
49
SCK2
48
SCOR
64
MD2
71
CD RST
21
CD DATA
67
CD XLAT
68
SCLK
45
CD CKO
65
SENS
57
GFS
55
FOK
54
SSTP
11
D SW
10
IN SW
64
SELF SW
63
LM EJ
69
LM LOD
66
SLED –
40
DRIVE ON
70
LD ON
20
HOLD
22
AGC CONT
23
CD ON
18
CDM ON
17
IC5
A MUT
OPEN
BUS CLK
BUS SI
BUS ON
RESET
BU IN
X IN
X OUT
BUS SO
LNK OFF
19
51 52
61 30 60
31
32
53
6
8
(KEY BOARD)
X1
10MHz
ATT
:CD
23 23
CDX-C4900R/C5000R/C5000RX
3-3. BLOCK DIAGRAM — TUNER SECTION —
J1
(ANTENNA)
TUNER UNIT
TU1
ANTFM MPX
2 10
AM DET
ANTAM
1
IF AM
S-METER
I2C SDA I2C SCL
RDS DET
CNJ151–1, –2 BUS AUDIO IN
1
2
L
R
ELECTRONIC VOLUME
IC151
A
CD
CDL
Q121
MUTE
RDS DECODER
IC51
8
Q111 MUTE
IC90
NOISE
DET
9
SECTION
MUTE CONT
Q90
NOISE ON
10
MULTI
PATH
DET
RDS/RDBS
DEM/DEC
Q131
(Page 23)
8
19
BUFFER
Q1
5 1
14 12 13
SDA SCA
LV IN
20 2
9
MPX
16
R-CH
FDIL OUT LF
3 30
SEL
1
MPX
13
AM
11
AM IF
12
LEVEL
14
MPIN
15
SDA
20
SCL
21
SM
18
SYSTEM CONTROL
VOL ATT
57
TUN ATT
56
QUALITY
50
NS MASK
32
VSM
53
I2C SIO
70
I2C CKO
71
MPTH
52
DAVN
64
IC501 (2/3)
AMP MUTE
OUT LR
BEEP
AMP ON
TEL ATT
ACC IN
TEST IN
TU ON
PW ON
29
MUTE
16 59 60 79
82
81
1
120
Q181
MUTE CONT
Q621, 622
CNJ151–3, –4
AUDIO OUT REAR
–3L–4
R
R-CH
Q171
MUTE
ATT
SECTION
(Page 23)
BATT
CNJ151–5, –6
AUDIO OUT FRONT
–5L–6
R
-CH R
B
CD
ACC
CHECK
Q661
POWER SUPPLY
IC671
7 6
VCC AMP +B
2 3
4
8.7V ON
5.6V ON
STB
ANT +B
BU+B BU 5V COM 8V TU 5.6V TU 8.7V
POWER AMP
12
11
AUX IN
16
STAND BY
4
MUTE
22
TEL ATT
Q571
8
5
9 10 11
C5000R/C5000RX
IC611
5 3
9 8
BATT
COM 8V TU 5.6V TU 8.7V
R-CH
F901
CN601
1 9
2
10
4
12
3
11
16
13
7
15
5
6
FL+ FL–
RL+ RL–
FR+ FR–
RR+ RR–
BATT
C5000R/C5000RX
ATT
ACC
TEST
AMP R
ANT R
OSCO OSCI
4 5
FM AGC E2PROM SDA E2PROM SCL
04
4 17 18
X51
4.332MHz 51
9
10
FM AGC E2P SIO E2P CKO
Signal path :FM
:MW :CD
2424
t
CDX-C4900R/C5000R/C5000RX
3-4. BLOCK DIAGRAM — DISPLAY SECTION —
KEY MATRIX LSW901-917
S901-904
LSW801
KEY
ACTIVE
Q651
CD
SECTION
(Page 23)
C
04
J501
(REMOTE IN)
SIRCS
Q704
ACTIVE
IC951
RECEIVE
ROTARY
ENCODER
RE901
SW504
(NOSE DET)
KEY
Q652
IR
KEY ACT
X502
32.768kHz
SYSTEM CONTROL
IC501 (3/3)
KEY IN0 DATA
46 13
KEY IN1
KEY ACK
76
AD ON
35
RC IN1
85
RC IN0
48
SIRCS
24
RE IN0
36
RE IN1
37
NOSE SW
67
XOA
73
XIA
74
LCD SO
LCD CKO
LCD CE
DOOR IND
ILL ON
14 1547
DOOR IND
29
POWER
7
BATT
XO
92
XI
3.68MHz
93
LCD DRIVE
IC901
64
CL
63
CE
62
GREEN
2
AMBER
1
C4900R/
C5000R
DRIVE
Q551
LED801-803 LED910-915 LSW901-917
CONT Q633
X501
+10V REG
Q631
ILL +B
LCD901
AMBER
DRIVE
Q901
LED901-904
GREEN DRIVE
Q902
3-5. CIRCUIT BOARDS LOCATION
DISC IN SW board
SUB (CD) board
LOAD SW board
KEY board
SUB board
LIMIT SW board
tuner uni (TU1)
MAIN board
SERVO board
25 25
CDX-C4900R/C5000R/C5000RX
THIS NOTE IS COMMON FOR PRINTED WIRING BOARDS AND SCHEMATIC DIAGRAMS. (In addition to this, the necessary note is printed in each block.)
for schematic diagram:
• All capacitors are in µF unless otherwise noted. pF: µµF 50 WV or less are not indicated except for electrolytics and tantalums.
• All resistors are in and 1/ specified.
% : indicates tolerance.
f
C : panel designation.
Note: The components identified by mark 0 or dotted line
U : B+ Line.
• Power voltage is dc 14.4V and fed with regulated dc power
• Voltages are tak en with a V OM (Input impedance 10 M).
• Waveforms are taken with a oscilloscope.
• Circled numbers refer to waveforms.
• Signal path.
: internal component.
with mark 0 are critical for safety. Replace only with part number specified.
supply from ACC and BATT cords. Voltage variations may be noted due to normal produc-
tion tolerances. Voltage variations may be noted due to normal produc-
tion tolerances.
F : FM f : MW J : CD
4
W or less unless otherwise
3-6. PRINTED WIRING BOARDS — CD MECHANISM SECTION —
for printed wiring boards:
X : parts extracted from the component side.
Y : parts extracted from the conductor side.
x : parts mounted on the conductor side.
a
b : Pattern from the side which enables seeing.
Caution: Pattern face side: Parts on the pattern face side seen from the (Side B) pattern face are indicated. Parts face side: Parts on the parts face side seen from the (Side A) parts face are indicated.
: Through hole.
(The other layer’s patterns are not indicated.)
2626
(Page 31)
CDX-C4900R/C5000R/C5000RX
• Semiconductor Location
Ref. No. Location IC1 C-1
IC5 C-6 IC7 F-2 IC501 F-5
Q101 B-2
27 27
CDX-C4900R/C5000R/C5000RX
3-7. SCHEMATIC DIAGRAM — CD MECHANISM SECTION (1/2) — • Refer to page 39 for IC Block Diagrams.
(Page 29)
• Waveforms (MODE:PLAY)
1
0V
Approx. 200mVp-p
qd
(TE)
IC1
2
0V
Approx. 620mVp-p
qf
(FE)
IC1
3
1.2Vp-p
qh
(RFO)
IC1
(Page 33)
Note:
• Voltage and waveforms are dc with respect to ground under no-signal conditions. no mark : CD PLAY
(Page 29)
2828
3-8. SCHEMATIC DIAGRAM — CD MECHANISM SECTION (2/2) — • Refer to page 40 for IC Block Diagrams.
CDX-C4900R/C5000R/C5000RX
(Page 28)
(Page 28)
29 29
Note:
• Voltage is dc with respect to ground under no-signal conditions. no mark : CD PLAY
CDX-C4900R/C5000R/C5000RX
• Semiconductor Location (Side A)
Ref. No. Location D1 E-9
D301 G-4 D501 I-7 D502 H-7 D551 J-13 D552 K-13 D553 K-13 D554 J-12 D555 K-13 D556 J-12 D557 K-13 D558 J-12 D559 K-13 D560 J-12 D571 B-5 D603 B-4 D605 B-5 D611 B-7 D612 B-7 D613 C-7 D614 B-7 D615 C-7 D616 C-7 D617 C-6 D618 C-6 D622 D-9 D624 C-9 D653 I-7 D661 D-5 D662 D-5 D673 C-5 D674 C-5 D701 E-5 D702 C-4 D703 B-3 D704 B-2 D705 B-2 D706 B-2 D708 D-7 D710 D-4
3-9. PRINTED WIRING BOARD — MAIN SECTION —
IC51 I-12 IC90 H-11 IC151 D-11 IC501 I-6 IC652 J-3 IC701 C-3
Q1 G-11 Q111 E-12 Q131 F-12 Q171 B-11 Q181 B-12 Q271 C-11 Q281 C-12 Q363 I-3 Q365 G-2 Q551 J-6 Q571 D-6 Q621 C-10 Q622 C-9 Q633 J-2 Q651 I-8 Q652 I-8 Q661 D-5 Q701 E-5 Q704 G-7 Q705 C-4 Q706 D-4
3030
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