Siemens SLA24C08-D, SLA24C08-D-3, SLA24C16-S-3, SLA24C08-S, SLA24C08-S-3 Datasheet

Standard EEPROM ICs

SLx 24C08/16
8/16 Kbit (1024/2048 × 8bit)

Serial CMOS-EEPROM with

2

C Synchronous 2-Wire Bus

I

Data Sheet 1998-07-27

SLx 24C08/16
Revision History: Current Version: 1998-07-27

Previous Version: 06.97
Page

(in previous
Version)

Page
(in current
Version)

Subjects (major changes since last revision)

3 3 Text was changed to “Typical programming time 5 ms for up to

16 bytes”.

55WP=V

protects upper half entire memory.

CC

4, 5 4, 5 CS0, CS1 and CS2 were replaced by n.c.
5 – The paragraph “Chip Select (CS0, CS1, CS2)” was removed

completely.

11, 12 11, 12 The erase/write cycle is finished latest after 10

8ms.
15 15 Figure 11: second command byte is a CSR and not CSW.
19 19 “Capacitive l oad …” were added.
20 20 Some timings were changed.
20 20 The line “erase/write cycle” was removed.
20 20 Chapter 7.4 “Erase and Write Characteristics” has been added.

I2CBus

Purchase of Siemens I

2

C system p rovided the system conforms to the I2C specifications defined by Philips.

the I

2

C components conveys the license under the Philips I2C patent to use the components in

Edition 1998-07-27
Published by Siemens AG,

Bereich Halbleiter, Marketing­Kommunikation, Balanstraße 73,
81541 München

©

Siemens AG 1998.

All Rights Reserved.

Attention please!

As far as patents or other rights of third parties are concerned, liability is only assumed for components, not for applications, processes
and circuits implemented within components or assemblies.

The information describes the type of component and shall not be considered as assured characteristics.
Terms of delivery and rights to change design reserved.
For questions on technology, delivery and prices please contact the Semiconductor Group Offices in Germany or the Siemens Companies

and Representatives worldwide (see address list).
Due to technical requirements components may contain dangerous substances. For information on the types in question please contact

your nearest Siemens Office, Semiconductor Group.
Siemens AG is an approved CECC man ufacturer.

Packing

Please use the recycling operators known to you. We can also help you – get in touch with your nearest sales office. By agreement we
will take packing material back, if it is sorted. Yo u must bear the costs of transport.

For pa cking material that is returned to us unsorted or which we are not obliged to accept, we shall have to invoice you for any costs in­curred.

Components used in life-support devices or systems must be expressly authorized for such purpose!

Critical components
written appr oval of the Semiconductor Group of Siemens AG.

1 A critical component is a component used in a life-support device or system whose failure can reasonably be expected to cause the

failure of that life-support device or system, or to affect its safety or effectiveness of that device or system.

2 Life support devices or systems are intended (a) to be implanted in the human body, or (b) to support and/or maintain and sustain hu-

man life. If they fail, it is reasonable to assume that the health of the user may be endangered.

1

of the Semiconductor Group of Siemens AG, may only be used in life-support devices or systems2with the express

8/16 Kbit (1024/2048 × 8bit)SerialCMOS

2

EEPROMs, I

Features

• Data EEPROM internally organized as

1024/2048 bytes and 64/128 pages × 16 bytes

• Low power CMOS

V

•

• Two wire serial interface bus, I

• Filtered inputs for noise suppression with

• Clock frequency up to 400 kHz

• High programming flexibility

= 2.7 to 5.5 V operation

CC

compatible

Schmitt trigger

C Synchronous 2-Wire Bus

2

C-Bus

SLx 24C08/16

P-DIP-8-4

– Internal programming voltage
– Self timed programming cycle including erase
– Byte-write and page-write programming, between

1 and 16 bytes

– Typical programming time 5 ms for up to 16 bytes

• High reliability

6

– Endurance 10

cycles

– Data retention 40 years

1)

1)

– ESD protection 4000 V on all pins

• 8 pin DIP/DSO packages

• Available for extended temperature ranges

– Industrial: − 40 °C to + 85 °C
– Automotive: − 40 °C to + 125 °C

P-DSO-8-3

1)

Values are temperature dependent, for further information please refer to your Siemens Sales office.

Semiconductor Group 3 1998-07-27

SLx 24C08/16

Ordering Information
Type Ordering Code Package Temperature Voltage

SLA 24C08-D Q67100-H3572 P-DIP-8-4 – 40 °C … + 85 °C 4.5 V...5.5 V
SLA 24C08-S Q67100-H3518 P-DSO-8-3 – 40 °C … + 85 °C 4.5 V...5.5 V
SLA 24C08-D-3 Q67100-H3435 P-DIP-8-4 – 40 °C … + 85 °C 2.7 V...5.5 V
SLA 24C08-S-3 Q67100-H3517 P-DSO-8-3 – 40 °C … + 85 °C 2.7 V...5.5 V
SLE 24C08-D Q67100-H3226 P-DIP-8-4 – 40°C … + 125 °C 4.5 V...5.5 V
SLE 24C08-S Q67100-H3227 P-DSO-8-3 – 40°C … + 125 °C 4.5 V...5.5 V
SLA 24C16-D Q67100-H3513 P-DIP-8-4 – 40 °C … + 85 °C 4.5 V...5.5 V
SLA 24C16-S Q67100-H3508 P-DSO-8-3 – 40 °C … + 85 °C 4.5 V...5.5 V
SLA 24C16-D-3 Q67100-H3512 P-DIP-8-4 – 40 °C … + 85 °C 2.7 V...5.5 V
SLA 24C16-S-3 Q67100-H3507 P-DSO-8-3 – 40 °C … + 85 °C 2.7 V...5.5 V
SLE 24C16-D Q67100-H3229 P-DIP-8-4 – 40°C … + 125 °C 4.5 V...5.5 V
SLE 24C16-S Q67100-H3230 P-DSO-8-3 – 40°C … + 125 °C 4.5 V...5.5 V

Other types are available on request

– Temperature range (– 55 °C … + 150 °C)
– Package (die, wafer delivery)

1 Pin Configuration

P-DSO-8-3P-DIP-8-4

N.C.
N.C.
N.C.

V

SS

V

18

CC

72

WP
SCL63

SDA54

N.C.
N.C.
N.C.

V

SS

1
2
3
4

IEP02514

V

8

CC

7

WP

6

SCL
SDA

5

IEP02515

Figure 1
Pin Configuration (top view)

Semiconductor Group 4 1998-07-27

Pin Definitions and Functions
Table 1
Pin No. Symbol Function

1, 2, 3 N. C. Not connected

SLx 24C08/16

4

V

SS

Ground
5 SDA Serial bidirectional data bus
6 SCL Serial clock input
7 WP Write protection input
8

V

CC

Supply voltage

Pin Description

Serial Clock (SCL)

The SCL input is used to clock data into the device on the rising edge and to clock data
out of the device on the falling edge.

Serial Data (SDA)

SDA is a bidirectional pin used to transfer addresses, data or control information into the
device or to transfer data out of the device. The output is open drain, performing a wired
AND function with any number of other open drain or open collector devices. The SDA

V

bus requires a pull-up resistor to

CC

.

Write Protection (WP)

V

WP switched to
WP switched to

allows normal read/write operations.

SS

V

protects the entire EEPROM against changes (hardware write

CC

protection).

Semiconductor Group 5 1998-07-27

2 Description

SLx 24C08/16

The SLx 24C08/16 device is a serial e

emory (EEPROM), organized as 1024/2048 × 8 bit. The data memory is divided into

m

lectrically erasable and programmable read only

64/128 pages. The 16 bytes of a page can be programmed simultaneously.

2

The device conforms to the specification of the 2-wire serial I

C-Bus.Low voltagedesign

permits operation down to 2.7 V with low active and standby currents.
The device operates at 5.0 V ± 10% with a maximum clock frequency of 400 kHz and at

2.7 ... 4.5 V with a maximum clock frequency of 100 kHz. The device is available as 5 V

V

type (
applications and as 3 V type (

= 4.5 … 5.5 V) with two temperature ranges for industrial and automotive

CC

V

= 2.7 … 5.5 V) for industrial applications. The

CC

EEPROMs are mounted in eight-pin DIP and DSO packages or are also supplied as
chips.

V

SS

V

CC

Chip Address

Control

Logic

WP

Programming

Control

H.V. Pump

SCL

SDA

Start/

Stop

Logic

Serial

Control

Logic

Address

Logic

X

DEC

EEPROM

Page Logic

Y DEC

Dout/ACK

IEB02530

Figure 2
Block Diagram

Semiconductor Group 6 1998-07-27

SLx 24C08/16

3 I2C-Bus Characteristics

The SLx 24C08/16 devices support a master/slave bidirectional bus oriented protocol in
which the EEPROM always takes the role of a slave.

V

CC

Slave 1 Slave 2 Slave 3 Slave 4

SCL

Master

SDA

Slave 8Slave 5 Slave 6 Slave 7

V

CC

IES02183

Figure 3
Bus Configuration

Master Device that initiates the transfer of data and provides the clock for both

transmit and receive operations.

Slave Device addressed by the master, capable of receiving and transmitting

data.

Transmitter The device with the SDA as output is defined as the transmitter. Due to

the open drain characteristic of the SDA output the device applying a low
level wins.

Receiver The device with the SDA as input is defined as the receiver.

Semiconductor Group 7 1998-07-27