Sharp LH5P1632N-15, LH5P1632D-80, LH5P1632N-80 Datasheet
LH5P1632
CMO S 512 K (32 K × 16) Pseudo-Static RAM
FEATURES
•• 32,768 × 16 bi t orga niza tio n
•• Access time: 80/15 0 n s (MAX.)
•• Cycle ti me: 140/210 ns ( MIN.)
•• Sing le +5 V powe r su ppl y
•• Powe r consu mption (MAX.):
Operating : 467.5/327 .5 mW
Standb y: 16.5 mW
•• TTL compatible I/O
•• 256 refresh cycles /4 ms (MAX.)
•• Available for auto-refresh mode
•• Packages:
40-pi n , 600 -mil DIP
40-pi n , 525 -mil S OP
DESCRIPTION
The LH5P1632 is a 512K-bit Pseudo-Static RAM
organized as 32,768 × 16 bits. It is fabricated using
silicon-gate CMOS process technology.
PIN CONNECTIONS
5P1632-1
TOP VIEW
5
6
7
8
11
12
I/O
1
A
2
34
33
32
31
30
29
26
A
4
A
3
9
10
A
0
A
1
28
27
A
5
A
13
A
14
LOE/RFSH
13
14
15
36
35
I/O
2
A
11
I/O
4
UOE/TEST
1
CE
A
6
I/O
13
I/O
14
A
12
40-PIN DIP
40-PIN SOP
3
4
A
7
38
37
LWR
A
8
A
10
1
2
40
39
V
CC
GND
UWR
I/O
3
I/O
15
I/O
16
24
25
16
17
I/O
6
I/O
11
I/O
12
I/O
5
22
23
18
19
I/O
8
I/O
9
I/O
10
I/O
7
21
20 V
CC
GND
A
9
Figure 1. Pin Connections for DIP and
SOP Packages
1
I/O
2
CLOCK
GENERATOR
LWR
A
12
A
13
A
14
A
3
A
4
A
5
A
6
A
7
A
8
A
9
A
11
A
10
A
2
A
1
A
0
COLUMN
ADDRESS
BUFFER
ROW
ADDRESS
BUFFER
REFRESH
ADDRESS
COUNTER
DATA
IN
BUFFER
DATA
OUT
BUFFER
I/O
SELECTOR
COLUMN
DECODER
SENSE
AMPS
ROW
DECODER
EXT/INT
ADDRESS
MUX
REFRESH
CONTROLLER
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
I/O
8
V
BB
GENERATOR
GND
5P1632-2
I/O
1
LOE/
RFSH
UOE/
TEST
1
11
10
9
8
7
6
5
4
3
2
37
36
35
34
33
32
38
21
20
12
13
14
15
16
17
18
19
30
CE
MEMORY
ARRAY
A8 - A
14
A0 - A
7
31
LWR
39
DATA
IN
BUFFER
DATA
OUT
BUFFER
40
1
I/O
10
I/O
11
I/O
12
I/O
13
I/O
14
I/O
15
I/O
16
I/O
9
22
23
24
25
26
27
28
29
V
CC
GND
V
CC
Figure 2. LH5P1632 Block Diagram
PIN DESCRIPTION
SIGNAL PI N N AM E
A0 – A
14
Addre ss input
LWR, UWR Write e na ble
LOE/RFSH, UOE Outpu t e nab le/ Ref res h in pu t
CE Chip ena ble in put
SI GNA L PIN NA ME
I/O1 – I/O
16
Data in put /out put
V
CC
Powe r S upp ly
GND Grou nd
LH5P1632 CMOS 512K (32K × 16) Pseudo-Static RAM
2
ABSOLUTE MAXIMUM RATINGS
PARAMETER SYMBOL RATING UNIT NOTE
Appli ed v ol tage on al l p ins V
T
–1.0 to +7.0 V 1
Output sh ort ci rcu it c urr ent I
O
50 mA
Power dis sipati on P
D
600 mW
Operating temperature Topr 0 to +70
°C
Storage temperature Tstg –65 to +150
°C
NOTE:
1. The maximum applicable voltage on any pin with respect to GND.
RECOMMENDED OPERATING CON DITIONS (TA = 0 to +70°C)
PARAMETER SYMBOL M IN. TY P. MAX. UNIT NOTE
Suppl y v olt age
V
CC
4.5 5.0 5.5 V
GND 0 0 0 V
Input vol tage
V
IH
2.4 VCC + 0.3 V
V
IL
–0.3 0.8 V 1
NOTE:
1. VIL (MIN.) = –1. 0 V when the p ulse width is less than 2 0 ns.
CAPACITANCE (TA = 0 to +70°C, f = 1 MHz, VCC = 5.0 V ±10%)
PARAMETER CONDITIONS SYMBOL MIN. MAX. UNIT
Input cap acitan ce
A
0
– A
14
C
IN1
8pF
LWR, UWR C
IN2
5pF
CE
C
IN3
5pF
LOE/RF SH, UOE C
IN4
5pF
Input/ Out put ca pac ita nce I/O
1
– I/O
16
C
OUT1
10 pF
DC CHARACTERISTICS (TA = 0 to +70°C, VCC = 5.0 V ±10%)
PARAMETER SYMBOL CONDITIONS MIN. MAX. U NIT NOTE
Average su ppl y c urr ent in
normal op era tio n
t
RC
= tRC (MIN)
I
CC1
LH5P 163 2-8 0 85
mA 1, 2
LH5P1632-15 65
Suppl y c urre nt in
standb y m ode
I
CC2
3.0 mA 1, 3
Average su ppl y c urr ent in
CPU in ter nal cy cle
(
LWR = UWR = LOE/RFSH =
UOE = VIH)
I
CC3
LH5P 163 2-8 0 85
mA 1, 2
LH5P1632-15
Input lea kag e c urr ent I
LI
0 V ≤ VIN ≤ 6.5 V,
0 V except on tes t pins
–10 10
µA
I/O le aka ge cur ren t
I
LO
0 V ≤ V
OUT
≤ VCC + 0 .3 V,
Outpu ts in high-i mpedan ce
state
–10 10 µA
Output HI GH vol tag e V
OH
I
OUT
= – 1.0 mA 2.4 V
Output LO W v olt age V
OL
I
OUT
= 4 .0 mA 0.4 V
NOTES:
1. Specified values are w ith outputs open.
2. I
CC1
and I
CC3
depend on the cycle time.
3.
CE = H igh, LOE/RFSH = High.
CMOS 512K (32K × 16) Pseudo-Static RAM LH5P1632
3
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