VND670SP
DUAL HIGH SIDE SWITCH WITH DUAL POWER MOS
GATE DRIVER (BRIDGE CONFIGURATION)
TYPE R
DS(on)
I
OUT
V
DSS
VND670SP 30 mΩ 15 A 40 V
■ OUTPUT CURRENT:15A PER CHANNEL
■ 5V LOGIC LEVEL COMPATIBLE INPUTS
■ GATE DRIVE FOR TWO EXTERNAL POWER
MOS
■ UNDERVOLTAGE AND OVERVOLTAGE
SHUT-DOWN
■ OVERVOLTAGE CLAMP
■ THERMAL SHUT DOWN
■ CROSS-CONDUCTION PROTECTION
■ CURRENT LIMITATION
■ VERY LOW STAND-BY POWER
CONSUMPTION
■ PWM OPERATION UP TO 10 KHz
■ PROTECTION AGAINST:
LOSS OF GROUND AND LOSS OF V
■ REVERSE BATTERY PROTECTION (*)
CC
DESCRIPTION
The VND670SP is a monolithic device made
using STMicroelectronics VIPower technology,
intended for driving motors in full bridge
BLOCK DIAGRAM
10
1
PowerSO-10
configuration. The device integrates two 30 m
Power MOSFET in high side configuration, and
provides gate drive for two external Power
MOSFET used as low side switches.IN
allow to select clockwise or counter clockwise
and IN
A
drive or brake; DIAGA/ENA, DIAGB/ENBallow to
disable one half bridge and feedback diagnostic.
Built-in thermal shut-down, combined with a
current limiter, protects the chip in
overtemperature and short circuit conditions.
Short to battery protects the external connected
low-side Power MOSFET.
V
CC
Ω
B
DIAGA/EN
DIAG
PWM
(*) See note at page 5
IN
A
IN
B
A
/EN
B
B
Undervolt.
Overtemp.AOvertemp.
INTERNAL
SUPPLY
LOGIC
B
Current
Limiter B
Short to battery
Short to battery
Current
Limiter A
GND
OUT
OUT
GATE
GATE
A
B
A
B
June 2000 1/13
1
VND670SP
ABSOLUTE MAXIMUM RATING
Symbol Parameter Value Unit
V
I
max1
I
max2
I
I
I
EN
I
pw
I
gs
V
ESD
T
T
STG
CURRENT AND VOLTAGECONVENTIONS
Supply voltage -0.3 .. 40 V
CC
Maximum output current (continuous) 15 A
Maximum output current (250 ms pulse duration) 20 A
Reverse output current (continuous) -15 A
R
Input current +/- 10 mA
IN
Enable pin current +/- 10 mA
PWM pin current +/- 10 mA
Output gate current +/- 20 mA
Electrostatic discharge (R=1.5kΩ, C=100pF) 2000 V
Junction operating temperature -40 to 150 °C
j
Storage temperature -55 to 150 °C
I
CC
I
INA
I
INB
I
ENA
I
ENB
IN
A
IN
B
DIAGA/EN
DIAGB/EN
I
pw
PWM
V
CC
OUT
A
OUT
B
A
B
GATE
GATE
GND
A
B
I
gsB
I
gsA
V
gsB
I
V
OUTB
gsA
I
OUTA
V
OUTB
V
OUTA
V
CC
V
V
INA
INB
V
ENB
V
pw
V
ENA
CONNECTION DIAGRAM (TOP VIEW)
INPUT B
DIAG
/EN
B
A
/EN
B
A
V
CC
PWM
DIAG
INPUT A
10
I
GND
6
7
8
9
5
4
3
2
1
OUTPUT B
GATEB
GROUND
GATEA
OUTPUT A
11
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1
VND670SP
THERMAL DATA
Symbol Parameter Value Unit
R
thj-case
R
thj-amb
(*) When mounted using the recommended pad size on FR-4 board (See AN515 Application Note).
ELECTRICAL CHARACTERISTICS (VCC=9V up to 18V; -40°C<Tj<150°C; unless otherwise specified)
POWER
Symbol Parameter Test Conditions Min Typ Max Unit
V
CC
R
ON
I
s
V
gate
V
gs,cl
Thermal resistance junction-case (per channel) (MAX) 1.4 °C/W
(*) Thermal resistance junction-ambient (MAX) 50 °C/W
Operating supply voltage 5.5 26 V
On state resistance
Supply current
=12A
I
LOAD
I
=12A; Tj=25oC26
LOAD
ON state
OFF state
50
30
15
40
mΩ
mΩ
mΑ
µA
Gate output voltage 5.0 8.5 V
Gate output clamp voltage Igs=-1 mA 6.8 7.4 8.5 V
SWITCHING (VCC=13V, R
LOAD
=1.1Ω)
Symbol Parameter Test Conditions Min Typ Max Unit
(dV
(dV
t
D(on)
t
D(off)
OUT
OUT
t
dong
t
t
doffg
t
t
del
t
r
t
f
/dt)
/dt)
rg
fg
Turn-on delay time
50 150 µs
Turn-on delay time 45 135 µs
Output voltage rise time 50 150 µs
Output voltage fall time 40 120 µs
Turn-on voltage slope 160 500 V/ms
on
Turn-off voltage slope 230 1200 V/ms
off
VgsTurn-on delay time
Vgsrise time 2.6 10 µs
VgsTurn-off delay time 1.0 5.0 µs
Vgsfall time 2.2 10 µs
External MOSFET turn-on
dead time
Input rise time < 1µs (see fig. 1)
C1=4.7nF
0.5 2 µs
Break to ground configuration
(see fig. 2)
(see fig. 3) 600 1800 µs
150
PROTECTION AND DIAGNOSTIC
Symbol Parameter Test Conditions Min Typ Max Unit
V
V
T
V
USD
I
LIM
TSD
V
OV
ocl
sat
Undervoltage shut-down 5.5 V
Overvoltage shut-down 36 43 V
Current limitation 30 45 A
Thermal shut-down
temperature
Output turn-off clampvoltage
External MOSFET saturation
voltage detection threshold
V
= 3.25 V 150 170 200 °C
IN
=12A, L=6mH
I
LOAD
V
-55 VCC-41 V
CC
2.5 4.2 5.5 V
3/13
1
VND670SP
ELECTRICAL CHARACTERISTICS (continued)
PWM
Symbol Parameter Test Conditions Min Typ Max Unit
V
pwl
I
pwl
V
pwh
I
pwh
V
pwhhyst
V
pwcl
V
pwtest
I
pwtest
LOGIC INPUT (INA/INB)
Symbol Parameter Test Conditions Min Typ Max Unit
V
IL
I
INL
V
IH
I
INH
V
IHYST
V
ICL
PWM low level
voltage
1.5 V
PWM pin current Vpw=1.5V 1 µA
PWM high level
voltage
3.25 V
PWM pin current Vpw=3.25V 10 µA
PWM hysteresis voltage 0.5 V
PWM clamp voltage
I
pw
I
pw
=1mA
=-1mA
V
CC
-5.0
+0.3
VCC+0.7
-3.5
VCC+1.0
-2.0
Test modePWM pin voltage -3.5 -2.0 -0.5 V
Test modePWMpin current V
= -2.0 V -2000 -500 µA
pwtest
Input low level voltage 1.5 V
Input current VIN=1.5 V 1 µA
Input high level voltage 3.25 V
Input current VIN=3.25 V 10 µA
Input hysteresis voltage 0.5 V
Input clamp voltage
I
IN
I
IN
=1mA
=-1mA
6.8
-1.0
7.4
-0.7
8.5
-0.3
V
V
V
V
ENABLE (LOGIC I/O PIN)
Symbol Parameter Test Conditions Min Typ Max Unit
Normal operation
V
I
V
I
ENH
V
EHYST
V
ENCL
V
ENL
ENL
ENH
DIAG
Enable low level voltage
(DIAG
/ENXpin acts as an
X
input pin)
1.5 V
Enable pin current VEN= 1.5 V 1 µA
Normal operation
Enable high level voltage
/ENXpin acts as an
(DIAG
X
input pin)
3.25 V
Enable pin current VEN= 3.25 V 10 µA
Normal operation
Enable hysteresis voltage
Enable clamp voltage
/ENXpin acts as an
(DIAG
X
input pin)
=1mA
I
EN
IEN=-1mA
0.5 V
6.8
-1.0
7.4
-0.7
8.5
-0.3
Fault operation
Enable output low level
voltage
/ENXpin acts as an
(DIAG
X
input pin)
=1.6 mA
I
EN
0.4 V
V
V
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