STMicroelectronis unique "Single Feature Size™"
strip-based process. The resulting transistor
shows extremely high packing density for low onresistance, rugged avalanche characteristics and
less critical alignment steps therefore a remarkable manufacturing reproducibility.
APPLICATIONS
■ MOTOR CONTROL
■ DC-DC & DC-AC CONVERTERS
3
1
D2PAK
TO-263
(Suffix “T4”)
ADD SUFFIX “T4” FOR ORDERING IN TAPE & REEL
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
DS
V
DGR
V
GS
(*)Drain Current (continuos) at T
I
D
I
D
(
I
DM
P
tot
dv/dt
E
AS
T
stg
T
j
(
Pulse widt h l i m i ted by safe op erating area
•)
(*) Curren t Lim i ted by Package
February 2002
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)
55V
55V
Gate- source Voltage± 16V
= 25°C
C
Drain Current (continuos) at TC = 100°C
•)
Drain Current (pulsed)320A
Total Dissipation at TC = 25°C
80A
57A
300W
Derating Factor2W/°C
(1)
Peak Diode Recovery voltage slope7V/ns
(2)
Single Pulse Avalanche Energy1.4mJ
Storage Temperature
Max. Operating Junction Temperature
Note: F or t he P- CHAN NEL MOS FE T ac tu al po la rity o f v olt ages a nd
current has to be rever sed
≤ 40A, di/dt ≤ 300A/µs , VDD ≤ V
(1) I
SD
(2) Starting Tj = 25 oC, ID = 80A, VDD = 40V
-55 to 175°C
(BR)DSS
, Tj ≤ T
JMAX.
1/7
STB80PF55
THERMA L D ATA
Rthj-case
Rthj-amb
T
Thermal Resistance Junction-case
Thermal Resistance Junction-ambient
Maximum Lead Temperature For Soldering Purpose
l
Max
Max
Typ
0.5
62.5
300
°C/W
°C/W
°C
ELECTRICAL CHARACTERISTICS (T
= 25 °C unless otherwise specified)
case
OFF
SymbolParameterTest ConditionsMin.Typ.Max.Unit
I
V
(BR)DSS
Drain-source
= 250 µA, VGS = 0
D
55V
Breakdown Voltage
V
= Max Rating
DS
V
= Max Rating TC = 125°C
DS
V
= ± 16 V
GS
1
10
±100nA
ON
(*)
I
DSS
I
GSS
Zero Gate Voltage
Drain Current (V
GS
Gate-body Leakage
Current (V
DS
= 0)
= 0)
SymbolParameterTest ConditionsMin.Typ.Max.Unit
V
V
GS(th)
R
DS(on)
Gate Threshold Voltage
Static Drain-source On
= VGS ID = 250 µA
DS
V
= 10 V ID = 40 A
GS
234V
0.0160.018
Resistance
DYNAMIC
SymbolParameterTest ConditionsMin.Typ.Max.Unit
> I
g
fs
C
iss
C
oss
C
rss
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V
DS
I
D
V
DS
= 40 A
x R
D(on)
DS(on)max,
= 25V, f = 1 MHz, VGS = 0
32S
5500
1130
600
µA
µA
Ω
pF
pF
pF
2/7
STB80PF55
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
SymbolParameterTest ConditionsMin.Typ.Max.Unit
t
d(on)
t
r
Q
g
Q
gs
Q
gd
(*)
Turn-on Delay Time
Rise Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
= 25 V ID = 40 A
V
DD
R
= 4.7 Ω VGS = 10 V
G
(Resistive Load, Figure 3)
= 25 V ID = 80 A VGS= 10V
V
DD
35
190
190
27
65
258nC
ns
ns
nC
nC
SWITCHING OFF
(*)
SymbolParameterTest ConditionsMin.Typ.Max.Unit
t
d(off)
Turn-off Delay Time
t
f
Fall Time
V
DD
R
= 4.7 Ω V
G
GS
= 10 V
165
80
= 25 V ID = 40 A
(Resistive Load, Figure 3)
t
r(Voff)
t
t
f
c
Off-voltage Rise Time
Fall Time
Cross-over Time
SOURCE DRAIN DIODE
(*)
= 40 V ID = 80 A
V
clamp
R
= 4.7 Ω V
G
GS
= 10 V
(Inductive Load, Figure 5)
60
40
85
SymbolParameterTest ConditionsMin.Typ.Max.Unit
I
SD
I
SDM
V
SD
t
rr
Q
rr
I
RRM
(*)
Pulse width [ 300 µs, duty cycle 1.5 %.
(
•)
Pulse width limited by T
Source-drain Current
(•)
Source-drain Current (pulsed)
(*)
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
JMAX
I
= 80 A VGS = 0
SD
= 80 Adi/dt = 100A/µs
I
SD
V
= 25 VTj = 150°C
DD
(see test circuit, Figure 5)
80
320
1.3V
110
495
9
ns
ns
ns
ns
ns
A
A
ns
nC
A
3/7
STB80PF55
Fig. 1: Unclamped Inductive Load Test CircuitFig. 1: Unclamped Inductive Load Test CircuitFig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive
Load
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Information furnished is believed to be ac curate and reli able. Howev er, STMicroel ectronics assumes no responsibilit y for the consequence s
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implic ation or otherwise under any patent or patent rights of STMi croelectr onics. Specifications mentioned in thi s publicati on are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as cri tical comp onents in life support dev i ces or systems wi t hout express written ap proval of STMi croelect ro nics.
The ST log o i s registered trademark of STMicroelectronics
2002 STMi croelectr oni cs - All Rights Reserved
All other names are the property of their respective owners.
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