Intended for analog and digital satellite receivers,
the LNBP is a monolithic linear voltage regulator,
assembled in Multiwatt-15, PowerSO-20 and
PowerSO-10,specifically designed to provide the
powering voltages and the interfacing signals to
the LNB downconverter situated in the antenna
via the coaxial cable. Since most satellite
receivers have two antenna ports, the output
voltage of the regulator is available at one of two
logic-selectable output pins (LNBA, LNBB). When
the IC is powered and put in Stand-by (EN pin
LOW), both regulator outputs are disabled to
allowtheantennadownconverterstobe
supplied/controlled by others satellite receivers
sharing the same coaxial lines. In this occurrence
the device will limit at 3 mA (max) the backward
current that could flow from LNBA and LNBB
output pins to GND.
For slave operation in single dish, dual receiver
systems, the bypass function is implemented by
an electronic switch between the Master Input pin
(MI) and the LNBA pin, thus leaving all LNB
powering and control functions to the Master
Receiver. This electronic switch is closed when
the device is powered and EN pin is LOW.
The regulator outputs can be logic controlled to
be 13 or 18 V (typ.)by mean of the VSEL pin for
remote controlling of LNBs. Additionally, it is
possible to increment by 1V (typ.) the selected
voltage value to compensate the excess voltage
drop along the coaxial cable (LLC pin HIGH).
In order to reduce the power dissipation of the
device when thelowest output voltage is
selected, the regulator has two Supply Input pins
V
CC1
andV
.Theymustbepowered
CC2
respectively at 16V (min) and 23V (min), and an
internal switchautomatically will select the
suitable supply pin according to the selected
output voltage. If adequate heatsink is provided
and higher power losses are acceptable, both
supply pins can be powered by the same 23V
sourcewithoutaffectinganyothercircuit
performance.
The ENT (Tone Enable)pin activates the internal
oscillatorso that the DC output is modulatedby a
±0.3 V, 22KHz (typ.) square wave. This internal
oscillator is factory trimmed within a tolerance of
±2KHz, thus no further adjustments neither
externalcomponents are required.
A burst coding of the 22KHz tone can be
September 1998
1/18
LNBP10 SERIES - LNBP20
accomplished thanks to the fast response of the
ENT input and the promptoscillator start-up. This
helps designers who want to implement the
DiSEqC protocols(*).
In order to improve design flexibility and to allow
implementation ofnewcomingLNBremote
control standards, an analogic modulation input
pin is available (EXTM). An appropriate DC
blocking capacitor must be used to couple the
modulatingsignal source to the EXTM pin. When
external modulation is not used, the relevant pin
canbe leftopen.
Two pins are dedicated to the overcurrent
protection/monitoring: CEXTandOLF. The
overcurrent protection circuit works dynamically:
as soon as an overloadis detectedin either LNB
output, the output is shut-down for a time Toff
determined by the capacitor connected between
CEXT and GND. Simultaneously the OLF pin,
from HIGH IMPEDANCE state goes LOW. After
the time has elapsed, the outputis resumedfor a
time t
=1/15t
on
(typ.) and OLF goes in HIGH
off
IMPEDANCE. If the overload is still present, the
protection circuit will cycle again through t
until the overload is removed. Typical ton+t
t
on
off
and
value is 1200ms when a 4.7µF external capacitor
is used.
This dynamic operation can greatly reduce the
power dissipation in short circuit condition, still
ensuring excellent power-on start up even with
highlycapacitiveloads on LNBoutputs.
The device is packaged in Multiwatt15 for
thru-holes mounting and in PowerSO-20 for
surface mounting. When a limited functionality in
a smaller package matches design needs, a
range of cost-effective PowerSO-10 solutions is
also offered. All versions have built-in thermal
protectionagainst overheatingdamage.
that is an open collector diagnostic output flag,
(*): External components are needed to comply to level 2.x and above (bidirectional) DiSEqC bus hardware requirements. DiSEqC is
a trademark of EUTELSAT.
343333333
and port selection. In
stand-bymode this port is
poweredby the MI pinvia
theinternal Bypass Switch
VSELOutput Voltage
Selection: 13 or
Logic control input: See
truthtable
454444444
18V (t yp)
ENPort EnableLogiccontrolinput: See
565555555
truthtable
OSELPort SelectionLogiccontrolinput: See
7 7 9 NANANANANANA
truthtable
GNDGr oundCircuit Ground.Itis
internally connected to the
dieframe
81
10
11
20
ENT22 KHz Tone
Enable
CEXTExternal Capacitor Timingcapacitor used by
Logic control input: See
truthtable
9137777777
10148888888
theDynamicOverload
Protection.Typical
application is 4.7µFfora
1200ms cycle
EXTMExternal
Modulat i on
ExternalModulation Input.
Needs DC decoupling to
1115NANANA9NA99
theAC source. If notused,
canbe leftopen.
LLCLine Length
Compens. (1V t yp)
OLFO ver Load F lagLogic output (open
Logic control input: See
truthtable
1216NANA9NA9NA10
1317NA9NANA1010NA
Collector). Normally in
HIGH IMPEDANCE,goes
LOW when current or
thermal overload occurs.
MIMaster InputIn stand-by mode, the
1418NA101010NANANA
voltage onMI is routed to
LNBApin. Canbe left
openif bypass functionis
notneeded
LNBBOutput PortSeetruth tables forvoltage
151910NANANANANANA
and port selection.
NOTE: The limited pin availability of the PowerSO-10 package leads to drop some functions.
6666666
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LNBP10 SERIES - LNBP20
ABSOLUTE MAXIMUMRATING
SymbolParameterValueUnit
V
DC InputVoltage(VCC1,VCC2,MI)28V
i
OutputCurrent (LNBA, LNBB)Internally limited
I
o
Logic InputVoltage (ENT, EN,OSEL, VSEL,LLC)-0.5 to 7V
V
i
BypassSwitchCurrent900mA
I
SW
Power Dissipation at T
P
tot
StorageTemperature Range- 40 to 150
T
stg
Operating JunctionTemperature Range- 40 to 125
T
op
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions
is not implied
THERMAL DATA
SymbolParameterValueUnit
R
thj-case
Thermal ResistanceJunction-case2
LOGICCONTROLS TRUTH TABLES
Control I/OPin NameLH
OUTOLFI
INENT22KHz tone O F F22KHz tone ON
INENSee t a ble belowS ee table below
INOS ELSee t a ble belowS ee table below
INV S E LSee table belowSee table below
INLLCSee t a ble belowS ee table below