SANYO LC75742W, LC75742E Datasheet

Ordering number : EN6142

43099TH (OT) No. 6142-1/18

Overview

The LC75742E and LC75742W are 1/2 duty VFD drivers that can be used for electronic tuning frequency display and other applications under the control of a microcontroller. These products can directly drive VFDs with up to 82 segments. It also includes a key scan circuit and can support input from up to 30 keys and can thus reduce the number of lines to the front panel in application systems.

Features

• Key input from up to 30 keys (Key scans are only performed when keys are pressed.)

• 82 segment outputs.

• Noise reduction circuits are built into the output drivers.

• Serial data I/O supports CCB format communication with the system controller.

• Dimmer and sleep mode can be controlled by serial data input.

• High generality since display data is displayed without the intervention of a decoder.

• All segments can be turned off with the BLK pin.

Package Dimensions

unit: mm

3151-QFP64E

unit: mm

3190-SQFP64

14.0

17.2

1.0

1.6

0.15

0.35

0.1

15.6

0.8

3.0max

2.7

14.0

17.2

1.0

1.6

0.8

SANYO: QFP64E (QIP64E)

[LC75742E]

LC75742E, 75742W

SANYO Electric Co.,Ltd. Semiconductor Company

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

1/2 Duty VFD Driver with Key Input Function

CMOS IC

Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft’s control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications.

SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein.

• CCB is a trademark of SANYO ELECTRIC CO., LTD.

• CCB is SANYO’s original bus format and all the bus addresses are controlled by SANYO.

10.0

12.0

1.25

0.5

1.25

1.25 0.5 1.250.18

12.0

116

10.0

0.5

1.7max

0.5

0.1

0.15

SANYO: SQFP64

[LC75742W]

Specifications

Absolute Maximum Ratings at Ta = 25°C, VSS= 0 V

Allowable Operating Ranges at Ta = –40 to +85°C, VDD= 4.5 to 5.5 V, VSS= 0 V

Note: Since DO is an open-drain output, these values will vary with the pull-up resistance R

and the load capacitance CL.

No. 6142-2/18

LC75742E, LC75742W

Parameter Symbol Conditions

Ratings

Unit

min typ max

Supply voltage

4.5 5.0 5.5 V

8 12 18 V

1 DI, CL, CE, BLK 0.8 V

5.5 V

High-level input voltage V

2 OSCI 0.8 V

3 KI1 to KI5 0.6 V

Low-level input voltage V

DI, CL, CE, BLK, OSCI, KI1 to KI5 0 0.2 V

Guaranteed oscillator frequency range f

OSC

OSCI, OSCO 0.4 1.6 3.0 MHz

Recommended external resistor value R

OSC

OSCI, OSCO 4.7 20 100 kΩ

Recommended external capacitor value C

OSC

OSCI, OSCO 22 47 100 pF

Clock low-level pulse width t

øL

CL : See figure 1. 160 ns

Clock high-level pulse width t

øH

CL : See figure 1. 160 ns

Data setup time t

DI, CL : See figure 1. 160 ns

Data hold time t

DI, CL : See figure 1. 160 ns

CE wait time t

CE, CL : See figure 1. 160 ns

CE setup time t

CE, CL : See figure 1. 160 ns

CE hold time t

CE, CL : See figure 1. 160 ns

DO output delay time t

DO: RPU= 4.7 kΩ, CL= 10 pF*: See figure 1. 1.5

µs

DO rise time t

DO: RPU= 4.7 kΩ, CL= 10 pF*: See figure 1. 1.5

µs

BLK switching time t

BLK, CE : See figure 4. 10

µs

Parameter Symbol Conditions Ratings Unit

Maximum Supply voltage

max V

–0.3 to +6.5 V

max V

–0.3 to +21.0 V

Input voltage

1 DI, CL, CE, BLK –0.3 to +6.5 V

2 OSCI, KI1 to KI5 –0.3 to VDD+0.3 V

OUT

1 S1 to S41, G1, G2 –0.3 to VFL+0.3 V

Output voltage V

OUT

2 OSCO, KS1 to KS6 –0.3 to VDD+0.3 V

OUT

3 DO –0.3 to +6.5 V

OUT

1 S1 to S41 6 mA

Output current I

OUT

2 G1, G2 60 mA

OUT

3 KS1 to KS6 1 mA

Allowable power dissipation Pd max

Ta = 85°C (LC75742E) 400 mW

Ta = 85°C (LC75742W) 300 mW Operating temperature Topr –40 to +85 °C Storage temperature Tstg –50 to +150 °C

• When stopped with CL at the low level

No. 6142-3/18

LC75742E, LC75742W

• When stopped with CL at the high level

Figure 1

Parameter Symbol Conditions

Ratings

Unit

min typ max

High-level input current

1 DI, CL, CE, BLK: VIN= 5.5 V 5 µA

2 OSCI: VIN= V

5 µA

Low-level input current I

DI, CL, CE, BLK, OSCI: VIN= 0 V –5 µA

Input floating voltage V

KI1 to KI5 0.05 V

Pull-down resistance R

KI1 to KI5: VDD= 5.0 V 50 100 250 kΩ

Output off leakage current I

OFFH

DO: VO= 5.5 V 5 µA

1 S1 to S41: IO= –2 mA VFL– 0.6 V

High-level output voltage

2 G1, G2: IO= –50 mA VFL– 1.3 V

3 OSCO: IO= –0.5 mA VDD– 2.0 V

4 KS1 to KS6: IO= –500 µA VDD– 1.2 VDD– 0.5 VDD– 0.2 V

1 S1 to S41, G1, G2: IO= 50 µA 0.5 V

Low-level output voltage

2 OSCO: IO= 0.5 mA 2.0 V

3 KS1 to KS6: IO= 25 µA 0.2 0.5 1.5 V

4 DO: IO= 1 mA 0.1 0.5 V

Oscillator frequency f

OSC

= 20 kΩ, C

OSC

= 47 pF 1.6 MHz

Hysteresis voltage V

DI, CL, CE, BLK, KI1 to KI5 0.1 V

Current drain

1 Sleep mode 5 µA

2 Outputs open: f

OSC

= 1.6 MHz 10 mA

Electrical Characteristics in the Allowable Operating Ranges

Pin Assignment

No. 6142-4/18

LC75742E, LC75742W

Top view

LC75742E

LC75742W

Block Diagram

Pin Descriptions

No. 6142-5/18

LC75742E, LC75742W

Pin No. Pin Function I/O Handling when unused

3 V

Driver block power supply. Applications must provide a voltage in the range 8.0 to 18.0 V. — —

59 V

Logic block power supply. Applications must provide a voltage in the range 4.5 to 5.5 V. — —

56 V

Power supply ground. This pin must be connected to the system ground. — — 58 OSCI I GND 57 OSCO O OPEN

Reset signal input used to initialize the IC internal state. During a reset, 60 BLK

the display is turned off forcibly regardless of the internal display data.

I GND

Also note that the internal key data is all reset to 0 and key scan operations are disabled.

However, serial data input is possible in this state. 63 CL 64 DI I GND 62 CE 61 DO O OPEN

1, 2 G1, G2 Digit outputs. The frame frequency f

is (f

OSC

/4096) Hz. O OPEN

44 to 4 S1 to S41 Segment outputs that display the display data transferred over the serial interface. O OPEN

Key scan outputs. Normally, when a key matrix is formed, diodes are inserted in the key

45 to 50 KS1 to KS6 scan timing lines to prevent shorts. However, since this IC uses unbalanced CMOS outputs O OPEN

in the output transistor circuit, the IC will not be damaged if these outputs are shorted.

51 to 55 KI1 to KI5 Key scan inputs. Pull-down resistors are built into the IC internal pin circuits. I GND

Serial data interface. These pins must be connected to the system microcontroller. Note that since DO is an open-drain output, a pull-up resistor is required.

CL: Synchronization clock DI: Transfer data CE: Chip enable DO: Output data

Oscillator circuit connections. An oscillator circuit is formed by connecting a resistor and a

capacitor externally to these pins.

Serial Data Input

• When stopped with CL at the low level

No. 6142-6/18

LC75742E, LC75742W

Note: don’t care DD: Direction data

• When stopped with CL at the high level

Note: don’t care DD: Direction data

Figure 2

• CCB address: Applications must send the value 01110001B(8EH) as shown in figure 2.

• D1 to D41: Segment display data for the G1 digit output pin Dn (n = 1 to 41) = 1: Segment on Dn (n = 1 to 41) = 0: Segment off

• D42 to D82: Segment display data for the G2 digit output pin Dn (n = 42 to 82) = 1: Segment on Dn (n = 42 to 82) = 0: Segment off

• S0, S1: Sleep control data

• DM0 to DM9: Dimmer data

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