Richtek RT8058AGQW Schematic [ru]

1.2MHz, 2A, High Efficiency PWM Step-Down DC/DC Converter
RT8058A
General Description
The RT8058A is a current mode PWM step-down converter.
The chip is ideal for fixed frequency and low ripple
applications over full range of load conditions. Its input
voltage range is from 2.6V to 5.5V with a constant 1.2MHz
switching frequency that allows it to adopt tiny, low cost
capacitors and inductors with 2mm or less in height making
it ideal for single-cell Li-lon/polymer battery applications.
The low on resistance internal MOSFET can achieve high
efficiency without the need of external schottky diodes in
wide operating ranges and the output voltage is adjustable
from 0.6V to 5V that can provide up to 2A load current.
The RT8058A operates at 100% duty cycle for low dropout
operation that extends battery life in portable devices.
The RT8058A is available in a WDFN-10L 3x3 package.
Ordering Information
RT8058A
Package Type QW : WDFN-10L 3x3 (W-Type)
Lead Plating System P : Pb Free G : Green (Halogen Free and Pb Free)
Note :
Richtek products are :
` RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
` Suitable for use in SnPb or Pb-free soldering processes.
Marking Information
E9= : Product Code
YMDNN : Data Code
E9=YM
DNN
Features
zz
z 0.6V Reference Allows Low Output Voltage
zz
zz
z Low Dropout Operation : 100% Duty Cycle
zz
zz
z 2A Load Current
zz
μμ
zz
μA Shutdown Current
zz
μμ
zz
z Up to 95% Efficiency
zz
zz
z No Schottky Diode Required
zz
zz
z 1.2MHz Constant Switching Frequency
zz
zz
z Low R
zz
zz
z Internally Compensated
zz
zz
z Internal Soft-Start
zz
zz
z Over temperature Protection
zz
zz
z Short Circuit Protection
zz
zz
z Small 10-Lead WDFN Package
zz
zz
z RoHS Compliant and Halogen Free
zz
Internal Switches
DS(ON)
Applications
z Portable Instruments
z Microprocessors and DSP Core supplies
z Cellular Telephones
z Wireless and DSL Modems
z Digital Cameras
z PC Cards
Pin Configurations
(TOP VIEW)
1
PGND
2
PGND
3
FB
4
GND
5
POK
WDFN-10L 3x3
GND
LX
10
9
LX
8
PVDD
7
VDD
9
11
EN
DS8058A-02 April 2011 www.richtek.com
1
RT8058A
Typical Application Circuit
2.6V to 5.5V
V
IN
C1 10µF
C2 1µF
PGOOD
R3 100k
8
6
7
5
RT8058A
PVDD
EN
VDD
POK
GND
4
9, 10
LX
3
FB
PGND
1, 2, 11 (Exposed Pad)
Functional Pin Description
Pin No. Pin Name Pin F unction
1, 2,
11 (Exposed Pad)
3 FB
4 GND
5 POK
6 EN
7 VDD
8 PVDD
9, 10 LX
PGND
Power Ground. Connect this pin close to the (–) terminal of C pad should be soldered to PCB board and connected to GND. Feedback Input Pin. Receives the feedback voltage from a resistive divider connected across the output. Signal Ground. Return the feedback resistive dividers to this ground, which in turn connects to PGND at one point. Power Good Indicator. Open-drain logic output that is opened when the output voltage exceeds 90% of the regulation point. Enable pin. A logical high level at this pin enables the converter, while a logical low level causes the converter to shut down. Signal Input Supply. Decouple this pin to GND with a capacitor. Normally VDD is equal to PVDD. Power Input Supply of converter power stage. Decouple this pin to PGND with a capacitor. Internal Power MOSFET Switches Output of converter. Connect this pin to the inductor.
L1
3.3µH
R1
100k
R2 100k
C3 22µF
V
OUT
1.2V/2A
C4 1µF
and C
IN
. Ex po s e d
OU T
Function Block Diagram
0.6V
FB
0.533V
2
EA
Int-SS
OSC
Output Clamp
0.3V
POK
UV
VREF
Slope Com
POR
VDD
Current Sense
OC
Limit
Control
Logic
OTP
EN
PVDD
Driver
LX
PGND
GND
DS8058A-02 April 2011www.richtek.com
RT8058A
Absolute Maximum Ratings (Note 1)
z Supply Input Voltage VDD, PVDD ------------------------------------------------------------------------------------- 0.3V to 6V
z LX Pin Switch Voltage ---------------------------------------------------------------------------------------------------- 0.3V to 6V
z Other I/O Pin Voltage ----------------------------------------------------------------------------------------------------- 0.3V to 6V
z Power Dissipation, P
WDFN-10L 3x3 ------------------------------------------------------------------------------------------------------------- 1.429W
z Package Thermal Resistance (Note 2)
WDFN-10L 3x3, θJA------------------------------------------------------------------------------------------------------- 70°C/W
WDFN-10L 3x3, θJC------------------------------------------------------------------------------------------------------- 7.8°C/W
z Lead Temperature (Soldering, 10 sec.)------------------------------------------------------------------------------- 260°C
z Storage Temperature Range -------------------------------------------------------------------------------------------- 65°C to 150°C
z Junction Temperature ----------------------------------------------------------------------------------------------------- 150°C
z ESD Susceptibility (Note 3)
HBM (Human Body Mode) ---------------------------------------------------------------------------------------------- 2kV
MM (Machine Mode) ------------------------------------------------------------------------------------------------------ 200V
Recommended Operating Conditions (Note 4)
z Supply Input Voltage ------------------------------------------------------------------------------------------------------ 2.6V to 5.5V
z Junction Temperature Range --------------------------------------------------------------------------------------------
z Ambient Temperature Range --------------------------------------------------------------------------------------------
@ TA = 25°C
D
40°C to 125°C
40°C to 85°C
Electrical Characteristics
(V
= V
DD
Input Voltage Range
Feedback Reference Voltage
DC Bias Current
(PVDD, VDD total)
Under voltage Lockout
Threshold
Oscillator Frequency
EN High-Level Input Voltage
EN Low-Level Input Voltage
Switch On Resistance, High
Switch On Resistance, Low R
Peak Current Limit I
Output Voltage Line Regulation
Output Voltage Load
PVDD
= 3.6V, T
= 25°C, unless otherwise specified)
A
Parameter Symbol Test Conditions Min Typ Max Unit
V
IN
V
REF
UVLO
f
OSC
V
EN_H
V
EN_L
R
DS(ON)_P
DS(ON)_N IOUT
2.2 3 -- A
LIM
2.6 - - 5.5 V
0.582 0.6 0.618 V
Active, No Load -- 3.4 -- mA
Active, Not Switching, VFB = 0.5V
-- 340 --
μA
Shutdown, EN = 0 -- -- 2 μA
VDD Rising
V
Hysteresis
DD
Switching Frequency
1.4 -- -- V
-- -- 0.4 V
I
OUT
= 200mA
= 200mA
= 2.6V to 5.5V, I
V
IN
= 0AÆ2A
I
OUT
OUT
= 0
2.3 2.43 2.55 V
-- 150 -- mV
1 1.2 1.4 MHz
-- 142 210 mΩ
--
--
96 160 mΩ
0.05 -- %/V
-- 1 -- %/A
DS8058A-02 April 2011 www.richtek.com
3
RT8058A
Note 1. Stresses listed as the above Absolute Maximum Ratingsmay cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θ
Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions.
is measured in the natural convection at TA = 25°C on a high effective four layers thermal conductivity test board of
JA
JEDEC 51-7 thermal measurement standard. The case point of θ
is on the exposed pad of the package.
JC
DS8058A-02 April 2011www.richtek.com
4
Typical Operating Characteristics
RT8058A
Output Voltage (V)
Efficiency vs. Output Current
100
90
80
70
60
50
40
Efficiency (%)
30
20
10
0
0 0.25 0.5 0.75 1 1.25 1.5 1.75 2
V
= 1.2V, L = 3.3μH, C
OUT
Output Current (A)
Output Voltage vs. Input Voltage
1.200
1.199
1.198
1.197
1.196
1.195
1.194
1.193
1.192
1.191
1.190
2.5 3 3.5 4 4.5 5 5.5
Input Voltage (V)
VIN = 5V
VIN = 3.3V
= 22μF
OUT
I
= 0A
OUT
Output Voltage vs. Output Current
1.196
1.195
1.194
Output Voltage (V)
1.193
1.192
1.191
1.190
1.189
1.188 0 0.25 0.5 0.75 1 1.25 1.5 1.75 2
VIN = 5V
VIN = 3.3V
V
= 1.2V, L = 3.3μH, C
OUT
Output Current (A)
FB Voltage v s. Temperature
0.600
0.598
0.596
0.594
0.592
0.590
0.588
FB Voltage (V)
0.586
0.584
0.582
0.580
-50 -25 0 25 50 75 100 125
Temperature
VIN = 3.3V, I
(°C)
OUT
OUT
= 22μF
= 0A
Switching Frequency vs. Input Voltage
1.40
1.35
1.30
1.25
1.20
1.15
1.10
1.05
Switching Frequency (MHz)
V
= 1.2V, I
1.00
2.5 3 3.5 4 4.5 5 5.5
Input Voltage (V)
OUT
= 300mA
OUT
Switching Frequency (MHz)
Switching Frequency vs. Temperature
1.40
1.35
1.30
1.25
1.20
1.15
1.10
1.05
1.00
VIN = 3.3V, V
-50 -25 0 25 50 75 100 125
Temperature
= 1.2V, I
OUT
(°C)
= 300mA
OUT
DS8058A-02 April 2011 www.richtek.com
5
RT8058A
EN Voltag e vs. Inpu t Voltage
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
EN Voltage (V)
0.6
0.5
0.4
2.5 3 3.5 4 4.5 5 5.5
Rising
Falling
V
OUT
= 1.2V, I
OUT
= 0A
Input Voltage (V)
Output Current v s . Input Voltage
3.2
3.1
3.0
2.9
2.8
2.7
2.6
2.5
Output Current (A)
2.4
2.3
2.2
2.533.544.555.5
Input Voltage (V)
V
OUT
= 1.2V
EN Voltage vs. Temperature
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
EN Voltage (V)
0.6
0.5
0.4
-50 -25 0 25 50 75 100 125
Rising
Falling
VIN = 3.3V, V
Temperature
= 1.2V, I
OUT
(°C)
Output Current v s . Temperature
3.2
3.1
3.0
2.9
2.8
2.7
2.6
2.5
Output Current (A)
2.4
2.3
2.2
-50 -25 0 25 50 75 100 125
Temperature
VIN = 3.3V, V
(°C)
OUT
= 0A
OUT
= 1.2V
V
OUT
(50mV/Div)
I
OUT
(1A/Div)
6
Load Transient Response
V
= 3.3V, V
IN
= 1.2V, I
OUT
Time (50μs/Div)
OUT
= 10mA to 1A
V
OUT
(50mV/Div)
I
OUT
(1A/Div)
Load Transient Response
V
= 3.3V, V
IN
= 1.2V, I
OUT
Time (50μs/Div)
DS8058A-02 April 2011www.richtek.com
OUT
= 10mA to 2A
RT8058A
V
OUT
(50mV/Div)
I
OUT
(1A/Div)
V
OUT
(10mV/Div)
Load Transient Response
V
= 5V, V
IN
OUT
= 1.2V, I
= 10mA to 1A
OUT
Time (50μs/Div)
Output Ripple Voltage
V
= 3.3V, V
IN
OUT
= 1.2V, I
OUT
= 0A
V
OUT
(50mV/Div)
I
OUT
(1A/Div)
V
OUT
(10mV/Div)
Load Transient Response
V
= 5V, V
IN
OUT
= 1.2V, I
= 10mA to 2A
OUT
Time (50μs/Div)
Output Ripple Voltage
V
= 3.3V, V
IN
OUT
= 1.2V, I
OUT
= 2A
V
LX
(5V/Div)
V
OUT
(10mV/Div)
V
LX
(5V/Div)
V
IN
Time (500ns/Div)
Output Ripple Voltage
= 5V, V
= 1.2V, I
OUT
OUT
Time (500ns/Div)
= 0A
V
LX
(5V/Div)
V
OUT
(10mV/Div)
V
LX
(5V/Div)
V
IN
Time (500ns/Div)
Output Ripple Voltage
= 5V, V
= 1.2V, I
OUT
OUT
Time (500ns/Div)
= 2A
DS8058A-02 April 2011 www.richtek.com
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RT8058A
V
EN
(2V/Div)
V
OUT
(1V/Div)
I
OUT
(2A/Div)
V
IN
(2V/Div)
V
IN
V
EN
Power On from EN
= 3.3V, V
OUT
= 1.2V, I
100μs/Div)
Power On from VIN
= 3.3V, V
OUT
= 1.2V, I
OUT
OUT
= 0A
= 0A
V
EN
(2V/Div)
V
OUT
(1V/Div)
I
OUT
(2A/Div)
V
IN
(2V/Div)
V
IN
V
IN
= 3.3V, V
= 3.3V, V
Power On from EN
= 1.2V, I
OUT
Time (100μs/Div)
OUT
= 2A
Power On from VIN
OUT
= 1.2V, I
OUT
= 2A
V
OUT
(1V/Div)
I
OUT
(2A/Div)
V
EN
(2V/Div)
V
OUT
(1V/Div)
I
OUT
(2A/Div)
V
= 3.3V, V
IN
Time (500μs/Div)
Power Off from EN
OUT
= 1.2V, I
OUT
= 2A
V
OUT
(1V/Div)
I
OUT
(2A/Div)
V
EN
(2V/Div)
V
OUT
(1V/Div)
I
OUT
(2A/Div)
V
IN
= 5V, V
Time (500μs/Div)
Power Off from EN
OUT
= 1.2V, I
OUT
= 2A
Time (500μs/Div)
Time (500μs/Div)
DS8058A-02 April 2011www.richtek.com
8
Application Information
RT8058A
Function Description
The RT8058A is a 1.2MHz constant frequency, current
mode PWM step-down converter. High switching frequency
and high efficiency make it suitable for applications where
high efficiency and small size are critical.
The output voltages are set by external dividers returned
to the FB pin. The output voltage can be set from 0.6V to
5V.
Main Control Loop
During normal operation, the internal top power switch
(P-MOSFET) is turned on at the beginning of each clock
cycle. Current in the inductor increases until the peak
inductor current reach the value defined by the output
voltage of the error amplifier. The error amplifier adjusts its
output voltage by comparing the feedback signal from a
resistor divider on the FB pin with an internal 0.6V
reference. When the load current increases, it causes a
reduction in the feedback voltage relative to the reference.
The error amplifier raises its output voltage until the average
inductor current matches the new load current. When the
top power MOSFET shuts off, the synchronous power
switch (N-MOSFET) turns on until the beginning of the
next clock cycle.
Soft-Start / Enable
For convenience of power up sequence control, the
RT8058A has an enable pin. Logic high at EN pin will
enable the converter. When the converter is enabled, the
clamped error amplifier output ramps up during 1024-clock
period to increase the current provided by converter until
the output voltage reach the target voltage. If EN is kept
at high during VIN applying, the RT8058A will be enabled
when VDD surpass Under Voltage Lockout threshold.
Output Voltage Programming
The output voltage is set by an external resistive divider
according to the following equation :
V
= V
OUT
where V
x (1+ R1/R2)
REF
equals to 0.6V typical.
REF
The resistive divider allows the FB pin to sense a fraction
of the output voltage as shown in Figure 1.
V
OUT
R1
FB
RT8058A
GND
R2
Figure 1. Setting the Output Voltage
Slope Compensation and Inductor Peak Current
Slope compensation provides stability in constant
frequency architectures by preventing sub harmonic
oscillations at duty cycles greater than 50%. It is
accomplished internally by adding a compensating ramp
to the inductor current signal. Normally, the maximum
inductor peak current is reduced when slope compensation
is added. In RT8058A, however, separated inductor current
signal is used to monitor over current condition and this
keeps the maximum output current relatively constant
regardless of duty cycle.
Dropout Operation
When input supply voltage decreases toward the output
voltage, the duty cycle increases toward the maximum
on time. Further reduction of the supply voltage forces
the main switch to remain on for more than one cycle
eventually reaching 100% duty cycle. The output voltage
will then be determined by the input voltage minus the
voltage drop across the internal P-MOSFET and the
inductor.
Low Supply Operation
The RT8058A is designed to operate down to an input
supply voltage of 2.6V. One important consideration at
low input supply voltages is that the R
DS(ON)
of the
P-Channel and N-Channel power switches increases. The
user should calculate the power dissipation when the
RT8058A is used at 100% duty cycle with low input
voltages to ensure that thermal limits are not exceeded.
DS8058A-02 April 2011 www.richtek.com
9
RT8058A
Short Circuit Protection
At overload condition, current mode operation provides
cycle-by-cycle current limit to protect the internal power
switches. When the output is shorted to ground, the
inductor current will decays very slowly during a single
switching cycle. A current runaway detector is used to
monitor inductor current. As current increasing beyond
the control of current loop, switching cycles will be skipped
to prevent current runaway from occurring. If the FB voltage
is smaller than 0.3V after the completion of soft-start
period, Under Voltage Protection (UVP) will lock the output
to high-z to protect the converter. UVP lock can only be
cleared by recycling the input power.
Thermal Protection
If the junction temperature of the RT8058A reaches certain
temperature (150°C), both converters will be disabled. The
RT8058 will be re-enabled and automatically initializes
internal soft start when the junction temperature drops
below 110 °C.
Inductor Selection
For a given input and output voltage, the inductor value
and operating frequency determine the ripple current. The
ripple current ΔIL increases with higher VIN and decreases
with higher inductance.
ΔI
V
=
L
⎤ ⎥
Lf
×
V
1
×
OUTOUT
V
IN
Having a lower ripple current reduces the ESR losses in
the output capacitors and the output voltage ripple. Highest
efficiency operation is achieved at low frequency with small
ripple current. This, however, requires a large inductor. A
reasonable starting point for selecting the ripple current
is ΔIL = 0.4(IMAX). The largest ripple current occurs at
the highest VIN. To guarantee that the ripple current stays
below a specified maximum, the inductor value should be
chosen according to the following equation :
L(MAX)
⎤ ⎥
V
1
×
V
IN(MAX)
V
L
=
OUT
If
Δ×
OUT
⎤ ⎥
Inductor Core Selection
Once the value for L is known, the type of inductor must
be selected. High efficiency converters generally cannot
afford the core loss found in low cost powdered iron cores,
forcing the use of more expensive ferrite or mollypermalloy
cores. Actual core loss is independent of core size for a
fixed inductor value but it is very dependent on the
inductance selected. As the inductance increases, core
losses decrease. Unfortunately, increased inductance
requires more turns of wire and therefore copper losses
will increase.
Ferrite designs have very low core losses and are preferred
at high switching frequencies, so design goals can
concentrate on copper loss and preventing saturation.
Ferrite core material saturates “hard”, which means that
inductance collapses abruptly when the peak design
current is exceeded. This result in an abrupt increase in
inductor ripple current and consequent output voltage ripple.
Do not allow the core to saturate!
Different core materials and shapes will change the size/
current and price/current relationship of an inductor. Toroid
or shielded pot cores in ferrite or permalloy materials are
small and don' t radiate energy but generally cost more
than powdered iron core inductors with similar
characteristics. The choice of which style inductor to use
mainly depends on the price vs. size requirements and
any radiated field/EMI requirements.
CIN and C
Selection
OUT
The input capacitance, CIN, is needed to filter the
trapezoidal current at the source of the top MOSFET. To
prevent large ripple voltage, a low ESR input capacitor
sized for the maximum RMS current should be used. RMS
current is given by :
V
II
OUT(MAX)RMS
OUT
V
This formula has a maximum at VIN = 2V
= I
/2. This simple worst-case condition is commonly
OUT
V
IN
1
=
V
OUT
IN
, where IRMS
OUT
used for design because even significant deviations do
not offer much relief. Note that ripple current ratings from
capacitor manufacturers are often based on only 2000
hours of life which makes it advisable to further derate the
capacitor, or choose a capacitor rated at a higher
temperature than required. Several capacitors may also
be paralleled to meet size or height requirements in the
design.
10
DS8058A-02 April 2011www.richtek.com
RT8058A
The selection of C
is determined by the Effective Series
OUT
Resistance (ESR) that is required to minimize voltage ripple
and load step transients, as well as the amount of bulk
capacitance that is necessary to ensure that the control
loop is stable. Loop stability can be checked by viewing
the load transient response as described in a later section.
The output ripple, ΔV
ESR ΔIΔV
LOUT
, is determined by :
OUT
1
+
8fC
OUT
The output ripple is highest at maximum input voltage
since ΔIL increases with input voltage. Multiple capacitors
placed in parallel may be needed to meet the ESR and
RMS current handling requirements. Dry tantalum, special
polymer, aluminum electrolytic and ceramic capacitors are
all available in surface mount packages. Special polymer
capacitors offer very low ESR but have lower capacitance
density than other types. Tantalum capacitors have the
highest capacitance density but it is important to only
use types that have been surge tested for use in switching
power supplies. Aluminum electrolytic capacitors have
significantly higher ESR but can be used in cost-sensitive
applications provided that consideration is given to ripple
current ratings and long term reliability. Ceramic capacitors
have excellent low ESR characteristics but can have a
high voltage coefficient and audible piezoelectric effects.
The high Q of ceramic capacitors with trace inductance
can also lead to significant ringing.
Using Ceramic In put and Output Capa citors
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
input, VIN. At best, this ringing can couple to the output
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at VIN large enough to damage the
part.
Checking Tra n sient Re spon se
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V
equal to ΔI
resistance of C
discharge C
LOAD(ESR)
OUT
generating a feedback error signal used
OUT
by the regulator to return V
During this recovery time, V
immediately shifts by an amount
OUT
, where ESR is the effective series
. ΔI
also begins to charge or
LOAD
to its steady-state value.
OUT
can be monitored for
OUT
overshoot or ringing that would indicate a stability problem.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum operation junction temperature. The maximum
power dissipation depends on the thermal resistance of
IC package, PCB layout, the rate of surroundings airflow
and temperature difference between junction to ambient.
The maximum power dissipation can be calculated by
following formula :
P
Where T
temperature, T
D(MAX)
= ( T
J(MAX)
TA ) / θ
J(MAX)
JA
is the maximum operation junction
is the ambient temperature and the θ
A
JA
the junction to ambient thermal resistance.
For recommended operating conditions specification of
RT8058A, The maximum junction temperature is 125°C.
The junction to ambient thermal resistance θJA is layout
dependent. For WDFN-10L 3x3 packages, the thermal
resistance θJA is 70°C/W on the standard JEDEC 51-7
four layers thermal test board. The maximum power
dissipation at TA = 25°C can be calculated by following
formula :
P
= (125°C − 25°C) / (70°C/W) = 1.429W for
D(MAX)
WDFN-10L 3x3 packages
The maximum power dissipation depends on operating
ambient temperature for fixed T
and thermal
J(MAX)
resistance θJA. For RT8058A packages, the Figure 2 of
derating curves allows the designer to see the effect of
rising ambient temperature on the maximum power
allowed.
is
DS8058A-02 April 2011 www.richtek.com
11
RT8058A
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
Maximum Power Dissipation (W)
0.0 0 25 50 75 100 125
Ambient Temperature (°C)
Figure 2. Derating Curves for RT8058A Package
Layout Considerations
Follow the PCB layout guidelines for optimal performance
of RT8058A.
` A ground plane is recommended. If a ground plane layer
Four Layers PCB
WDFN-10L 3x3
is not used, the signal and power grounds should be
segregated with all small-signal components returning
to the GND pin at one point that is then connected to
the PGND pin close to the IC. The exposed pad should
be connected to GND.
` Connect the terminal of the input capacitor(s), as close
as possible to the PVDD pin. This capacitor provides
the AC current into the internal power MOSFETs.
` LX node is with high frequency voltage swing and should
be kept small area. Keep all sensitive small-signal nodes
away from LX node to prevent stray capacitive noise
pick-up.
` Flood all unused areas on all layers with copper.
Flooding with copper will reduce the temperature rise
of power components. The copper areas can be
connectde to any DC net (PVDD, VDD, VOUT, PGND,
GND, or any other DC rail in your system).
` Connect the FB pin directly to the feedback resistors.
The resistor divider must be connected between VOUT
and GND.
The feedback components must be connected as close to
the device as possible.
PGND PGND
R1
GND
R2
POK
Input capacitor must be placed as close to the IC as possible.
V
OUT
LX should be connected to inductor by wide and
L1
short trace. Keep sensitive components
away from this trace.
V
IN
IN
FB
C
OUT
1
2
GND
3
4
11
5
LX
10
9
LX
8
PVDD
7
VDD
9
EN
C
Figure 3. PCB Layout Guide
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DS8058A-02 April 2011www.richtek.com
Component
Inductance
DCR
Current Rating
Dimensions
GOTREND
GTSD53
3.3 34 2
360 5 x 5 x 2.8
Table 1. Recommended Inductors
RT8058A
Supplier
TAIYO YUDEN NR 4018 3.3 70 2000 4 x 4 x 1.8
Murata LQH66S 3.3 22 2600 6.3 x 6.3 x 4.7
TDK SLF7045T 3.3 20 2500 7 x 7 x 4.5
Sumida CDRH5D16 3.3 36 2600 5.8 x 5.8 x 1.8
Table 2. Recommended Capacitors for CIN and C
Component Supplier Part No. Capacitance (µF) Case Size
TDK C3225X5R0J226M 22 1210
TDK C2012X5R0J106M 10 0805 Panasonic ECJ4YB1A226M 22 1210 Panasonic ECJ4YB1A106M 10 1210
TAIYO YUDEN LMK325BJ226ML 22 1210 TAIYO YUDEN JMK316BJ226ML 22 1206 TAIYO YUDEN JMK212BJ106ML 10 0805
Series
(µH)
OUT
(m)
(mA)
(mm)
DS8058A-02 April 2011 www.richtek.com
13
RT8058A
Outline Dimension
D
E
A
A3
A1
D2
L
E2
SEE DETAIL A
1
e
b
2
1
1
2
DETAIL A
Pin #1 ID and Tie Bar Mark Options
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Dimensions In Millimeters Dimensions In Inches
Symbol
Min Max Min Max
A 0.700 0.800 0.028 0.031
A1 0.000 0.050 0.000 0.002
A3 0.175 0.250 0.007 0.010
b 0.180 0.300 0.007 0.012
D 2.950 3.050 0.116 0.120
D2 2.300 2.650 0.091 0.104
E 2.950 3.050 0.116 0.120
E2 1.500 1.750 0.059 0.069
e 0.500 0.020
L 0.350 0.450
Richtek Technology Corporation
Headquarter
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
0.014 0.018
W-Type 10L DFN 3x3 Package
Richtek Technology Corporation
Taipei Office (Marketing)
5F, No. 95, Minchiuan Road, Hsintien City
Taipei County, Taiwan, R.O.C.
Tel: (8862)86672399 Fax: (8862)86672377
Email: marketing@richtek.com
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
DS8058A-02 April 2011www.richtek.com
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