Richtek RT8015BGQW Schematic [ru]

3A, 2MHz, Synchronous Step-Down Converter

RT8015B

General Description

The RT8015B is a high efficiency synchronous, step down DC/DC converter. Its input voltage range is from 2.6V to

5.5V and provides a n adjustable regulated output voltage from 0.8V to 5V while delivering up to 3A of output current.

The internal synchronous low on resistance power switches increase efficiency and eliminate the need for an external Schottky diode. The switching frequency is set by an external resistor . The 100% duty cycle provides low dropout operation extending battery life in portable systems. Current mode operation with external compensation allows the transient response to be optimized over a wide range of loa ds and output ca pacitors.

The RT8015B is operated in forced continuous PWM Mode which minimizes ripple voltage a nd reduces the noise and RF interference.

The 100% duty cycle in Low Dropout Operation further maximize battery life.

Features

High Efficiency : Up to 95%

z Low R

z Programmable Frequency : 300kHz to 2MHz

z No Schottky Diode Required

z 0.8V Reference Allows for Low Output Voltage

z Forced Continuous Mode Operation

z Low Dropout Operation : 100% Duty Cycle

z Power Good Output Voltage Indicator

z RoHS Compliant and Halogen Free

Internal Switches : 110m

DS(ON)

ΩΩ

Applications

z Portable Instruments z Battery-Powered Equipment z Notebook Computers z Distributed Power Systems z IP Phones z Digital Camera s

The RT8015B is available in the W DF N-10L 3x3 and SOP8 (Exposed Pad) packages.

Ordering Information

RT8015B

Package Type QW : WDFN-10L 3x3 SP : SOP-8 (Exposed Pad-Option 2)

Lead Plating System G : Green (Halogen Free and Pb Free)

Note : Richtek products are :

` RoHS compliant and compatible with the current require-

ments of IPC/JEDEC J-STD-020.

` Suitable for use in SnPb or Pb-free soldering processes.

Pin Configurations

(TOP VIEW)

GND

LX LX

PGND

1 2 3 4 5

SHDN/RT

WDFN-10L 3x3

SHDN/RT

2 3 4

GND

PGND

SOP-8 (Exposed Pad)

GND

COMP

PGOOD

VDD

PVDD

COMP

VDD

PVDD

Marking Information

For marking information, contact our sales representative directly or through a Richtek distributor located in your area.

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RT8015B

Typical Application Circuit

PGOOD

22µF

R4 100k

R3 1

OSC

332k

0.1µF

Note : Using all Ceramic Capacitors

Table 1. Recommended Component Selection

(V) R1 (kΩ) R2 (kΩ) R

OUT

3.3 750 240 30

2.5 510 240 27

1.8 300 240 22

1.5 210 240 18

1.2 120 240 15

1.0 60 240 13

PVDD

VDD

PGOOD

SHDN/RT

RT8015B

COMP

GND

PGND

COM P

2.2µH

3, 4

COMP

27k

2 5

(kΩ) C

22pF

COMP

1nF

COM P

1 1 1 1 1 1

510k

R2 240k

OUT

22µF x 2

(nF) L1 ( μH) C

2.2

1.0

OUT

2.5V/3A

(μF)

OUT

22 x 2 22 x 2 22 x 2 22 x 2 22 x 2 22 x 2

Functional Pin Description

Pin No.

WDFN

-10L 3x3

SOP-8

(Exposed Pad)

1 1 SHDN/RT

2 2 GND

3, 4 3 LX

5 4 PGND 6 5 PVDD Power Input Supply. Decouple this pin to PGND with a capacitor. 7 6 VDD

8 -- PGOOD

9 7 FB

10 8 COMP

11 -- (Exposed Pad)

-- 9 GND

Pin Name Pin Function

Osc illator Resi stor Input . Con nectin g a r esis tor t o grou nd fr om t his pin sets t he s w itc hi ng freq uency. For c in g th is pin t o VDD ca us es t he device to be shu t down. Signal Ground. All small signal components and compensation comp onents shou ld co nne ct to thi s grou nd, whic h in tu r n con nec ts to PGND at one point. Inte rnal Power MO SFE T Swit ches Out put . Conne ct this pin to t he inductor. Power Ground . Conne ct thi s pin close to the neg ative term i nal of C and C

OUT

Signal Input Supply. Decouple this pin to GND with a capacitor. Normally V

is equal to PVDD.

Power Good Indicator. T his pin is ope n drain logic output that is

pulled to gr ound when the output volt age is not within ±12.5% of

regulation point . Feedback Pin. This pin receives the feedback voltage from a resistive divid er connected across th e output. Error Amplifier Compensation Point. The current comparator threshold increases with this control voltage. Connect external compensation elements to this pin to stabilize the control loop. No Internal Connection. The exposed pa d must b e soldered to a l arge PC B and conn ected to GND for maximum power diss ipation.

The exposed pad must be soldered to a l arge PC B and conne c ted to GND for maxi mum po wer dissipation.

DS8015B-04 March 2011www.richtek.com

Function Block Diagram

RT8015B

SHDN/RT

COMP

0.8V

POR

VDD

Int-SS

Output Clamp

0.9V

0.7V

0.2V

OSC

ISEN

Slope Com

Limit

Driver

Control

Logic

NISEN

NMOS I Limit

OTP

REF

PVDD

PGND

PGOOD

GND

Layout Guide

GND

Bottom Layer

PVDD

PGOOD

COMP

OUT

COMP

Place the feedback and compensation components as close to the IC as possible.

Place the input and output capacitors as close to the IC as possible.

GND

RT8015B

6 7

VDD

8 9

GND

PGND

GND

SHDN/RT

OUT

connected to Inductor

LX should be

by wide and short trace, keep sensitive components away

from this trace

OSC

DS8015B-04 March 2011 www.richtek.com

RT8015B

Operation

Main Control Loop

The RT8015B is a monolithic, constant-frequency , current mode step-down DC/DC converter. During normal operation, the internal top power switch (P-Channel MOSFET) is turned on at the beginning of each clock cycle. Current in the inductor increases until the peak inductor current reach the value defined by the voltage on the COMP pin. The error a mplifier adjusts the voltage on the COMP pin by comparing the feedback signal from a resistor divider on the FB pin with an internal 0.8V reference. When the load current increases, it causes a reduction in the feedback voltage relative to the reference. The error amplifier raises the COMP voltage until the average inductor current matches the new load current. When the top power MOSFET shuts off, the synchronous power switch (N-MOSFET) turns on until either the bottom current limit is rea ched or the beginning of the next clock cycle.

The operating frequency is set by an external resistor connected between the RT pin a nd ground. The practical switching frequency can ra nge from 300kHz to 2MHz.

Slope Compensation and Inductor Peak Current

Slope compensation provides stability in constant frequency architectures by preventing sub-harmonic oscillations at duty cycles greater than 50%. It is accomplished internally by a dding a compensating ra mp to the inductor current signal. Normally, the maximum inductor peak current is reduced when slope compensation is added. In the RT8015B, however, separated inductor current signals are used to monitor over current condition. This keeps the maximum output current relatively constant regardless of duty cycle.

Short Circuit Protection

When the output is shorted to ground, the inductor current decays very slowly during a single switching cycle. A current runaway detector is used to monitor inductor current. As current increa sing beyond the control of current loop, switching cycles will be skipped to prevent current runaway from occurring.

Dropout Operation

When the input supply voltage decrea ses toward the output voltage, the duty cycle increases toward the maximum on-time. Further reduction of the supply voltage forces the main switch to remain on for more than one cycle eventually reaching 100% duty cycle.

The output voltage will then be determined by the input voltage minus the voltage drop across the internal P-Channel MOSFET a nd the inductor.

Low Supply Operation

The RT8015B is designed to operate down to an input supply voltage of 2.6V. One important consideration at low input supply voltages is that the R P-Channel a nd N-Cha nnel power switches increase s. The user should calculate the power dissipation when the RT8015B is used at 100% duty cycle with low input voltages to ensure that thermal limits are not exceeded.

DS(ON)

of the

DS8015B-04 March 2011www.richtek.com

RT8015B

Absolute Maximum Ratings (Note 1)

z Supply Input Voltage, VDD, PVDD ----------------------------------------------------------------------------−0.3V to 6V z LX Pin Switch Voltage --------------------------------------------------------------------------------------------−0.3V to (PV DD + 0.3V)

<200ns --------------------------------------------------------------------------------------------------------------- −5V to 7.5V

z Other I/O Pin Voltages -------------------------------------------------------------------------------------------−0.3V to (VD D + 0.3V) z LX Pin Switch Current --------------------------------------------------------------------------------------------4A z Power Dissipation, P

SOP-8 (Exposed Pad) -------------------------------------------------------------------------------------------1.333W WDFN-10L 3x3-----------------------------------------------------------------------------------------------------1.429W

z Package Thermal Resistance (Note 2)

SOP-8 (Exposed Pad), θJA-------------------------------------------------------------------------------------75°C/W SOP-8 (Exposed Pad), θJC-------------------------------------------------------------------------------------15°C/W WDFN-10L 3x3, θJA-----------------------------------------------------------------------------------------------70°C/W

WDFN-10L 3x3, θJC-----------------------------------------------------------------------------------------------8.2°C/W

z Junction T emperature--------------------------------------------------------------------------------------------- 150°C z Lead Temperature (Soldering, 10 sec.)-----------------------------------------------------------------------260°C z Storage T emperature Range ------------------------------------------------------------------------------------−65°C to 150°C z ESD Susceptibility (Note 3)

HBM (Human Body Mode) --------------------------------------------------------------------------------------2kV MM (Ma chine Mode)----------------------------------------------------------------------------------------------200V

@ TA = 25°C

Recommended Operating Conditions (Note 4)

z Supply Input V oltage----------------------------------------------------------------------------------------------2.6V to 5.5V z Junction T emperature Range------------------------------------------------------------------------------------ z Ambient T emperature Range------------------------------------------------------------------------------------

−40°C to 125°C

−40°C to 85°C

Electrical Characteristics

= 3.3V, T

Input Volt age Ra nge VDD 2.6 -- 5.5 V Feedback Reference Vol tage V Feedback Leakage Current IFB -- 0.1 0.4 μA

DC Bias Cu rre nt

Out put Volta ge Line Regul at ion VIN = 2.7V to 5.5V -- 0.03 -- %/V Out put Volta ge Load R egulation Er ror A mp lifier

Transconductance

= 25°C, unless otherwise specified)

Parameter Symbol Test Conditions Min Typ Max Unit

0.784 0.8 0.816 V

REF

Active , VFB = 0.78V, Not Swit ching -- 460 -- μA Shutdown -- -- 1 μA

Me as ured in Se rv o Loop, V

-- 800 -- μs

= 0.2V to 0.7V (Note 5)

COMP

−0.2

±0.02 0.2 %

Current Sense Transresistance RT -- 0.4 -- Ω Switching Leakage Current SHDN/RT = VIN = 5. 5V -- -- 1 μA

To be continued

DS8015B-04 March 2011 www.richtek.com

RT8015B

Parameter Symbol Test Conditions Min Typ Max Unit

Swit c hi ng Freq uenc y

= 332k 0.8 1 1.2 MHz

OSC

Switching Frequency 0.3 -- 2 MHz Switch On Resistance, High R Switch On Resistance, Low

ISW = 0.5A -- 110 160 mΩ

PMOS

ISW = 0.5A -- 110 170 mΩ

NMOS

Power Good R ang e -- ±12 .5 ± 15 % Power Good P ull -D ow n

Resistance Peak Current Limit I

Under Voltage Lockout Threshold

-- -- 120 Ω

3.2 3.8 -- A

LIM

V V

Rising -- 2.4 -- V

Falling -- 2.3 -- V

Shutdown Threshold -- VIN − 0.7 VIN − 0.4 V

Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for

stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability.

Note 2. θ

Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. The specifications over the -40°C to 85°C operation ambient temperature range are assured by design, characterization

is measured in natural convection at TA = 25°C on a high-effective thermal conductivity four-layer test board of

JEDEC 51-7 thermal measurement standard. The measurement case position of θ packages.

and correlation with statistical process controls.

is on the exposed pad of the

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