Richtek RT7266ZSP Schematic [ru]

3A, 18V, 700kHz ACOTTM Synchronous Step-Down Converter

RT7266

General Description

The RT7266 is an adaptive on-time ACOTTM mode synchronous buck converter. The a daptive on-ti me ACOT

mode control provides a very fast tra nsient response with few external components. The low impedance internal MOSFET can support high ef ficiency operation with wide input voltage range from 4.5V to 18V . The proprietary circuit of the RT7266 enables to support all ceramic ca pacitors. The output voltage ca n be adjustable between

0.8V and 8V. The soft-start is adjustable by an external ca p acitor.

Ordering Information

RT7266

Package Type SP : SOP-8 (Exposed Pad-Option 2)

Lead Plating System Z : ECO (Ecological Element with Halogen Free and Pb free)

Note : Richtek products are :

 RoHS compliant and compatible with the current require-

ments of IPC/JEDEC J-STD-020.

 Suitable for use in SnPb or Pb-free soldering processes.

Features

z ACOT

z 4.5V to 18V Input Voltage Range

z 3A Output Current

z 60m

z Adaptive On-Time Control

z Fast T ran sient Respon se

z Support All Ceramic Capa citors

z Up to 95% Efficiency

z 700kHz Switching Frequency

z Adjustable Output Voltage from 0.8V to 8V

z Adjustable Soft-Start

z Cycle-by-Cycle Current Limit

z Input Under Voltage Lockout

z Thermal Shutdown Protection

z RoHS Compliant and Halogen Free

Mode Enable s Fa st T ra n sient Respon se

ΩΩ

Ω Internal Low Site N-MOSFET

ΩΩ

Applications

z Industrial and Commerci al Low Power Systems z Computer Peripherals z LCD Monitors a nd TVs z Green Electronics/Appliance s z Point of Load Regulation for High-Performance DSPs,

FPGAs, and ASICs

Marking Information

RT7266ZSP : Product Number

RT7266 ZSPYMDNN

YMDNN : Date Code

Pin Configurations

(TOP VIEW)

PVCC

GND

3 4

VIN

BOOT

GND

SOP-8 (Exposed Pad)

DS7266-02 September 2012 www.richtek.com

RT7266

Typical Application Circuit

Chip Enable

(V) R1 (kΩ) R2 (kΩ) C3 (pF) L1 (μH) C7 (μF)

OUT

1 6.81 22.1 -- 1.4 22 to 68

1.05 8.25 22.1 -- 1.4 22 to 68

1.2 12.7 22.1 -- 1.4 22 to 68

1.8 30.1 22.1 5 to 22 2 22 to 68

C1 10µF x 2

5, 9 (Exposed Pad)

3.9nF

0.1µF

Table 1. Suggested Component Values

VIN

EN GND SS

RT7266

BOOT

PVCC

0.1µF

C4 1µF

1.4µH

PVCC

8.25k

22.1k

C7 22µF x 2

7 2 3

OUT

1.05V/3A

2.5 49.9 22.1 5 to 22 2 22 to 68

3.3 73.2 22.1 5 to 22 2 22 to 68 5 124 22.1 5 to 22 3.3 22 to 68 7 180 22.1 5 to 22 3.3 22 to 68

Functional Pin Description

Pin No. Pin Name Pin Function

Enable Input. A logic-high enables the converter; a logic-low forces the RT7266

1 EN

2 FB

3 PVCC

4 SS

5, 9 (Exposed pad) GND

6 SW Switch Node. Connect this pin to an external L-C filter. 7 BOOT

8 VIN

into shutdown mode reducing the supply current to less than 10μA. Attach this pin to VIN with a 100kΩ pull up resistor for automatic start-up.

Feedback Input. It is used to regulate the output of the converter to a set value via an external resistive voltage divider. The feedback reference voltage is

0.765V typically. Internal Regulator Output. Connect a 1μF capacitor to GND to stabilize

output voltage. Soft- Start Control Input. SS controls the soft-start period. Connect a capacitor

from SS to GND to set the soft-start period. A 3.9nF capacitor sets the soft-start p eriod to 1.5ms.

Ground. The Exposed pad should be soldered to a large PCB and connected to GND for maximum thermal dissipation.

Bootstrap for High Side Gate Driver. Connect a 0.1μF or greater ceramic capacitor fr om BOOT to SW pins.

Supply Input. The input voltage range is from 4.5V to 18V. Mus t bypass with a suitable large ( ≥10μF x 2) ceramic capacitor.

DS7266-02 September 2012www.richtek.com

Function Block Diagram

VIN

RT7266

PVCC

Reg

Soft-Start

On-Time

Control

REF

Driver

Comparator

UGATE

LGATE

BOOT

GND

DS7266-02 September 2012 www.richtek.com

RT7266

Absolute Maximum Ratings (Note 1)

z Supply V oltage, VIN ----------------------------------------------------------------------------------------------- −0.3V to 20V z Switch Voltage, SW ----------------------------------------------------------------------------------------------- −0.8V to (V

< 10ns----------------------------------------------------------------------------------------------------------------- −5V to 25V

z BOOT to SW -------------------------------------------------------------------------------------------------------- −0.3V to 6V z All Other Pins ------------------------------------------------------------------------------------------------------- −0.3V to 6V z Power Dissipation, P

@ TA = 25°C

SOP-8 (Exposed Pad) -------------------------------------------------------------------------------------------- 1.333W

z Package Thermal Re sistance (Note 2)

SOP-8 (Exposed Pad), θJA--------------------------------------------------------------------------------------- 75°C/W SOP-8 (Exposed Pad), θJC-------------------------------------------------------------------------------------- 15°C/W

z Junction T emperature Range------------------------------------------------------------------------------------- 150°C z Lead Temperature (Soldering, 10 sec.)------------------------------------------------------------------------ 260°C z Storage T emperature Range ------------------------------------------------------------------------------------- − 65°C to 150°C

+ 0.3V)

Recommended Operating Conditions

z Supply V oltage, VIN ----------------------------------------------------------------------------------------------- 4.5V to 18V z Junction T emperature Range------------------------------------------------------------------------------------- −40°C to 125°C z Ambient T emperature Range------------------------------------------------------------------------------------- −40°C to 85°C

(Note 3)

Electrical Characteristics

(VIN = 12V, T

Supply Current

Shutdown Current I Quiescent Current IQ V

Logic Threshold

EN Voltage

Voltage and Discharge Resistance

REF

Feedback Reference Voltage V Feedback Input Current IFB V

PVCC

Line Regulation 6V ≤ V Load Regulati on 0 < I Output Current I

DS(ON)

Switch On Resistan ce

Current Limit Current limit I

= 25°C, unless otherwise specified)

Parameter Symbol Test Conditions Min Typ Max Unit

SHDN

= 0V -- 1 10 μA

= 3V, VFB = 1V -- 0.7 -- mA

Logic-High 2 -- 5.5 Logic-Low -- -- 0.4

4.5V ≤ V

REF

= 0.8V −0.1 0 0.1 μA

≤ 18V 0.753 0.765 0.777 V

Output Output Voltage V

6V ≤ V

PVCC

= 6V, V

≤ 18V, 0 < I

≤ 18V, I

PVCC

< 5mA 4.7 5.1 5.5 V

PVCC

= 5mA -- -- 20 mV

< 5mA -- -- 60 mV

= 4V -- 110 - - m A

PVCC

High Side R Low Side R

DS(ON)_H DS(ON)_L

3.5 4.1 5.7 A

LIM

-- 90 --

-- 60 --

mΩ

DS7266-02 September 2012www.richtek.com

RT7266

Parameter Symbol Test Conditions Min Typ Max Unit

The rmal Shutdown

Thermal Shutdown Threshold TSD -- 150 -Thermal Shutdown

Hysteresis

ΔT

-- 20 --

On-Ti me Timer Cont rol

On-Time tON V Mi n imum On-Time t Mi n imum Off- T ime t

ON(MIN) OFF(MIN)

-- 60 -- ns

= 12V, V

= 1.05V -- 14 5 -- ns

OUT

-- 230 -- ns

Soft-Start

SS Charge Current VSS = 0V 1.4 2 2.6 μA SS Discharge Current VSS = 0.5V 0.05 0.1 -- m A

UVLO

UVLO Thr eshold VIN Risi ng to Wake up V

3.55 3.85 4.15

PVCC

Hysteresis -- 0.3 --

Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are

stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability.

Note 2. θ

Note 3. The device is not guaranteed to function outside its operating conditions.

is measured at T

measured at the exposed pad of the package.

= 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is

°C

DS7266-02 September 2012 www.richtek.com

RT7266

Typical Operating Characteristics

Efficiency vs. Output Current

100

90 80 70

= 5V

60 50 40

Effici e ncy (%)

30 20 10

0 0.5 1 1.5 2 2.5 3

OUT

= 3.3V

= 1.05V

Output Current (A)

Output Voltage vs. Input Voltage

1.07

1.06

Output Voltage (V)

1.05

1.04

OUT

= 0A

= 1A

= 2A

= 3A

= 12V

Output Voltage vs . Output Current

1.07

1.06

1.05

Output Voltage (V)

1.04

1.03 0 0.5 1 1.5 2 2.5 3

= 4.5V

= 12V

= 17V

Output Current (A)

Frequency vs. Input Voltage

900

800

700

600

Frequency ( kH z) 1

500

OUT

= 1.05V

1.03 4 6 8 1012141618

OUT

Input Voltage (V)

Reference Voltage vs. Temperature

0.780

0.775

0.770

0.765

= 17V

= 12V

0.760

Refer ence Voltage (V)

0.755

0.750

-50 -25 0 25 50 75 100 125

= 4.5V

No Load, V

Temperature (°C)

OUT

= 1.05V

Reference Volt age (V)

400

4 6 8 1012141618

Input Voltage (V)

Reference Voltage vs. Input Voltage

0.780

0.775

0.770

0.765

0.760

0.755

0.750 4 6 8 1012141618

Input Voltage (V)

= 1.05V, I

OUT

No Load, V

LOAD

OUT

DS7266-02 September 2012www.richtek.com

= 0.1A

= 1.05V

RT7266

)

Shutdown Current vs. Temperature

VEN = 0V

9 8 7 6 5

= 17V

4 3 2

Shutdown Current (µ A) 1

1 0

-50-25 0 25 50 75100125

= 12V

= 4.5V

Temperature (°C)

Current Limit vs . Input Voltage

8 7 6 5 4 3

Curr ent Limit ( A)

Quiescent Current vs. Temperature

0.8

0.7

0.6

0.5

0.4

Quiescent Current (mA

0.4

0.3

-50 -25 0 25 50 75 100 125

= 17V

= 12V

= 4.5V

VEN = 3V, V

Temperature (°C)

Current Limit vs. Temperature

8 7 6 5

= 17V

4 3

Current Li m it ( A)

= 12V

= 4.5V

= 1V

OUT

(20mV/Div)

OUT

(2A/Div)

1 0

4 6 8 1012141618

OUT

= 0V

Input Voltage (V)

Load Transient Response

VIN = 12V, V

Time (100μs/Div)

OUT

= 1.05V, I

= 0A to 3A

OUT

(10mV/Div)

1 0

OUT

(10V/Div)

= 0V

OUT

-50-250 255075100125

Temperature (°C)

Output Voltage Ripple

VIN = 12V, V

Time (500ns/Div)

OUT

= 1.05V, I

OUT

= 3A

DS7266-02 September 2012 www.richtek.com

RT7266

(20V/Div)

OUT

(1V/Div)

(10V/Div)

OUT

(5A/Div)

(5V/Div)

OUT

(1V/Div)

Power On from V

VIN = 12V, V

Time (5ms/Div)

OUT

= 1.05V, I

Power On from V

OUT

= 3A

(20V/Div)

OUT

(1V/Div)

(10V/Div)

OUT

(5A/Div)

(5V/Div)

OUT

(1V/Div)

Power Off from V

VIN = 12V, V

Time (10ms/Div)

OUT

= 1.05V, I

Power Off from V

OUT

= 3A

(10V/Div)

OUT

(5A/Div)

VIN = 12V, V

OUT

Time (5ms/Div)

= 1.05V, I

OUT

= 3A

(10V/Div)

OUT

(5A/Div)

VIN = 12V, V

OUT

= 1.05V, I

Time (100μs/Div)

OUT

= 3A

DS7266-02 September 2012www.richtek.com

Application Information

RT7266

The RT7266 is a synchronous high voltage buck converter that can support the input voltage ra nge from 4.5V to 18V and the output current ca n be up to 3A. It operates using ada ptive on-time ACOTTM mode control and provides a very fast transient response with few external compensation components. The RT7266 allows low external component count configuration with both low ESR and cera mic output capacitors.

PWM Operation

It is suitable for low external component count configuration with a ppropriate amount of Equivalent Series Resistance (ESR) capa citor(s) at the output. The output ripple valley voltage is monitored at a feedback point voltage. The synchronous high side MOSFET is turned on at the beginning of each cycle. After the internal one shot timer expires, the MOSFET is turned off. The pulse width of this one shot is determined by the converter's input and output voltages to keep the frequency fairly constant over the entire input voltage ra nge.

Chip Enable Operation

The EN pin is the chip enable input. Pulling the EN pin low (<0.4V) will shutdown the device. During shutdown mode, the RT7266 quiescent current drops to lower than 10μA. Driving the EN pin high (>2V, <5.5V) will turn on the device again. For external timing control, the EN pin can also be externally pulled high by adding a REN* resistor and CEN* cap acitor from the VIN pin (see Figure 1).

4.5V to 18V

Chip Enable

* : Optional

REN*

CEN*

9 (Exposed Pad)

VIN

RT7266

GND

BOOT

PVCC

2 3

Figure 1. External Timing Control

OUT

Adaptive On-Time Control

The RT7266 ha s a unique circuit to ensure the switching frequency on 700kHz over full input voltage range a nd full loading range. This circuit sets the on-ti me one-shot timer by monitoring the input voltage and SW signal. The switching frequency will keep constant if the duty ratio is V

OUT/VIN

Duty Ratio = V For Fixed T, Ton is proportional to V

OUT/VIN

= tON / T

OUT/VIN

Soft-Start

The RT7266 contains an external soft-start clamp that gradually raises the output voltage. The soft-start timing can be programmed by the external capacitor between SS pin and GND. The chip provides a 2μA charge current for the external capacitor. If a 3.9nF capacitor is used, the soft-start will be 2ms (typ.). The available ca pa citance range is from 2.7nF to 220nF.

t (ms) =

C5 (nF) 1.065

I (A)

An external MOSFET can be a dded to implement digital control on the EN pin when no system voltage above 2V is available, a s shown in Figure 2. In this case, a 100kΩ pull-up resistor, REN, is connected between VIN and the EN pin. MOSFET Q1 will be under logic control to pull down the EN pin.

Chip Enable

100k

9 (Exposed Pad)

VIN

RT7266

GND

BOOT

PVCC

Figure 2. Logic Control with Low V oltage

OUT

DS7266-02 September 2012 www.richtek.com

RT7266

To prevent enabling circuit when VIN is smaller than the V

target value, a resistive voltage divider can be pla ced

OUT

between the input voltage and ground a nd connected to the EN pin to adjust IC lockout threshold, as shown in Figure 3. For example, if a n 8V output voltage is regulated from a 12V input voltage, the resistor R

can be selected

EN2

to set input lockout threshold larger than 8V.

12V

EN1

100k

EN2

9 (Exposed Pad)

VIN

RT7266

GND

BOOT

PVCC

OUT

Figure 3. The Resistors can be Selected to Set IC

Lockout Threshold

Output Voltage Setting

The resistive divider allows the FB pin to sense the output voltage as shown in Figure 4.

OUT

RT7266

GND

dissipation. The OTP will shut down switching operation when junction temperature exceeds 150°C. Once the junction temperature cools down by approxi mately 20°C the main converter will resume operation. To maintain continuous operation maximum, the junction temperature should be prevented from rising above 150°C.

Inductor Selection

The inductor value and operating frequency determine the ripple current according to a specif ic input a nd a n output voltage. The ripple current ΔIL increases with higher V and decrea ses with higher inducta nce.

⎡⎤⎡ ⎤

OUT OUT

I = 1

Δ×−

⎢⎥⎢ ⎥

fL V

⎣⎦⎣ ⎦

Having a lower ripple current reduces not only the ESR losses in the output capa citors but also the output voltage ripple. High frequency with small ripple current ca n achieve highest efficiency operation. However , it requires a large inductor to achieve this goal. For the ripple current selection, the value of ΔIL = 0.2(I

) will be a rea sonable

MAX

starting point. The largest ripple current occurs at the highest VIN. To guarantee that the ripple current stays below the specified maximum, the inductor value should be chosen according to the following equation :

⎡⎤⎡⎤

L = 1

OUT OUT

⎢⎥⎢⎥

fI V

×Δ

L(MAX) IN(MAX)

⎣⎦⎣⎦

×−

Figure 4. Output Voltage Setting

The output voltage is set by an external resistive divider according to the following equation. It is re commended to use 1% tolerance or better divider resistors.

V = V ( 1 +

OUT FB

)

Where VFB is the feedba ck reference voltage (0.765V typ.).

Under Voltage Lockout Protection

The RT7266 has Under V oltage Lockout Protection (UVLO) that monitors the voltage of PVCC pin. When the V

PVCC

voltage is lower than UVLO threshold voltage, the RT7266 will be turned off in this state. This is non-latch protection.

CIN and C

Selection

OUT

The input capacitance, CIN, is needed to filter the trapezoidal current at the source of the high side MOSFET. T o prevent large ripple current, a low ESR in put cap acitor sized for the maximum RMS current should be used. The RMS current is given by :

I = I 1

RMS OUT(MAX)

OUT

This formula has a maximum at VIN = 2V I

RMS

= I

/2. This simple worst-case condition is

OUT

IN OUT

−

OUT

commonly used for design because even significant deviations do not offer much relief.

Choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to

Over Temperature Protection

The RT7266 equips an Over T emperature Protection (OTP) circuitry to prevent overheating due to excessive power

meet size or height requirements in the design. For the input capacitor, two 10μF and 0.1μF low ESR ceramic cap acitors are recommended.

DS7266-02 September 2012www.richtek.com

, where

RT7266

The selection of C

is determined by the required ESR

OUT

to minimize voltage ripple. Moreover, the amount of bulk capacitance is also a key

for C The output ripple, ΔV

Δ≤Δ +

selection to ensure that the control loop is stable.

OUT

, is determined by :

OUT

8fC

OUT

VIESR

OUT L

⎡⎤ ⎢⎥

⎣⎦

The output ripple will be highest at the maximum input voltage since ΔIL increases with input voltage. Multiple cap a citors placed in parallel may be needed to meet the ESR and RMS current ha ndling requirements.

Higher values, lower cost ceramic capacitors are now becoming available in smaller ca se sizes. Their high ripple current, high voltage rating and low ESR ma ke them ideal for switching regulator a pplications. However , care must be taken when these capacitors are used at input and output. When a ceramic capacitor is used at the input and the power is supplied by a wall ad a pter through long wires, a load step at the output can induce ringing at the input, VIN. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN large enough to damage the part.

External Bootstrap Diode

PVCC Capacitor Selection

Decouple with a 1μF cera mic capa citor. X7R or X5R gra de dielectric ceramic capacitors are recommended for their stable temperature characteristics.

Over Current Protection

When the output shorts to ground, the inductor current decays very slowly during a single switching cycle. A over current detector is used to monitor inductor current to prevent current runaway . The over current detector monitors the voltage between SW and GND during the low-side MOS turn-on state. This is cycle-by-cycle protection. The over current detector also supports temperature compensated.

Thermal Considerations

For continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and a mbient temperature. The maximum power dissipation can be calculated by the following formula :

P where T

the ambient temperature, a nd θ

D(MAX)

= (T

J(MAX)

− TA) / θ

J(MAX)

is the maximum junction temperature, T

is the junction to ambient

thermal resistance.

Connect a 0.1μF low ESR cera mic capa citor between the BOOT and SW pins. This ca pacitor provides the gate driver voltage for the high side MOSFET. It is recommended to add an external bootstrap diode between an external 5V and the BOOT pin f or efficiency improvement when input voltage is lower than 5.5V or duty ratio is higher tha n 65%. The bootstrap diode ca n be a low cost one such as 1N4148 or BAT54. The external 5V can be a 5V fixed input from system or a 5V output of the RT7266. Note that the external

For recommended operating condition specifications, the maximum junction temperature is 125°C. The junction to ambient thermal re sistance, θJA, is layout dependent. For SOP-8 (Exposed Pad) pack ages, the thermal resistance,

, is 75°C/W on a standard JEDEC 51-7 four-layer

thermal test board. The maximum power dissipation at TA = 25°C can be calculated by the following formulas :

= (125°C − 25°C) / (75°C/W) = 1.333W for

D(MAX)

SOP-8 (Exposed Pad) package

boot voltage must be lower than 5.5V

The maximum power dissipation depends on the operating ambient temperature for fixed T

and thermal

J(MAX)

resistance, θJA. The derating curves in Figure 6 allow the

BOOT

RT7266 0.1µF

designer to see the effect of rising ambient temperature on the maximum power dissipation.

Figure 5. External Bootstra p Diode

DS7266-02 September 2012 www.richtek.com

RT7266

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

Maximum Power Dissipation (W) 1

0.0 0 25 50 75 100 125

Four-Layer PCB

Ambient Temperature (°C)

Figure 6. Derating Curve of Maxi mum Power Dissi pation

Layout Consideration

Follow the PCB layout guidelines for optimal performa nce of the RT7266

 Keep the traces of the main current paths as short and

wide as possible.

 Put the input ca pacitor a s close a s possible to the device

pins (VIN a nd GND).

 SW node is with high frequency voltage swing and

should be kept at small area. Keep sensitive components away from the SW node to prevent stray cap acitive noise pickup.

 Connect feedback network behind the output ca pacitors.

Keep the loop area small. Place the feedback components near the RT7266.

 The GND and Exposed Pad should be connected to a

strong ground plane for heat sinking a nd noise protection.

The resistor divider must be connected as close to the device as possible.

OUT

GND

C4 C5

PVCC

Input capacitor must be placed

as close to the IC as possible.

VIN

2 3 4

GND

BOOT

GND

SW should be connected to inductor by wide and short trace. Keep sensitive components away from this trace.

Figure 7. PCB Layout Guide

OUT

DS7266-02 September 2012www.richtek.com

Outline Dimension

RT7266

EXPOSED THERMAL PAD (Bottom of Package)

Dimensions In Millimeters Dimensions In Inches

Symbol

Min Max Min Max

A 4.801 5.004 0.189 0.197

B 3.810 4.000 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.510 0.013 0.020

F 1.194 1.346 0.047 0.053 H 0.170 0.254 0.007 0.010

I 0.000 0.152 0.000 0.006

J 5.791 6.200 0.228 0.244

M 0.406 1.270 0.016 0.050

X 2.000 2.300 0.079 0.091

Option 1

Y 2.000 2.300 0.079 0.091 X 2.100 2.500 0.083 0.098

Option 2

Y 3.000 3.500 0.118 0.138

8-Lead SOP (Exposed Pad) Plastic Package

Richtek Technology Corporation

5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789

Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.

DS7266-02 September 2012 www.richtek.com

Richtek RT7266ZSP Schematic [ru]

Specifications and Main Features

Frequently Asked Questions

User Manual