HBM (Human Body Mode) ------------------------------------------------------------------------------------------ 4kV
MM (Machine Mode) -------------------------------------------------------------------------------------------------- 250V
Recommended Operating Conditions (Note 4)
z Supply Input Voltage, V
z Operating Frequency ------------------------------------------------------------------------------------------------- 50k to 130kHz
z Junction Temperature Range ---------------------------------------------------------------------------------------- −40°C to 125°C
z Ambient Temperature Range ---------------------------------------------------------------------------------------- −40°C to 85°C
------------------------------------------------------------------------------------------- 12V to 25V
DD
Electrical Characteristics
(V
= 15V, RT = 100kΩ, T
DD
Parameter Symbol Test Conditions Min Typ Max Unit
VDD Section
VDD Over Voltage Protection Level V
On Threshold Voltage V
VDD On/Off Hysteresis V
Start-Up Current I
Operating Current I
VDD Hold Up Mode Hysteresis
Ending Level
VDD Hold Up Mode Entry Level V
VDD Clamp Voltage V
Osci ll ator Sect ion (RT pin)
Normal PWM Frequency f
Frequency Jittering Range -- ± 4 -- %
Maximum Duty Cycle D
= 25°C, unless otherwise specified)
A
25.5 27 28.5 V
OVP
13 14 15 V
TH_ON
3 4 5 V
DD_hys
VDD = V
DD-ST
V
= 15V, RT = 100kΩ,
DD-OP
V
DD_hys
DD_Low
DD_Clamp
R
OS C
70 75 80 %
MAX
DD
GATE = Open, V
V
COMP
V
COMP
-- 29 -- V
= 100kΩ60 65 70 kHz
T
– 0.1V -- 20 30 μA
TH_ON
COMP
= 2.5V
-- 1.1 2.2 mA
< 1.6V -- 11.5 -- V
< 1.6V -- 11 -- V
To be continued
DS7731-03 March 2011www.richtek.com
4
R7731
Parameter Symbol Test Conditions Min Typ Max Unit
Frequency Variation Versus VDD
Deviation
Frequency Variation Versus
Temperature Deviation
V
f
DV
T
f
DV
VDD
A
= 12V to 25V -- -- 2 %
= −30°C to 105°C (Note 5) -- -- 5 %
COMP Input Sec tio n
Open Loop Voltage V
COMP Open Loop Protection Delay
Cycles
Short Circuit COMP Current I
COMP-OP
T
OLP
ZERO
COMP pin Open 5 5.5 6 V
R
V
= 100kΩ -- 29 -- ms
T
= 0V -- 1.2 2.2 mA
COMP
Current Sense Section
Peak Current Limitation V
Leading Edge Blanking Time T
0.65 0.7 0.75 V
CSTH
-- 420 520 ns
LE B
Propagation Delay Time TPD -- 100 -- ns
GA TE Section
Rising Time TR V
Falling Time TF V
Gate Output Clamping Voltage V
Over Temperature Protection T
OTP Hysteresis T
Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
These are stress ratings only, and functional operation of the device at these or any other conditions beyond those
indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
Note 2. θ
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. Guaranteed by design.
is measured in the natural convection at TA = 25°C on a low effective single layer thermal conductivity test board of
JA
JEDEC 51-3 thermal measurement standard.
VDD = 22V -- 12 -- V
clamp
140 -- -- °C
OTP
OTP_hys
-- 30 -- °C
= 15V, CL= 1nF -- 250 350 ns
DD
= 15V, CL = 1nF -- 150 250 ns
DD
DS7731-03 March 2011www.richtek.com
5
R7731
Typical Operating Characteristics
VTH vs. Temperature
15
14
13
(V)
12
DD
V
11
10
9
-40 -25 -10 5 20 35 50 65 80 95 110 125
V
TH_ON
V
TH_OFF
Temperature (°C)
I
vs. Te m perature
1.55
1.50
1.45
(mA)
1.40
DD-OP
I
1.35
DD-OP
V
DD
= 27V
V
= 15V
DD
V
= 11V
DD
28
26
24
22
20
(μA)
18
DD-ST
I
16
14
12
10
-40-1510356085110135
63
V
62
61
V
60
(kHz)
OSC
f
59
DD
DD
= 11V
= 27V
V
DD
I
vs. Temperature
DD-ST
Temperature (°C)
f
vs . Te m perature
OSC
= 15V
V
= 13V
DD
1.30
V
= 2V, CL = 1nF
1.25
-40-1510356085110135
COMP
Temperature (°C)
D
vs. Te m pe rature
80
79
78
77
76
(%)
75
MAX
74
D
73
72
71
70
-40-20020406080100120
MAX
Temperature (°C)
58
57
-40-1510356085110135
Temperature (°C)
V
vs. Tem pe rature
5.50
5.45
5.40
5.35
(V)
5.30
COMP
V
5.25
5.20
5.15
-40-20020406080100120
COMP
COMP Open Voltage
Temperature (°C)
DS7731-03 March 2011www.richtek.com
6
R7731
Clamp Voltage vs. Temperature
13.0
12.5
12.0
11.5
Voltage (V)
11.0
10.5
10.0
-40-1510356085110135
Temperature (°C)
0.50
0.45
I
SUPPLY
vs. Te m pe rature
VDD = 20V, CL = 1nF
GATE (Rising/Falling) vs. Temperature
350
300
250
200
150
GATE (ns)
100
50
0
-40 -25 -10 5 20 35 50 65 80 95 110 125
13
12
11
Rising
Falling
VDD = 20V, CL = 1nF
Temperature (°C)
VOH vs. V
DD
(mA)
0.40
SUPPLY
I
0.35
0.30
-40-20020406080100120
COMP Open
No Gate Output
I
= I
SUPPLY
Temperature (°C)
V
vs. V
600
575
550
525
500
(mV)
OL
V
475
450
425
400
11 12 13 14 15 16 17 18 19 20 21 22
OL
DD
VDD (V)
DD-OP
I
SINK
− I
COMP
= 20mA
(mA)
SUPPLY
I
(V)
10
OH
V
9
8
I
7
11 12 13 14 15 16 17 18 19 20 21 22
SOURCE
VDD (V)
I
0.426
0.424
0.422
0.420
0.418
0.416
0.414
0.412
0.410
0.408
11 12 13 14 15 16 17 18 19 20 21 22
SUPPLY
vs. V
DD
V
COMP
No Gate Output
I
SUPPLY
Open
= I
VDD (V)
= 20mA
DD-OP
− I
COMP
DS7731-03 March 2011www.richtek.com
7
R7731
Application Information
UVLO
Under Voltage Lockout (UVLO) block is to ensure VDD
has reached proper operation voltage before we enable
the whole IC blocks. To provide better temperature
coefficient and precise UVLO threshold voltage, the
reference voltage of hysteresis voltage (10V / 14V ) is
from band-gap block directly. By this way, R7731 can
operate more reliable in different environments.
Jittering Oscillator
For batter EMI performance, R7731 will operate the system
with ±4% frequency deviation around setting frequency.
To guarantee precise frequency, it is trimmed to 5%
tolerance. It also generates slope compensation saw-tooth,
75% maximum duty cycle pulse and overload protection
slope. By adjusting resistor of RT pin according to the
following formula :
f (kHz) =
OSC
6500
T
R (k )Ω
It can typically operate between 50kHz to 130kHz. Note
that RT pin can’ t be short or open otherwise oscillator
will not operate.
layout. Also, we amplify current sense signal to compare
with feedback signal instead of dividing feedback signal.
All the effort is to provide clean and reliable current mode
operation.
Soft-Start
During initial power on, especially at high line, current
spike is kind of unlimited by current limit. Therefore,
besides cycle-by-cycle current limiting, R7731 still
provides soft-start function. It effectively suppresses the
start-up current spike. As shown in the Figure 1 and
Figure 2, the start-up VCS is about 0.3V lower than
competitor. Again, this will provide more reliable operation
and possibility to use smaller current rating power
MOSFET.
V
CS
V
OUT
Built-in Slope Compensation
To reduce component count, slope compensation is
implemented by internal built-in saw-tooth. Since it’ s builtin, it’ s compromised between loop gain and sub-harmonic
reduction. In general design, it can cancel sub-harmonic
to 90Vac.
Leading Edge Blanking (LEB)
MOSFET Coss, secondary rectifier reverse recovery
current and gate driver sourcing current comprise initial
current spike. The spike will seriously disturb current mode
operation especially at light load and high line. R7731
provides built-in 420ns LEB to guarantee proper operation
in diverse design.
Noise Immunity
Current mode controller is very sensitive to noise. R7731
takes the advantages of RICHTEK long term experience
in designing high noise immunity current mode circuit and
Figure 1. Competitor
V
CS
Figure 2. R7731
V
OUT
(2V/Div)
V
CS
(500mV/Div)
V
OUT
V
OUT
(2V/Div)
V
CS
(500mV/Div)
DS7731-03 March 2011www.richtek.com
8
R7731
Gate Driver
A totem pole gate driver is fine tuned to meet both EMI
and efficiency requirement in low power application. An
internal pull low circuit is activated after pretty low VDD to
prevent external MOSFET from accidentally turning on
during UVLO.
Burst Triple Mode
To fulfill green mode requirement, there are 3 operation
modes in R7731. Please also refer to Figure. 3 for details.
zz
z PWM Mode : For most of load condition, the circuit
zz
will run at traditional PWM current mode.
zz
z Burst Mode : During light load, switching loss will
zz
dominate the power efficiency calculation. This mode
is to cut switching loss. As shown in Figure 3, when
Operation
Load
Normal
Light
Load
the output load gets light, feedback signal drops and
touches V
ceases to switching. After V
signal goes back to V
. Clock signal will be blanked and system
burL
drops and feedback
OUT
, switching will be resumed.
burH
Burst mode so far is widely used in low power
application because it’ s simple, reliable and will not
have any patent infringement issue.
zz
z VDD Holdup Mode : When the VDD drops down to
zz
VDD turn off threshold voltage, the system will be
shutdown. During shutdown period, controller does
nothing to any load change and might cause V
OUT
down.
To avoid this, when VDD drops to a setting threshold,
11V, the hysteresis comparator will bypass PWM and
burst mode loop and force switching at a very low level
to supply energy to VDD.
No Load
(VDD Holdup Mode)
VDD
V
DD_High
V
DD_Low
V
COMP
V
BURH
V
BURL
V
GATE
Figure 3. Burst Triple Mode
Protection
R7731 provides fruitful protection functions that intend to
protect system from being damaged. All the protection
function can be listed as below:
zz
z Cycle-by-Cycle Current Limiting : This is a basic but
zz
very useful function and it can be implemented easily in
current mode controller.
zz
z Overload Protection : Long time cycle-by-cycle
zz
current limiting will lead to system thermal stress. To
further protect system, system will be shutdown after
about 2048 clock cycles. It’ s about 30ms delay in
67kHz operation. After shutdown, system will resume
and behave as hiccup. By proper start-up resistor design,
thermal will be averaged to an acceptable level over the
ON/OFF cycle of IC. This will last until fault is removed.
zz
z Brownout Protection : During heavy load, this will
zz
trigger 30ms protection and shutdown the system. If
it’ s in light load condition, system will be shutdown
after VDD is running low and triggers UVLO.
zz
z OVP : Output voltage can be roughly sensed by VDD
zz
pin. If the sensed voltage reaches 27V threshold, system
will be shutdown after 20us deglitch delay.
zz
z Feedback Open and Opto Coupler Short : This will
zz
trigger OVP or 30ms delay protection. It depends on
which one occurs first.
zz
z OTP : Internal OTP function will protect the controller
zz
itself from suffering thermal stress and permanent
damage. It stops the system from switching until the
temperature is under threshold level. Meanwhile, if VDD
reaches VDD turn off threshold voltage, system will
hiccup till over temperature condition is gone.
DS7731-03 March 2011www.richtek.com
9
R7731
Outline Dimension
H
D
L
C
b
A
e
Dimensions In Millimeters Dimensions In Inches
Symbol
Min Max Min Max
A 0.889 1.295 0.031 0.051
A1 0.000 0.152 0.000 0.006
B 1.397 1.803 0.055 0.071
b 0.250 0.560 0.010 0.022
C 2.591 2.997 0.102 0.118
B
A1
10
D 2.692 3.099 0.106 0.122
e 0.838 1.041 0.033 0.041
H 0.080 0.254 0.003 0.010
L 0.300 0.610 0.012 0.024
SOT-23-6 Surface Mount Package
DS7731-03 March 2011www.richtek.com
R7731
A
B
E
C
L
I
D
F
J
Dimensions In M illimeters Dimensions In Inches
Symbol
Min Max Min Max
A 9.068 9.627 0.357 0.379
B 6.198 6.604 0.244 0.260
C 3.556 4.318 0.140 0.170
D 0.356 0.559 0.014 0.022
E 1.397 1.651 0.055 0.065
F 2.337 2.743 0.092 0.108
I 3.048 3.556 0.120 0.140
J 7.366 8.255 0.290 0.325
L
0.381 0.015
8-Lead DIP Plastic Package
Richtek Technology Corporation
Headquarter
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design,
specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be guaranteed
by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
DS7731-03 March 2011www.richtek.com
Richtek Technology Corporation
Taipei Office (Marketing)
5F, No. 95, Minchiuan Road, Hsintien City
Taipei County, Taiwan, R.O.C.
Tel: (8862)86672399 Fax: (8862)86672377
Email: marketing@richtek.com
11
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