Rainbow Electronics TH7841A User Manual

Features
•	Pixel Size: 11 µm x 13 µm (13 µm Pitch)
•	High Data Output Rate: 20 MHz
•	High Responsivity and Resolution Over a Wide Spectral Range: from Blue (400 nm) up
•	to Near Infrared (1,100 nm)
	Low Dark Signal and Improved Uniformity
•	Low Temporal Noise and High Dynamic Range: Over 6000/1
•	Ease and Flexibility of Operation:
	– Only Two External Basic Drive Clocks
•	– Choice of Internal or External Sampling and Reset					Linear CCD
	28-lead DIL Package
•	Available with Standard Window or Antireflective Window in the Bandwidth 450 to					Image Sensor
	750 nm
Pin Identification						(2048 Pixels)
	Pin Number	Symbol	Designation
	2	VOSA	Video Output Signal A (Odd Channel)			TH7841A
	3	ΦECHA	A Sample-and-hold Gate Input Channel
	4	SΦECHA	A Internal Sampling Clock Output Channel
	5	ΦRA	A External Reset Clock Input Channel
	9	VDD	Output Amplifier Drain And Internal Logic Supply
	10	TP3	Test Point 3
	11	TP2	Test Point 2
	12	VT	Register and Photosensitive Zone DC Bias
	13	TP1	Test Point 1
	14, 15, 28	VSS	Substrate Bias (Ground)
	16	VINH	Internal Sampling Clock Inhibiting Input (Dc Bias)
	18	ΦP	Transfer Clock
	19	ΦT	Register Transport Clock
	20	VGS	Output Gate DC Bias
	21	ΦRB	B External Reset Clock Output Channel
	24	SΦECHB	B Internal Sampling Clock Output Channel
	25	ΦECHB	B Sample-and-hold Gate Input Channel
	26	VOSB	Video Output Signal B (Even Channel)
	27	VDR	Reset DC Bias
	1, 6, 7, 8, 17, 22, 23	DNC	Do not Connect
		DNC	1	28	VSS
		VOSA	2	27	VDR
		ΦECHA	3	26	VOSB
		SΦECHA	4	25	ΦECHB
		ΦRA	5	24	SΦECHB
		DNC	6	23	DNC
		DNC	7	22	DNC
		DNC	8	21	ΦRB
		VDD	9	20	VGS
		TP3	10	19	ΦT
		TP2	11	18	ΦP
		VT	12	17	DNC
		TP1	13	16	VINH	Rev. 1998A–IMAGE–05/02
		VSS	14	15	VSS
						1

T

Absolute Maximum Ratings*

.....................................Storage Temperature	-55°C to +150°C	*NOTICE: Stresses above those listed under ABSOLUTE
		MAXIMUM RATINGS may cause permanent
Operating Temperature........................................	0°C to +70°C	device failure. Functionality at or above these
		limits is not implied. Exposure to absolute maxi-
Thermal Cycling..........................................................	15°C/mn	mum ratings for extended periods may affect
Maximum Voltages:		device reliability.
• Pins: 3, 5, 9, 10, 11, 13,
16, 19, 20, 21, 25, 27........................................	-0.3V to +18V
• Pins: 12. 18 ......................................................	-0.3V to +16V
• Pins: 14, 15, 28 .................................................................	0V

Operating Range

Operating

Precautions

Operating range defines the temperature limits between which the functionality is guaranteed: 0°C to 70°C.

Shorting the video output to VSS to VDD, even temporarily, can permanently damage the output amplifier.

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										TH7841A
Operating Conditions (T = 25°C)
Table 1. DC Characteristics
							Values
Parameter			Symbol			Min	Typ	Max	Unit		Note
Output Amplifier Drain Supply			VDD			14	15	16	V
Reset DC Bias			VDR			12	13	14.5	V		(1)
Output Gate DC Bias			VGS			5.5	6	6.5	V
Photosensitive Zone and			VT			6	6.5	7	V		(2)
Register DC Bias
Substrate Bias			VSS			0.0	0.0
Test Point 1			TP1				VDD		V		(3)
Test Points 2 and 3			TP2, TP3				VSS		V		(3)
Notes: 1. It is recommended to maintain VDR at VDD - 2V.
	2. VT nominal =
	(VΦT )high + (VΦT)low		± 5%
-----------------------------------------------------------
2

3. No use for operation – For testing purpose only.

Basic Internal

Configuration

SΦECHA and ΦRA

internal to TH7841A

SΦECHB and ΦRB

Table 2. Selection of Nominal Mode

Option	Implementation	Note
	VINH (16) Connected to VSS
Internal Sampling	SΦECHA (4) and ΦECHA (3) Strapped	(1)
	SΦECHB (24) and ΦECHB (25) Strapped
Internal Reset	ΦRA (5) and ΦRB (21) Connected to VDD

Note: 1. Make the straps as short as possible to avoid any parasitic coupling to these connections. The load capacitance introduced by the strap should not exceed 5 pF.

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Figure 1. Timing Diagram — Clocks and Video Output Timing Diagram in Internal Sampling Mode

Table 3. Drive Clock Characteristics (see Figure 1)

					Values
Parameter	Symbol	Logic		Min	Typ	Max	Unit	Note
Transfer Clock		High		12	13	14	V	(1)
	ΦPΦT
Register Transport Clock		Low		0.0	0.4	0.6
Register Transport Clock	CΦT				800	1200	pF
Capacitance
Transfer Clock Capacitance	CΦP				200	300	pF
Note: 1. Transients under 0.0V in the clock pulses will lead to charge injection, causing a localized increase in the dark signal if such
spurious negative transients are present, they can be suppressed by inserting a serial resistor of appropriate value (typically
20 to 100Ω) in the corresponding driver output.

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