Rainbow Electronics TH7899M User Manual

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Features

Designed for Digital Photography, Graphic Arts, Medical and Scientific Applications

Pixel 14 µm x 14 µm Photomos with 100% Aperture

Image Zone: 28.67 mm x 28.67 mm

 

 

 

 

 

 

 

 

Frame Readout Through 1, 2 or 4 Outputs

 

 

 

 

 

 

 

 

Data Rates up to 4 x 20 MHz (Compatibility with 15 Frames/Second)

 

 

 

 

 

 

 

 

Possible Binning 2 x 2 Pixels (Format 1024 x 1024 with Pixels of 28 µm x 28 µm)

 

 

 

 

High Dynamic Range (up to 12600:1) even at:

 

 

 

 

 

– Room Temperature

 

 

 

 

 

 

 

 

 

– 20 MHz/Output

Full Field CCD

Very Low Dark Current (MPP Mode)

Optimized Resolution and Responsivity in the 400 - 1100 nm Spectrum

Image Sensor

Other Possible Full Frame Operating Modes:

 

 

 

 

 

– 1536 x 2048 Pixels of 14 µm x 14 µm

2048 x 2048

– 768 x 1024 Pixels of 28 µm x 28 µm

Compatible with Fiber Optic Face Plate Coupling

On Request: Frame Transfer Architecture (On-chip Memory Defined by Mechanical Pixels Shielding) Featuring:

– 1024 (V) x 2048 (H) Active Pixels of 14 µm x 14 µm

 

– 512 (V) x 1024 (H) Active Pixels of 28 µm x 28 µm

 

– 512 (V) x 2048 (H) Active Pixels of 14 µm x 14 µm

TH7899M

 

Figure 1. TH7899M Organization

Rev. 2201A–IMAGE–02/02

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General Description

Applications

Functional

Description

Pixel

The TH7899M sensor is a 2048 x 2048 full frame Charge Couple Device (CCD) designed for a wide range of applications due to both its operating mode flexibility and its high dynamic range combined with its high resolution. The device is 180° symmetrical so if it is not plugged in the right side it will not be damaged.

The nominal photosensitive area is made up of 2048 x 2048 useful pixels split vertically in 4 zones A, B, C and D. Each zone can be driven separately by four-phase clocks (Φ P1 Φ P2 Φ P3 and Φ P4) allowing different operating modes as described in “Image Area” on page 3.

There are two identical horizontal shift registers: one at the top of the image area (register A) and one at the bottom (register B). At each end of the two readout registers, a summing gate is located which can be clocked to allow a horizontal pixel summation in front of the on-chip output amplifier.

The TH7899M sensor is particularly suited to the following applications:

Digital photography

Medical applications

Graphic arts

Industrial applications

Scientific applications

The pixel size is 14 µm x 14 µm with 100% aperture. The following figures show the pixel structure.

Figure 2. Front View of a Photoelement

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TH7899M

Image Area

Figure 3. Cross Sectional View (AA') of a Photoelement and Potential Profile During

Integration

The image area consists of an array of 2048 x 2048 useful photoelements for imaging.

The matrix also includes:

7 columns of dark reference and 5 isolation columns (half covered) on the right and left sides. The isolation columns are to ensure the 2048 active columns and are 100% photosensitive,

8 supplementary lines in each zone A B C and D; these lines are useful when using an optical shield in case of frame transfer architecture with memory zone to correct smearing (digital correction).

Among these 8 lines in zones A and D, 3 lines at the top and at the bottom of the full image area are masked with aluminium, all the other supplementary lines are photosensitive.

The image area is divided into 4 parts of 520 lines each (electrically but not optically). These 4 parts can be driven independently allowing different operating modes as described hereunder.

Full Field Modes (No In such cases a mechanical shutter is needed to shield the array from incident illumina- Mechanical Shield On tion during the readout period to avoid parasitic signal (smearing) particularly at low data Package) rates. Such a shutter is not necessary if no light is coming onto the photosensitive area

during the readout time (e.g. in case of pulsed light source).

There are mainly three different modes which can square with different optical formats, with readout optimized in speed or with simplified operating conditions.

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Used

Number of

Configu-

 

Active Pixel

 

Useful

Readout

 

Possible

ration to

 

Number

Image Zone Dimension

Zones

Register

 

Outputs

be Used

Characteristics

 

 

 

 

 

 

 

 

 

 

 

2048 (V) x 2048 (H)

28.67 mm (V) x 28.67 mm (H)

A, B, C

 

 

B

 

1 or 2

1

Simplified operating

and D

 

 

 

conditions

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2048 (V) x 2048 (H)

28.67 mm (V) x 28.67 mm (H)

A, B, C

A and B

 

2 or 4

2

2048 x 2048 optimized data

and D

 

rate

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1024 (V) x 2048 (H)

14.34 mm (V) x 28.67 mm (H)

C and D

 

 

B

 

1 or 2

2

Adapted optical format

 

 

 

 

 

 

 

 

 

 

 

1536 (V) x 2048 (H)

21.50 mm (V) x 28.67 mm (H)

B, C

 

 

B

 

1 or 2

3

Adapted optical format

1365 (V) x 2048 (H)

19.11 mm (V) x 28.67 mm (H)

and D

 

 

 

Equivalent 24 x 36mm ratio

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

512 (V) x 2048 (H)

7.17 mm (V) x 28.67 mm (H)

A

 

 

A

 

1 or 2

3

Adapted optical format

 

 

 

 

 

 

 

Note: 1. Binned modes (2 x 2 or 2 x 1) can be used which will lead to specific binned formats in particular the format 1024 x 1024 with

an equivalent pixel size of 28 µm x 28 µm.

 

 

 

 

 

 

 

 

 

Frame Transfer Modes These cases involve placing an optical shield in the package (on request) to define one (Option On Package On or two memory zones according to the application shown in the figures below.

Request)

 

 

 

Used

Number of

Configu-

 

Active Pixel

 

Useful

Readout

Possible

ration to

 

Number

Image Zone Dimension

Zones

Register

Outputs

be Used

Characteristics

 

 

 

 

 

 

 

1024 (V) x 2048 (H)

14.34 mm (V) x 28.67 mm (H)

C and D

B

1 or 2

4

1024 x 2048 simplified

operating conditions

 

 

 

 

 

 

 

 

 

 

 

 

 

1024 (V) x 2048 (H)

14.34 mm (H) x 28.67 mm (H)

B and C

A and B

2 or 4

5

1024 x 2048 optimized data

rate

 

 

 

 

 

 

 

 

 

 

 

 

 

512 (V) x 2048 (H)

7.17 mm (V) x 28.67 mm (H)

A

A

1 or 2

5

Adapted optical format

 

 

 

 

 

 

 

Note: 1. Binned modes (2 x 2 or 2 x 1) can be used, this will lead to specific binned formats, in particular, the format 512 x 1024 with

an equivalent pixel size of 28 µm x 28 µm.

 

 

 

 

 

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TH7899M

Horizontal Registers

The sensor has two readout registers located at the top (register A) and at the bottom (register B) of the image area. They can be driven independently by two phase clocks. Nevertheless to allow a multiple charge transfer direction for the useful pixels (left, right

or half left and half right), the two clocks are split into 6 clocks (Φ LAi=1 to 6 for the A register and Φ LBi=1 to 6 for the register B). The transfer direction is fixed by the connection mode of the six clocks into 2 clocks.

The description of the connection with the transfer direction is described in “” on page 9.

The readout register has 2072 stages, with a further 18 extra stages at each end. Whatever the chosen transfer direction for the useful pixels, the 18 extra pixels, the 7 dark references and the 5 isolations are always transferred to the nearest output as shown in the figure hereunder.

Figure 4. A and B Readout Register Structure

Binned Modes

The readout register can be driven in the MPP mode if necessary.

Two types of summation can be performed:

Vertical summation in each stage of the serial register (A or B)

Horizontal summation in an output summing well driven by Φ S clock and located at each end of the readout registers (A and B).

Nevertheless, one summation can be performed in both the register and the output summing, allowing in this way, to have a resulting signal of (2 x 2) contiguous pixels from the image area. Thus, the sensor is equivalent to a 1024 x 1024 array of a 28 µm x 28 µm pixel. When using the binned mode with a charge level, after summation, smaller than 300 ke- (typical value) it is better (optimization of dynamic and linearity) to keep the conversion factor at 7 µV/e- (with VGL = 1V and VDR = 13.5V). But for summing mode with charge level, after binning, higher than 300 ke-, the conversion factor should be reduced by increasing the VGL gate to 12V and the VDR reset drain to 15V. With such a method, the saturation charge is optimized for the binning mode.

This summing technique leads to an increased signal to noise ratio, larger pixel size, higher frame rates (for vertical binning only) but at the expense of a loss in resolution.

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Output Amplifiers

Multi-Pinned-Phase (MPP) Mode

The TH7899M sensor has four output amplifiers. These are located in each corner of the device at the ends of the readout register. Charge packets are clocked to a precharge capacitor (floating diffusion) whose potential varies linearly with the quantity of charge in each packet. This potential is applied to the input gate of a two stage source follower amplifier and the output signal is read. Then, the reset clock Φ R removes the charge from the floating diffusion via the reset drain VDR which imposes its reference level.

Figure 5. On-chip Output Amplifier Structure

The TH7899M sensor operates in the MPP mode in order to substantially decrease dark current (typically from 0.6 nA/cm2 to 25 pA/cm2 at 25°C). Compared to standard technology, the MPP mode allows, while keeping all other performances unchanged, either to increase exposure time, or to operate at higher temperature.

Dark current is due to thermal generation in the substrate of the CCD. The different generation sources are as follows:

surface states at the Si-SiO2 interface which is the main contribution

generation and diffusion in the bulk

generation in the depleted zone

If the gates are biased with adequate negative biases, holes appear at the Si-SiO2 interface and fill in the interface states suppressing their dark current contribution. As a result, only the minor bulk and depleted zone contributions remain.

Absolute Maximum Ratings*

Storage temperature

-55°C to + 150°C

*NOTICE: Stresses above those listed under ABSOLUTE

MAXIMUM RATINGS may cause permanent

 

 

Operating temperature ...................................

-40°C to + 85°C

device failure. Functionally at or above these lim-

Temperature cycling

15°C/mn

its is not implied. Exposure to absolute maximum

ratings for extended periods may affect reliability.

 

 

 

 

 

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TH7899M

Maximum Applied Voltage

Pins A3 A8 A13 A14 B3 B13 G1 G15 J1 J15 P3 P8 P13 R2 R3 R8 R13

0V (ground)

 

 

Maximum voltage applied (VGB) with respect to the substrate VSS

 

 

Pins B5 B4 P12 P11 P4 P5 P6 P7 B12 B11 B10 B9 H15 H1 R6 R5 A10 A11 A5 A4 R12 R11 R4

|VGB| = 15V

R7 A9 A12 R1

 

 

 

Pins B6 A6 B7 A7 P9 R9 P10 R10

|VGB| = 12V

 

 

Pins R1 R15 A1 A15 A2 R14 P2 P14 B2 B14 P1 P15 B1 B15 K1 K15 F1 F15 L1 L15 E1 E15

VGB = -0.3 to 15.5V

 

 

Pins M1 M15 D1 D15

VGB = -0.3 to 12V

 

 

Maximum voltage difference V between two pins of each group

 

 

 

Pin group: R6 R5 P4 P5 P6 P7 H1 R4 R7

|V| =15V

 

 

Pin group: A10 A11 B12 B11 B10 B9 H15 A9 A12

|V| =15V

 

 

Pin group: B5 B6 A5 A6 B4 B7 A4 A7 P12 P9 R12 R9 P11 P10 R11 R10 H1 H15

|V| =15V

 

 

Operating Range

Operating

Precautions

Operating range defines the limits between which the functioning is guaranteed.

Electrical limits of applied signals are given in the operating condition section.

Shorting one of the video outputs to one of the input pins even temporarily, can permanently damage the output amplifier.

Due to MPP mode or negative voltages, image zone clocks and readout registers do not include ESD protection. To avoid degradation, the TH7899M device should be handled with a grounded bracelet and stored on a conductive layer used for shipment.

Operating Conditions See “Pin-out/Pin Designation” on page 23.

Table 1. DC Characteristics

Parameter

 

Min.

Typ.

Max.

Notes

 

 

 

 

 

 

VS (1 to 4)

 

 

0V

 

 

VDD (1 to 4)

 

14.5V

15V

15.5V

 

VSS

 

0V

0V

 

 

VGS (1 to 4)

 

3.7

4V

4.3V

2V for MPP mode (option)

VDR (1 to 4)

 

13V/14.5V(1)

13.5V/15V(1)

14V/15.5V(1)

 

VDE (A and B)

 

5.5V

6V

6.5V

 

VGL (1 to 4)

 

0.7V/11.7V(1)

1V/12V(1)

1.3V/12.3V(1)

0V/12V for MPP mode (option)

Note: 1.

VG L = 12V and VDR = 15V is only when using a summing mode to optimize saturation level.

 

The reference level (VS) of an unused output amplifier can be disconnected to avoid the consumption of this amplifier.

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Table 2. Drive Clock Characteristics

 

 

 

 

 

Parameter

Min.

Typ.

Max.

Notes

 

Φ

P1,2,4

 

 

 

For each A,B,C and D zones, the

 

Low

-11V

-9V

-8.5V

capacitances to drive are:

 

High

+3.5V

+4V

+4.5V

CΦ P1 = CΦ P3 = 10 nF

 

Φ

P3

 

 

 

CΦ P2 = CΦ P4 = 13 nF

 

 

 

 

 

 

 

Low

-11V

-9V

-8.5V

 

 

 

High

0V

0.3V

0.6V

 

 

Φ T (A and B)

 

 

 

CΦ TA = CΦ TB < 100 pF

 

Low

-11V

-9V

-8.5V

 

 

 

High

+3.5V

+4V

+5V

 

 

Φ

L

 

 

 

-8V for MPP mode (option)

 

Low

-2.5V

-3V

-3.5V

+3V for MPP mode (option)

 

High

+5.5V

+6V

+6.5V

For each A and B readout register and

 

 

 

 

 

after having tied the different clocks in two

 

 

 

 

 

clocks Φ L1 and Φ L2 and in the non MPP

 

 

 

 

 

mode (in the MPP mode the Φ L clock

 

 

 

 

 

capacitances are roughly 30% higher)

 

 

 

 

 

ΦL1

ΦL2

 

 

 

 

 

100 pF

 

 

 

 

 

400 pF

400 pF

Φ S (1 to 4)

 

 

 

-8V for MPP mode (option)

 

Low

-2.5V

-3V

3.5V

+3V for MPP mode (option)

 

High

+5.5V

+6V

+6.5V

For each summing gate: CΦ S < 50 pF

Φ R (1 to 4)

 

 

 

For each reset gate: CΦ

R < 20 pF

 

Low

0V

0.3V

0.6V

 

 

 

High

+9V

+10V

+11V

 

 

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+ 16 hidden pages