Rainbow Electronics TH7841A User Manual
Features
• Pixel Size: 11 µm x 13 µm (13 µm Pitch)
• High Data Output Rate: 20 MHz
• High Responsivity and Resolution Over a Wide Spectral Range: from Blue (400 nm) up
to Near Infrared (1,100 nm)
• Low Dark Signal and Improved Uniformity
• Low Temporal Noise and High Dynamic Range: Over 6000/1
• Ease and Flexibility of Operation:
– Only Two External Basic Drive Clocks
– Choice of Internal or External Sampling and Reset
• 28-lead DIL Package
• Available with Standard Window or Antireflective Window in the Bandwidth 450 to
750 nm
Pin Identification
Pin Number Symbol Designation
2V
3
4S
5
9V
Φ
ECHA
Φ
Φ
OSA
ECHA
RA
DD
10 TP3 Test Point 3
11 TP2 Test Point 2
12 VT Register and Photosensitive Zone DC Bias
13 TP1 Test Point 1
14, 15, 28 V
16 V
18
19
20 V
21
24 S
25
26 V
27 V
Φ
Φ
Φ
Φ
Φ
ECHB
SS
INH
P
T
GS
RB
ECHB
OSB
DR
1, 6, 7, 8, 17, 22, 23 DNC Do not Connect
Video Output S ignal A (Odd Channel)
A Sample-and-hold Gate Input Channel
A Internal S ampling Clock Output Channel
A External Reset Clock Input Channel
Output Amplifier Drain And Internal Logic Supply
Substrate Bias (Ground)
Internal Sampling Clock Inhibiting Input (Dc Bias)
Transfer Clock
Register Transport Clock
Output Gate DC Bias
B External Reset Clock Output Channel
B Internal S ampling Clock Output Channel
B Sample-and-hold Gate Input Channel
Video Output Signal B (Even Channel)
Reset DC Bias
Linear CCD
Image Sensor
(2048 Pixels)
TH7841A
DNC
VOSA
ΦECHA
SΦECHA
ΦRA
DNC
DNC
DNC
VDD
TP3
TP2
VT
TP1
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VSS
VDR
VOSB
ΦECHB
SΦECHB
DNC
DNC
ΦRB
VGS
ΦT
ΦP
DNC
VINH
VSS
Rev. 1998A–IMAGE–05/0 2
1
T
Absolute Maximum Ratings*
Storage Temperature ..................................... -55°Cto+150°C
Operating Temperature ........................................0°Cto+70°C
Thermal Cycling..........................................................15°C/mn
Maximum Voltages:
• Pins: 3, 5, 9, 10, 11, 13,
16, 19, 20, 21, 25, 27........................................-0.3V to +18V
• Pins: 12. 18 ...................................................... -0.3V to +16V
*NOTICE: Stresses above those listed under ABSOLUTE
MAXIMUM RATINGS may cause permanent
device failure. Functionality at or above these
limits is not implied. Exposure to absolute maximum ratings for extended periods may affect
device reliability.
• Pins: 14, 15, 28 ................................................................. 0V
Operating Range Operating range defines the temperature limits between which the functionality is guar-
anteed: 0°Cto70°C.
Operating Precautions
Shorting the video output to VSSto VDD, even temporarily, can permanently damage the
output amplifier.
2
TH7841A
1998A–IMAGE–05/02
Operating Conditions (T = 25°C)
Table 1. DC Characteristics
TH7841A
Value s
Parameter Symbol
Output Amplifier Drain Supply V
Reset DC Bias V
Output Gate DC Bias V
Photosensitive Zone and
Register DC Bias
Substrate Bias V
DD
DR
GS
V
T
SS
14 15 16 V
12 13 14.5 V
5.566.5V
66.57 V
0.0 0.0
Te s t P o in t 1 T P 1 V
Test Points 2 and 3 TP2, TP3 V
Notes: 1. It is recommended to maintain VDRat VDD-2V.
2. V
nominal =
T
VΦT()high VΦT()low+
------------------------------------------------------------ 5%±
2
3. No use for operation – For testing purpose only.
Basic Internal Configuration
SΦ
SΦ
ECHA
ECHB
and Φ
and Φ
RA
RB
internal to TH7841A
DD
SS
Unit NoteMin Typ Max
(1)
(2)
V
V
(3)
(3)
1998A–IMAGE–05/02
Table 2. Selection of Nominal Mode
Option Implementation Note
V
(16) Connected to V
INH
Internal Sampling
SΦ
SΦ
ECHA
ECHB
(4) and Φ
(24) and Φ
Internal Reset ΦRA(5) and ΦRB(21) Connected to VDD
Note: 1. Make the straps as short as possible to avoid any parasitic coupling to these connec-
tions. The load capacitance introduced by the strap should not exceed 5 pF.
(3) Strapped
ECHA
ECHB
SS
(25) Strapped
(1)
3
Figure 1. Timing Diagram — Clocks and Video Output Timing Diagram in Internal Sampling Mode
Table 3. Drive Clock Characteristics (see Figure 1)
Value s
Parameter Symbol Logic
Transfer Clock
Φ
Register Transport Clock Low 0.0 0.4 0.6
Register Transport Clock
Capacitance
Transfer Clock Capacitance CΦ
PΦT
CΦ
T
P
High 12 13 14 V
800 1200 pF
200 300 pF
Note: 1. Transients under 0.0V in the clock pulses will lead to charge injection, causing a localized increase in the dark signal if such
spurious negative transients are present, they can be suppressed by inserting a serial resistor of appropriate value (typically
20 to 100Ω) in the corresponding driver output.
4
TH7841A
Unit NoteMin Typ Max
(1)
1998A–IMAGE–05/02
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