Page 1
PRIMARE
CD21 MKII
Service Manual
Page 2
1. Schematics and Pcb.
Confidential !
This document is not allowed to show for third part without written permission
from Primare Systems AB.
This document is subject to change without notice.
Author:
Bjorn Holmqvist
Primare AB
Page 3
A
VFD28-0707VFD
1
F+
2
F+
3
NC
4
SEG1
5
4 4
3 3
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
NC
22
NC
23
NC
24
NC
25
NC
26
G7
27
G6
28
G5
29
G4
30
G3
31
G1
32
G1
33
NC
34
F-
35
F-
F+
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
G7
G6
G5
G4
G3
G2
G1
F-
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
G7
G6
G5
G4
G3
G2
G1
B
4U1 UPD16311
19
SEG5/KS5
20
SEG6/KS6
21
SEG7/KS7
22
SEG8/KS8
23
SEG9/KS9
24
SEG10/KS10
25
SEG11/KS11
26
SEG12/KS12
27
SEG13/G16
28
SEG14/G15
29
SEG15/G14
30
SEG16/G13
31
SEG17/G12
32
SEG18/G11
35
SEG19/G10
36
SEG20/G9
37
G8
38
G7
39
G6
40
G5
41
G4
42
G3
43
G2
44
G1
47
LED4
48
LED3
49
LED2
50 51
LED1 VSS
DOUT
CLK
STB
KEY1
KEY2
KEY3
KEY4
SW1
SW2
SW3
SW4
SEG1/KS1
SEG2/KS2
SEG3/KS3
SEG4/KS4
OSD
VDD
VDD
VDDLED5
VEE
IC
DIN
7
5
6
8
9
10
11
12
13
1
2
3
4
15
16
17
18
4R7
52
14
33
4546
4R6 100
34
VCC VCC VCC
4R9
4R8
4K7
4K7
51K
4R10
4K7
C
P5V
VCC
4C1
104
SEG1
SEG2
SEG3
SEG4
-24V
VFD_DATA
VFD_CLK
VFD_CS
4JP1
1
2
3
4
5
6
HEADER 6
P5V P33 V
12
+
4C7
47uF
D
-24V
4D1
1N4735
4U6 APL1117
3 2
IN OUT
E
4C8
47uF
CTRL
F+
F-
4R4 2.2
4R2
4D2
4K7
1N4148
4R1 4K7
4R3
4D3
4K7
1N4148
GND
1
4R5 2.2
12
+
4C18 104
4C19 104
4R29 10
4C20 104
1
2
9
10
15
7
4U4
74HC165
4R17
4K7
IR_IN
SPI_CS
VFD_CLK
VFD_DATA
P5V
4R25
4R26
4R27
4R28
4R21
4R22
4R23
4K7
4K7
4K3
4K4
OPEN
+
4C15
47uF
前控板原理图
4R24
4C14
104
4K7
E
审核：
POWER_ISP
+
4C16
47uF
硬件版本：
页次：
4C17
10 4
2006-06
1/1
LD
CLK
Q7
DIN
/CE
/Q7
16
D7
VCC
D6
D5
D4
D3
D2
D1
D0
GND
8
VFD_CSIR_SEL
4K7
4K7
4K7
4K7
4K7
6
5
4
3
14
13
12
11
VCC
4C3
104
4K2
4K6
4K5 4K14K84K7
OPEN
VCC P5V P5VVCC P5V P5V
+
4C2
4C4
104
47uF
文件编号：
拟制：
主机型号：
CD21 MKII
文件名称：
D
日期：
IR2
4R184K7
POWER_ISP
IR_SEL
LED RED
4R15
RXD
TXD
P_SCL
P_SDA
IR2
C
P5V
P33V
4Q2
2SA1015
CTRL
4R19
4K7
VCC VCC
P33VP33V P33V
4R16
4K7
4K7
4JP2
13 14
11 12
9 10
7 8
5 6
3 4
1 2
HEADER 7X2
4R20 1K3
123
4
P2.0
P2.1
P0.0
P1.7
SCL
MOSI
MISOSSSPICLK
12131415161718
SPI_CS
VFD_DATA
VFD_ CLK
P_SCL
IR_INPUT
4U5
1A
1B
2A
2B
3A
3B
4A
4B
VCC
A/B
GND
G
74ACT 257
262728
P0.1
P2.6
P2.7
P0.2
P0.3
P0.4
P0.5
VDD
P0.6
P0.7
RXD
TXD
RXD
TXD
4
1Y
7
2Y
9
3Y
12
4Y
16
8
4U3
P89LPC932A1
P33V P33V
+
2 2
1 1
4C9
10U/16V
4R11
10K
4R12 4K7
P5V
+
A
4C5
47uF
4R13
4K7
2SC1815
4C6
104
4Q1
4U1
GP1807
4Y1
4MHz
4C13
4C12
27P
123
27P
IR2
P_SDA
5
P1.6
6
RST
7
VSS
8
XT1
9
XT2
10
INT1
11
SDA
2
3
5
6
11
10
14
13
1
15
B
P33V
25
24
23
22
21
20
19
IR_IN
P5V
Page 4
A
1C22 682
1R22 300
A-12V
1U4A
OPA2134
-
DAC_L+_IOUT-
4 4
3 3
2 2
1 1
DAC_L_VCOM
DAC_L+_IOUT+
DAC_L-_I OUT-
DAC_L_VCOM
DAC_L-_IOUT+
DAC_R+_IOUT-
DAC_R_VCOM
DAC_R+_IOUT+
DAC_R-_IOUT-
DAC_R_VCOM
DAC_R-_IOUT+
2
+
3
8 4
84
5
+
6
-
1R21 300
1C21 682
1C16 682
1R13 300
-
6
+
5
8 4
84
3
+
2
-
1R14 300
1C17 682
1C46 682
1R51 300
-
2
+
3
8 4
84
5
+
6
-
1R50 300
1C45 682
1C40 682
1R42 300
-
6
+
5
8 4
84
3
+
2
-
1R43 300
1C41 682
A+12V
A+12V
1U4B
OPA2134
A-12V
A-12V
1U3B
OPA2134
A+12V
A+12V
1U3A
OPA2134
A-12V
A-12V
1U8A
OPA2134
A+12V
A+12V
1U8B
OPA2134
A-12V
A-12V
1U7B
OPA2134
A+12V
A+12V
1U7A
OPA2134
A-12V
1R23 620
1
1R26 620
7
1R15620
7
1R18 620
1
1R52 620
1
1R55 620
7
1R44 620
7
1R47 620
1
1R25 620
1C25
472
1R27 620
1R28
620
1R17 620
1C20
472
1R19 620
1R20
620
1R54 620
1C49
472
1R56 620
1R57
620
1R46 620
1C44
472
1R48 620
1R49
620
1R24 620
1R16620
1R53 620
1R45 620
1C24
152
B
1C26 2.2uF
1C23 152
A-12V
1U5A
OPA2134
-
2
1
+
3
8 4
A+12V
1C18152
A-12V
1U5B
OPA2134
-
6
7
+
5
8 4
A+12V
1C19
152
1C48 152
A-12V
1U5A
OPA2134
-
2
1
+
3
8 4
A+12V
1C47
152
1C42152
A-12V
1U9B
OPA2134
-
6
7
+
5
8 4
A+12V
1C43
152
+
1C126
10uF/50V
1C27 2.2uF
+
1C127
10uF/50V
1C51 2.2uF
+
1C128
10uF/50V
1C50 2.2uF
+
1C129
10uF/50V
A+12V
1U10A
84
1R37 3K9
1R66 3K9
3
+
2
-
1C28 10pF
84
5
+
6
-
1C28 10pF
+
1C59
100uF
1C61
+
100uF
OPA2134
A-12V
100U/16V
A+12V
1U10B
OPA2134
A-12V
100U/16V
1
1C29
7
1C53
1R29 22K
1R30
22K
1R31 22K
A-12V
1R58 22K
1R59
22K
1R60 22K
A-12V
A+12V A+12V A+12V A+12V A+12V A+12V A+12VA+12VA+12VA+ 12V A+12V A+12V A+12VA+12V
+
1C55
100uF
A-12V A-12V A-12V A-1 2V A-12VA-12V A-12V A-12V A-12V A-12V A-12V A-12VA-12V A-12V
1C57
+
100u F
1R32
1C30
1R61 22K
1C54
+
1C63
100u F
1C65
+
100u F
22K
104
104
1R33 300
1R62 300
C
A+12V
1Q4
BS170
1R34
10
1R38100
1R35
10
1Q3
BC850B
LED2
1R36
GREED
33
A+12V
1Q2
BS170
1R63
10
1R67100
1R64
10
1Q1
BC850B
LED1
1R65
GREED
33
+
1C79
+
+
1C67
100uF
1C69
+
100u F
1C75
+
1C71
100uF
1C73
+
100uF
100uF
100uF
1C77
1C81
+
+
100uF
100uF
DL_OUT
KJ1
TO212V
9
7
2
4
2N3904
1C56
1C60
104
104
1C58
1C62
104
104
8
3
1
10
Q6
DR_OUT
1C64
104
1C66
104
D
VCC1
D5
1N4148
R77 4K7
1C68
104
1C70
104
1JP3
RCA JACK
1JP2
RCA JACK
1C72
104
1C74
104
MUTE
E
1C76
1C80
104
104
1C82
1C78
104
104
文件编号 ：
CD21 MKII
主板原理图
E
审核：
硬件版本：
页次：
200 6-06
5/5
拟制 ：
主机型号 ：
文件名称：
A
B
C
D
日期：
Page 5
A
B
C
D
E
1C94
1C106
DAC_V33
RESET#
DAC_LRCK
DAC_TDS0
DAC_BCK
DAC_MCLK
DAC_DATA
DAC_CLK
DAC_CS0
+
1C7
100U/16V
DAC_V33
RESET#
DAC_LRCK
DAC_TDS0
DAC_BCK
DAC_MCLK
DAC_DATA
DAC_CLK
DAC_CS1
+
1C31
100U/16V
A+12V
+
1C130
104
220u F
+
1C131
104
220u F
A-12V
1C8
104
1C32
104
1U2 PCM 1738E
1
RST
VCC3
2
ZEROL
AGND2
3
ZEROR
IOUTL-
4
LRCK
IOUTL+
5
DATA
VCC2
6
BCK
VCC1
7
SCKI
VCOM3
8
DGND
IREF
9
VDD
VCOM2
10
SCKO
VCOM1
11
MDO
AGND1
12
MDI
IOUTR+
13
MC
IOUTR-
14 15
CS MUTE
1U6 PCM 1738E
1
RST
VCC3
2
ZEROL
AGND2
3
ZEROR
IOUTL-
4
LRCK
IOUTL+
5
DATA
VCC2
6
BCK
VCC1
7
SCKI
VCOM3
8
DGND
IREF
9
VDD
VCOM2
10
SCKO
VCOM1
11
MDO
AGND1
12
MDI
IOUTR+
13
MC
IOUTR-
14 15
CS MUTE
28
27
26
25
24
23
22
21
20
19
18
17
16
+
1C11
1C12
100U/16V
104
28
27
26
25
24
23
22
21
20
19
18
17
16
+
1C35
1C36
100U/16V
104
DAC_5V
A+20V
1C15 104
1R12
16K
1C39 104
1R41
16K
1JP1
1
2
3
4
5
6
7
HEADER7
+
1C13
104
+
1C37
104
1FB2 B060
1 2
1C111
3300uF/25V
DAC_5V
1C9
100U/16V
DAC_5V
1C33
100U/16V
1C14
100U/16V
+
1C10
104
1C38
100U/16V
1R40 1K
+
1C34
104
+
A-20V
1C116
104
1C112
104
A+20V
DAC_L+_IOUTDAC_L+_IOUT+
DAC_L_VCOM
DAC_L-_IOUT+
DAC_L-_IOUT-
DAC_R+_IOUTDAC_R+_IOUT+
DAC_R_VCOM
DAC_R-_IOUT+
DAC_R-_IOUT-
1U14 LM317
312
IAO
+
1C113
10uF
1U15 APL1117-3.3V
312
IGO
DAC_5V
1R84
100
+
1C115
1C114
104
1000uF
1R85
300
AV33
+
1C117
1000 uF
1C118
104
1FB1 B060
AV33
1R5 FBSMT
1R4
1.18K
1C6
4 4
3 3
2 2
1 1
A+20V
A-20V
RESET#
SPDIF-OUT
+
+
1C83
3300uF/25V+1C84 100uF
1C95
3300uF/25V
683
1R6 33 1R11 1K
1C123 10 3
1R68 220
LED3 GREEN
1C85 104
1C97 104
1C96
100u F
+
LED4 GREEN
1R77 220
1C7
100U/16V
DAC_5V
1R90 FBSMT
1Q9
2SA970
1D5
1N4735/6.2V
2SA970
1R69
4K7
1R77
4K7
2SC2240
1D9
1N4736/6.2V
1Q13
2SC2240
+
1Q8
1Q12
1C5
103
1Q7
2SC2240
1Q11
2SA 970
1C8
104
1Q6 2SC47 93
1Q10
2SA1837
1C87
104
1R71 33
1N4148
1N4148
1C99
104
1D4
1D8
1R79 33
+
1C124
100uF
1R70 220
+
+
1R78 220
1C86
100uF
1C98
100uF
1U1 DIR1703E
28
CKSEL
27
UNLOCK
26
FMT1
25
FMT0
24
VCC
23
AGND
22
FILT
21
RST
20
DIN
19
BRSEL
18
BFRAME
17
EMFLG
16
URBIT
1C125
104
A-12V
7
A+12V
A+12V
1
A-12V
BRATE0
BRATE1
CKTRNS
8
4
DAC_CS0
RESET#
DAC_DATA
DAC_CLK
DAC_CS1
-
+
8 4
84
+
-
ADFLG
SCKO
VDD
DGND
XTO
LRCKO
BCKO
DOUT
SCF0
SCF1CSBIT
VCC
GND
12.288MHz
6
5
1U11B
OPA2134
1U11A
OPA2134
3
2
1
2
3
4
5
6
7
8
XTI
9
10
11
12
13
1415
1X1
1C92
104
1C104
104
OUT
N/C
1D2
1N4148
1D6
1N4148
5
1
1D3
1N4148
1D7
1N4148
100U/16V
1R 1 FBSMT
+
1C1
12.288MHz
1R75 1K
+
1C91
100uF
+
1C103
100uF
1R83 1K
AV33
1RB1 33x4
1 8
2 7
3 6
4 5
1R2
33
1C122
1C2
104
104
+
1C89
1C88
1R74
4K7
32
1
1U12
TL431
32
1
TL431
1R82
4K7
104
100uF
+
1C90
100uF
+
1C102
100uF
1U13
1C101
1C100
104
100uF
+
1R72
1.18K
1R73
300
1R81
300
1R80
1.18K
+
1C93
2200uF/16V
+
1C105
2200uF/16V
AV33
1L1 FBSMT
1C119 103
1R87 10
1C120 103
1R88 OP EN
1C121 103
1R89 OPE N
文件编号 ：
拟制 ： 审核：
主机型号 ：
CD21 MKII
文件名称：
A
B
C
D
日期：
E
主板原理图
硬件版本：
页次：
200 6-06
4/5
Page 6
2N3906
HFMVCC
C37
1000pF
RF50V
L4 FBSMT
JP1
24
TR-
23
TR+
22
FO-
21
FO+
VCC
VR
GND
LD(DVD)
LD(CD)
VR
GND(NC)
PD
GND
RFOUT
C
B
A
D
F
E
VCC
VS(VCC)
GND
L1 10uH
C36
1000pF
L2 10uH
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
PD(MONITOR)
HOP-1200 PUH (JP24-0.5MM)
DVDLDO
CDLDO
RF33V
R14
0 C25
R13 0
Q3
+
C38
47uF
+
C34
C35
47uF
104
TRACKTRACK+
FOCUSFOCUS+
DVDMDI
HFMVCC
R12 100
DVDLDO
CDLDO
R11 100
CDMDI
R1 10
R2 10
C33
104
C29 1000pF
D1
1N4148
R9 10
R10 10
1N4148
VCC2 VCC33
RF50V RF33V
C113
C7
47uF
RF50V
AIN
AIP
DIN
VPA
BYP
RFAC
104
C22 470pF
C23 470pF
49
DIP
FNP
FNN
VNA
MEV
104
RX
U1
CDLD
DVDPD
CDPD
VNB
LDON
MIRRMPMB
MLPF
MIN
MEVO
32
C11 224
C10 160pF
C9 333
C8 103
HFMVSW
C28 820pF
C1 2200pF
C2 2200pF
C3 2200pF
C4 2200pF
F
E
PVC
Q1
2SB11 32
Q2
2SB11 32D2
C31 1000pF
L3 FBSMT
C5
120pF
R3 1K
C30
+
47uF
RF50V
+
C32
47uF
R4 1K
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
+
C6
47uF
C27 104
C26 104
646362616059585756555453525150
RFDC
RFSIN
DVDFRP
DVDRFN
A2
B2
C2
D2
CP
CN
D
C
B
A
CD_D
CD_C
CD_B
CD_A
ES6603
CD_F
CD_E
171819202122232425262728293031
F
E
PVC
DVDLD
CDLD
DVDMDI
CDMDI
+
ATOP
ATON
VPBVCDVDLD
C24 104
C21 103
R8 12K
48
SDEN
47
SDATA
46
SCLK
45
V33
44
LCP
43
LCN
42
MNTR
41
CE
40
FE
39
TE
38
PI
37
V25
36
V125
35
TPH
34
DFT
33
LINK
MEVO
RF33V
C15 473
C12 104
R7 0
L5 FBSMT
DIN
DIP
RFO
RF50V
SCSJ
SDATA
SCLK
CE
FE
TE
SBA
SVREF15
RF50V
TP2
LINK
RF50V
MIRR
SLDC
RF33VRF50V
GND
29
OP1OU T
GND
30
MVCC
MVCC
R33 33
28
MUTE
27
BIAS
26
VINTK
25
OP1IN+
24
OP1IN-
23
VINLD
22
GND
21
VCTL
20
OP1OUT
19
VCC2
18
VOLD-
17
VOLD+
16
VOTK-
15
VOTK+
R27
4K7
R32 10K
D3 1N4148
R31 22K
R44 33
R19 56K
R29
150
R30 33
Q4
2N3906
OPIN1+
OPIN1-
MVCC
OP1OU T
LOAD-/DCMOLOAD+/DCMO+
TRACKTRACK+
+
C114
47uF
FOCUS
SLEGN
OPEN SPINDLE
R18
6K8
SCSJ
SDATA
SCLK
TP3
MNTR
CEI
FEI
TEI
SBAD
SDEFCT
LOAD+/DCMO+
C14
104
C16
104
R16 56K
R17 15K
CLOSE
R20
10K
OPIN1-
R21
1K5
R22
22K
R43 33
MVCC
DCLOADDCLOAD+
SLEDSLED+
FOCUSFOCUS+
LOAD-/DCMO-
R23
10K
R24
1K5
OPIN1+
R25
22K
DRVSB
U2 AM5868S
1
VINFC
2
OP2IN-
3
OP2IN+
4
VINSL
5
OP2OUT
6
FWD
7
REV
8
VCC1
9
VOTR-
10
VOTR+
11
VOSL-
12
VOSL+
13
VOFC-
14
VOFC+
R26 1M
SVREF15
TRACK
RS232_DET
JP3
PH-9A
9
8
7
6
5
4
3
2
1
INSW
OUTSW
LOAD-/DCMOLOAD+/DCMO+
DCLOADDCLOAD+
SLEDSLED+
INSW
OUTSW
D5V MVCC
FB3 B060
+
C39
470uF
+
C40
470uF
MVCC
C41
104
C43
104
+
C42
47uF
文件编号：
拟制：
主机型号：
文件名称：
日期：
CD21 MKII
主板原理图
审核：
硬件版本：
页次：
2006-06
2/5
Page 7
MIRR
SVREF15
VCC1
L12 FBSMT
SPI_CS
VFD_DATA
VFD_CLK
VFD_CS
SDA
SCL
DAC_CS1
DAC_CS0
IR_IN
DAC_CLK
DAC_DATA
MUTE
RESET#
PLL30CLKSOURCE
1
TP1
LCS1
DCLKINPUT
CRSTALOSC
SPDIF-OUT
V33_PL1
C79
104
MA0
MA1 DB1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
DSCK
DOE#+
CS0#+
RAS0#+
CAS#+
DWE#+
DQM
RAS1#+
RAS2#+
C88
C92
104
104
SBA D
RFV331
DA
C53
C66
104
104
C59 OPEN
C60 OPEN
C57 473
C58 68pF
R47 10K
R48 5K1
C55 104
R37 6K 8
R38 6K 8
R39 6K 8
R40 0
R41 6K 8
R42 6K 8
R34 33
R35 33
R36 33
SDEFCT
SLDC
CLOSE
INSW
HOMESW
HFMVSW
OUTSW
DRVSB
RS232_D ET
8
VCC
4
GND
27MHz
SBAD
X1
FEI
FEI
CEI
CEI
TEI
TEI.
DIP
DIP
RFO
RFO
DIN
DIN
R50
68K
C70
104
PLL33V
TR1
TR2
XSCSJ
XSDATA
XSCLK
Z7M Hz
5
OUT
1
N/C
VCC33
L6 FBSMT
SVREF15 VCC33
C96
+
47uF
R5 0
R6 33K
SVREF15
SVREF15
OPEN
OPEN
SPINDLE
SPINDLE
FOCUS
FOCUS
SLEGN
SLEGN
TRACK
TRACK
SVREF15
SCSJ
SCSJ
SDATA
SDATA
SCLK
SCLK
U6 24C01A
1
S0
2
S1
3
S2
4 5
GND SDA
+
VCC
SCL
VCC33
C107
10uF
WC
C67
104
8
7
6
SPI_CS
VFD_DAT A
VFD_CLK
VFD_CS
SDA
SCL
DAC_CS1
DAC_CS0
IR_IN
DAC_CLK
DAC_DATA
MUTE
RES ET#
RFRP
TESTAD
C13
105
C50
682
C108
104
PLL33V
+
C94
47uF
VCC33
L7 FBSMT
C48
153
EEPROM _VCC
TR1
TR2
C56
104
C54
C49
104
470pF
C46
33pF
R73
1K
RB6 33X4
1 8
2 7
3 6
4 5
RB7 33X4
1 8
2 7
3 6
4 5
RB8 33X4
1 8
2 7
3 6
4 5
C111
+
10uF
C61
104
R46 OPEN
R45 1K2
C63
47pF
C51
C47
470pF
104
C45
33pF
R72
1K
SCL
SDA
EAUX03
EAUX02
EAUX01
EAUX00
AUX0
AUX1
AUX2
AUX3
AUX4
AUX5
AUX6
AUX7
OSC_VCC
C112
104
C95
+
47uF
C62
104
C52
153
C44
33pF
C20 4700pF
C18 OPEN
C17 OPEN
C19 4700pF
R49 20K
C64
OPEN
C65 682
157
AVSS_DS
158
AVSS_PL
159
XSPDOFTR1
160
XSFDO
161
XSFTROPI
162
AVDD3_PL
163
XSPLLFTR1
164
XSPLLFTR2
165
XSVREF0
166
XSAWRC
167
AVSS_DA
168
XSRFRPCTR
169
XSTRAY
170
AVDD3_DA
171
XSSPINDLE
172
XSFOCUS
173
XSSLEGP
174
XSSLEGN
175
XSTRACK
176
XSTESTDA
177
XSFGIN
178
XSPHOI
179
SXCSJ
180
XSDATA
181
XSCLK
182
XSDFCT
183
XSLDC
184
XSSPDON
185
VD33
186
VS33
187
XGPIO[9]
188
XGPIO[8]
189
XGPIO[7]
190
XGPIO[6]
191
XGPIO[5]
192
XGPIO[4]
193
EAUX03
194
EAUX02
195
EAUX01
196
EAUX00
197
VSS
198
VDD
199
AUX0
200
AUX1
201
AUX2/ HSYNC
202
AUX3/ VSYNC
203
AUX4
204
AUX5
205
AUX6
206
AUX7
207
RESET
208
VS33
R56 3K 3
R55 3K 3
R54 3K 3
R53 3K 3
C72 104
R52 10K
C68 105
C69 105
SVREF21
SVREF09
SVREF15
RFRP
145
146
147
148
149
150
151
152
153
154
155
156
XSTEI
XSIP IN
XSIREF
XSRFIN
XSR FIP
XSDSSLV
XSRFRP
AVD D3_AD
AVD D3_DS
XSVREF[21]
XSVREF[09]
XSVREF[15]
C71
C73
C74
1000pF
1000pF
1000pF
VCC20
TESTA D
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
VSS
VDD
XSLG
XSIP2
XSFEI
XSC EI
XSSBAD
AVSS_AD
XSTE STAD
XSIP1
XSTE XI
XSFLAG[0]
XSFLAG[1]
XSFLAG[2]
XSFLAG[3]
#SPDIF
C75
1000pF
PLL2
PLL0
PLL1
PLL3
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
VS33
TSD2
TSD3
TBCK
VD33
VS33
MCLK
XSWBL
SPDIF IN
XSWBLCLK
SPDIF/SEL_PLL3
YUV2/CDAC
YUV0/UDAC
T WS/S EL_PLL2
TSD0/S EL_PLL0
TSD1/S EL_PLL1
Vibratto-II
VD33
XIN
XOUT
DCLK
DMA0
DMA1
DMA2
DMA3
VS33
VD33
DMA4
DMA5
DMA6
DMA7
DMA8
DMA9
DMA10
VS33
VD33
DMA11
DCAS
DCS0
DCS1
DRAS0
DBANK0/ DRA S1
VSS
VDD
DBANK1/ DRA S2
DCKE/DOE /TDMTS C
DWE
DB0
DB1
DB2
VS33
VD33
DB3
DB4
DB5
DB6
DB7
DB15
DB14
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051
DB2
DB0
DMA1
DMA0
DMA3
DMA2
DMA7
DMA6
DMA8
DMA4
DMA5
R76
33
RB1 33X4
1 8
2 7
3 6
1 8
MA1
MA0
4 5
2 7
3 6
4 5
MA3
MA2
MA4
MA7
MA6
MA5
RAS 0#
DMA10
CS0#
DMA9
CAS#
DMA11
RB3 33X4
RB2 33X4
1 8
2 7
3 6
4 5
1 8
MA8
CS0#+
CAS#+
MA 11
MA 10
MA9
DB1
DWE #
RAS 1#
DO E#
RAS 2#
RB4 33X4
2 7
3 6
RAS0#+
RAS1#+
RB5 33X4
4 5
1 8
2 7
3 6
4 5
DOE#+
DWE#+
RAS2#+
VS33
DB4
DB6
DB14
DB5
DB3
DB15
DB7
VCC20
VCC33 VCC33VCC33 VCC33 VCC33
R61
R65
R63
OPEN
OPEN
OPEN
R62
R64
R66
4K7
4K7
4K7
105
106
107
108
109
110
111
112
113
VS33_PL
VS33_DA
VD33_D A
YUV 1/VRE F
YUV 4/RSE T
YUV 7/F DA C
YUV6/VDA C
YUV5/YDA C
YUV3/COMP
VD33_PLL
RWS/TDMFS
RBCK/TDMCLK
RSD/TDMDR
VD33
DB13
DB12
DB11
DB10
DB9
DB8
DSCK
VS33
52
DB11
DB10
DB13
DB12
DB9
DB8
DSCK
+
C100
+
C97
47uF
47uF
VD33
VS33
LOE
LWRLL
LCS3
VDD
VSS
LCS2
LCS1
LCS0
VD33
VS33
VDD
VSS
LA10
LA11
LA12
LA13
LA14
LA15
VD33
VS33
LA16
LA17
LA18
LA19
LA20
LA21
DQM
VD33
R59
R57
OPEN
OPEN
R51 33
R60
R58
4K7
4K7
VCC20
VCC33
L8 FBSMT
V33_PL1
104
103
102
101
100
LD7
99
LD6
98
LD5
97
LD4
96
95
94
LD3
93
LD2
92
LD1
91
LD0
90
89
88
87
86
85
84
83
82
LA0
81
LA1
80
LA2
79
78
77
LA3
76
LA4
75
LA5
74
LA6
73
LA7
72
LA8
71
70
69
LA9
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
C76
104
ES6629D
C81
104
LD7
LD6
LD5
LD4
LD3
LD2
LD1
LD0
LOE#
WRLL#
LCS3#
LCS1#
LA0
LA1
LA2
LA3
LA4
LA5
LA6
LA7
LA8
LA9
LA10
LA11
LA12
LA13
LA14
LA15
LA16
LA17
LA18
LA19
DQM
U3
C83
104
PLL2
0
0 1
0
0
1
1
VCC33
LA16
LA15
LA14
LA13
LA12
LA11
LA10
LA9
WRLL#
RESET#
LA19
LA18
LA8
LA7
LA5
LA4
LA3
LA2
R68 33
R67 33
D4
1N4148L9 FBSMT
0
0
1 27bypass
1
0
0
11
1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24 25
VCC33
+
PLL0
DEFAULT
4.25
0
reserved 5
0
bypass
3.75
1
4.501
reserved
1
0
3.5
1
4
U4 MX29LV800B-48
A15
A14
A13
A12
DQ15/A_1
A11
A10
A9
A8
NC
NC
W
RP
VPP
DU/WP
NC
NC
A17
A7
A6
A5
A4
A3
A2
A1 A0
U5 4Mx16SDRAM
23
A0
24
A1
25
A2
26
A3
29
A4
30
A5
31
A6
32
A7
33
A8
34
A9
22
A10
35
A11
38
CLK
37
CKE
19
CS
18
RAS
17
CAS
16
WE
15
DQML
39
DQMH
20
BA0
21
BA1
36
NC
40
NC
R71
4K7
C106
10uF
R70 4K7
R69
47K
MULTI
BYTE
DQ14
DQ13
DQ12
DQ11
DQ10
A16
GND
DQ7
DQ6
DQ5
DQ4
VCC
DQ3
DQ2
DQ9
DQ1
DQ8
DQ0
GND
VCCQ
VCCQ
VCCQ
VCCQ
VSSQ
VSSQ
VSSQ
VSSQ
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
S-CHIP
4.5
4
4.25
4.75
5.5
6
G
E
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
VCC
VCC
VCC
VSS
VSS
VSS
2N3904
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
Q5
DEFAULTPLL1
2
4
5
7
8
10
11
13
42
44
45
47
48
50
51
53
1
14
27
3
9
43
49
6
12
46
52
28
41
54
RES ET#
114.75
NA
101.25
121.5
NA
94.5
108
Frequency
VCC33
S-CHIP
121.5
135
NA
108
114.75
128.25
148.5
162
LA17
LA0
LD7
LD6
LD5
LD4
LD3
LD2
LD1
LD0LA6
LOE#
LCS3#
LA1
DB0
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
DB11
DB12
DB13
DB14
DB15
RESET#
VCC33
+
C99
+
C98
47uF
47uF
+
C109
+
C105
10uF
47uF
C78
C77
104
C80
104
C82
104
104
C85
C84
104
104
C87
C86
104
104
C90
C89
104
104
C93
C91
104
104
C101
104
C102
104
C103
104
C104
104
C110
104
文件编号：
拟制：
主机型号：
文件名称：
日期：
审核：
主板原理图
硬件版本 ：
页次：
2006-06CD21 MKII
1/5
Page 8
A
B
C
D
E
L20 EMI
123
VCC1
4 4
3 3
JP1
1
2
3
4
5
6
XH-6A
L13 FBSMT
SPDIF-OUT
IEC_VCC
VCCVDD P5V
C119
10uF
C120
104
FB2 B060
VCC2
+
16
15
14
13
12
11
10
C117
470uF
U9 DS26LS31
IN A
VCC
OUT A
IN D
OUT A
OUT D
OUT D
OUT B
EN
OUT B
OUT C
IN B
OUT C
GNDIN C
3
C128
104
1
2
3
4
EN
5
6
7
89
U8 LM317
IAO
1
+
C130
10uF
R81
110
123
L19 EMI
VCC20
2
R74
510
+
C118
C129
470uF
R75
300
104
JP7
CANON
VCC1
12
3
4
C123
103
JP4
1
RXD
2
TXD
3
P_SCL
4
P_SDA
5
IR2
6
7
XH-7A
L14 FBSMT
C121
10uF
R80 100
R78 300
C122
104
R79
100
VCCP5V VCC
JP8
13 14
11 12
9 10
7 8
5 6
3 4
1 2
HEADER 7X2
L18 EMI
123
JP6 TX179AT
3
GND
2
VCC
1
IN
1
JP5
RCA
2
IR_IN
SPI_CS
VFD_CLK
VFD_DATA
VFD-CS
VCC1
2 2
1 1
A
FB1 B060
C124 103
R82 10
+
C115
470uF
B
U7 APL1117-3.3V
3
2
IGO
1
C127 103
R85 OPEN
+
C116
470uF
VCC33
C
FB4 B060
C125 103
R83 OPEN
C126 103
R84 10
文件编号：
拟制：
主机型号：
CD21 MKII
文件名称：
D
日期：
审核：
主板原理图
E
硬件版本：
页次：
2006-06
3/5
Page 9
A
4 4
P5V
+
3C4 105
3JP1
DB9-F
1
6
2
7
3
3C3
103
8
4
9
5
3 3
3L7 EMI
123
123
3L6 EMI
3C6 105
16
2
6
14
7
13
8
3U1
VCC
V+
V-
T1OUT
T2OUT
R1OUT
R1IN
R2OUT
R2IN
MAX232CPE
3C1
10uF
GND
C1+
C2+
T1IN
T2IN
B
3C2
104
3C3 105
1
3
C1-
3C5 105
4
5
C2-
11
10
12
9
15
3R2 33
3R1 33
3JP2
520250
6
5
4
3
2
1
3L8 EMI
123
123
3L9 EMI
C
P5VVDD
3D1 EP05Q 04
3R6
4K7
3R4
4K7
+
3C9
47U/16V
3R5 33
3R7 33
3C8
104
VCC
NCLXSX
123
678
XY
LY
GND NC
4 5
3R9 4K7
3R8 4K7
3U2
P82B715TD
D
P5V
RXD
TXD
P_SCL
P_SDA
IR2
P5V
P5V
3D2 1N4148
3R3
1K
3L10EMI
123
3JP3
HSJ-035-09A
3JP4
1
2
3
4
5
6
7
HEADER 7
E
3C10 103
3R10 10
2 2
1 1
3C11 103
3R11 OPEN
文件编号：
拟制：
主机型号：
CD21 MKII
文件名称：
A
B
C
D
日期：
审核：
RS232板原理图
E
硬件版本：
页次：
2006-06
1/1
Page 10
A
B
C
D
E
+20V
5DQ1
KBJ206
- +
4 4
5JP1
1
2
3
4
5
6
XH-6A
5C5
5DQ2
3 3
2 2
5JP2
1
2
3
4
5
6
7
8
XH-8A
1 1
KBJ406G
- +
5DQ3
KBJ206
- +
5D1
5D3
21
1N4007X4
21
4700U/16V
5FB1 B060
5C9
4700U/16V
5C13
1000uF/25V
5D2
21
5D4
21
D16V
5C17
100U/50V
+
5C1
3300U/25V
+
5C3
3300U/25V
+
+
+
5C6
104
5C10
104
5C14
104
+
5C20
104
5C2
104
5C4
104
5U1 78R05
5U2
5U3 7805
1 3
1 3
2
5R6 1K
5D5
1N4749
OUTIN
GND
CTRL
3214
78R05
OUTIN
GND
CTRL
3214
2
5C7
2200U/10V
5C11
2200U/10V
5C15
1000U/16V
5R1
4K7
5R2
4K7
+
+
+
5C8
+
5C12
104
5C16
104
5C19
100U/50V
-20V
VCC
104
VDD
6JP1
VH-3A
1
2
3
P5V
电源滤波板
J3
7
6
5C20
104
-24V
AC+
AC-
VH-7Y
5
4
3
2
1
P5VVDDVCC
5Q1
2SC1815
5R5
4K7
12
6C1
0.1U/250V
120V
0V
120V
0V
TRANSFORMER POWER
5R4 4K 7
1 2
6L1
223Y
5JP4
XH-6A
1
2
3
4
5
6
1
2
3
4
3 4
0.1U/250V
T1
6C2
+2 0V-20V
CTRLSTAND_BY
5R3
4K7
6L2
223Y
3 4
6C3
0.1U/250V
12
12
1 2
5
6
7
8
9
10
11
12
13
14
15
16
17
18
AC+AC--24VP5VP5V
AC17V
GND
AC17V
AC9V
GND
AC9V
AC8V
AC8V
AC14V
AC14V
AC27V
AC27V
AC4V
AC4V
5JP3
XH-7A
1
2
3
4
5
6
7
5JP5
XH-6A
1
2
3
4
5
6
6JP3
1
2
3
4
5
6
7
VH-7A
6JP4
1
2
3
4
5
6
7
VH-7A
J1
XH-6Y
1
2
3
4
5
6
1
2
3
4
5
6
7
8
J2
XH-8Y
AC 12 0V
AC 240V
文件编号：
5C21 104
5C22 104
拟制：
主机型号：
CD21 MKII
文件名称：
A
B
C
D
日期： 页次：
审核：
电源板原理图
E
硬件版本：
2006-06
1/1
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