Pioneer Spec-2 Service Manual

STEREO POWER

AMPLIFIER

SPEGI?,

KCU

(DrrroNEER'

CONTENTS

1.

SPEC|F|CAT|ONS

2.

FRONT

3.

CoNNECTION

4.

CIRCUIT

4.1

4.2

4.3

4.4 Surge Current BLOCK

5.

ADJUSTING

6.

6.1

6.2 Current

6.3 D|SASSEMBLY

7. PARTS LOCATTONS

8.

9.

EXPLODED

PANEL FACILITIES

DESCRIPTION Power Peak Level Meter Circuit Protection Circuit ,

ldle Current Adiustment

Meter Amplifier

Amplifier

DIAGRAM ...

PROCEDURES

VIEWS

.....

DIAGRAM

Suppressor

Limiter

Sensitivity

Adjustment

Circuit .

Adiustment

... ... ..

.. .......

'........

......

....'...

. .

......

.. . 16

...

........

3 4

5

6 7 8

10

11

13

. . 14

15

20

23

10.

SCHEMATIC

PARTS LIST

10.1 Schematic Power

10.2

10.3 Power Amplifier Assembly

Meter Amplifier Assembly

10.4

PACKING

11. PARTSLISTOFEXPLODEDVIEWS.

12.

DIAGRAMS,

Diagram

Supply

Circuit Assembly

P.C. BOARD

and Miscellaneous

PATTERNS AND

Parts ..

(AWR-093)

(AWH-045)

(AWM-0811

.......

'... 33

....

-. '. 37

..

' ' 42

. .

......

.........48

... 47

30

1.

SPECIFICAT|ONS

Semiconductors

Transistors

Diodes ..

...........55

...........75

Power Amplifier

Circuitry Continuous

from (Both

Total Harmonic Distortion

(Continuous (125 (1

watt

.

20

Hertz

channels

per

watts

per

channel

Push-pull drive, Triple

Power

rated

channel

.......

Outout

to 20,000

driven)

power

. .

at20

output)

power

poweroutput,8

lntermodulation Distortion (Continuous

(125 (1

watt Frequency Response Input

rated'power

per

watts

per

channel

output) ......... - O."lo/o

power

output,

. 5 Hertz to 80,000 HertzlldB

(Sensitivity/lmpedance)

Output

Speaker.. Damping Hum

and

(20

Factor

(lHF,

Noise

Hertz to 20,000 Hertz,

short-circuited,

Miscellaneous Power Requirements .

Power

Consumotion . . . . . . .,.. 500watts

Dimensions

Weight:

Without Package

......480(W) x186.5(H) x445(D) mm

.

Cascaded differential Amplifier,

push-pull,

Hertz

. . . . 250

Hertz

output,8

to 20.000 Hertz

direct coupled OCL.

per

watts

channel

ohms) . ........O.O5%

ohms) . . . . . . .

output, S ohms) ..

8 ohms)

.

..

. . . .O.O5%

. . . . . . 2Vl50k ohms

.

4ohmstoSohms

S ohms) ...,... 50

A network) . . . . . .

. AC 120V 60

19-5/16 x 7 x13-3116in

-....0.05%

Furnished Parts

Connection Cord with Pin Plugs Operating lnstuctions

(g

ohms)

o.1%

, . . . 0.Q5o/o

.110d8

Hertz

24.3kg;

54lb

EiPEC.E

NOTE:

Specificdtiotrt and without notice

the design subject

due to improuements.

possible

to

mod,fication

2. FRONT PANEL

FACILITIES

PEAK LEVEL

When

speaker nected, these in Watts.

NOTE: Speoher syotem impedance uaries

To

obtoin o

remoue loods ocro4i the SPEAKERS

METERS

systems of 8O nominal impedance

provide

preciae

Spedher con\ectiotrs

direct readout

medsurcment

of the output

occording

of the output

connect

ond

termindls-

are con-

power

to

frequency.

poue\

8a dumtuy

PROTECTION INDICATOR

lamp lights when

The

lf the lamp stays POWER

"Protection correcting the source of difficulty, if the lamp still fails to Center,

switch

Circuit

extinguish, contact a Pioneer

on during operation,

and check as described

protection

the

Operation".

circuit functions.

turn off the

in the section

After identifying and

Authorized Service

POWER

S'et to ON obtained until This effect not indicate

METER

SWI CH

ZERO POINT

to energize

the PRoTEcTIoN

is due to

malfunction.

the SPEC-2. Output will

the internal muting

ADJ USTMENT

indicator lamp

circuit and does

not be

Soes

out.

INPUT

Adjust LEFT output the SPEC-2 INPUT correspond to 2V of rotation, and d Normally

.

LEVEL CONTROLS

and RIGHT controls according

(voltage)

level

MAX

at

set these controls

lf

the minimum output voltage

amplifier

(2V). specifications will

of amplifier

does not reach 2V.

In

this case the effective output

the specified

output voltage

output can

(LEFT

of the

(L

at MIN

not be obtained

pre-amplifier

jacks.

& R)

(fully

clockwise), 4V at center

(fully

(2V).

MAX

to

of the

set the controls to MAX

attained

be

of 1V).

& RIGHT)

to the

connected to

Control

counter-ciockwise)

(for

positions

a

pre-

1/4

pre-

employed

indicated in the

example

with

sPEC-e

3.

CONNECTION

STEREO

TURNTABLE

DIAGRAM

-i

;

. , 1 I , r ,

rl

tO

C

STEREO

PRE-AMPLIFIER

'\..,,

i

O

q1

(e.s.

o

Pioneer

TAPE DECK

SPEC-1)

SPEAKERS S€t to ance

ployed to

turn otf

chenging

For

changing IMPEDANCE TECTION lamp is

not obtained from systems. This is du6 in muting

IMPEDANCE

malch

of the

spoaker

with

the SPEC-2.

this switch

about

6 to 12 seconds

the

circuit,

the nominal imDed-

the

position

swirch the PRO-

lights

syst€ms

po!!€r

setting.

o{

and sound

the speaksr

to

the built-

swilch

em-

Be sure

before

6tter

the

RIGHT

CHANNEL

SPEAKER

LEFT CHANNEL

SYSTEMS

4.

CIRCUIT

DESCRIPTION

4.1 POWER The

SPEC-2 cascoded drive, all The circuit form

applied applied nected forming emitter circuit of impedance achieved.

Q3

phase. current mirror the thus a The Current to since

of. current R1 through R2 equivalent

Q8.

and darlington

stages

the

in common base circuits

the following common

and

The

phase

become signals

pre-driver

cunent

that flowing

R1

D2

and

AMPLIFIER

high

is

a

differential

direct coupled

diagram is shown

differntial

to

a

Q4

flowing

and

+BL

D2

and

Q1

base.

Q2

cascode

(Q1

is low

Qb

is

function.

is equal

to

and stable

outputs

output

circuit formed

again

mirror circuit is

through R2

through Rl

R2

are

base-emitter

Q8

reaching

and

Q8

having

power

amplifier

triple

(OCL).

amplifier. The input

NFB

These

amplifier. Since

&

Q2)

drive

inverted.

of

the

equal,

point A (in

to

that

base-emitter. This Q5

design,

first stage,

push-pull

Fig.

in

from

two transistors

load

base circuit

amplification can be

Q5

via

Q7

by

Q6

same

and

and the characteristics

are reaching output directly

2.

the output stage

with

the common

becomes the input

and

Q6

is

applied

D2

and

phase

depicted

becomes

Q8

In

D2.

also Fig.

the

employing

push-pull

circuit

Q1

Q3

stage,

in opposite

Q8

and

other words,

1) through

same

and

signal are con-

and

to the

where

Q8,

outputs

perform

Fig.

in

equal

equal,

point

becomes

driving

with

Q2

Q4,

load

1.

the

By

adopting

muting relay

a

is

switched

are stops.

cause them

noise Q13

the stage transistors This current sistor,

good

The reversed

and

power

is

parallel

linearity

RLb is OFF

to

muting

Q14

transistors

high

a

for

coupling

(Ic)

to

plus

selection of an

current

this

OFF in succession,

phases

cancel

relay switching

in the following

by direct coupling.

output

each channel

be employed through

high amplification

and

mirror circuit,

is

Q8

of

each

other,

design

coupled

permits

operating

cut off,

and operation

and

Q8

reducing

noise.

driver

with

three

comparatively

(hfe).

+Bl

ll:t2

-

llrirel

when

Q10 - Q20

outputs

Q6

stage drive

in

each

point

pop

The final

power

parallel.

large tran-

with

tu

€

Fig.

1 Current

Mirror

Circuit

IIIPUTH

Fig.

Power

2

Amplifier

Circuit

Current The

of transistors, shorting, produced to limit OFF, in nent increases. the

Q9

limiting Q13

VR2 ing value, compensation. ing

current

-

Q9

Limiter

qLz.

Circuit

limiter

If

an overcurrent

due

to low load

circuit, shown in

this circuit utilizes

in the

power

the input voltage.

but if for

power

the

of

the

some rea.son

transistors,

power

This voltage bases of and

Ql1

the

and

Q14.

and VR3 in

and

Q9

make

signal voltages

this circuit set the current limit-

while TH1

RLG is

the current limiting value

Fig.

2,

consists

power

the

4S2)

or load

resistance

occurs

drop

(less

transistor

-

Q9

an overcurrent

voltage

the

flows in

than

voltage

the

emitter

are normally

Q12

drop compo-

transistor emitter resistance

is

divided

switching

Q11,

and

Q10

applied

and TH2

are

a selector switch for

4O

at

used

and

them

conductive,

Q12

to the basis of

for

temperature

load.

to bias

ON.

chang-

portion

A compressed

of

by which utilizes of

diodes. Figs.

principle

pressed suitable which struction. constant

and input-output

signal

length

employs

Holding

of C1 The holding voltage-current into

a current value afterwards circuit The

current

.meter

passes

and drives

of

the

for

operation.

pov/er

the

amplifier

the logarithmic

exponential

the

4

and 5 illustrate

is

then rectified

of

time by simple

a

the

diode

time is

and R1.

circuit voltage

converter,

and

through

the meter.

resultant

positive

circuit applies

and negative sides

SPEC-p

output signal

compression

function

the operating

response.

and retained

peak

holding

and capacitor

determined

is

then applied

where it is

amplified. The

the current resultant

circuit,

properties

The

circuit,

by

ttre time

to the

converted

current

the larger

to the

comfor

con-

is

a

4.2 PEAK Logarithmic

provide without With

a broad indicating

the

respect logarithmic meter

indication

As

shown in Fig.

positive

and negative sides. Each logarithmic voltage there both described

to current

is a cunent resultant

sides. The

here.

LEVEL METER

indication

is required in order

range in a

need for

to

compression

an

8O

range

load,

is

in the range

3,

the circuit

compression,

peak

converter circuits.

positive

PostTtvt

stDE logarithmic

comp

side circuit operation is

ion

ress

CIRCUIT

single meter,

selection by the

user.

approximately 50dB

performed

to

allow

of 0.01 - 500W.

is

divided into

side

consists

value

holding and

In

addition

circuits, common to

current

Yoltage

rter

Conv e

Peak

r alue

ho ld ing

to

of

Fig.

4 Equivalent

o

E

I\ f

o e

I

EL

+

Inprt voltagc(lC)

Circuit of the Logarithmic Compression

e 4

=

e

€

o E

Fig.

lC input

voltage

5 Input-output Response

It0lltvt

st0t

Fig. 3 Peak

Level Meter

Circuit

-

Positive

--'

llegatiYe

peak

current

peal

current

7

PROTECTION

4.3 The main

protect the event

purpose

equipment

the

of

malfunction, incorrect faulty connections, The block tions

in

is

reference to

Relay and

-

q27

while reverse the cut by the flows through and voltage

Potential Q30.

off, tuming

protection

RL2

and

4Q, RL4, RL6 and

at Because of amplifier

predriver

diagram of

Fig.

is shown

in

the

Lamp Drivers

form

Q30

Q31

the

drives bias is applied to off state.

DC

balance

When

R1.

it switches

be

to

at

With

Q29

lamp.

(when

ON. This causes

applied

point

OFF, current to

(lamp

Q31

Q30

impedance switch

RL4

off, output

becomes open, and the

are stopped operation

RL5.

CIRCUIT

of the

protection

give

and

or other causes.

protection

the

The following description

6.

dia$am.

relay drive

lamp.

the

circuit

In

Q27,

abnormality

an

or

temperature

potential

base

Q27

to

Q28,

B

drops, turning

drive)

ON

cuts off the

RL3).

circuit of the

circuit is

to

an indication in

operation,

circuit func-

(see

Fig.

7).

normal operation,

detected

is

current

it in

maintaining

detector,

falls rapidly

forward bias

turning

off

RL5 is

relay

lighting

and

current to

is

at

Q28

Q29

8Q;

ON.

and

cut the

RL4

when

power

stages beyond the

completely

by

RLg

RL2, former

selected and

is control

not directly

thus

and

secondary

circuit

tion.

Zener tials starting

Power This circuit

the

diodes

of

Q29

points

Switch

power

and

also includes a

switch is set to determined by base circuits. Immediately

and

Q27

switched

and passes

rise

time C1 and (zener

and current to

Q30.

In

the

B exceeds

current

and applied

after the

Q28

through

is determined

R8.

diode)

flows in the manner,

same

D2 zener

flows

to the

RL6

are

when the

taps

determining

in the

power

related to

D2

prevent

ON

R8

DB

and

and the

Q30,

misoperation.

Muting

and

C1 in the

power

reverse biased by

are

OFF.

Point

R8 and

rises as

by the

When

zener

the

voltage,

when the

voltage,

in RL5.

power

amplifier.

changing

for

impedance

value of

the

amplifier.

the

fix

the

difference

delaying

ON. The

switch

potential

B

potential

Q30

circuit

relay

potential

Q29

Correct

the

switch

current

the

They

protectiorr

operating

poten-

in

function

delay time

and

Q29

is

turned

-B1

and

from'+B3

Cl charges.

constant

time

exceeds

is switched

connected

at

is switched

voltage

is thus

trans-

are

func-

their

when

is

Q30 ON,

-B2,

The

of

D3

ON

point

ON

Fig.

6 Block

Diagram of the

Protection

Circuit

SPEG.El

Power Since

flows to potential.

-B2 smaller

through Dl Q28

tuming

lmpedance

When changed is reducing ON, switched

Switch +B3

OFF

normally

-B.2,

Q28

When the

immediately

than

+83.

and is

ON. Point B potential

and

Q27

Q30

Selector Muting

the impedance

from 8Sl

introduced into

-B2

voltage.

C1

to be discharged,

OFF.

Muting

passes

from

base is maintained

power

switch is

ceases, since its

Consequently,

applied

to

Q28

then falls rapidly,

OFF.

selector

4Sl, uncharged

to

-

82

the

This

circuit,

causes

and

Q29

R7

to

at cut

tumed OFF,

time

constant

+83

base, tuming

switch

capacitor

temporarily

to switch

Q28

&

Q30

R6

passes

(S1)

to

and

off

is

C2

be

Although continue

switches OFF

Q28

in

the

OFF

condition

again,

Q29

for several seconds

while C1 is charging.

Temperature

The temperature detector cient thermistors sensitive elements

Detector

employs

(posistors).

possessing a positive

positive

These are temperature

temperature

response, rapidly increasing in resistance

(see

certain The power the their

potential so that the

temperature

posistors (TH3

transistor.

temperature to the

resistance rapidly increases,

point

at

potential

is exceeded

TH4)

&

If

some abnormality

are mounted

posistor

C. This allows

point

at

Figs.

operating

reducing the

DB

to conduct,

D drops and

switches ON.

and

Q30

coeffi-

when a

8 &

9).

on the

increa.ses

point,

Q27

q

4

o

,2

o

4

A

-Tem0erature

Posistor-temperature

Fig. 8

Fig.

9 Temperature Detector Circuit

point

("

t

Response

DC

Balance

and

Q25 as shown

Detector

make up a differential amplifier,

Q26

Fig.

in

The inputs

10. transistors are connected to the power

balance of

amplifier.

the difference arises in signal, unbalancing When one lower

than

of

Q27

is dissipated through and relay

and

If

for

power

the

q25

the collector

potential,

base

D1 or

lamp

drives

-----

r-

some

is

upset,

stage differential and

Q26

potentials

this base

D2,

operate.

collector

q27

Poror

amplilicr

i

r--------J

itcll

I I

I

L- --:E---..i

Fig.

10 DC Balance Detector Circuit

(bases)

of

these

left and right

reason

the

potential

a

amplifier input

currents. becomes

potential

switches

DC

ON,

4.4 SURGE A

toroidal

SPEG2,

a large low intemal

CURRENT SUPPRESSOR

core

which while

handling capacity, also

resistance. four 15,000pF electrolytic power switch

The

protective

The power

supply Two surge

supply, surge

operation

power

supply can

measures

main sources

transformer

electrolytic

suppressor circuits are

SPEC-2, one each power shown

Power

by

primary

transformer

Fig.

in

transformer

relay surge

the

side.

11.

When

ON, the current

C1,

charges

relay

therefore

drive coil

OFF. The transformer

R1

through

completely

drive coil switching

+83

during this

charged,

The surge

secondary side of

former is designed

electrolytic

Relay

d riv ors

rent. turned

lanp

and

OFF eration. Consequently, passes ally charging tors circuit. RL2 when gving

+Bl

+ t lectrolytic

t

ito

catac

By current is 40 A.

power

transformer

possessing

is used in

compactness and

exhibits extremely

In

combination

capacitors forming the

current accompanying

can reach a

therefore

maximum of 3004.

damaged

be

are taken.

surge current

of

excitation current

capacitor

charging

generation

and

current.

employed in the

in

the

circuits.

primary

These circuits are

and

secondary

excitation current is handled

suppressor circuit

power

the

passes

through

it does

immediately, and

excitation

current

it ON, and

switch is turned

R2 &

not

flow through the

RLl

current flows

interval.

flows

R1 is

shorted.

After. C1

in the

suppressor circuit in

power

the

handle

to

capacitor charging cur-

When

ON,

due

to

power

the

RL2 and RLB remain

protection

circuit op-

the current

through

through a bridge

charging has

the normal

employing

R3

and R4,

electrolytic

the

type

RLB is

or

switched ON

been completed,

operating mode.

these circuits, surge

limited

to approximately

CIRCUITS

the

with the

power

unless

are

power

at the

D1

and

remains

is

RL1

the

trans-

the

switch is

gradu-

capaci-

rectifier

10

Fig.

11

Surge Current

tlectrolytic capacitor

-Bl

Suppressor Circuit

BLOCK

5.

DIAGRAM

LEFT

TNPUT

etl

u*,il-

Li

I I

POWER

AMPLIFIER

_

--

--_\

Qlr

I

RIGHT INPUT

@-9_l

u*t

: l---

f*l

'l

ll

Irl

tl

LE--

RIGHT CHANNEL

powER

PROTECTION

CIRCUIT

(

AMPLTFTER

same

as

Lelt,

t

-----r

cirannel,,)

PROTECTIOI

LANP

I

44

t-

METER

ANPLIFIER

PEAK

METE

OUTPUT

LEVEL

R

L

EFT

sPEC-e

-

t--

aRrcHT

(Sarne

|

\

CHANNEL METER

I

AllPLtFtER

as Left, channeL)

!

TPUT

@+

6\-

+

LEVEL

PEAK

METER

1

RIGH

AC LINE

SWITCHES

Sr : P0WER Sz . SPEAKER

POTENTIOMETERS

VRr VR2: RIGHT

RELAYS

RL1: RL2, RLs

RLn:

RL5: Rh' CURRENT LIM{TER

:

0N*_0EF

I|'lPEDANCE

8.0* :

:

LEFT

LEVEL C0NTR0L

LEVEL C0I{TR0L

; PRIMARY

CURRENT

:

SURGE CONTROL AND VOLTAGE SELECTOR

P0WER CUT_ OFF

MUTING

SENSITIVITY CONTROL

SURGE

CONTROL

SECSNDARY

CURRENT

SUPPLY

RELAY

4Q,

t<

ADJUSTING PROCEDURES

6.

Since

the

right channels

and assembly, channels.

same configuration

of

the following

SPEC-2

the

adjustments

used for both

is

power

apply to

Power

amplifier

left

amplifier

both

assembly

IDLE

6.1

1)

Connect as

2)

Set LEFT trols counter-clockwise).

Set

3)

minutes adjust

30mV on the

After

4) readjust

voltmeter.

CURRENT

on

the

POWER

the

VRl for 30mV

shown in

LEVEL

front

switch to

VR1

voltmeter.

po\Mer

has

ADJUSTMENT

Fig. 12. and panel

to

been

RIGHT

to

ON.

give

ON for 30

LEVEL con-

minimum

After I or

indication of

an

indication on the

(fully

2

minutes,

13

Fig. 12

Connection

Diagram

for

ldle

Current

Adjustment

6.2 CURRENT ADJUSTMENT

Note: The high dummy 200W 8S},

output

load of 4O

dummy

100W

loads in

load is

LIMITER

power

of the

and more

not available,

parallel.

SENSITIVITY

SPEC-2

requires

than 200W.

connect

If

two

Connect as shown

1)

Set SPEC-2 impedance selector switch to

2)

(even

though a

a a

VR2

While

3)

the In

the same manner, adjust VR3

torted

voltmeter

the

just

to

waveform.

point

in Fig. 14.

4O

dummy

indicated

distorted

the lower

load is used).

point

the

half

with

30V/(40

upper half of

to

28.3V/(44).

adjust

),

just

8O

dis-

ilPur

|

/

la

AF

Fig.

13

signal

The Position

generator

of VR2

Voltmeter

and VR3

VR3

Osilloscope

ooo

Waveform

Fig.

14

Connection

Diagram for

Current Limiter

Sensitivity

Adjustment

6.3

1)

2)

3)

METER

Connect

Adjust

44.7V At is for on

as shown

input

on

this time,

right channel) for

LEVEL

the

AMPLI FIER

Fig.

in

level

to

voltmeter.

the

adjust VR1

meter.

ADJUSTMENT

16.

give

an indication

(left

channel;

(250W)

OdB

indication

Meter

SPEG.E!

of

VR2

amplifier assembly

Fis. 15

SPEC-2

NPUT

I

r

IA

R

Position of

The

VR2

VR 1

VR2

and

RIGHT

AF.

VRl

Voltmeter

.----.

S

Fig.

a

att\

'J-'

16

Connection Diagram for Meter

Amplifier Adjustment

15