TEA1532
TEA1532
GreenChipäII SMPS control IC
Rev. 01 — 28 May 2004 |
Preliminary data sheet |
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1. General description
The GreenChip™II is the second generation of green Switched Mode Power Supply (SMPS) controller ICs. Its high level of integration allows the design of a cost effective power supply with a very low number of external components.
The TEA1532 can also be used in fixed frequency, Continuous Conduction Mode (CCM) converter designs for low voltage, high current applications. At low power (standby) levels, the system operates in cycle skipping mode which minimizes the switching losses during standby.
The special built-in green functions allow the efficiency to be optimum at all power levels. This holds for quasi-resonant operation at high power levels, as well as fixed frequency operation with valley switching at medium power levels. At low power (standby) levels, the system operates in cycle skipping mode with valley detection.
The proprietary high voltage BCD800 process makes direct start-up possible from the rectified universal mains voltage in an effective and green way. A second low voltage BICMOS IC is used for accurate, high speed protection functions and control.
The TEA1532 enables highly efficient and reliable supplies to be designed easily.
2.Features
2.1Distinctive features
■Universal mains supply operation (70 V to 276 V AC)
■High level of integration, resulting in a very low external component count
■Fixed frequency Continuous Conduction Mode (CCM) operation capability
■Quasi-Resonant (QR) Discontinuous Conduction Mode (DCM) operation capability.
2.2Green features
■Valley or zero voltage switching for minimum switching losses in QR operation
■Cycle skipping mode at very low loads; input power <300 mW at no-load operation for a typical adapter application
■On-chip start-up current source.
2.3Protection features
■Safe restart mode for system fault conditions
■Zero current switch-on in QR mode
■Undervoltage protection (foldback during overload)
Philips Semiconductors |
TEA1532 |
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GreenChipäII SMPS control IC |
■IC overtemperature protection (latched)
■Low and adjustable overcurrent protection trip level
■Soft (re)start
■Mains voltage-dependent operation-enabling level
■General purpose input for latched or safe restart protection and timing, e.g. to be used for overvoltage protection (OVP), output short-circuit protection or system overtemperature protection
■Brown-out protection.
3.Applications
■Printer adapters and chargers. The device can also be used in all applications that demand an efficient and cost-effective solution up to 250 W.
4.Ordering information
Table 1: Ordering information
Type number |
Package |
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Name |
Description |
Version |
TEA1532T |
SO8 |
plastic small outline package; 8 leads; body |
SOT96-1 |
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width 3.9 mm |
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TEA1532P |
DIP8 |
plastic dual in-line package; 8 leads (300 mil) |
SOT97-1 |
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9397 750 13113 |
© Koninklijke Philips Electronics N.V. 2004. All rights reserved. |
Preliminary data sheet |
Rev. 01 — 28 May 2004 |
2 of 27 |
Philips Semiconductors |
TEA1532 |
GreenChipäII SMPS control IC
5. Block diagram
1 |
SUPPLY |
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START-UP |
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8 |
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VCC |
MANAGEMENT |
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CURRENT SOURCE |
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DRAIN |
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DCM |
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VALLEY |
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Iprot(dem) |
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internal |
UVLO start |
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AND |
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clamp |
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supply |
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CCM |
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Vm |
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DETECTION |
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2 |
S1 |
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GND |
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5 |
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OSCILLATOR |
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LOGIC |
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DEM |
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80 |
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SLOPE |
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mV |
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COMPENSATION |
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DRIVER |
−50 |
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mV |
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Osc_Rdy |
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7 |
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Duty_Max |
LOGIC |
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DRIVER |
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4 |
Islopecomp |
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Iss |
−1 |
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CTRL |
POWER-ON |
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LEB |
0.5 V |
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S |
Q |
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RESET |
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soft |
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start |
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5.6 V |
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blank |
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S2 |
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R |
Q |
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UVLO |
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OCP |
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control |
MAXIMUM |
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detect |
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ON-TIME |
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PROTECTION |
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0.63 V |
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6 |
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SENSE |
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DCM and CCM |
BROWN-OUT |
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S3 |
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PROTECTION |
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2.5 V |
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3 |
Icharge |
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PROTECT |
300 Ω |
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S |
Q |
TEA1532T |
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5.6 V |
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OVER- |
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TEA1532P |
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Idischarge |
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protect |
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TEMPERATURE |
VCC < 4.5 V |
R |
Q |
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3 V |
detect |
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PROTECTION |
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coa014 |
Fig 1. Block diagram.
9397 750 13113 |
© Koninklijke Philips Electronics N.V. 2004. All rights reserved. |
Preliminary data sheet |
Rev. 01 — 28 May 2004 |
3 of 27 |
Philips Semiconductors |
TEA1532 |
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GreenChipäII SMPS control IC |
6.Pinning information
6.1Pinning
VCC |
1 |
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8 |
DRAIN |
VCC |
1 |
8 |
DRAIN |
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GND |
2 |
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7 |
DRIVER |
GND |
2 |
7 |
DRIVER |
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TEA1532T |
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TEA1532P |
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PROTECT |
3 |
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6 |
SENSE |
PROTECT |
3 |
6 |
SENSE |
CTRL |
4 |
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5 |
DEM |
CTRL |
4 |
5 |
DEM |
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001aaa829 |
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001aaa828 |
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Fig 2. Pin configuration: TEA1532T (SOT96-1). |
Fig 3. Pin configuration: TEA1532P (SOT97-1). |
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6.2 Pin description
Table 2: |
Pin description |
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Symbol |
Pin |
Description |
VCC |
1 |
supply voltage |
GND |
2 |
ground |
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PROTECT |
3 |
protection and timing input |
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CTRL |
4 |
control input |
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DEM |
5 |
input from auxiliary winding for demagnetization timing |
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SENSE |
6 |
programmable current sense input |
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DRIVER |
7 |
MOSFET Gate driver output |
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DRAIN |
8 |
connected to drain of external MOS switch, input for start-up |
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current compensation and valley sensing |
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7. Functional description
The TEA1532 is the controller of a compact flyback converter, with the IC situated at the primary side. An auxiliary winding of the transformer provides demagnetization detection and powers the IC after start-up; see Figure 4.
9397 750 13113 |
© Koninklijke Philips Electronics N.V. 2004. All rights reserved. |
Preliminary data sheet |
Rev. 01 — 28 May 2004 |
4 of 27 |
Philips Semiconductors |
TEA1532 |
GreenChipäII SMPS control IC
Vi |
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1 |
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8 |
CVCC |
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2 |
TEA1532T |
7 |
3 |
TEA1532P |
6 |
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4 |
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5 |
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coa015 |
Fig 4. Typical configuration
The TEA1532 can operate in multi modes; see Figure 5.
f |
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coa017 |
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(kHz) |
Cycle |
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fixed |
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skip |
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63 |
FF-CCM |
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QR |
P (W)
Fig 5. Multi mode and FF-CCM operation.
In QR mode, the next converter stroke is started only after demagnetization of the transformer current (zero current switching), while the drain voltage has reached the lowest voltage to minimize switching losses (green function). The primary resonant circuit of primary inductance and drain capacitor ensures this quasi-resonant operation. The design can be optimized in such a way that zero voltage switching can extend over most of the universal mains range.
To prevent very high frequency operation at lower loads, the quasi-resonant operation changes smoothly in fixed frequency Pulse Width Modulation (PWM) control.
9397 750 13113 |
© Koninklijke Philips Electronics N.V. 2004. All rights reserved. |
Preliminary data sheet |
Rev. 01 — 28 May 2004 |
5 of 27 |
Philips Semiconductors |
TEA1532 |
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GreenChipäII SMPS control IC |
In fixed frequency continuous conduction mode, the internal oscillator determines the start of the next converter stroke.
In both operating modes, a cycle skipping mode is activated at very low power (standby) levels.
7.1 Start-up, mains enabling operation level and undervoltage lock out
Refer to Figure 10 and Figure 11. Initially, the IC is self supplying from the rectified mains voltage via pin DRAIN. Supply capacitor CVCC (at pin 1) is charged by the internal start-up current source to a level of about 4 V or higher, depending on the drain voltage. Once the drain voltage exceeds the Vm (mains-dependent operation-enabling level), the start-up current source will continue charging capacitor CVCC (switch S1 will be opened); see Figure 1. The IC will activate the power converter as soon as the voltage on pin VCC
passes the Vstart level. The IC supply is taken over by the auxiliary winding as soon as the output voltage reaches its intended level and the IC supply from the mains voltage is
subsequently stopped for high efficiency operation (green function).
The moment the voltage on pin VCC drops below VUVLO (undervoltage lock out), the IC stops switching and enters a safe restart from the rectified mains voltage. Inhibiting the auxiliary supply by external means causes the converter to operate in a stable, well-defined burst mode.
7.2 Supply management
All (internal) reference voltages are derived from a temperature compensated, on-chip band gap circuit.
7.3 Current control mode
Current control mode is used for its good line regulation behavior.
The on-time is controlled by the internally inverted pin CTRL voltage, which is compared with the primary current information. The primary current is sensed across an external resistor. The driver output is latched in the logic, preventing multiple switch-on.
The internal control voltage is inversely proportional to the external pin CTRL voltage, with an offset of 1.5 V. This means that a voltage range from 1 V to approximately 1.5 V on pin CTRL will result in an internal control voltage range from 0.5 V to 0 V (a high external control voltage results in a low duty cycle).
Vsense(max) |
coa016 |
0.52 V
Cycle skip active
25 mV
1 V |
1.5 V |
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VCTRL |
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(typ) |
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Fig 6. The Vsense(max) voltage as a function of VCTRL.
9397 750 13113 |
© Koninklijke Philips Electronics N.V. 2004. All rights reserved. |
Preliminary data sheet |
Rev. 01 — 28 May 2004 |
6 of 27 |
Philips Semiconductors |
TEA1532 |
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GreenChipäII SMPS control IC |
7.4 Oscillator
The fixed frequency of the oscillator is set by an internal current source and capacitor.
7.5 Cycle skipping
At very low power levels, a cycle skipping mode activates. An internal control voltage
(Vsense(max)) lower than 25 mV will inhibit switch-on of the external power MOSFET until this voltage increases to a higher value; see Figure 6.
7.6 Demagnetization (QR operation)
The system will be in Discontinuous Conduction Mode (DCM) (QR operation) when resistor RDEM is applied. The oscillator will not start a new primary stroke until the secondary stroke has ended.
Demagnetization features a cycle-by-cycle output short-circuit protection which immediately reduces the frequency (longer off-time), thereby reducing the power level.
Demagnetization recognition is suppressed during the first tsupp time. This suppression may be necessary in applications where the transformer has a large leakage inductance and at low output voltages or start-up.
7.7 Continuous Conduction Mode (CCM)
It is also possible to operate the IC in the so-called Fixed Frequency Continuous Conduction Mode (FF CCM). This mode is activated by connecting pin DEM to ground and connecting pin DRAIN to the rectified constant Vi voltage; see Figure 13.
7.8 Overcurrent Protection (OCP)
The current in the transformer primary is measured accurately by the internal
cycle-by-cycle source current limit circuit using the external sense resistor Rsense.
The accuracy of the current limit circuit allows the transformer core to have a minimum specification for the output power required. The OCP circuit limits the ‘sense’ voltage to an internal level, and is activated after the leading edge blanking period, tleb generated by the Leading Edge Blanking (LEB) circuit.
7.9 Control pin protection
If pin CTRL becomes open-circuit or is disconnected, a fault condition is assumed and the converter will stop operating immediately. Operation recommences when the fault condition is removed.
7.10 Adjustable slope compensation
A slope compensation function has been added at pin CTRL; see Figure 7. The slope compensation function prevents sub-harmonic oscillation in CCM at duty cycles over 50 %. The CTRL voltage is modulated by sourcing a (non-constant) current out of
pin CTRL and adding a series resistor Rslopecomp. This increases the CTRL voltage proportionally with the on-time, which therefore limits the OCP level. Thus, a longer
on-time results in a higher CTRL voltage, however, this increase in CTRL voltage will actually decrease the on-time. Slope compensation can be adjusted by changing the
9397 750 13113 |
© Koninklijke Philips Electronics N.V. 2004. All rights reserved. |
Preliminary data sheet |
Rev. 01 — 28 May 2004 |
7 of 27 |
Philips Semiconductors |
TEA1532 |
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GreenChipäII SMPS control IC |
value of Rslopecomp. Slope compensation prevents modulation of the on-time (duty cycle) while operating in FF CCM. A possible drawback of sub-harmonic oscillation can be
output voltage ripple.
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TEA1532 |
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Slope compensation |
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current |
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Rslopecomp CTRL 4 |
−1 |
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RCTRL |
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5.6 V |
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control |
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detect |
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0.63 V |
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001aaa830 |
Fig 7. Slope compensation.
7.11 Minimum and maximum on-time
The minimum on-time of the SMPS is determined by the LEB time. The IC limits the on-time to a maximum time which is dependent on the mode of operation:
QR mode: When the system requires an ‘on-time’ of more than 25 ms, a fault condition is assumed (e.g. CVCC removed), the IC stops switching and enters the safe restart mode.
CCM: The driver duty cycle is limited to 70 %. So the maximum on-time is correlated to the oscillator time which results in an accurate limit of the minimum input voltage of the flyback converter.
7.12 PROTECT and timing input
The PROTECT input (pin 3) is a multi-purpose (high-impedance) input, which can be used to switch off the IC and create a relatively long timing function. As soon as the voltage on this pin rises above 2.5 V, switching stops immediately. For the timing function, a current of typically 50 mA flows out of pin PROTECT and charges an external capacitor until the activation level of 2.5 V is reached. This current source however, is only activated when the converter is not in regulation, which is detected by the voltage on pin CTRL
(VCTRL < 0.63 V). A (small) discharge current is also implemented to ensure that the capacitor is not charged, for example, by spikes, and a MOSFET switch is added to
ensure a defined start situation. The voltage on pin CTRL determines whether the IC enters latched protection mode, or safe restart protection mode:
9397 750 13113 |
© Koninklijke Philips Electronics N.V. 2004. All rights reserved. |
Preliminary data sheet |
Rev. 01 — 28 May 2004 |
8 of 27 |
Philips Semiconductors |
TEA1532 |
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GreenChipäII SMPS control IC |
•When the voltage on pin CTRL is below 0.63 V, the IC is assumed to be out of regulation (e.g. the control loop is open). In this case activating pin PROTECT
(VPROTECT > 2.5 V) will cause the converter to stop switching. Once VCC drops below VUVLO, capacitor CVCC will be recharged and the supply will restart. This cycle will be repeated until the fault condition is removed (safe restart mode)
•When the voltage on pin CTRL is above 0.63 V, the IC is assumed to be in regulation.
In this case activating pin PROTECT (VPROTECT > 2.5 V), by external means, will latch the IC: The voltage on pin VCC will cycle between Vstart and VUVLO, but the IC will not start switching again until the latch function is reset. The latch is reset as soon as VCC drops below 4.5 V (typical value). The internal overtemperature protection will also trigger this latch; see also Figure 1.
A voltage higher than 3 V on pin PROTECT will always latch the IC. This is independent of the state of the IC.
7.13 Valley switching
Refer to Figure 8. A new cycle starts when the power switch is activated. After the on-time (determined by the sense voltage and the internal control voltage), the switch is opened and the secondary stroke starts. After the secondary stroke, the drain voltage shows an
oscillation with a frequency of approximately |
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´ p ´ (L p |
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where Lp is the primary self inductance of the transformer and Cd is the capacitance on the drain node.
As soon as the oscillator voltage is high again and the secondary stroke has ended, the circuit waits for the lowest drain voltage before starting a new primary stroke. This method is called valley detection. Figure 8 shows the drain voltage, valley signal, secondary stroke signal and the oscillator signal.
In an optimum design, the reflected secondary voltage on the primary side will force the drain voltage to zero. Thus, zero voltage switching is possible, preventing large capacitive
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, and allowing high frequency operation, which |
switching losses æP = -- |
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results in small and cost effective magnetics.
9397 750 13113 |
© Koninklijke Philips Electronics N.V. 2004. All rights reserved. |
Preliminary data sheet |
Rev. 01 — 28 May 2004 |
9 of 27 |