Philips tda8763 DATASHEETS
INTEGRATED CIRCUITS
DATA SH EET
TDA8763
10-bit high-speed low-power ADC
with internal reference regulator
Preliminary specification
Supersedes data of 1995 Apr 27
File under Integrated Circuits, IC02
1996 Feb 13
Philips Semiconductors Preliminary specification
10-bit high-speed low-power ADC with
internal reference regulator
FEATURES
• 10-bit resolution
• Sampling rate up to 50 MHz
• DC sampling allowed
• One clock cycle conversion only
• High signal-to-noise ratio over a large analog input
frequency range (9.3 effective bits at 4.43 MHz
full-scale input at f
• No missing codes guaranteed
• In range (IR) CMOS output
• CMOS compatible digital inputs
• 3 to 5 V CMOS digital outputs
• Low-level AC clock input signal allowed
• Internal reference voltage regulator
• Power dissipation only 220 mW (typical)
• Low analog input capacitance, no buffer amplifier
required
• No sample-and-hold circuit required.
= 40 MHz)
clk
TDA8763
APPLICATIONS
High-speed analog-to-digital conversion for:
• Video data digitizing
• Radar pulse analysis
• Transient signal analysis
• High energy physics research
•Σ∆ modulators
• Medical imaging.
GENERAL DESCRIPTION
The TDA8763 is a 10-bit high-speed low-power
analog-to-digital converter (ADC) for professional video
and other applications. It converts the analog input signal
into 10-bit binary-coded digital words at a maximum
sampling rate of 50 MHz. All digital inputs and outputs are
CMOS compatible, although a low-level sine wave clock
input signal is allowed.
The device includes an internal voltage reference
regulator. If the application requires that the reference is
driven via external sources the recommendation is to use
the TDA8763A.
ORDERING INFORMATION
TYPE
NUMBER
TDA8763M/3 SSOP28
TDA8763M/4 SSOP28 SOT341-1 40
TDA8763M/5 SSOP28 SOT341-1 50
NAME DESCRIPTION VERSION
plastic shrink small outline package; 28 leads;
body width 5.3 mm
PACKAGE
SAMPLING
FREQUENCY (MHz)
SOT341-1 30
1996 Feb 13 2
Philips Semiconductors Preliminary specification
10-bit high-speed low-power ADC with
TDA8763
internal reference regulator
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
CCA
V
CCD
V
CCO
I
CCA
I
CCD
I
CCO
INL integral non-linearity f
DNL differential non-linearity f
AINL AC integral non-linearity note 1 −±1.0 ±2.0 LSB
f
clk(max)
P
tot
analog supply voltage 4.75 5.0 5.25 V
digital supply voltage 4.75 5.0 5.25 V
output stages supply voltage 3.0 3.3 5.25 V
analog supply current − 27 tbf mA
digital supply current − 14 tbf mA
output stages supply current f
= 40 MHz; ramp input − 4 tbf mA
clk
= 40 MHz; ramp input −±0.8 tbf LSB
clk
= 40 MHz; ramp input −±0.5 ±0.9 LSB
clk
maximum clock frequency
TDA8763M/3 30 −−MHz
TDA8763M/4 40 −−MHz
TDA8763M/5 50 −−MHz
total power dissipation f
= 40 MHz; ramp input − 220 tbf mW
clk
Note
1. Full-scale sine wave (f
= 4.43 MHz; f
i
= 40 MHz).
clk
1996 Feb 13 3
Philips Semiconductors Preliminary specification
10-bit high-speed low-power ADC with
internal reference regulator
BLOCK DIAGRAM
ook, full pagewidth
analog
voltage input
V
CCA
35
REFERENCE
VOLTAGE
9
8
7
6
REGULATOR
R
LAD
ANALOG -TO - DIGITAL
CONVERTER
V
RT
V
I
V
RM
V
RB
CLKDEC
1
CLOCK DRIVER
LATCHES
V
CCD2
11
TDA8763
OE
10
CMOS
OUTPUTS
2
25
D9
D8
24
D7
23
D6
22
D5
21
20 D4
19
D3
18
D2
17 D1
16 D0
V
13
TDA8763
TC
MSB
data outputs
LSB
CCO
IN RANGE LATCH
4
AGND
analog ground digital ground digital ground
12
DGND2
output ground
CMOS OUTPUT
14
OGND
27
DGND1
Fig.1 Block diagram.
26
28
MBE553
V
CCD1
IR
output
1996 Feb 13 4
Philips Semiconductors Preliminary specification
10-bit high-speed low-power ADC with
internal reference regulator
PINNING
SYMBOL PIN DESCRIPTION
CLK 1 clock input
TC 2 two’s complement input (active LOW)
V
CCA
AGND 4 analog ground
DEC 5 decoupling input
V
RB
V
RM
V
I
V
RT
OE 10 output enable input (CMOS level
V
CCD2
DGND2 12 digital ground 2
V
CCO
OGND 14 output ground
n.c. 15 not connected
D0 16 data output; bit 0 (LSB)
D1 17 data output; bit 1
D2 18 data output; bit 2
D3 19 data output; bit 3
D4 20 data output; bit 4
D5 21 data output; bit 5
D6 22 data output; bit 6
D7 23 data output; bit 7
D8 24 data output; bit 8
D9 25 data output; bit 9 (MSB)
IR 26 in range data output
DGND1 27 digital ground 1
V
CCD1
3 analog supply voltage (+5 V)
6 reference voltage BOTTOM input
7 reference voltage MIDDLE
8 analog input voltage
9 reference voltage TOP input
input, active LOW)
11 digital supply voltage 2 (+5 V)
13 supply voltage for output stages
(+3 to 5 V)
28 digital supply voltage 1 (+5 V)
handbook, halfpage
1
CLK
2
TC
V
3
CCA
4
AGND
5
DEC
V
6
RB
V
7
RM
V
RT
OE
V
CCD2
DGND2
V
CCO
OGND
V
I
8
9
10
11
12
13
TDA8763
MBE552
Fig.2 Pin configuration.
TDA8763
V
28
CCD1
27
DGND1
IR
26
25
D9
24
D8
23
D7
22
D6
D5
21
20
D4
D3
19
18
D2
17
D1
16
D0
1514
n.c.
1996 Feb 13 5
Philips Semiconductors Preliminary specification
10-bit high-speed low-power ADC with
TDA8763
internal reference regulator
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
CCA
V
CCD
V
CCO
∆V
V
I
V
clk(p-p)
I
O
T
stg
T
amb
T
j
CC
analog supply voltage note 1 −0.3 +7.0 V
digital supply voltage note 1 −0.3 +7.0 V
output stages supply voltage note 1 −0.3 +7.0 V
supply voltage difference
V
V
V
CCA
CCA
CCD
− V
− V
− V
CCD
CCO
DDO
−1.0 +1.0 V
−1.0 +4.0 V
−1.0 +4.0 V
input voltage referenced to AGND −0.3 +7.0 V
AC input voltage for switching (peak-to-peak value) referenced to DGND − V
CCD
V
output current − 10 mA
storage temperature −55 +150 °C
operating ambient temperature −40 +85 °C
junction temperature − +150 °C
Note
1. The supply voltages V
CCA
, V
CCD
and V
may have any value between −0.3 V and +7.0 V provided that the supply
CCO
voltage differences ∆VCC are respected.
HANDLING
Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.
THERMAL CHARACTERISTICS
SYMBOL PARAMETER VALUE UNIT
R
th j-a
thermal resistance from junction to ambient in free air 110 K/W
1996 Feb 13 6
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