Philips N74F832N, N74F832D, N74F1832N, N74F1832D Datasheet
INTEGRATED CIRCUITS
74F832, 74F1832
Hex 2-input OR drivers
Product specification
IC15 Data Handbook
1991 Jan 02
Philips Semiconductors Product specification
74F832/74F1832Hex 2-input OR drivers
FEA TURES
•High capacitive drive capability
•Choice of configuration
Corner V
Center V
and GND – 74F832
CC
and GND – 74F1832
CC
•Typical propagation delay of 3.5ns
•Superior ground noise characteristics (implemented using output
edge rate control)
•Increased source and sink current (64mA)
TYPE
TYPICAL PROP-
AGATION DELAY
74F832 3.5ns 26mA
74F1832 3.5ns 26mA
ORDERING INFORMATION
ORDER CODE
DESCRIPTION COMMERCIAL RANGE
= 5V ±10%,
V
CC
T
= 0°C to +70°C
amb
20–pin plastic Dual
In-line Package
20–pin plastic Small
Outline Large
N74F832N, N74F1832N SOT146-1
N74F832D, N74F1832D SOT163-1
TYPICAL SUPPL Y
CURRENT
( TOTAL)
PKG DWG #
PIN CONFIGURATION
1
D0a
2
D0b
3
Q0
D1a
4
D1b
5
Q1
6
D2a
7
D2b
8
Q2
9
GND
10 11
LOGIC SYMBOL
1245781213
D0a D0bD1a D2a D2b D3a D3bD1b
Q0 Q1 Q2 Q3
74F832
74F832
20
V
CC
19
D5b
18
D5a
17
Q5
16
D4b
15
D4a
14
Q4
13
D3b
12
D3a
Q3
SF00511
15 16 18 19
D4aD4bD5aD5b
Q4 Q5
INPUT AND OUTPUT LOADING
AND FAN OUT TABLE
PINS DESCRIPTION 74F (U.L.)
HIGH/LOW
Dna – Dnb Data inputs 1.0/0.033 20µA/20µA
Q0 – Q5 Data outputs 3200/106.7 64mA/64mA
NOTE: One (1.0) FAST unit load is defined as: 20µA in the high
state and 0.6mA in the low state.
LOAD VALUE
HIGH/LOW
V
= Pin 20
CC
GND = Pin 10
IEC/IEEE SYMBOL
1
2
4
5
7
8
12
13
15
16
18
19
36 911
74F832
1
14 17
SF00512
3
6
9
11
14
17
SF00513
January 2, 1991 853-1529 01348
2
Philips Semiconductors Product specification
74F832/74F1832Hex 2-input OR drivers
PIN CONFIGURATION
1
D4b
2
Q5
3
D5a
4
D5b
5
V
CC
6
D0a
7
D0b
8
Q0
9
D1a
10 11
D1b
LOGIC SYMBOL
6791012131718
D0a D0bD1a D2a D2b D3a D3bD1b
Q0 Q1 Q2 Q3
74F1832
74F1832
20
D4a
19
Q4
18
D3b
17
D3a
16
Q3
15
GND
14
Q2
13
D2b
12
D2a
Q1
SF00514
20 1 3 4
D4a D4bD5a D5b
Q4 Q5
LOGIC DIAGRAM
74F832
1
D0a
2
D0b
4
D1a
5
D1b
7
D2a
8
D2b
12
D3a
13
D3b
15
D4a
16
D4b
18
D5a
19
D5b
VCC = Pin 20
GND = Pin 10
3
6
9
11
14
17
FUNCTION TABLE
INPUTS OUTPUT
Dna Dnb Qn
H X H
X H H
L L L
QO
Q1
Q2
Q3
Q4
Q5
6
D0a
7
D0b
9
D1a
10
D1b
12
D2a
13
D2b
17
D3a
18
D3b
20
D4a
1
D4b
3
D5a
4
D5b
V
= Pin 5
CC
GND = Pin 15
74F1832
8
11
14
16
19
2
SF00517
QO
Q1
Q2
Q3
Q4
Q5
V
= Pin 5
CC
GND = Pin 15
IEC/IEEE SYMBOL
6
7
9
10
12
13
17
18
20
1
3
4
8111416
74F1832
1
2
19
NOTES:
H = High voltage level
L = Low voltage level
SF00515
8
11
14
16
19
2
SF00516
X = Don’t care
January 2, 1991
3
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