Philips N74F1805D, N74F1805N, N74F805N, N74F805D Datasheet

INTEGRATED CIRCUITS
74F805, 74F1805
Hex 2-input NOR drivers
Product specification IC15 Data Handbook
 
1990 Sep 14
74F805/74F1805Hex 2-input NOR drivers
FEA TURES
High capacitive drive capability
Choice of configuration
Corner V Center V
and GND – 74F805
CC
and GND – 74F1805
CC
Typical propagation delay of 2.3ns
TYPICAL
PROPAGATION
TYPE
DELA Y
74F805 2.3ns 10mA
74F1805 2.3ns 10mA
ORDERING INFORMATION
ORDER CODE
DESCRIPTION COMMERCIAL RANGE
= 5V ±10%,
V
CC
T
= 0°C to +70°C
amb
20–pin plastic DIP N74F805N, N74F1805N SOT146-1
20–pin plastic SOL N74F805D, N74F1805D SOT163-1
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS DESCRIPTION 74F
Dna – Dnb Data inputs 1.0/0.033 20µA/20µA
Q0 – Q5 Data outputs 2400/80 48mA/48mA
NOTE: One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the low state.
TYPICAL SUPPL Y
CURRENT
(U.L.) HIGH/
LOW
( TOTAL)
PKG DWG #
LOAD VALUE
HIGH/LOW
PIN CONFIGURATION
D0a
1
D0b
2
Q
0
3
D1a
4
D1b
5
1
Q
6
D2a
7
D2b
8
2
Q
9
GND
10 11
LOGIC SYMBOL
1245781213
D0a D0bD1a D2a D2b D3aD3bD1b
Q0 Q1 Q2 Q3
36 911
V
= Pin 20
CC
= Pin 10
GND
74F805
74F805
20 V
CC
19
D5b
18
D5a
17
Q
5
16
D4b
15
D4a
14
4
Q
13
D3b
12
D3a
3
Q
SF00456
15 16 18 19
D4aD4bD5aD5b
Q4 Q5
14 17
SF00457
IEC/IEEE SYMBOL
74F805 1 2 4 5 7 8
12 13 15 16 18 19
September 14, 1990 853-0037 00417
2
1
3
6
9
11
14
17
SF00458
Philips Semiconductors Product specification
74F805/74F1805Hex 2-input NOR drivers
PIN CONFIGURATION
1
D4b
2
Q
5
3
D5a
4
D5b
5
V
CC
6
D0a
7
D0b
8
Q
0
9
D1a
10 11
D1b
LOGIC SYMBOL
6 7 9 1012131718
D0aD0bD1a D2aD2b D3a D3bD1b
Q0 Q1 Q2 Q3
8111416
V
= Pin 5
CC
= Pin 15
GND
74F1805
74F1805
20
D4a
19
Q
4
18
D3b
17
D3a
16
3
Q
15
GND
14
Q
2
13
D2b
12
D2a Q
1
SF00459
20 1 3 4
D4aD4bD5a D5b
Q4 Q5
2
19
SF00460
LOGIC DIAGRAM
74F805
1
D0a D0b
D1a D1b
D2a D2b
D3a D3b
D4a D4b
D5a D5b
2
4 5
7 8
12 13
15 16
18 19
V GND = Pin 10
CC
= Pin 20
3
6
9
11
14
17
FUNCTION TABLE
INPUTS OUTPUT
Dna Dnb Qn
H X L X H L
L L H
Notes to function table
H = High voltage level L = Low voltage level X = Don’t care
74F1805
6
D0a D0b
D1a D1b
D2a D2b
D3a D3b
D4a D4b
D5a D5b
7
9 10
12 13
17 18
20 1
3 4
V
= Pin 5
CC
= Pin 15
GND
O
Q
1
Q
Q
2
Q
3
4
Q
Q
5
8
Q
11
Q
14
Q
16
Q
19
Q
2
Q
SF00462
O
1
2
3
4
5
IEC/IEEE SYMBOL
6 7
9 10 12 13 17 18 20
1
3
4
September 14, 1990
74F1805
1
8
11
14
16
19
2
SF00461
3
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