Philips N74F74N, N74F74D Datasheet
INTEGRATED CIRCUITS
74F74
Dual D-type flip-flop
Product specification
Supercedes data of 1990 Oct 23
IC15 Data Handbook
1996 Mar 12
Philips Semiconductors Product specification
74F74Dual D-type flip-flop
FEA TURE
•Industrial temperature range available (–40°C to +85°C)
DESCRIPTION
The 74F74 is a dual positive edge-triggered D-type flip-flop featuring
individual data, clock, set, and reset inputs; also true and
complementary outputs. Set (SD) and reset (RD) are asynchronous
active low inputs and operate independently of the clock input. When
set and reset are inactive (high), data at the D input is transferred to
the Q and Q
must be stable just one setup time prior to the low-to-high transition of
outputs on the low-to-high transition of the clock. Data
PIN CONFIGURATION
1
D0
R
2
D0
CP0
3
S
D0
4
Q0
5
0
Q
6
GND
the clock for predictable operation. Clock triggering occurs at a
voltage level and is not directly related to the transition time of the
positive-going pulse. Following the hold time interval, data at the D
input may be changed without affecting the levels of the output.
TYPE TYPICAL f
max
TYPICAL SUPPLY CURRENT (TOTAL)
74F74 125MHz 11.5mA
ORDERING INFORMATION
ORDER CODE
DESCRIPTION
COMMERCIAL RANGE
VCC = 5V ±10%,
T
= 0°C to +70°C
amb
14-pin plastic DIP N74F74N I74F74N SOT27-1
14-pin plastic SO N74F74D I74F74D SOT108-1
INDUSTRIAL RANGE
VCC = 5V ±10%,
T
= –40°C to +85°C
amb
14
13
12
11
10
9
87
SF00045
V
CC
D1
R
D1
CP1
SD1
Q1
Q1
PKG. DWG. #
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS DESCRIPTION 74F (U.L.) HIGH/LOW LOAD VALUE HIGH/LOW
D0, D1 Data inputs 1.0/1.0 20µA/0.6mA
CP0, CP1 Clock inputs (active rising edge) 1.0/1.0 20µA/0.6mA
SD0, SD1 Set inputs (active low) 1.0/3.0 20µA/1.8mA
RD0, RD1 Reset inputs (active low) 1.0/3.0 20µA/1.8mA
Q0, Q1, Q0, Q1 Data outputs 50/33 1.0mA/20mA
NOTE: One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the low state.
LOGIC SYMBOL
3
4
1
11
10
13
VCC = Pin 14
GND = Pin 7
212
D0 D1
CP0
SD0
RD0
CP1
SD1
RD1
Q0 Q0 Q1 Q1
56 98
SF00046
IEC/IEEE SYMBOL
4
3
2
1
10
11
12
13
&
S
C1
1D
R
S
C2
2D
R
5
6
9
8
SF00047
1996 Mar 12 853 0335 16554
2
Philips Semiconductors Product specification
T
Operating free air temperature range
SYMBOL
PARAMETER
UNIT
T
O erating free air tem erature range
74F74Dual D-type flip-flop
LOGIC DIAGRAM
FUNCTION TABLE
INPUTS OUTPUTS
S
R
CP
4, 10
D
1, 13
D
3, 11
5, 9
6, 8
Q
Q
SD RD CP D Q Q
L H X X H L Asynchronous set
H L X X L H Asynchronous reset
L L X X H H Undetermined*
H H ↑ h H L Load ”1”
H H ↑ l L H Load ”0”
H H ↑ X NC NC Hold
D
VCC = Pin 14
GND = Pin 7
2, 12
SF00048
NOTES:
H = High voltage level
h = High voltage level one setup time prior to low-to-high clock
transition
L = Low voltage level
l = Low voltage level one setup time prior to low-to-high clock
transition
NC= No change from the previous setup
X = Don’t care
↑ = Low-to-high clock transition
= Not low-to-high clock transition
↑
* = This setup is unstable and will change when either set or reset
return to the high level.
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free air temperature range.)
SYMBOL
V
CC
V
IN
I
IN
V
OUT
I
OUT
amb
T
stg
Supply voltage –0.5 to +7.0 V
Input voltage –0.5 to +7.0 V
Input current –30 to +5 mA
Voltage applied to output in high output state –0.5 to V
Current applied to output in low output state 40 mA
p
p
Storage temperature range –65 to +150 °C
PARAMETER RATING UNIT
Commercial range 0 to +70 °C
Industrial range –40 to +85 °C
CC
OPERATING
MODE
V
RECOMMENDED OPERATING CONDITIONS
V
CC
V
IH
V
IL
I
Ik
I
OH
I
OL
amb
1996 Mar 12
Supply voltage 4.5 5.0 5.5 V
High-level input voltage 2.0 V
Low-level input voltage 0.8 V
Input clamp current –18 mA
High-level output current –1 mA
Low-level output current 20 mA
p
LIMITS
MIN NOM MAX
p
Commercial range 0 +70 °C
Industrial range –40 +85 °C
3
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