74ALS240A/74ALS240A–1
Octal inverter buffer (3–State)
Product specification
IC05 Data Handbook
1991 Feb 08
INTEGRATED CIRCUITS
Philips Semiconductors Product specification
74ALS240A/
74ALS240A-1
Octal inverter buffer (3-State)
2
1991 Feb 08 853–1244 01670
FEA TURES
•Octal bus interface
•3-State buffer outputs sink 24mA and source 15mA
•The -1 version sinks 48 mA
DESCRIPTION
The 74ALS240A is an octal buffer that is ideal for driving bus lines or
buffer memory address registers. The outputs are all capable of
sinking 24mA and sourcing up to 15mA, producing very good
capacitive drive characteristics. The device features two output
enables, OE
a and OEb, each controlling four of the 3-State outputs.
The 74ALS240A-1 sinks 48 mA IOL if the VCC is limited to
5.0V ±0.25V.
TYPE
TYPICAL
PROPAGATION
DELAY
TYPICAL
SUPPLY CURRENT
(TOTAL)
74ALS240A 4.5ns 15mA
74ALS240A-1 4.5ns 15mA
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10 11
12
13
14
15
16
17
18
19
20
SF00320
OEa
Ia0
Y
b0
Ia1
Y
b1
Ia2
Y
b2
Ia3
Y
b3
GND
V
CC
OEb
Y
a0
Ib0
Y
a1
Ib1
Y
a2
Ib2
Y
a3
Ib3
ORDERING INFORMA TION
ORDER CODE
DESCRIPTION
COMMERCIAL RANGE
V
CC
= 5V ±10%,
T
amb
= 0°C to +70°C
DRAWING
NUMBER
20-pin plastic DIP
74ALS240AN,
74ALS240A-1N
SOT146-1
20-pin plastic SOL
74ALS240AD,
74ALS240A-1D
SOT163-1
20-pin plastic SSOP
Type II
74ALS240ADB,
74ALS240A-1DB
SOT339-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS DESCRIPTION
74ALS (U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
Ian, Ibn Data inputs 1.0/1.0 20µA/0.1mA
OEa, OEb Output Enable inputs (active-Low) 1.0/1.0 20µA/0.1mA
Yan, Ybn Data outputs 750/240 15mA/24mA
Yan, Ybn Data outputs (-1 version) 750/480 15mA/48mA
NOTE: One (1.0) ALS unit load is defined as: 20µA in the High state and 0.1mA in the Low state.
LOGIC SYMBOL
VCC = Pin 20
GND = Pin 10
SF00321
119OEa
OEb
2 4 6 8 17 15 13 11
181614123579
Ia0 Ia1 Ia2 Ia3 Ib0 Ib1 Ib2 Ib3
Ya0 Ya1 Ya2 Ya3 Yb0 Yb1 Yb2 Yb3
IEC/IEEE SYMBOL
2D
1
2
SF00322
1
19
EN1
EN2
4
2
6
8
17
15
13
11
18
16
14
12
3
5
7
9
Philips Semiconductors Product specification
74ALS240A/
74ALS240A-1
Octal inverter buffer (3-State)
1991 Feb 08
3
LOGIC DIAGRAM
VCC = Pin 20
GND = Pin 10
SF00323
Yb0
Yb1
Y
b2
Y
b3
3
5
7
9
17
15
13
11
10
Y
a0
Ya1
Y
a2
Y
a3
18
16
14
12
2
4
6
8
1
Ib0
Ib1
Ib2
Ib3
OE
b
Ia0
Ia1
Ia2
Ia3
OE
a
FUNCTION TABLE
INPUTS OUTPUTS
OEa Ia OEb Ib Ya Yb
L L L L H H
L H L H L L
H X H X Z Z
H = High voltage level
L = Low voltage level
X = Don’t care
Z = High impedance “off” state
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free air temperature range.)
SYMBOL
PARAMETER RATING UNIT
V
CC
Supply voltage –0.5 to +7.0 V
V
IN
Input voltage –0.5 to +7.0 V
I
IN
Input current –30 to +5 mA
V
OUT
Voltage applied to output in High output state –0.5 to V
CC
V
Current applied to output in Low output state
-1 version 96 mA
T
amb
Operating free-air temperature range 0 to +70 °C
T
stg
Storage temperature range –65 to +150 °C
RECOMMENDED OPERATING CONDITIONS
V
CC
Supply voltage 4.5 5.0 5.5 V
V
IH
High-level input voltage 2.0 V
V
IL
Low-level input voltage 0.8 V
I
IK
Input clamp current –18 mA
I
OH
High-level output current –15 mA
IOLLow-level output current
-1 version 48
1
mA
T
amb
Operating free-air temperature range 0 +70 °C
NOTE:
1. The 48mA limit applies only under the condition of V
CC
= 5.0V ±5%.