1 MG99 Light path
2 Introduction
3 Overall blockdiagram
4 Power supply
5 Scan circuits
6 Small signal panel
7 CRT drive circuit
8 Interface panel
9 SIDE JACK panel
10 Audio signal part
11 Digital convergence circuit
Copyright reserved 1999 Philips Consumer Electronics B.V. Eindhoven, The
Netherlands. All rights reserved. No part of this publication may be reproduced,
stored in a retrieval system or transmitted, in any form or by any means, electronic,
mechanical, photocopying, or otherwise without the prior permission of Philips.
Published by LM 9972 Service PaCEPrinted in the NetherlandsSubject to modification5 3122 785 10053
21. MG99 Light pathMG5.1E
1.MG99 Light path
MIRROR
R+G+B
RED
GREEN
BLUE
FRESNAL
LENS
LENTICULAR
SCREEN
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The MG99 Projection TV uses three single color tubes, Red,
Green, and Blue. (Figure 1-1) The output of each tube is
projected onto a mirror where it is then reflected onto a viewing
screen. The Tubes are converged so the light from each tube
strikes the same spot on the Fresnel Lens. The Fresnel Lens
equalizes and concentrates the light to provide equal light
uniformity across the screen. The Mirror is a first surface mirror
type which has the reflective coating on the outside of the
mirror. To prevent scratching of this surface, always use a soft
cotton cloth to clean it.
Figure 1-1
Personal notes
MG5.1E1. MG99 Light path3
OUTPUT
BLACK STRIPING
LIGHT
Figure 1-2
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The Lenticular Lens Screen calumniates the light from the
Fresnel Lens. (Figure 1-2) The Lenticular Lens increases
contrast by reducing the ambient light by the use of Black
Striping. The Prismatic formation of the screen allows for nearly
3X light output as compared to a flat screen. Caution should be
used when working with the screen. Damage can easily occur
in the form of scratching, or by using certain chemical screen
cleaners which can strip the black striping from the screen. To
clean the screen, use one drop of dish washing detergent in a
small bowl of water. (approximately 2 liters) Wipe the screen
with a soft cotton cloth in the direction of the stripes.
Personal notes
41. MG99 Light pathMG5.1E
C ELEMENT LENS
CRT
LIQUID COOLANTOUTPUT LENS
The Three CRT's are driven by 30KV of high voltage and 15KV
of focus voltage. (Figure 1-3) The Tube produces a highly
concentrated light output of color. A liquid coolant of Glycol is
used to transfer heat from the face of the tube to the
surrounding mechanical assembly. The
C-element lens seals the Coupling fluid within the coupler. The
C-element lens and Coupling fluid are part of the light path and
contribute to the properties of the optical system.
Figure 1-3
Personal notes
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MG5.1E1. MG99 Light path5
1.1 MG99 LIGHT PATH PROBLEMS
1.1MG99 LIGHT PATH PROBLEMS
Look at the edges of the screen. They may be bowed inward.
PROBLEM - BOTTOM CORNERS DARK
PROBLEM - BOTTOM CORNERS COLORED
There is no problem with the set. The viewing angle is too high.
Figure 1-4
Personal notes
CL 96532100_107.eps
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61. MG99 Light pathMG5.1E
1.1 MG99 LIGHT PATH PROBLEMS
Fresnel may be reversed. Carefully remove the fresnel and
point the grooves toward the viewer.
PROBLEM - BRIGTH AND DARK LINES ON A WHITE FIELD
Figure 1-5
CL 96532100_109.eps
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Personal notes
MG5.1E1. MG99 Light path7
1.1 MG99 LIGHT PATH PROBLEMS
The Fresnel offset is pointing down. The center of the Fresnel
should be toward the top of the screen.
PROBLEM- UPPER CORNERS OF THE SCREEN DARK
Figure 1-6
CL 96532100_110.eps
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Personal notes
82. IntroductionMG5.1E
2.Introduction
The 1999 MG99 PTV chassis is designed for the European
market. It is available in a 46 inch (117 cm) and a 55 inch (140
cm) 16 by 9 aspect ratio screen sizes. Selected Video can be
displayed in either a 4 by 3, 14 by 9, or 16 by 9 aspect ratios.
The set has a viewing angle of 160 degrees.
The MG99 PTV is capable of receiving signal from PAL B/G,
PAL B/G 6OHz, PAL B/H, PAL D/K, PAL 1, PAL M, PAL N, PAL
plus, SECAM B/G, SECAM D/K, SECAM L, AND SECAM Li TV
systems. There are four composite video inputs which include
three SCART connectors, and a Side Jack panel. The systems
that can be applied to these inputs are NTSC 3.58, NTSC 4.43,
NTSC Play Back, PAL 4.43, PAL, B/G Play Back, SECAM, and
SECAM Play Back.
The set is equipped with a Frame and Line doubler to produce
a horizontal resolution greater than 800 lines. The picture
display is driven by three seven inch Red, Green, and Blue
tubes.
The Sound system is driven by a 2 times 20 watt power
amplifier. A switch in the rear of the set allows the sets internal
speakers to be driven by an external amplifier.
The following sets will be sold in Europe:
46PP9501/05U.K. and Ireland
55PP9501/05U.K. and Ireland
46PP9501/12Western Europe
55PP9501/12Western Europe
46PP9501/58Eastern Europe
55PP9501/58Eastern Europe
These units will be distributed from Philips Bundling Center in
Bruges, Belgium.
Personal notes
93. Overall blockdiagramMG5.1E
3.Overall blockdiagram
Y_CVBS
SIDE JACK
PANEL
MG99 SMALL
SIGNAL PANEL
C
L
R
Y
R
G
B
CRT
DRIVE
CIRCUIT
DELAY
SVM
MODULE
BLUE
CRT
R
G
B
GREEN
CRT
RED
CRT
AC
SWITCH
PANEL
LINE SYNC
FRAME SYNC
POWER
SUPPLY
CONV R, G, B, FB
LEFT AUDIO
RIGHT AUDIO
+5V STBY
+15V STBY
+130V
+38V
-38V
+33V
+15V
-15V
-7V7
+8V6
+5V2
INTENSITY
CONTROL
INTERFACE PANEL
AUDIO
AMPLIFIER
LINE
DRIVE
FRAME
DRIVE
HV
CIRCUIT
HV/SCAN
PANEL
SPEAKER
SWITCH
CONV R, G, B, FB
CONVERGENCE
PANEL
LINE SYNC
FRAME SYNC
FOCUS/G2
BLOCK
CONV
YOKES
FOCUS
G2
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Figure 3-1
103. Overall blockdiagramMG5.1E
There are eleven PC boards in the MG99 chassis. (Figure 3-1)
They are the Small Signal panel, Side Jack panel, Power
Supply panel, Interface panel, SVM module, Blue CRT panel,
Green CRT panel, Red CRT panel, High Voltage Scan panel,
and Convergence panel.
Whenever AC power is applied to the set and the Mains switch
is turned On, the Power Supply panel produces a 5 and a 15
volt standby supplies. When the set is turned On by the channel
up button on the Front Keyboard or the Remote Control, the
130 volt, 38 volt, -38 volt, 33 volt, 15 volt, -15 volt, -7.7 volt, 8.6
volt, and 5.2 volt supplies are switched On.
Frame and Line drive from the Small Signal panel is routed
through the Interface Panel to the Frame Drive and Line Drive
circuits on the High voltage Scan panel. The High Voltage scan
panel produces the High Voltage and Sync to the Convergence
panel. Focus voltage from the High Voltage circuit is fed to a
Focus/G2 block which provides Focus and G2 voltage to the
three CRT'S. During the Convergence adjustment mode, Red,
Green, Blue, and Fast Blanking from the Convergence Panel is
fed to the Small Signal panel to generate the adjustment grid.
The Small Signal panel selects video from the Antenna input,
one of the three Scart connectors, or the Side Jack panel. The
Small Signal panel outputs Red, Green, and Blue drive to the
CRT drive circuit located on the Interface Panel. The CRT drive
circuit then provides drive for the three CRT panels.
Personal notes
Left and Right channel audio from the Small Signal panel is
routed through the Interface Panel to the Audio Amplifier panel.
The Audio Amplifier panel has its own separate Switch Mode
power supply. The output of the Audio Amplifier is then fed to
the Speaker Switch panel which selects between the Audio
Amplifier or External Audio from a separate amplifier.
Luminance or Y from the Small Signal panel is fed to a Delay
circuit on the Interface panel before being applied to the SVM
panel. The Scan Velocity Module speeds up the beam during
light to dark transitions in the picture to provide a sharper
image.
114. Power supplyMG5.1E
4.Power supply
AC
INPUT
CIRCUIT
AC
SWITCH
PANEL
POWER
FACTOR
CORRECTION
CIRCUIT
STBY
POWER
SUPPLY
+5V STBY
+15V STBY
ON/OFF
AC power is applied to the set on the Power Supply panel.
(Figure 4-1) It is then fed to the Mains switch on the AC switch
panel located on the front of the set. It is then fed back to the
Power Supply panel and to the Power Factor Correction circuit.
If the AC mains is 240 volts, the output of the Power Factor
correction circuit is approximately 329 volts DC in standby and
350 volts DC when the set is turned On. The Power Factor
correction circuit is turned Off during standby. This is a "HOT"
chassis. When troubleshooting this or any power supply,
always use an isolation transformer.
The Standby Power supply produces a 5 and a 15 volt supplies.
It also provides operating voltage for the Power Factor
Correction and the Audio Amplifier power supply. The Power
Factor correction circuit is turned Off when the set is in the
Standby mode.
The Main Switch Mode Power supply produces a 130 volt, a 33
volt, a 35 volt, a -35 volt, a 15 volt, and a
-15 volt supply. The Main SMPS and the Power Factor
Correction Circuit is switched On by a Low from the Small
Signal panel.
Figure 4-1
MAIN
SMPS
POWER
SUPPLY
+15V
+15V
-15V
5V2
REG
8V6
REG
-7V7
REG
Personal notes
+130V
+33V
+35V
-35V
+15V
-15V
+5V2
+8V6
-7V7
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MG5.1E4. Power supply12
TO AC SW BD
1221
1000
5A
2000
680n
3011
The applied AC voltage is fed to a 5 amp fuse and then to the
Mains switch on the AC switch panel. (Figure 4-2) The AC
voltage is fed to transistor 7000 and then to the Small Signal
panel for clock synchronization.
Figure 4-2
4
5001
1
3004
3.3M
3005
3.3M
3006
470K
Personal notes
7000
3007
6.8K
+5VSTBY
3008
10K
50_60HZ
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The Standby Supply produces the 5 volt and 15 volt standby
supplies. (Figure 4-3) The output of the Power Factor correction
circuit PFCOUT is applied to Pin 5 of 7211 through Pins 2 and
4 of the switching transformer 5202. When the supply voltage
is first applied, voltage through the internal startup resistor Rs
is applied to capacitor 2283 via Pin 4. When the capacitor
charges to 5.7 volts, the internal oscillator switches On driving
the internal FET switch. When the voltage across capacitor
2283 drops below 4.7 volts, the IC turns Off. This cycle repeats
until the 5 volt standby supply turns Shunt Regulator 6205 On.
The supply voltage for the IC is then supplied to Pin 4 through
7213. Operating voltage to Pin 5 of 7213, the Audio Amplifier
power supply, and the Power Factor correction circuit is
supplied by Pin 5 of 5202. During normal operation, the 5 volt
standby source is monitored by the Shunt Regulator 6205. If
the 5 volt supply should increase, the Shut Regulator will cause
more current to flow through the LED inside the opto-isolator
7213. This will reduce the resistance of the transistor inside
7213. As a result, more current will flow through the Sensing
resistor inside 7211, which will reduce the On time of the FET
inside the IC. This will reduce the output voltage to the correct
level. This supply operates at approximately 100 KHz.
MG5.1E4. Power supply13
RESET
+5VSTBY
SOURCE
2282
1uF
5234
3245
2210
7209
RESET
3222
+15VSTBY
2270
6204
1098
2
6200
6207
22uF
3240
1K5
100uF
4
6236
1K
39K
6231
3247
180
3246
2K4
2213
1000uF
+5VSTBY
2208
100
2226
3223
22n
3239
2K4
3244
33K
47
1
6205
SHUT
REGULATOR
2
7213
4
5
3287
470
5
CONTROL
5214
+5VSTBY
3215
5233
5211
7204
3241
1K
PFC
1
6K8
7208
GND_C
6201
8.2V
2209
100uF
3230
1K5
2211
.1
3216
6235
2269
100
7
5202
1
5
GND_C
2228
100
10
3213
10K
5
GND_C
4
7206
2
7205
+5VSTBY
3212
10K
7214
3289
3214
10K
ON_OFF
100K
2284
3288
10n
10K
PFCOUT
Figure 4-3
2206
GND_C
220uF
S
R
7211
INTERNAL
4
SUPPLY
PWM
-
5.7V
4.7V
S
R
5.7V
GND_C
1,2,3,7,8
2283
CL 96532100_084.eps
011299
GND_C
47uF
144. Power supplyMG5.1E
To troubleshoot the Standby Supply, first check the supply
voltage on Pin 5 of 7211. If there is no secondary voltage and
7211 is working correctly, startup pulses should be seen at Pin
5 of the IC. If the IC is pulsing and there is no secondary
voltage, there is a problem with the outputs of 5202 or with the
feedback circuit. If 7211 is not pulsing, either the IC or capacitor
2283 is defective.
When the set is turned On, transistor 7214 will turn Off turning
7205 On. This will turn the Optoisolator 7206 On turning
transistor 7204 On, switching the operating voltage to the
Power Factor Correction circuit. It also switches the operating
voltage to the power supply on the Audio Amplifier panel on the
line labeled "CONTROL".
Personal notes
MG5.1E4. Power supply15
4.1 European power factor correction circuit
4.1European power factor correction circuit
AC IN
AC CURRENT
CAPACITOR
CHARGE
VOLTAGE
BRIDGE
AB
The input to most switching power supplies consists of a bridge
rectifier and a large electrolytic capacitor. (Figure 4-4) When
AC power is applied, the Capacitor will charge to approximately
1.4 times the RMS value of the applied AC voltage. This type of
supply does not draw current from the AC power source
through out the entire AC cycle. When the capacitor charge falls
to point "A", the instantaneous value of the AC voltage exceeds
the charge of the capacitor. The bridge diodes are then forward
biased, causing current to flow from the AC source. Current will
continue to flow from the AC line until the AC sinusoidal voltage
reaches its peak at Point "B". At this point, the charge on the
capacitor will exceed the AC line voltage reversing the bridge
diodes. This results in an AC current waveform that is narrow
and distorted compared to the AC voltage waveform. Non
sinusoidal waveforms have a high harmonic content, with
excessive peaks which results in a low power factor of 0.5 to
0.6. Power Factor is a ratio of real power divided by apparent
power. Excessive harmonics and peak currents reduce the
efficiency of the power distribution system.
The MG5.1 Projection TV without Power Factor correction has
a high harmonic content of 85 percent, creating a Power Factor
of 0.5. Current spikes of 7 amps will also be created in the AC
supply. With the Power Factor correction circuit, the peak
current is limited to 1.58 amps, with the harmonic content being
reduced to 4.5 percent. The Power Factor is increased to 0.99.
The ideal Power Factor is one, which occurs when the current
is sinusoidal and in phase with the voltage. The European
standard IEC1000 limits the current harmonic content of
equipment supplied by the AC Mains.
Figure 4-4
CAP
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Personal notes
164. Power supplyMG5.1E
4.1 European power factor correction circuit
AC INPUT
BRIDGE
CURRENT SENSE
REGULATOR
DRIVE
7102
The MG5.1 Power Factor correction circuit uses a Boost
regulator to smooth out the current draw from the AC line
improving the Power Factor to 0.99, which is accomplished by
drawing current from the AC source throughout the entire AC
cycle making the current waveform sinusoidal. (figure 4-5) Input
to the module is connected to the AC Mains. The output
supplies are approximately 350 volts DC to the Main and
Standby Switched mode Power Supply circuit. The Boost
Regulator circuit produces a higher output voltage than the
input voltage. The regulator drive circuit compares 6103's
output voltage, the input voltage from the bridge, and the
voltage across the current sensing resistors to control the On
time of 7104. This will maintain the output voltage at 350 volts
DC and limit the input current to acceptable levels. When 7104
is On, current flow through 5109 stores energy in the choke.
When 7104 turns Off, 5109 reverses polarity and charges 2110.
Using this type of regulation, current is drawn from the AC
source throughout the entire cycle, keeping the current
waveform sinusoidal. When the AC cycle is at its low point,
7104 is on for a longer period of time. When the AC voltage is
at its peak, 7104 is on for a shorter time to store the same
amount of energy in 5109 to maintain the output voltage at 350
volts.
Figure 4-5
5109
5
3
6103
7104
2110
350V DC OUT
CL 96532100_086.eps
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If the Boost regulator circuit should become inoperative, due to
a loss of regulator drive, operating voltage is still applied to the
set. The supply voltage to the switching supplies will drop from
350 volt to approximately 329 volts depending on the Mains
voltage. Since the customer would not detect a failure, the
operation of this circuit should be checked after any repair of
the set.
MG5.1E4. Power supply17
4.2Full power factor correction circuit
350V DC OUT
PFCOUT
(329V)
GND_C
2105
3105
470p
5106
5103
6R8
6103
5105
35
5109
GND_B
2107
1n
3126
3M3
GND_BGND_B
2118
47K
1uF
3125
GND_B
1K
3119
GND_B
2120
7104
3117
220p
10K
GND_B
GND_B
PFC
2113
3115
100uF
47
GND_B
6104
3114
5108
19V
(25V)
47
20
15
LATCH
LOGIC
1.28
-
+
R
OUTPUT
Q
S
VCC
19
16
2110
470uF
5107
13
15
OVP
V REF
5.11 V
4.3V
3
3134
470K
3108
3M3
3110
39K
3109
47K
11
5006
3010
5003
2R2
1222-1
5005
3120
5K6
0.23V
IPK
5.11V
2
5.45V
5
9
8
5.45V5.11V
13
14
3127
3118
390
2116
2n2
18K
GND_B
3128
1K8
3123
1K8
2115
.33
3124
330K
CL 96532100_087.eps
191199
+
-
2114
R490
1M
C485
C486
R493
1n5
3121
33K
3111
1M
.22
.22
INST LINE VOLTAGE
33K
STARTUP VOLTAGE
FOR FULL
POWER SECTION
6000
0.36V MAX
3133
0R1
3132
0R1
R491
5004
5007
3131
3130
FROM AC
SW BOARD
1222-4
0R1
0R1
GND_B
GND_HA
330K
OSCILLATOR
1718
7102
4
7
1.5-5.5V
GILBERTS
6
5.11V
+
MULTIPLIER
-
COMPARATOR
CURRENT
AMPLIFIER
-
+
Figure 4-6
184. Power supplyMG5.1E
4.2 Full power factor correction circuit
An explanation of the full Power Factor Correction circuit is now
given. (Figure 4-6) The Power Factor Correction circuit is a
fixed-frequency Pulse-Width modulated boost regulator power
supply. Operating frequency is approximately 60 kilohertz. Due
to the low power consumption of the set during the standby
mode, the Power Factor Correction circuit is turned Off. The
operating voltage, PFC, on Pin 19 of 7102 is turned Off. When
the set is turned On, the operating voltage is switched to Pin 19
of 7102. Once the circuit is in operation, a 5.11 volt internal
reference voltage on Pin 11 is applied to Pin 6 of the IC. Output
of the bridge rectifier is fed to the IC on Pins 4 and 7. Feedback
from the output circuit is fed to Pin 14 where it is multiplied with
the Bridge output. Inputs to the Gilberts Multiplier produce an
error signal that is fed to the current amplifier. The Gilberts
Multiplier multiplies the bridge output voltage with the output
voltage on D438. The 5.11 volt reference is used to provide a
clamping reference for the other inputs. Input current is
sampled by resistors 3130, 3131, 3132, and 3133. This sample
is added to the error signal from the Multiplier going into Pin 8.
The error signal is amplified and then compared to the oscillator
ramp to determine the reset point for the latch. When the
oscillator goes low, the latch is set making output "Q" High. With
the other inputs to the AND gate High, Pin 20 then goes High,
turning 7104 On. By comparing the input and output voltage,
the On time of 7104 is increased when the AC voltage is at its
low point to maintain the 350 volt DC output. When the AC input
voltage is at its peak, 7104 is On for a shorter period.
Personal notes
The IPK circuit connected to Pin 2 is an overcurrent protection
circuit which resets the latch if there is excessive current
through the return resistors. This will reduce the On time of
7104. In a like manner, the OVP, Over Voltage Protection,
circuit will reset the latch removing drive to Pin 20 is the output
voltage exceeds 392 volts.
To check the operation of this circuit when the set is operating
correctly, check the PFCOUT voltage. This voltage should be
approximately 350 volts. If the output voltage is approximately
329 volts, this circuit is not working. Check the operating
voltage on Pin 19 of 7102. Then check the output drive on Pin
20 and at the gate of 7104. There are three grounds on the Hot
side of the supply. Ground HA is connected directly to the
bridge 6000. Ground "B" is the ground for the Power Factor
Correction circuit. If the current sensing resistors 3130 through
3133 should open, this would remove the ground for all the
switching supplies and make the set inoperative. Ground "C" is
the ground for the switching supplies. When ground "B" passes
through the choke 5106, it becomes ground "C".
Startup up voltage for the Full Power supply is taken from the
neutral side of the AC mains.
MG5.1E4. Power supply19
4.3Full power supply
+15V
2326
3331
3330
22K
22K
2312
+33V
470P
5305
5304
+130V
14
4
PFOUT
2314
6305
2350
2313
22uF
470uF
470P
6
3446
3346
12
470R
3345
6315
10
470R
8
+35V
2318
100n
2317
1000u
5307
2316
1000u
2315
5306 6306
1516171819
3307
33R
2
470p
7301
6304
5302
100n
-15V
2332
-35V
5314
100n
1000u
1000uF
2319
1V
+
B
FLIP
470p
3308
6302
3310
2307
-
FLOP
3309
1302
0R47
0R1
330R
4A
63095313
202122
10
11
GND_C
GND_C
6303
2311
1N
2308
R
2331
2330
2319
GND_C
2322
2321
2321
63075308
3305
10K
GND_C
3306
10R
3
4
7
A
Q
S
100n
100n
470u
2327
470u
3329
330R
2328
3319
12
3328
1u
100R
3326
4K7
1
7303
VCC
5
6301
2302
3316
1K
GND_C
15K
GND_C
3318
150K
VCC
GND_C
GND_C
2324
14
-
5312
2m2
2323
470p
3315
15K
2.5V
+
C
5312
2325
100n
1301
4A
5310
6308
470p
3447
2.7K
3317
15K
5
13
FB
7302
3324
150K
3323
2K7
+130V
2334
3325
10K
3327
100R
2303
STARTUP
3300
100uF
22K
3461
27K
GND_C
2333
24
7303
+5VSTBY
3322
3344
7309
3304
1K
7300
1305
+5VSTBY
470R
130V
10K
ADJ
ON_OFF
3343
3303
100K
2349
10K
6313
3321
SOFT
UNDER
2346
100N
VCC
START
VOLTAGE
LOCKOUT
9.4/14.5
18V
1
8K2
6
17V
3320
OVERVOLTAGE
8K2
VCC
GND-C
DEMAG
VCC
8
OSCILLATORSTANDBY
REFERENCE
SECTION
9
FROM
STBY
SYNC
2442
1N
10
11
2443
1uF
15
16
3313
10K
CL 96532100_088.eps
011299
Figure 4-7
204. Power supplyMG5.1E
4.3 Full power supply
When the set is turned On, the Main Switch Mode power supply
is turned On. (Figure 4-7) This supply produces the +130 volt,
+33 volt, +35 volt, -35 volt, -15 volt, and +15 volt supplies.
When the On/Off line goes Low, transistor 7309 is turned Off,
turning transistor 7300 On. This switches relay 1305 On.
Startup voltage from the neutral side of the AC mains will
charge capacitor 2303 to 14.5 volts which will overcome the
undervoltage lockout of IC 7302. After the Soft Start capacitor
2443 charges, the oscillator inside the IC will turn On. Each
cycle of the oscillator will set the flip-flop which will cause Pin 3
to go High. This will turn the FET switch 7301 On. Voltage is
applied to the Drain of 7301 through Pins 4 and 8 of 5300 from
the Power Factor Correction circuit. Current through sensing
resistors 3308 and 3309 will develop a voltage which is applied
to comparator "B" connected to Pin 7. When the voltage on Pin
7 reaches the reference voltage on the inverting input, the FlipFlop will be reset. The voltage on the inverting side of
comparator "B" is limited to 1 volt. Therefore, the ramp voltage
on Pin 7 will not exceed 1 volt. The circuit will continue to
operate until the charge on capacitor 2303 falls below 9.4 volts
shutting the IC Off. Each time 7301 is turned On, energy is
stored in transformer 5300. Voltage from the Hot secondary on
Pin 10 is rectified by 6301. When the output of this circuit has
sufficient energy to maintain 2303 above 9.4 volts, the IC then
operates in steady state.
Personal notes
When IC 7302 develops a normal steady state operation, the
130 volt supply is sampled by resistors 3324, 3323, and 3322.
This sample voltage is then sent to Shunt regulator 7303 which
drives the feedback optoisolator 7303. The feedback voltage on
Pin 14 is then compared with an internal 2.5 volt reference by
comparator "C". Comparator "C" then sets the reference
voltage on the inverting side of comparator "B" to control the On
time of the drive at Pin 3. If the voltage on Pin 14 increases due
to the 130 volt supply increasing, the On time of the pulse on
Pin 3 will be reduced. If the 130 volt supply decreases, the
voltage on Pln 14 would decrease, causing the On time of the
pulse on Pin 3 to increase. This is used to keep the 130 volt
supply at the correct voltage. Variable resistor 3322 is used to
adjust the 130 volt supply to the correct level.
The overvoltage protection circuit of the IC will shut the IC down
if the VCC level on Pin 1 exceeds 17 volts.
To troubleshoot this circuit, first check the On/Off line from the
Small Signal Panel to ensure that it is going Low. Then check
for the presence of startup voltage on Pin 1 of the regulator IC
7302. If the IC is working correctly, this voltage will be changing
from 9.4 to 14.5 volts. If the startup voltage is not present, check
the startup resistor 3300 and the bridge rectifier. If the voltage
on Pin 1 is changing, check the drive signal on Pin3. Then
check for signal on the gate and drain of 7301. An excessive
load on the secondary, a short on the 130 volt line for example,
would cause the supply to pulse with little or no voltage on the
secondary.
MG5.1E4. Power supply21
191199
TO SCAN
HIGH VOLTAGE
TO
AUDIO
AMPLIFIER
TO
CONVERGENCE
PANEL
PANEL
CL 96532100_052.eps
TO
INTERFACE
PANEL
11
50/60 HZ
10
STBY RTN
9
+5V STBY
-7V7
8
SSGND
7
6
SS GND
5
5V
+8V6
4
3
+15V
2
130V RTN
+130V
1
1202
160V DCNC160V RTN
1
CONTROL
+15V
-35V
-35V
RTN
RTN
+35V
+35V
-15V
15V RTN
+15V
+15V
+15V RTN
+5V STBY
STBY RTN
ON/OFF
NC
2
3
4
1203127612121205
1
234
1
56789
2
1210
4
3
POWER
SUPPLY
567
PANEL
8
9
10
1222
5
4
6
1221
1
2
3
+130V
4
+130V
+130V RTN
213
1220
+130V RTN
SS GND
SS GND
+5V2
+5V2
TO
MG99
+8V6
5V STBY
SMALL
SIGNAL
PANEL
+33V
+15V
ON/OFF
Figure 4-8
AC SW BOARD
224. Power supplyMG5.1E
4.3 Full power supply
The Power Factor Correction, Standby, and Full Power circuits
are all located on the Power Supply panel. (Figure 4-8) The
Standby supply feeds the 5 volt standby supply to the Small
Signal panel via Pin 5 of connector 121 0. The Standby voltage
is present whenever power is applied to the set and the Mains
switch is On. The On/Off Command from the Small Signal panel
is fed to the Power Supply on Pin 8 of connector 121 0. This Pin
will measure 5 volts when the set is in the standby mode and 0
volts when the set is turned On. The +33, +15, +8.6, and +5.2
volt supplies to the Small Signal panel are developed after the
set is turned On.
The +130, +15, +8.6, -7.7, and 5 volt standby voltages are fed
to the Interface panel on connector 1202. The 50/60 Hz signal
is a sync signal from the AC power mains which is used to
provide sync to the clock circuit on the Small Signal panel.
350 volts from the Power Factor Correction circuit is fed to the
Audio Amplifier on connector 1203. The Control line on Pin 4 of
1203 provides the operating voltage for the switching power
supply on the Audio Amplifier panel. This Control voltage is
switched Off when the set is in the Standby mode.
Connector 1276 routes power to the Convergence panel while
connectors 1212 and 1211 feeds power to the Scan High
Voltage panel.
Personal notes
MG5.1E4. Power supply23
4.3 Full power supply
AC INPUT
BRIDGE
CURRENT SENSE
REGULATOR
DRIVE
7102
The +15 volt source is fed to transistor 7308. (Figure 4-9) This
is a Buck Switch regulator circuit which produces the 5.2 volt
source. Transistor 7308 is turned On and Off by the Switching
regulator IC 7307. To maintain the 5.2 volt source at the correct
voltage, the output is sampled and fed to Pin 5 of the IC. The
voltage on Pin 5 is then compared with an internal reference.
This drives the Pulse Width Modulator which controls the On
time of 7308.
Figure 4-9
5109
5
3
6103
7104
Personal notes
2110
350V DC OUT
CL 96532100_086.eps
121199
The -15 volt source is fed to linear regulator 7305 to produce
the -7.7 volt source. The +15 volt source is also fed to the 8.6
volt regulator 7306 to develop the 8.6 volt source.
245. SCAN CIRCUITSMG5.1E
5.SCAN CI RCUITS 5.1Lin e Drive
RED
YOK E
GREEN
YOK E
BLUE
5801
10
2825
470p
9
FIL
3818
1R
8
3865
+240V
+13V
6802
12
0R47
2815
+130V
7
2827
2824
13
680p
1000u
3819
3815
3828
68K
2816
68K
1R
470p
14
6
0R27
6801
-13V
6803
5
2814
3825
2826
1000u
2850
+130V
68u
68K
470p
3867
3
3823
1R
68K
15
+28V
A
6850
16
1
2851
100u
2899
4n7
7802
2822
2818
3821
2817
430n
820p
470R
3n3
6806
2811
330p
3814
33R
2834
2819
5805
430n
5804
27n
6808
5803
2805
3681
100n
3452
2K2
YOK E
4R7
3805
+15V
100R
2573
3590
3453
2n2
100K
4R7
2u2
2452
7552
3457
2K2
3454
7553
4R7
7551
3591
3571
3455
3456
2K2
2K2
4R7
100R
3458
2K2
2820
A
4u7
3834
1R
3835
3K3
2836
6830
2837
LV
3806
2838
3837
1K
1n
12K
1
4
5802
6
8
1n
3839
330K
7830
2839
10n
10u
3812
100K
+130V
2809
100n
3811
3810
2810
2898
2K2
2K2
330u
220U
2806
1n
2807
4
1
3808
100n
3813
3
2
2K2
3807
1R
5800
330R
7803
3829
7801
3809
3830
15R
1509-1
330R
470R
+15V
HDRV
LINE
DRIVE
Figure 5-1
+28V
2801
100n
3803
100R
3840
2800
1M
1u
E_W
7800
3802
3866
3801
68K
18K
27K
1507-4
H_PUL
3800
3890
100R
1K5
1511-1
HFB
3817
470R
HPUL
+15V
1509-7
FBSO
3836
270R
+28V
3831
3832
3K3
7804
3833
100R
HPUL_BLNK
CL 96532100_089.eps
68K
2804
10u
121199
MG5.1E5. SCAN CIRCUITS25
5.1 Line Drive
Line Drive from the Small Signal panel is fed to connector 1509
Pin 1 and then to buffer transistor 7803. (Figure 5-1) Transistor
7803 then drives the Line driver transistor 7801. Line drive is
then fed to the Line output transistor 7802. Transistor 7802
drives the three Line Yokes and the Scan transformer 5801.
The Scan transformer produces a 240 volt supply for the CRT
drive circuits, a Filament drive for the CRT'S, a plus and minus
13 volt supply for the Frame drive circuit. It also produces a 28
volt supply for the beam limiter circuit in the High Voltage circuit.
The output of the Line Output transistor 7802 is also fed to
buffer transistors 7800 and 7804 to produce a Line Sync pulse
(HPUL) and Line feedback pulses to the Small Signal panel (HPUL and HFB). The output of transistor 7804 also produces a
Line Blanking pulse (HPUL-BLNK).
Drive for geometry correction from the Small Signal panel on
the E-W line drives transistors 7553, 7551, and 7552. This
circuit drives the return side of the Line Yokes to provide
Horizontal corrections to the geometry. Geometry correction
drive, E-W, is also fed to transistor 7830 which produces drive
for the Dynamic Focus, LV. The Line component to the
Dynamic Focus is added in transformer 5802.
Personal notes
The Line Sync (HPUL) is used to synchronize the High Voltage
drive. If this pulse is missing, the High Voltage circuit will shut
down. A loss of drive to the Line Yokes will cause the High
Voltage to shut down.
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