Philips DP-IF8000 Service Manual

US Model

Canadian Model

AEP Model

SERVICE MANUAL

DIGITAL SURROUND PROCESSOR

SPECIFICATIONS

DP-IF8000

Ver 1.0 2002.02

Sony Corporation

Parsonal Audio Company
Published by Sony Engineering Corporation

9-873-528-01

2002B0200-1
© 2002. 02

• Manufactured under license from Dolby Laboratories and Digital
Theater Systems,Inc.
“Dolby ”,“AC-3 ”,“Pro Logic ”,the “AAC ” logo and the double-D
symbol ; are trademarks of Dolby Laboratories.
“DTS ” and “DTS VIRTUAL ” are trademarks of Digital Theater
Systems, Inc.

• DP-IF8000 is the component model block one in

MDR-DS8000.

COMPONENT MODEL NAME FOR MDR-DS8000

DIGITAL SURROUND PROCESSOR DP-IF8000
CORDLESS STEREO HEADPHONES MDR-IF8000

Decoder functions Dolby Digital

Dolby Pro Logic II
DTS
DTS-ES 6.1ch
MPEG-2 AAC

Virtual sound function OFF

Virtual front

Virtual surround 5.1 & 6.1
Modulation System DQPSK
Secondary carrier wave frequency

4.5 MHz
Transmission distance Approx. 10 m to the front
Transmission range 12 – 24,000 Hz
Distortion rate 1% or less (1 kHz)
Audio inputs Optical input

(rectangular-type) × 2
Analogue input
(pin jack left/right) × 1

Power requirements DC 9 V (from the supplied AC

power adaptor)

Dimensions (w/h/d) Approx. 85 × 190 × 200mm (3 3 /8×

7 1 /2 × 7 1 /8 inch)

Mass Approx.1.0 kg(2 lb 30 oz)

Design and specifications are subject to change without notice.

2

DP-IF8000

SAFETY-RELATED COMPONENT WARNING!!

COMPONENTS IDENTIFIED BY MARK 0 OR DOTTED LINE WITH
MARK 0 ON THE SCHEMATIC DIAGRAMS AND IN THE PARTS
LIST ARE CRITICAL TO SAFE OPERATION. REPLACE THESE
COMPONENTS WITH SONY PARTS WHOSE P ART NUMBERS AP­PEAR AS SHOWN IN THIS MANUAL OR IN SUPPLEMENTS PUB­LISHED BY SONY .

ATTENTION AU COMPOSANT AY ANT RAPPORT

À LA SÉCURITÉ!
LES COMPOSANTS IDENTIFÉS P AR UNE MARQUE 0 SUR LES
DIAGRAMMES SCHÉMA TIQUES ET LA LISTE DES PIÈCES SONT
CRITIQUES POUR LA SÉCURITÉ DE FONCTIONNEMENT. NE
REMPLACER CES COMPOSANTS QUE PAR DES PIÈSES SONY
DONT LES NUMÉROS SONT DONNÉS DANS CE MANUEL OU
DANS LES SUPPÉMENTS PUBLIÉS PAR SONY.

Notes on chip component replacement

• Never reuse a disconnected chip component.

• Notice that the minus side of a tantalum capacitor may be

damaged by heat.

Flexible Circuit Board Repairing

• Keep the temperature of soldering iron around 270˚C during

repairing.

• Do not touch the soldering iron on the same conductor of the

circuit board (within 3 times).

• Be careful not to apply force on the conductor when soldering

or unsoldering.

Flexible Circuit Board Repairing

TABLE OF CONTENTS

1. GENERAL .......................................................................... 2

2. SERVICING NOTES ........................................................ 3

3. DISASSEMBLY

3-1. Cover...................................................................................9

3-2. Chassis (processor), "Panel ASSY, Front" .......................... 9

3-3. TX Board .......................................................................... 10

3-4. LED Board, AMP Board ................................................... 10

4. TEST MODE ......................................................................11

5. ELCT ORICAL AJUSTMENT.........................................12

6. DIAGRAMS

6-1. Explanation of IC Terminal ............................................... 13

6-2. Block Diagram (1/2) – ....................................................... 18

6-3. Block Diagram (2/2) – ....................................................... 19

6-4. Printing Wirning Board – LED Section –.......................... 20

6-5. Schematic Diagram – LED Section – ................................ 21

6-6. Printed Wiring Board – TX Section – ................................ 22

6-7. Schematic Diagram – TX Section (1/4) –.......................... 23

6-8. Schematic Diagram – TX Section (2/4) –.......................... 24

6-9. Schematic Diagram – TX Section (3/4) –.......................... 25

6-10. Schematic Diagram – TX Section (4/4) – ......................... 26

7. EXPLODED VIEWS........................................................29

8. ELECTRICAL PARTS LIST ........................................30

SECTION 1

GENERAL

This section is extracted from
instruction manual.

Front Panel of the
Processor

1 DIGITAL 1,2 input indicator

ANALOG input indicator
INPUT button

Press to select the input source (DIGITAL
1/DIGITAL 2/ANALOG).

2 POWER indicator

This indicator lights green when you
turn on the processor.

POWER switch

Press to turn on and off the processor.

3 CINEMA 1,2 indicator

MUSIC indicator
EFFECT button (see page 20

for

details)

Press to select the sound field (CINEMA
1/CINEMA 2/MUSIC).

4 Decode mode indicator (see page

19 for details)

5 PHONES jack (see page 20, 24 for

details)

Connect your headphones to this jack.
Connect the MDR-F1 headphone (sold
separately) for optimum surround effect.

6 PHONES — LEVEL control

Turn to adjust the volume of the
headphones (sold separately) connected
to the PHONES jack.

7 OUTPUT button

Press to select the output mode (OFF/
VIRTUAL FRONT/VIRTUAL
SURROUND).

8 Infrared emitter

Set the emitter in a position so that there
is a straight, unobstructed path to the
sensor.

PHONES LEVEL

MIN MAX

VIRTUAL

OUTPUT

L

POWER

DIGITAL 2
ANALOG

DIGITAL 1

INPUT

CINEMA 1
CINEMA 2

MUSIC

EFFECT

DECODE MODE

DOLBY DIGITAL
DOLBY PRO LOGIC II
DTS

C

R

LS RS

CS

MPEG-2 AAC

1

6

7

8

5

123

Rear Panel of the
Processor

1 DIGITAL IN 1,2 jack (see page 13 for

details)

Connect a DVD player, Digital TV,
Digital Broadcasting Satellite Receiver,
LD player, or other digital component
(sold separately) to this jack.

2 ATT (attenuator) switch

Set this switch to 0dB when the volume is
too low at analogue input. Normally, this
switch should be set to –8dB.

3 LINE IN jack (see page 14 for details)

Connect the audio output jack on audio/
video equipment (sold separately), such
as a video cassette player or TV, to this
jack.

4 DC IN jack

Connect the supplied AC power adaptor
to this jack. (Be sure to use the supplied
AC power adaptor. Using products with
different plug polarity or other
characteristics can cause a malfunction.)

12

34

LOCA TING THE CONTROLS

3

DP-IF8000

SECTION 2

SERVICING NOTES

DIAT
(DIGITAL INFRARED AUDIO TRANSMISSION)

High quality media such as DVD and digital broadcasts are currently going through a phase of explosive expansion. To convey these kinds
of high quality media to listeners with no loss in sound nuance or quality, a new technology called DIAT has been developed using the MDR­DS8000 to transmit these digital audio signals by infrared without harmful data compression.

DIAT technology allows transmitting digital audio signals without data compression on a portion of the sub-carrier frequency bandwidth
allotted to distributing high-fidelity audio by the IEC (International Electrotechnical Commission) and JEIT A (Japan Electronic Information
Technical Association). The transmission quality is equal to or better than that on compact discs (CD). (Fig. 2-6)

L

2

3

46

Hi-Fi audio data transmission bandwidth

(2 to 6 MHz)

Analog transmission

Digital transmission (DIAT)

[MHz]

R

5

Fig. 2-6 Signal spectrum for digital infrared transmission

[Reference Data]
Sub-carrier frequency : 4.5 MHz
Occupied bandwidth : 2.5 MHz (approx.)
Data rate : 3 Mbps (approx.)
Modulation method : DQPSK
(differential quadrature phase shift keying)
Transmit error correction : Reed Solomon coding

DIGITAL INFRARED AUDIO TRANSMISSION

Along with developing a custom IC, the number of light-emitter elements were doubled (to 16) and light-receiver elements increased 6-fold
(to 24) to achieve a carrier-to-noise signal ratio well capable of transmitting wide-band digital signals. Using digital transmission eliminates
the transmission hiss noise heard in conventional analog broadcasts and allows listeners to enjoy hearing even small sounds.

4

DP-IF8000

1. STATUS TRANSITION DRAWING

1.1 Processor

ALL POWER OFF

(LEDs all off)

TEST

MODE

POWER OFF

(LEDs all light up)

INPUT

CHANGE

OUTPUT
CHANGE

EFFECT

CHANGE

Unplug the AC adapter

POWER keyPOWER key

Press EFFECT key
while in Virtual output
mode

INPUT key

OUTPUT key

After operation change

After operation change

After operation
change

OFF out put

(L-HLch, L-HRch lights up)

Virtual front output

(L-FLch, L-FRch, L-VIRTUAL

lights up)

5.1ch virtual output

(L-FLch, L-FCch, L-FRch

L-SLch, L-SRch, L-VIRTUAL

lights up)

6.1ch virtual output

(L-FLch, L-FCch, L-FRch

L-SLch, L-SCch, L-SRch,

L-VIRTUAL lights up)

CINEMA1 sound effect
(L-CINEMA1 lights up)

CINEMA2 sound effect
(L-CINEMA2 lights up)

MUSIC sound effect
(L-MUSIC lights up)

Digital input 1 enabled

(L-DIGITAL 1 lights up)

Digital input 2 enabled

(L-DIGITAL 2 lights up)

Analog input enabled

(L-ANALOG lights up)

Unplug the AC
adapter

Unplug the AC adapter

Connect the AC adapter

Connect AC adapter while simultaneously
pressing POWER & INPUT

POWER ON

(operation LED lights up)

1.2 Headphones

POWER OFF

(L-POWER off)

POWER ON

(L-POWER lights up)

EFFECT

CHANGE

EFFECT

CHANGE

• Virtual output (head trcking on)

• Virtual output (head trcking off)

LOW BATTERY

operation

Place headphones on head.

When LOW BATTERY

is detected

When virtual output (processor output)
is changed or S-HT changed while S-HT
is enabled.

Remove headphones

When switched to stereo-thru
output (processor output)

Receive error

operation

Processor infrared ray output to
OFF at transmit limit or cutoff.

After operation change

After operation change

Through output

(head tracking off)

5

DP-IF8000

2. WAVEFORMS & TIMING OF MAIN SIGNAL LINES

2.1 Processor

2.1.1 Audio system

Note: Switch to Digital Input mode by connecting the optical cable

to DIGITAL IN 1 or 2, and pressing the INPUT key.
Switch to Analog Input mode by connecting the audio cable
to LINE IN, and pressing the INPUT key.

• Master clock
MCK (IC12-104pin) : 12.288 MHz (fixed)
MCKADDA (IC5-6pin) : 12.288 MHz (fixed) when in analog
input mode;
When in Digital Input mode, 12.288 MHz for an input source
sampling frequency of 48 kHz.

11.298 MHz for an input sampling frequency of 44.1 kHz; 8.192
MHz for an input sampling frequency of 32 kHz

• DIR-DECODER period
Check LRCK (IC11-12pin), BCK (IC 11-14pin), INDATA (IC11­10pin).
At power-ON, and in Digital Input mode, any playback source is
okay.
Monitor view is shown in Fig. 1 and detailed timing is shown in
Fig. 2.

Fig 2

LRCK
BCK
INDATA

16 bit

1 bit offset (I2S format)

Fig1

LRCK
BCK
INDATA

Lch Rch

Note 1: Example shows 44.1 kHz for LRCK; 48 kHz and

32 kHz are also used.

Fig 3

LRCK
BCK
INDATA

Lch

Rch

Note 2: LRCK is fixed at 48 kHz.

• ACD-DECODER period
Check LRCK (IC11-12pin), BCK(IC 11-14pin), INDATA (IC11­10pin).
At power-ON, and in Digital Input mode, any playback source is
okay.
Monitor view is shown in Fig. 3 and detailed timing is shown in
Fig. 4.

Fig 4

LRCK
BCK
INDATA

24 bit

1 bit offset (I2S format)

Fig 5

LRCK
BCK
FLRSG
SLRSG
CLFSG

LFE

FLch FRch

Note 3: Example shows 48 kHz for LRCK, but 44.1 kHz and

32 kHz may also be used.

• DECODER-MAIN DSP period
Check LRCK (IC11-12pin), BCK (IC 1 1-14pin), FLRSG (IC11-4pin),
SLRSG (IC11-5pin), CLFSG (IC11-6pin), OTHSG (IC11-7pin).
The playback source at power-ON, and Digital Input mode is Dolby
Digital or DTS, or a 5.1ch source for MPEG-AAC.
The view on the monitor when OFF or VIRTUAL FRONT is se­lected with the OUTPUT key is shown in Fig. 5. The detailed timing
is shown in Fig. 6.

Fig 6

LRCK
BCK
FLRSG
SLRSG
CLFSG

1 bit offset (I2S format)

Fig. 7 shows the monitor view when VIR TUAL 5.1 is selected with
the OUTPUT key. (Detailed timing is the same as in Fig. 6.)
Fig. 8 shows the monitor view when VIR TUAL 6.1 is selected with
the OUTPUT key. (Detailed timing is the same as in Fig. 6.)

Fig 7

LRCK
BCK
FLRSG
SLRSG
CLFSG

FL FR
SL

SR

C

LFE

Note 3: Example shows 48 kHz for LRCK, 44.1 kHz and

32 kHz are also used.

Fig 8

LRCK
BCK
FLRSG
SLRSG
CLFSG
OTHSG

FL FR
SL

CS

SR

C

LFE

Note 3: Example shows 48 kHz for LRCK, 44.1 kHz and
32 kHz are also used.

• MAIN DSP-DAC period
Check LRCK (IC5-5pin), BCK (IC5-4pin), VPOUT2 (IC15-3pin).
At power-ON, and Digital Input mode or Analog Input mode, any
playback source is okay.
A monitor view is shown in Fig. 9 and the detailed timing is shown
in Fig. 10.

6

DP-IF8000

• MAIN DSP-DIAT period
Check RCS (IC12-109pin), BCK (IC12-106), VPOUT1 (IC12­96pin), RINFO (IC12-107pin).
Turn the power on, set in Digital Input mode, and select VIR TUAL
FRONT, or VIRTUAL 5.1 or VIRTUAL 6.1 with the OUTPUT
switch.
The view on the monitor when the input source sampling frequency
is 48 kHz is shown in Fig. 11.
The view on the monitor when the input source sampling frequency
is 44.1 kHz is shown in Fig. 12.
The view on the monitor when the input source sampling frequency
is 32 kHz is shown in Fig. 13.

Fig 9

LRCK
BCK
LPOUT2

Lch Rch

Note 3: Example shows 48 kHz for LRCK, 44.1 kHz and

32 kHz are also used.

Fig 10

LRCK
BCK
VPOUT2

Fig 11

RCS
BCK
VPOU1
RINFO

0001000 t fs=48k

Note 4: fs=48kHz

Fig 12

RCS
BCK
VPOU1
RINFO

0000000 t fs=44.1k

Note 5: fs=44.1kHz

Fig 13

RCS
BCK
VPOU1
RINFO

0011000 t fs=32k

Note 6: fs=32kHz

When OFF is selected with the OUTPUT key, check the DILRCK
(IC12-98pin), BCK (IC12-106pin), VPOUT1 (IC12-96pin), and the
view on the monitor should be the same as the MAIN DSP-DAC
period.

2.1.2 System Control

Note: Input a signal of some kind to DIGITAL IN 1 and LINE IN.

• MICON-DIR period
Check the DIR_XCS (IC4-37pin), SCK2 (IC4-38pin), and SDO2
(IC4-36pin).
Figure 14 shows the view on the monitor after power is turned on,
at the instant of switching with the INPUT key.

Fig 14

DIR_XCS
SCK

(500KHZ)

SDO2

Address
8 bit
00010111

data
8 bit + 8 bit

• MICON-DAC period
Check the DAC_XCS (IC5-10pin), SCKO (IC5-8pin), and SDO02
(IC5-9pin).
Figure 15 shows the view on the monitor after power is turned on,
at the instant of switching with the INPUT key.

Fig 15

DAC_XCS
SCK 0

(500KHZ)

SDO 0

Address
8 bit
00100000

data
8 bit + 8 bit

• MICON-LED DRIVER period
Check the LED_XLAT (CN102-3pin), SCKO(CN102-6pin), and
SDO(CN102-7pin).
Figure 16 shows the view on the monitor after power is turned on,
at the instant of switching with each key.

Fig 16

LED_XLAT
SCK 0

(500KHZ)

SDO 0

8 bit + 8 bit

after data transfer

LAT

• MICON-DIAT period
Check the DIAT_LAT (IC12-152pin), SCKO (IC12-151pin), SDO
(IC12-153pin).
Figure 17 shows the view on the monitor after power is turned on,
at the instant of switching with the INPUT key . The timing is shown
in detail in FIG. 18.

Fig 17

DIAT_LAT
SCK 0
SDO 0

Fig 18

DIAT_LAT
SCK 0

(500KHZ)

SDO 0

after 24bit data transfer LAT

7

DP-IF8000

• MICON-DECODER period
Check the DEC_XCS (IC11-2pin), SCK1 (IC11-1pin), SDO1 (IC1 1­143pin), SDI1 (IC11-144pin).
Figure 19 shows the view on the monitor after power is turned on,
at the instant of switching with the OUTPUT key. The timing is
shown in detail in FIG. 20.

Fig 19

DEC_XCS
SCK 1
SDO 1
SDI 1

Sending the
24 bit data

Receiving the
24 bit data (example)

Fig 20

DEC_XCS
SCK 1

(1MHz)

SDO 1
SDI 1

• MICON-MAIN DSP period
Check the DSP_XCS (IC19-2pin), SCK1 (IC19-1pin), SDO1 (IC19­143pin), and the DSP_XHREQ (IC19-3pin).
Figure 21 shows the view on the monitor after power is turned on,
at the instant of switching with the OUTPUT key. (The detailed
timing is the shown as shown in FIG. 20.

Fig 21

DSP_XCS

SCK 1

(1MHz)

SDO 1

DSP_XHREQ

Start of 24 bit data transfer, at 2nd bit, HREQ t 1

After transfer of 24 bit data, HREQ t 0

2.2 Headphones

2.2.1 Audio System

Note: Switch to Digital Input mode by connecting the optical cable
to DIGITAL IN 1 or 2, and pressing the INPUT key.

• Master clock
DSP_MCK(IC501-34pin) : 12.288 MHz (fixed)
DAC_MCK (IC102-2pin) : 12.288 MHz when the input source sam­pling frequency to the processor is 48 kHz.

11.289 MHz when the sampling frequency is 44.1 kHz

8.192 MHz when the sampling frequency is 32 kHz

• DIAT-DSP period
Check the LRCK/RCS (IC501-94pin), BCK (IC501-6pin),
DIAT_OUT (IC501-20pin), RINFO (IC501-19pin).
Turn the power on, set in Digital Input mode, and select VIR TUAL
FRONT, or VIRTUAL 5.1 or VIRTUAL 6.1 with the OUTPUT
key.
Turn the headphone power on.
The view on the monitor when the input source sampling frequency
to the processor is 48 kHz is shown in Fig. 22.
The view on the monitor when the input source sampling frequency
to the processor is 44.1 kHz is shown in Fig. 23.
The view on the monitor when the input source sampling frequency
to the processor is 32 kHz is shown in Fig. 24.
The view on the monitor when OFF is selected with the OUTPUT
key is shown in Fig. 25. The detailed timing is shown in Fig. 26.

Fig 22

LRCK/RCS
BCK
DIAT_OUT
RINFO

0001000 t fs=48kNote 7: fs=48kHz

Fig 23

LRCK/RCS
BCK
DIAT_OUT
RINFO

0000000 t fs=44.1k

Note 8: fs=44.1kHz

Fig 24

LRCK/RCS
BCK
DIAT_OUT
RINFO

0011000 t fs=32k

Note 9: fs=32kHz

Fig 25

Lch Rch

LRCK/RCS
BCK
DIAT_OUT
RINFO

Note 10: Only LRCK, BCK and DATA are enabled. RINFO

is disabled.

Fig 26

LRCK/RCS
BCK
DIAT_OUT
RINFO

• DSP-DAC period
Check the LRCK (IC102-16pin), BCK (IC102-14pin), and
DSP_OUT (IC102-15pin).
Turn on the processor and set to Digital Input mode. Turn on the
headphone power, and apply an input source signal (any kind is
okay) to the processor.
The view on the monitor is shown in Fig. 27, and the detailed tim­ing is shown in Fig. 28.

Fig 27

LRCK
BCK
DSP_OUT

Lch Rch

Fig 28

LRCK
BCK
DSP_OUT

1 bit offset (I2S format)

8

DP-IF8000

2.2.2 System Control

• MICON-DSP period
Check the DSP_XCS (IC501-23pin), SCK (IC501-26pin), SDO
(IC501-24pin), and XHREQ (IC501-27pin).
The view after turning on the headphone power is shown in Fig. 29,
and the detailed timing is shown in Fig. 30.

Fig 29

DSP_XCS
SCK
SDO
XHREQ

Fig 30

DSP_XCS
SCK

(625kHz)

SDO
XHREQ

Start of 24 bit data transfer, at 2nd bit, HREQ t 1
After transfer of 24 bit data, HREQ t 0

• DIAT-MICON-DSP period
Check the DTQ (IC901-28pin), DSP_DTQ (IC501-28pin), ARDET
(IC901-27pin), DIAT_DTSEL (IC101-16pin).
Turn on the processor and set to Digital Input mode. Turn on the
headphone power, and apply an input source signal (any kind is
okay) to the processor.
The instant when switching from OFF to VIR TUAL FRONT using
the processor OUTPUT key is shown in Fig. 31.
The monitor view at the instant when switching from VIRTUAL
FRONT to VIRTUAL 5.1 or from VIRTUAL 5.1 to VIRTUAL 6.1
with the processor OUTPUT key is shown in Fig. 32.
The monitor view at the instant when switching from VIRTUAL

5.1 or VIRTUAL 6.1 to OFF with the processor OUTPUT key is
shown in Fig. 33.

Fig 31

*1

DTQ
DSP_DTQ
ARDET
DIAT_DTSEL

Set DIAT receive
mode *3

Infrared unlock
(receive NG)

Infrared lock (receive OK)
Report lock to DPS

DSP identifies processor
transmit mode *2

*1 Pulse output when set to DIAT receive mode.
*2 ARDET = 1 t VIRTUAL mode

ARDET = 0 t OFF mode
*3 Approximately 25 msec from lock report to DSP until DIAT
receive mode is set.
DTSEL t VIRTUAL mode
DTSEL = 0 t OFF mode

Fig 32

DTQ
DSP_DTQ
ARDET
DIAT_DTSEL

Fig 33

DTQ
DSP_DTQ
ARDET
DIAT_DTSEL

9

DP-IF8000

SECTION 3

DISASSEMBLY

3-1. COVER

• This set can be disassembled in the order shown below.

Note: Follow the disassembly procedure in the numerical order given.

Set

Chassis (processor), “Panel ASSY, front”

TX board

LED board, AMP board

Cover

3

Two screws (+BVTT 2.6X5)

5

Cover

2

Two screws (+BVTT 2.6X5)

1

Two screws (+BVTT 2.6X5)

4

Two screws (+BVTT 2.6X5)

3-2. CHASSIS (PROCESSOR), “PANEL ASSY, FRONT”

4

Two screws (+P 3X8)

7

Screw (+P 3X8)

5

T wo screws(+P)

8

Claw

Panel ASSY, front

3

CN102

2

CN002

6

Screw (+BTT)

Chassis (processor

)

9

1

CN001

10

DP-IF8000

3-4. LED BOARD, AMP BOARD

3-3. TX BOARD

Chassis (processor)

3

Two screws (+BTT)

2

Screw

1

Three screws (+P 3X8)

TX board

1

Two screws (+P 2X8)

Panel ASSY, front

2

Three screws (+P 2X8)

3

LED board

4

Screw (+P 2X8)

5

AMP boar

d

11

DP-IF8000

SECTION 4

TEST MODE

1. OVERVIEW

The internal microprocessor in this device has a test mode that can
perform all checks. Items that must be checked during repairs are
stored in this microprocessor.

2. SETTING THE TEST MODE

To call up test mode, turn on the power while holding down the
POWER and INPUT keys. (Connect the AC adapter.)

3. CANCEL THE TEST MODE

Remove the AC adapter.

4. TEST MODE

4-1. LED check

To Key check

LEDs light up in sequence *1)

*1) Test mode setup status

EFFECT key

EFFECT key

All LEDs light up *2)

*2) Infrared LEDs shall light up

All LEDs turn off *3)

*3) Infrared LEDs shall turn off

Power key

4-2. Key Check

*5) Decode mode LED

*4) Matching LED

POWER key : POWER LED, WINDOW LED
INPUT key : DIGITAL1, DIGITAL2,

ANAGOG LED

EFFECT key : CINEMA1, CINEMA2,

MUSIC LED

OUTPUT key : DECODE MODE LED

L

C

R

LS

VIRTUAL

CS

RS

HR LED

HL LED

Pressing the INPUT, EFFECT or
OUTPUT key lights up the matching
LED *4)

POWER key

To test tone output

5. TEST TONE OUTPUT

DIGITAL1

L, R, HL, HR

LED lights up

DIGITAL2

L, R, HL, HR

LED lights up

ANALOG

L, R, HL, HR

C LED lights up

CINEMA1

L, R, HL, HR

R LED lights up

INPUT key

INPUT key

INPUT key

EFFECT key

POWER key

1kHz, 0dBv L&R ch
*6)

1kHz, –10dBv L&R ch
*6)

100Hz, –10dBv L&R ch
*6)

10kHz, –10dBv L&R ch
*6)

End test mode

Shift to normal power-on operation

DIGITAL1
L, R, HR LED lights up

DIGITAL1
L, R LED lights up

DIGITAL1
HL, HR LED lights up

L&R ch output

L ch ouput
(R ch MUTE)

R ch output
(L ch MUTE)

*6) Pressing the OUTPUT key in each test mode changes
the output channels as shown below.

(e.g.) During L&R channel output at 1 kHz and 0dBv.

12

DP-IF8000

SECTION 5

ELECTRICAL ADJUSTMENT

1. CAUTION

1. Perform adjustment in sequence as listed.

2. Apply a 9 volt DC supply voltage.

2. DC BIAS ADJUSTMENT

Connect a digital voltmeter to test points TP119, 121, 125, 127,
130, 131, 133, 134 on the LED board. Adjust RV101 on the TX
board to obtain an output voltage of 480 ± 5mV on the TX board.

TP119,121,125,127,
130,131,133,134

10k

Ω

0.1

µ

digital voltmeter

ceramic

3. RF level alignment

Connect an oscilloscope to test points TP119, 121, 125, 127,
130, 131, 133, 134 on the LED board. Adjust RV201 on the TX
board to obtain an output waveform of 960±5mVp-p.

TP119,121,125,127,
130,131,133,134

oscilloscope

Note: Use an oscilloscope with a bandwidth of at lest 200 MHz.

4. RECHECK

The DC bias adjustment made above in 2. may sometime change
(deviate) after the RF level adjustment is made above in 3. So
recheck that the DC bias is at the correct level after making the
RF level alignment. If the DC bias has deviated, realign by re­peating the adjustment in 2. and 3. above.

• Connection points :

C301

R111

Q

3

5

5

R

2

1

6

C

2

0

7

R

1

0

0

R

1

0

7

R

2

1

0

R215

R

1

0

1

Q

3

5

4

R

1

1

4

C

2

9

0

Q

3

5

1

R

1

1

3

R

8

5

C210

R

2

0

8

R

2

1

4

R

2

1

7

R

2

1

3

R

8

9

Q

3

5

7

Q

3

5

8

R

1

0

2

C

2

0

6

Q

3

5

2

C224

C

2

2

3

C

2

3

0

R

8

7

R

2

1

1

R

2

0

9

R

2

1

2

R112

Q

3

6

2

Q

3

6

1

Q

3

6

0

C

2

3

9

C241

C231

C229

C228

C227

C

2

2

6

C225

IC206

JC

1

1

7

C

2

4

2

Q

3

5

6

Q

3

5

3

Q

3

5

9

R

1

1

0

JW216

D

2

1

6

JW221

D

1

7

JW

2

1

3

JW

217

JW

2

0

4

D

2

1

1

JW

2

2

0

JW211

CN903

C

3

5

1

0

JW

212

JW

224

JW

223

JW

209

JW222

JW

218

JW

225

JW

226

D

2

2

0

JW

227

JW

215

D

1

3

D

1

4

D

1

5

D

1

6

D

9

D

8

D

7

D

6

D

5

D

2

0

8

D

2

0

9

D

2

1

0

D

2

1

4

D

2

1

3

D

2

1

2

D

2

1

9

D

2

1

8

D

2

1

7

D

2

1

5

D

2

2

1

S

W

3

S

W

4

JW214

LED BOARD

D221

VERTUAL

TP121

TP131

TP130

TP133

TP134

TP119

TP127

TP125

TP121

TP119

TP134

TP133

TP131

TP130

TP125

TP127

(pattern)

• Adjustment location:

TX BOARD (SIDE A)

IC12

IC19

RV201: RF LEVEL alignment

RV101: DC BIAS alignment