Philips 74HCT04U, 74HCT04PW, 74HCT04NB, 74HCT04N, 74HCT04DB Datasheet

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DATA SH EET
Product specification File under Integrated Circuits, IC06
September 1993
INTEGRATED CIRCUITS
74HC/HCT04
Hex inverter
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
September 1993 2
Philips Semiconductors Product specification
Hex inverter 74HC/HCT04
FEATURES
Output capability: standard
ICC category: SSI
GENERAL DESCRIPTION
The 74HC/HCT04 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT04 provide six inverting buffers.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25 °C; tr= tf= 6 ns
Notes
1. C
PD
is used to determine the dynamic power dissipation (PDin µW):
PD= CPD× V
CC
2
× fi+ (CL× V
CC
2
× fo) where: fi= input frequency in MHz fo= output frequency in MHz Σ (CV
CC
2
× fo) = sum of outputs CL= output load capacitance in pF VCC= supply voltage in V
2. For HC the condition is VI= GND to V
CC
For HCT the condition is VI= GND to VCC− 1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”
.
SYMBOL PARAMETER CONDITIONS
TYPICAL
UNIT
HC HCT
t
PHL
/ t
PLH
propagation delay nA to nY CL= 15 pF; VCC=5V 7 8 ns
C
I
input capacitance 3.5 3.5 pF
C
PD
power dissipation capacitance per gate notes 1 and 2 21 24 pF
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