Philips 32PFL5615D/78 Schematic

Color Television Chassis

Q552.1L

LA

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Contents Page Contents Page

1. Revision List 2

2. Technical Specifications, and Connections 2

3. Precautions, Notes, and Abbreviation List 5

4. Mechanical Instructions 9

5. Service Modes, Error Codes, and Fault Finding 22

6. Alignments 41

7. Circuit Descriptions 47

8. IC Data Sheets 59

9. Block Diagrams Wiring diagram van Gogh 32" - 46" 69 Wiring diagram Da Vinci 32" - 46" 70 Wiring diagram Matisse 40" - 52" 71 Block Diagram Video 72 Block Diagram Audio 73 Block Diagram Control & Clock Signals 74 Block Diagram I2C 75 Supply Lines Overview 76

10. Circuit Diagrams and PWB Layouts Drawing PWB AL1 820400089786 AmbiLight Common AL3 820400089712 21 LED LiteOn 79 82 AL1 820400090592 AmbiLight Common 83 90 AL2 820400090611 3 LED Everlight 85 90 AL2 820400090601 9 LED Everlight 86 90 AL2 820400090621 15 LED Everlight 88 90 B01 820400089943 Tuner, HDMI & CI 91 B01 820400089944 Tuner, HDMI & CI 102 B02 820400089506 PNX85500 113 B03 820400089514 CLASS D 122 B04 820400089524 Analog I/O 130 B04 820400089525 Analog I/O 135 B05 820400089535 DDR 140 B06 820400089572 LVDS Non DVBS 141 B09 820400089812 Non DVBS Con. 145 B13 820400090732 TCON AL CPLD 146

©

Copyright 2010 Koninklijke Philips Electronics N.V. All rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted, in any form or by any means, electronic, mechanical, photocopying, or otherwise without the prior permission of Philips.

77 82

B14 820400090715 TCON SHARP 147 SRP List Explanation 153 310431363643 SSB Layout 154 310431364173 SSB Layout 158 J 2722171xxxxx IR Board van Gogh, da Vinci 162 J 2722171xxxxx IR Board Matisse 163

11. Styling Sheets Matisse 32" - 52" 164 van Gogh 32" - 52" 165 da Vinci 32" - 46" 166

Published by ER/TY 1072 BU TV Consumer Care, the Netherlands Subject to modification EN 3122 785 19032

2010-Dec-29

EN 2 Q552.1L LA1.

Revision List

1. Revision List

Manual xxxx xxx xxxx.0

• First release.

Manual xxxx xxx xxxx.1

• All chapters: added CTNs to the manual, see Table 2-1

.

• Chapter 6: added alignment values.

Manual xxxx xxx xxxx.2

• Chapter 6: added alignment values.

2. Technical Specifications, and Connections

Index of this chapter:

2.1

Technical Specifications

2.2 Directions for Use

2.3 Connections

2.4 Chassis Overview

Notes:

• Figures can deviate due to the different set executions.

• Specifications are indicative (subject to change).

Table 2-1 Described Model Numbers and Diversity

Styling

CTN

32PFL5615D/78 van Gogh

32PFL6615D/78 da Vinci

40PFL5615D/78 van Gogh

40PFL6615D/78 da Vinci

40PFL8605D/78 Matisse

46PFL5615D/78 van Gogh

46PFL6615D/78 da Vinci

52PFL8605D/77 Matisse

52PFL8605D/78 Matisse

styling sh.

11-2

11-3

11-2

11-3

11-1

11-2

11-3

11-1

SSB 2 4 7 9 10

64173 2.3 4-1 4.4 7.2 7.4.2 - 7.9 9-1 - - - - 10-10 10-11 10-12 10-14 10-15 - - - - 10-18 10-19 90062

64173 2.3 4-2 4.5 7.2 7.4.2 7.8 7.9 9-2 - - 10-4 10-5 10-10 10-11 10-12 10-14 10-15 - - - - 10-18 10-19 90062

64173 2.3 4-2 4.4 7.2 7.4.2 - 7.9 9-1 - - - - 10-10 10-11 10-12 10-14 10-15 - - - - 10-18 10-19 90062

64173 2.3 4-2 4.5 7.2 7.4.2 7.8 7.9 9-2 - - 10-4 10-6 10-10 10-11 10-12 10-14 10-15 - - - - 10-18 10-19 90062

63643 2.3 4-4 4.6 7.2 7.4.2 7.8 - 9-3 10-1 10-2 10-4 10-6 10-9 10-11 10-12 10-13 10-15 10-16 - - 10-17 - - 90064

64173 2.3 4-3 4.4 7.2 7.4.2 - 7.9 9-1 - - - - 10-10 10-11 10-12 10-14 10-15 - - - - 10-18 10-19 90062

64173 2.3 4-3 4.5 7.2 7.4.2 7.8 7.9 9-2 - - 10-4 10-6 10-10 10-11 10-12 10-14 10-15 - - - - 10-18 10-19 90062

63643 2.3 4-5 4.6 7.2 7.4.2 7.8 - 9-3 10-1 10-2 10-4 10-7 10-9 10-11 10-12 10-13 10-15 10-16 - - 10-17 - - 90064

Mecha-

Conn

nics Descriptions Wng Schematics

3104 313

Wire

Assembly

Removal

PSU

Tuner

AmbiLight

TCON

Diagram

2.1 Technical Specifications

For on-line product support please use the CTN links in Table

2-1. Here is product information available, as well as getting

started, user manuals, frequently asked questions and software & drivers.

Common LiteOn

Additional LiteOn

Common Everlight

Additional Everlight

B01 (Tuner)

B02 (PNX85500)

B03 (DC/DC / Class D)

B04 (I/O)

B05 (DDR)

B06 (non-DVBS-LVDS)

B07 (DVBS-FE)

B08 (DVBS-Supp.)

B09 (non-DVBS-conn.)

B13 (Ambilight)

B14 (TCON-SHP)

J (IR Board)

Note to the Described Model and Diversity Table:

Not all (circuit-) descriptions and (block-) schematics in this Service Manual apply to all sets. Use the hyperlinks in this table to lead you through this manual.

2.2 Directions for Use

You can download this information from the following websites:

http://www.philips.com/support http://www.p4c.philips.com

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2.3 Connections

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4 7 8 9

5 6

1

2

3

1 2 3 4

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Technical Specifications, and Connections

EN 3Q552.1L LA 2.

Figure 2-1 Connection overview

Note: The following connector color abbreviations are used

(acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy= Grey, Rd= Red, Wh= White, Ye= Yellow.

2.3.1 Side Connections

1 - Common Interface (optional)

68p - See diagram B01F HDMI & CI

jk

2 - USB2.0

Figure 2-2 USB (type A)

1-+5V k 2 - Data (-) jk 3 - Data (+) jk 4 - Ground Gnd H

3 - HDMI: Digital Video, Digital Audio - In

4 - D1+ Data channel j 5 - Shield Gnd H 6 - D1- Data channel j 7 - D0+ Data channel j 8 - Shield Gnd H 9 - D0- Data channel j 10 - CLK+ Data channel j 11 - Shield Gnd H 12 - CLK- Data channel j 13 - Easylink/CEC Control channel jk 14 - n.c. 15 - DDC_SCL DDC clock j 16 - DDC_SDA DDC data jk 17 - Ground Gnd H 18 - +5V j 19 - HPD Hot Plug Detect j 20 - Ground Gnd H

2.3.2 Rear Connections

4 - RJ45: Ethernet (optional)

Figure 2-3 HDMI (type A) connector

1 - D2+ Data channel j 2 - Shield Gnd H 3 - D2- Data channel j

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Figure 2-4 Ethernet connector

1 - TD+ Transmit signal k 2 - TD- Transmit signal k 3 - RD+ Receive signal j 4 - CT Centre Tap: DC level fixation

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Technical Specifications, and Connections

5 - CT Centre Tap: DC level fixation 6 - RD- Receive signal j 7 - GND Gnd H 8 - GND Gnd H

5 - CVI 2: Cinch: Video YPbPr - In, Audio - In

Gn - Video Y 1 V Bu - Video Pb 0.7 V Rd - Video Pr 0.7 V Rd - Audio - R 0.5 V Wh - Audio - L 0.5 V

/ 75 ohm jq

PP

/ 75 ohm jq

PP

/ 75 ohm jq

PP

/ 10 kohm jq

RMS

/ 10 kohm jq

RMS

6 - Service Connector (UART)

1 - Ground Gnd H 2 - UART_TX Transmit k 3 - UART_RX Receive j

7 - Cinch: Video CVBS - In, Audio - In

Ye - Video CVBS 1 V Wh - Audio L 0.5 V Rd - Audio R 0.5 V

/ 75 ohm jq

PP

/ 10 kohm jq

RMS

/ 10 kohm jq

RMS

8 - S-Video (Hosiden): Video Y/C - In (optional)

1 - Ground Y Gnd H 2 - Ground C Gnd H 3 - Video Y 1 V 4 - Video C 0.3 V

/ 75 ohm j

PP

P / 75 ohm j

PP

9 - Head phone (Output) (optional)

Bk - Head phone 32 - 600 ohm / 10 mW ot

2.3.3 Rear Connections - Bottom

10 - CVI 1: Video RGB - In, CVBS - In/Out, Audio - In/Out

See 5 - CVI 2: Cinch: Video YPbPr - In, Audio - In

11 - Cinch: S/PDIF - Out

Bk - Coaxial 0.4 - 0.6V

/ 75 ohm kq

PP

12 - HDMI 2 (& 3 optional): Digital Video, Digital Audio - In

See 3 - HDMI: Digital Video, Digital Audio - In

11 - Shield Gnd H 12 - CLK- Data channel j 13 - Easylink/CEC Control channel jk 14 - ARC Audio Return Channel k 15 - DDC_SCL DDC clock j 16 - DDC_SDA DDC data jk 17 - Ground Gnd H 18 - +5V j 19 - HPD Hot Plug Detect j 20 - Ground Gnd H

14 - Cinch: Audio - In (VGA/DVI)

Rd - Audio R 0.5 V Wh - Audio L 0.5 V

/ 10 kohm jq

RMS

/ 10 kohm jq

RMS

15 - Aerial - In

- - IEC-type (EU) Coax, 75 ohm D

16 - VGA: Video RGB - In

Figure 2-6 VGA Connector

1 - Video Red 0.7 V 2 - Video Green 0.7 V 3 - Video Blue 0.7 V

/ 75 ohm j

PP

/ 75 ohm j

PP

/ 75 ohm j

PP

4-n.c. 5 - Ground Gnd H 6 - Ground Red Gnd H 7 - Ground Green Gnd H 8 - Ground Blue Gnd H 9-+5V

+5 V j

DC

10 - Ground Sync Gnd H 11 - n.c. 12 - DDC_SDA DDC data j 13 - H-sync 0 - 5 V j 14 - V-sync 0 - 5 V j 15 - DDC_SCL DDC clock j

13 - HDMI 1: Digital Video - In, Digital Audio with ARC - In/ Out

Figure 2-5 HDMI (type A) connector

1 - D2+ Data channel j 2 - Shield Gnd H 3 - D2- Data channel j 4 - D1+ Data channel j 5 - Shield Gnd H 6 - D1- Data channel j 7 - D0+ Data channel j 8 - Shield Gnd H 9 - D0- Data channel j 10 - CLK+ Data channel j

2.4 Chassis Overview

Refer to chapter Block Diagrams for PWB/CBA locations.

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Precautions, Notes, and Abbreviation List

3. Precautions, Notes, and Abbreviation List

EN 5Q552.1L LA 3.

Index of this chapter:

3.1

Safety Instructions

3.2 Warnings

3.3 Notes

3.4 Abbreviation List

3.1 Safety Instructions

Safety regulations require the following during a repair:

• Connect the set to the Mains/AC Power via an isolation transformer (> 800 VA).

• Replace safety components, indicated by the symbol h, only by components identical to the original ones. Any other component substitution (other than original type) may increase risk of fire or electrical shock hazard.

Safety regulations require that after a repair, the set must be returned in its original condition. Pay in particular attention to the following points:

• Route the wire trees correctly and fix them with the mounted cable clamps.

• Check the insulation of the Mains/AC Power lead for external damage.

• Check the strain relief of the Mains/AC Power cord for proper function.

• Check the electrical DC resistance between the Mains/AC Power plug and the secondary side (only for sets that have a Mains/AC Power isolated power supply):

1. Unplug the Mains/AC Power cord and connect a wire

between the two pins of the Mains/AC Power plug.

2. Set the Mains/AC Power switch to the “on” position

(keep the Mains/AC Power cord unplugged!).

3. Measure the resistance value between the pins of the

Mains/AC Power plug and the metal shielding of the tuner or the aerial connection on the set. The reading should be between 4.5 M and 12 M.

4. Switch “off” the set, and remove the wire between the

two pins of the Mains/AC Power plug.

• Check the cabinet for defects, to prevent touching of any inner parts by the customer.

• Where necessary, measure the waveforms and voltages

with (D) and without (E) aerial signal. Measure the voltages in the power supply section both in normal operation (G) and in stand-by (F). These values are indicated by means of the appropriate symbols.

3.3.2 Schematic Notes

• All resistor values are in ohms, and the value multiplier is often used to indicate the decimal point location (e.g. 2K2 indicates 2.2 k).

• Resistor values with no multiplier may be indicated with either an “E” or an “R” (e.g. 220E or 220R indicates 220 ).

• All capacitor values are given in micro-farads (10 nano-farads (n 10

• Capacitor values may also use the value multiplier as the decimal point indication (e.g. 2p2 indicates 2.2 pF).

• An “asterisk” (*) indicates component usage varies. Refer to the diversity tables for the correct values.

• The correct component values are listed on the Philips Spare Parts Web Portal.

3.3.3 Spare Parts

For the latest spare part overview, consult your Philips Spare Part web portal.

3.3.4 BGA (Ball Grid Array) ICs

Introduction

For more information on how to handle BGA devices, visit this URL: http://www.atyourservice-magazine.com “Magazine”, then go to “Repair downloads”. Here you will find Information on how to deal with BGA-ICs.

BGA Temperature Profiles

For BGA-ICs, you must use the correct temperature-profile. Where applicable and available, this profile is added to the IC Data Sheet information section in this manual.

-9

), or pico-farads (p 10

. Select

-12

-6

),

).

3.2 Warnings

• All ICs and many other semiconductors are susceptible to

electrostatic discharges (ESD w). Careless handling during repair can reduce life drastically. Make sure that, during repair, you are connected with the same potential as the mass of the set by a wristband with resistance. Keep components and tools also at this same potential.

• Be careful during measurements in the high voltage section.

• Never replace modules or other components while the unit is switched “on”.

• When you align the set, use plastic rather than metal tools. This will prevent any short circuits and the danger of a circuit becoming unstable.

3.3 Notes

3.3.1 General

• Measure the voltages and waveforms with regard to the chassis (= tuner) ground (H), or hot ground (I), depending on the tested area of circuitry. The voltages and waveforms shown in the diagrams are indicative. Measure them in the Service Default Mode with a colour bar signal and stereo sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and picture carrier at 475.25 MHz for PAL, or 61.25 MHz for NTSC (channel 3).

3.3.5 Lead-free Soldering

Due to lead-free technology some rules have to be respected by the workshop during a repair:

• Use only lead-free soldering tin. If lead-free solder paste is required, please contact the manufacturer of your soldering equipment. In general, use of solder paste within workshops should be avoided because paste is not easy to store and to handle.

• Use only adequate solder tools applicable for lead-free soldering tin. The solder tool must be able: – To reach a solder-tip temperature of at least 400°C. – To stabilize the adjusted temperature at the solder-tip. – To exchange solder-tips for different applications.

• Adjust your solder tool so that a temperature of around 360°C - 380°C is reached and stabilized at the solder joint. Heating time of the solder-joint should not exceed ~ 4 sec. Avoid temperatures above 400°C, otherwise wear-out of tips will increase drastically and flux-fluid will be destroyed. To avoid wear-out of tips, switch “off” unused equipment or reduce heat.

• Mix of lead-free soldering tin/parts with leaded soldering tin/parts is possible but PHILIPS recommends strongly to avoid mixed regimes. If this cannot be avoided, carefully clear the solder-joint from old tin and re-solder with new tin.

3.3.6 Alternative BOM identification

It should be noted that on the European Service website, “Alternative BOM” is referred to as “Design variant”.

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EN 6 Q552.1L LA3.

Precautions, Notes, and Abbreviation List

The third digit in the serial number (example: AG2B0335000001) indicates the number of the alternative B.O.M. (Bill Of Materials) that has been used for producing the specific TV set. In general, it is possible that the same TV model on the market is produced with e.g. two different types of displays, coming from two different suppliers. This will then result in sets which have the same CTN (Commercial Type Number; e.g. 28PW9515/12) but which have a different B.O.M. number. By looking at the third digit of the serial number, one can identify which B.O.M. is used for the TV set he is working with. If the third digit of the serial number contains the number “1” (example: AG1B033500001), then the TV set has been manufactured according to B.O.M. number 1. If the third digit is a “2” (example: AG2B0335000001), then the set has been produced according to B.O.M. no. 2. This is important for ordering the correct spare parts! For the third digit, the numbers 1...9 and the characters A...Z can be used, so in total: 9 plus 26= 35 different B.O.M.s can be indicated by the third digit of the serial number.

Identification: The bottom line of a type plate gives a 14-digit serial number. Digits 1 and 2 refer to the production centre (e.g. AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers to the Service version change code, digits 5 and 6 refer to the production year, and digits 7 and 8 refer to production week (in example below it is 2006 week 17). The 6 last digits contain the serial number.

MODEL :

PROD.NO:

32PF9968/10

AG 1A0617 000001

MADE IN BELGIUM

220-240V 50/60Hz

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~

VHF+S+H+UHF

BJ3.0E LA

S

Figure 3-1 Serial number (example)

3.3.7 Board Level Repair (BLR) or Component Level Repair (CLR)

If a board is defective, consult your repair procedure to decide if the board has to be exchanged or if it should be repaired on component level. If your repair procedure says the board should be exchanged completely, do not solder on the defective board. Otherwise, it cannot be returned to the O.E.M. supplier for back charging!

3.3.8 Practical Service Precautions

• It makes sense to avoid exposure to electrical shock.

While some sources are expected to have a possible dangerous impact, others of quite high potential are of limited current and are sometimes held in less regard.

• Always respect voltages. While some may not be

dangerous in themselves, they can cause unexpected reactions that are best avoided. Before reaching into a powered TV set, it is best to test the high voltage insulation. It is easy to do, and is a good service precaution.

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3.4 Abbreviation List

0/6/12 SCART switch control signal on A/V

board. 0 = loop through (AUX to TV), 6 = play 16 : 9 format, 12 = play 4 : 3 format

AARA Automatic Aspect Ratio Adaptation:

algorithm that adapts aspect ratio to remove horizontal black bars; keeps the original aspect ratio

ACI Automatic Channel Installation:

algorithm that installs TV channels directly from a cable network by

means of a predefined TXT page ADC Analogue to Digital Converter AFC Automatic Frequency Control: control

signal used to tune to the correct

frequency AGC Automatic Gain Control: algorithm that

controls the video input of the feature

box AM Amplitude Modulation AP Asia Pacific AR Aspect Ratio: 4 by 3 or 16 by 9 ASF Auto Screen Fit: algorithm that adapts

aspect ratio to remove horizontal black

bars without discarding video

information ATSC Advanced Television Systems

Committee, the digital TV standard in

the USA ATV See Auto TV Auto TV A hardware and software control

system that measures picture content,

and adapts image parameters in a

dynamic way AV External Audio Video AVC Audio Video Controller AVIP Audio Video Input Processor B/G Monochrome TV system. Sound

carrier distance is 5.5 MHz BDS Business Display Solutions (iTV) BLR Board-Level Repair BTSC Broadcast Television Standard

Committee. Multiplex FM stereo sound

system, originating from the USA and

used e.g. in LATAM and AP-NTSC

countries B-TXT Blue TeleteXT C Centre channel (audio) CEC Consumer Electronics Control bus:

remote control bus on HDMI

connections CL Constant Level: audio output to

connect with an external amplifier CLR Component Level Repair ComPair Computer aided rePair CP Connected Planet / Copy Protection CSM Customer Service Mode CTI Color Transient Improvement:

manipulates steepness of chroma

transients CVBS Composite Video Blanking and

Synchronization DAC Digital to Analogue Converter DBE Dynamic Bass Enhancement: extra

low frequency amplification DCM Data Communication Module. Also

referred to as System Card or

Smartcard (for iTV). DDC See “E-DDC” D/K Monochrome TV system. Sound

carrier distance is 6.5 MHz DFI Dynamic Frame Insertion

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Precautions, Notes, and Abbreviation List

EN 7Q552.1L LA 3.

DFU Directions For Use: owner's manual DMR Digital Media Reader: card reader DMSD Digital Multi Standard Decoding DNM Digital Natural Motion DNR Digital Noise Reduction: noise

reduction feature of the set DRAM Dynamic RAM DRM Digital Rights Management DSP Digital Signal Processing DST Dealer Service Tool: special remote

control designed for service

technicians DTCP Digital Transmission Content

Protection; A protocol for protecting

digital audio/video content that is

traversing a high speed serial bus,

such as IEEE-1394 DVB-C Digital Video Broadcast - Cable DVB-T Digital Video Broadcast - Terrestrial DVD Digital Versatile Disc DVI(-d) Digital Visual Interface (d= digital only) E-DDC Enhanced Display Data Channel

(VESA standard for communication

channel and display). Using E-DDC,

the video source can read the EDID

information form the display. EDID Extended Display Identification Data

(VESA standard) EEPROM Electrically Erasable and

Programmable Read Only Memory EMI Electro Magnetic Interference EPG Electronic Program Guide EPLD Erasable Programmable Logic Device EU Europe EXT EXTernal (source), entering the set by

SCART or by cinches (jacks) FDS Full Dual Screen (same as FDW) FDW Full Dual Window (same as FDS) FLASH FLASH memory FM Field Memory or Frequency

Modulation FPGA Field-Programmable Gate Array FTV Flat TeleVision Gb/s Giga bits per second G-TXT Green TeleteXT H H_sync to the module HD High Definition HDD Hard Disk Drive HDCP High-bandwidth Digital Content

Protection: A “key” encoded into the

HDMI/DVI signal that prevents video

data piracy. If a source is HDCP coded

and connected via HDMI/DVI without

the proper HDCP decoding, the

picture is put into a “snow vision” mode

or changed to a low resolution. For

normal content distribution the source

and the display device must be

enabled for HDCP “software key”

decoding. HDMI High Definition Multimedia Interface HP HeadPhone I Monochrome TV system. Sound

2

I

C Inter IC bus

2

I

D Inter IC Data bus

2

I

S Inter IC Sound bus

carrier distance is 6.0 MHz

IF Intermediate Frequency IR Infra Red IRQ Interrupt Request ITU-656 The ITU Radio communication Sector

(ITU-R) is a standards body

subcommittee of the International

Telecommunication Union relating to

radio communication. ITU-656 (a.k.a.

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SDI), is a digitized video format used for broadcast grade video. Uncompressed digital component or digital composite signals can be used. The SDI signal is self-synchronizing, uses 8 bit or 10 bit data words, and has a maximum data rate of 270 Mbit/s, with a minimum bandwidth of 135 MHz.

ITV Institutional TeleVision; TV sets for

hotels, hospitals etc.

LS Last Status; The settings last chosen

by the customer and read and stored in RAM or in the NVM. They are called at start-up of the set to configure it according to the customer's

preferences LATAM Latin America LCD Liquid Crystal Display LED Light Emitting Diode L/L' Monochrome TV system. Sound

carrier distance is 6.5 MHz. L' is Band

I, L is all bands except for Band I LPL LG.Philips LCD (supplier) LS Loudspeaker LVDS Low Voltage Differential Signalling Mbps Mega bits per second M/N Monochrome TV system. Sound

carrier distance is 4.5 MHz MHEG Part of a set of international standards

4. Mechanical Instructions

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Mechanical Instructions

EN 9Q552.1L LA 4.

Index of this chapter:

4.1

Cable Dressing van Gogh & da Vinci styling (5000 & 6000

series)

4.2 Cable Dressing Matisse styling (8000 series)

4.3 Service Positions

4.4 Assy/Panel Removal Van Gogh Styling (5000 series)

4.5 Assy/Panel Removal da Vinci Styling (6000 series)

4.6 Assy/Panel Removal Matisse Styling (8000 series)

4.7 Set Re-assembly

Notes:

• Figures below can deviate slightly from the actual situation, due to the different set executions.

4.1 Cable Dressing van Gogh & da Vinci styling (5000 & 6000 series)

Figure 4-1 Cable dressing 32"

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Mechanical Instructions

Figure 4-2 Cable dressing 40"

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Mechanical Instructions

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Figure 4-3 Cable dressing 46"

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4.2 Cable Dressing Matisse styling (8000 series)

Mechanical Instructions

Figure 4-4 Cable dressing 40"

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Mechanical Instructions

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Figure 4-5 Cable dressing 52"

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Mechanical Instructions

4.3 Service Positions

For easy servicing of a TV set, the set should be put face down on a soft flat surface, foam buffers or other specific workshop tools. Ensure that a stable situation is created to perform measurements and alignments. When using foam bars take care that these always support the cabinet and never only the display. Caution: Failure to follow these guidelines can seriously damage the display! Ensure that ESD safe measures are taken.

4.4 Assy/Panel Removal Van Gogh Styling (5000 series)

The instructions apply to the Q552.1E LA chassis (46PFL5605H/xx), but are similar for other models.

4.4.1 Rear Cover

Warning: Disconnect the mains power cord before you remove

the rear cover. Note: it is not necessary to remove the stand while removing the rear cover.

1. Remove all screws of the rear cover.

2. Lift the rear cover from the TV. Make sure that wires and

flat coils are not damaged while lifting the rear cover from the set.

Figure 4-7 Rear cover 40" -2-

Special note:

Some models come with mechanical catches at top of the rear cover. To open them, refer to Figure 4-6

to Figure 4-9 for

details.

Figure 4-6 Rear cover 40" -1-

Figure 4-8 Rear cover 40" -3-

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Figure 4-9 Rear cover 40" -4-

1. Lift the rear cover on the bottom [1].

2. Push back the cover [2] to unlock the catches.

3. If the rear cover catches still lock, place a flat screwdriver between flare and rear cover and turn it until the rear cover and the flare are disassembled from the catch.

4. The location of the catches are indicated with [3], [4], [5]

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and [6].

Mechanical Instructions

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4.4.2 Speakers

Tweeters

Each tweeter unit is mounted with one screw. When defective, replace the whole unit.

Subwoofer

The central subwoofer is located in the centre of the set, and is mounted with two screws. When defective, replace the whole unit.

4.4.3 Main Power Supply

Refer to Figure 4-18

for details.

4.4.5 Mains Switch

The mains switch is mounted on the front bezel with two screws.

4.4.6 IR & LED Board

Refer to Figure 4-20

, Figure 4-21 and Figure 4-22 for details.

Figure 4-10 Main Power Supply

1. Unplug all connectors [1].

2. Remove the fixation screws [2].

3. Take the board out. When defective, replace the whole unit.

4.4.4 Small Signal Board (SSB)

Refer to Figure 4-19

for details.

Figure 4-12 IR & LED Board -1-

Figure 4-13 IR & LED Board -2-

1. Unplug all connectors [1] and [2].

2. Remove the fixation screws [3].

3. Take the board out. When defective, replace the whole unit.

Figure 4-11 SSB

Figure 4-14 IR & LED Board -3-

1. Remove the stand [1].

2. Remove the IR & LED board cover [2].

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3. Release the clips [3] that secure the IR & LED board.

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4. Remove the connectors [4] on the IR/LED board.

4.4.7 Keyboard Control Board

Mechanical Instructions

Refer to Figure 4-23

for details.

1. Unplug the connector on the IR & LED board that leads to the Keyboard Control board as described earlier.

2. Release the cable from its clamps.

3. Release the clip on top of the unit [1] and take the unit out.

When defective, replace the whole unit.

4.4.8 LCD Panel

Refer to Figure 4-24

for details.

1. Remove the stand as described earlier.

2. Remove the brackets [1].

3. Remove the stand support [2].

4. Remove the central subwoofer as described earlier.

5. Remove the tweeters as described earlier.

6. Remove the mains switch as described earlier.

Figure 4-15 Keyboard Control board

7. Remove the IR & LED board as described earlier.

8. Remove the keyboard control board as described earlier.

9. Remove the clamps [3].

10. Remove the flare.

11. Remove all remaining screws [4]. Now the LCD Panel can be lifted from the front cabinet.

4.5 Assy/Panel Removal da Vinci Styling (6000 series)

The instructions below apply to the LC9.3L LA chassis (32PFL6605D/xx), but are similar for other models.

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Figure 4-16 LCD Panel

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4.5.1 Rear Cover

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Figure 4-17 Rear cover removal (32")

Warning: Disconnect the mains power cord before removing

the rear cover. See Figure 4-17

1. Remove fixation screws [2] and [3] that secure the rear cover. It is not necessary to remove the stand first [1].

2. Lift the rear cover from the TV. Make sure that wires and flat foils are not damaged while lifting the rear cover from the set.

4.5.2 Speakers

Tweeters (when applicable)

Each tweeter unit is mounted with one screw. When defective, replace the whole unit.

Loudspeaker/subwoofer

The loudspeaker/subwoofer is located in the centre of the set, and is fixed with two screws. When defective, replace the whole unit.

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4.5.3 Main Power Supply

Refer to Figure 4-18

for details.

Figure 4-18 Main Power Supply

1. Unplug all connectors [1].

2. Remove the fixation screws [2].

3. Take the board out. When defective, replace the whole unit.

Be aware to (re)place the spacers [3].

4.5.6 IR & LED Board

Refer to Figure 4-20

Figure 4-20 IR & LED Board -1-

, Figure 4-21 and Figure 4-22 for details.

4.5.4 Small Signal Board (SSB)

Refer to Figure 4-19

for details.

2

3

1

2

3

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Figure 4-19 SSB

1. Unplug all connectors [1] and [2].

2. Remove the fixation screws [3].

3. Take the board out. When defective, replace the whole unit.

4.5.5 Mains Switch

The mains switch assy is mounted below the PSU on the front bezel with two screws. When replacing the switch, remove it from its bracket.

2

3

Figure 4-21 IR & LED Board -2-

3

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Figure 4-22 IR & LED Board -3-

1. Remove the stand [1].

2. Remove the IR & LED board cover [2].

3. Release the clips [3] that secure the IR & LED board.

4. Remove the connectors [4] on the IR/LED board.

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4.5.7 Local Control Board

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Refer to Figure 4-23

1. Unplug the connector on the IR & LED board that leads to the Local Control board as described earlier.

2. Release the cable from its clamps/tape.

3. Release the clip on top of the unit [1] and take the unit out.

When defective, replace the whole unit.

4.5.8 LCD Panel

Refer to Figure 4-24

1. Remove the Stand and IR/LED board [A] as earlier described.

2. Remove the Speakers/Subwoofer [B] as earlier described.

3. Remove the PSU [C] and SSB [D] as earlier described.

4. Remove the Mains Switch [E] as earlier described.

for details.

Figure 4-23 Local Control board

5. Remove the Local Control board [F] as earlier described.

6. Remove the brackets [1].

7. Remove the clamps [2].

8. Remove the flare. Now the LCD Panel can be lifted from the front cabinet.

Figure 4-24 LCD Panel removal (based on 32" AL model)

4.6 Assy/Panel Removal Matisse Styling (8000 series)

The instructions apply to the Q552.1E LA chassis (40PFL7605H/12), but are similar for other models.

4.6.1 Rear Cover

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Warning: Disconnect the mains power cord before you remove the rear cover. Note: it is not necessary to remove the stand while removing the rear cover.

1. Remove all screws of the rear cover.

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2. Lift the rear cover from the TV. Make sure that wires and flat coils are not damaged while lifting the rear cover from the set.

4.6.2 Speakers

Each speakerbox unit is mounted with two screws. When defective, replace the whole unit.

4.6.3 Main Power Supply

Refer to Figure 4-25

for details.

22

1

22

1

2

Figure 4-25 Main Power Supply

1. Unplug all connectors [1].

2. Remove the fixation screws [2].

3. Take the board out.

When defective, replace the whole unit.

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4.6.5 IR & LED Board

Refer to Figure 4-27

for details.

Figure 4-27 IR & LED Board

1. Remove the stand.

2. Remove the IR & LED board cover [1]. Now the IR & LED board can be accessed.

When defective, replace the whole unit.

4.6.6 Keyboard Control Board

The keyboard control panel is mounted on the LCD panel with two screws. When defective, replace the whole unit.

4.6.7 Ambilight Units

4.6.4 Small Signal Board (SSB)

Refer to Figure 4-26

for details.

Figure 4-26 SSB

1. Unplug all connectors [1].

2. Slide the side cover sidewards [2].

3. Remove the fixation screws [3].

4. Lift the clip [4].

5. Remove the bottom cover downwards [5].

6. Take the board out.

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4.6.8 LCD Panel

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Refer to Figure 4-28

for details.

Note: the Ambilight units are to be swapped on PWB level.

Figure 4-28 Ambilight units

1. Unplug the flat foil(s) [1].

2. Release the clips [2] that secure the PWB.

3. Slide the PWB out of the set [3].

Refer to Figure 4-29

for details.

1. Remove the stand.

2. Remove all boards as described earlier.

3. Remove all cables from the set.

4. Remove the speaker boxes as earlier described.

5. Remove the IR & LED board cover as described earlier.

6. Remove the mains switch [1].

7. Remove the keyboard control panel as described earlier.

8. Remove the clamps [2]. Pay attention to the positioning

of the different screws!

9. Remove the plastic clamps [3].

10. Tilt the clamps [4] after having removed the screw.

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11. Remove the Ambilight PWBs as earlier described.

12. Tilt the Ambilight subframes [5] after having removed the screw.

Now the LCD Panel can be lifted from the front cabinet.

Pay special attention to use the correct screws at the proper location when mounting a new LCD panel!

Using the wrong screws will damage the LCD panel!

4.7 Set Re-assembly

To re-assemble the whole set, execute all processes in reverse order.

Notes:

• While re-assembling, make sure that all cables are placed and connected in their original position.

• Pay special attention not to damage the EMC foams in the set. Ensure that EMC foams are mounted correctly.

Figure 4-29 LCD Panel

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Service Modes, Error Codes, and Fault Finding

5. Service Modes, Error Codes, and Fault Finding

Index of this chapter:

5.1

Test Points

5.2 Service Modes

5.3 Stepwise Start-up

5.4 Service Tools

5.5 Error Codes

5.6 The Blinking LED Procedure

5.7 Protections

5.8 Fault Finding and Repair Tips

5.9 Software Upgrading

5.1 Test Points

As most signals are digital, it will be difficult to measure waveforms with a standard oscilloscope. However, several key ICs are capable of generating test patterns, which can be controlled via ComPair. In this way it is possible to determine which part is defective.

Perform measurements under the following conditions:

• Service Default Mode.

• Video: Color bar signal.

• Audio: 3 kHz left, 1 kHz right.

5.2 Service Modes

Service Default mode (SDM) and Service Alignment Mode (SAM) offers several features for the service technician, while the Customer Service Mode (CSM) is used for communication between the call centre and the customer.

• All service-unfriendly modes (if present) are disabled, like: – (Sleep) timer. – Child/parental lock. – Picture mute (blue mute or black mute). – Automatic volume levelling (AVL). – Skip/blank of non-favorite pre-sets.

How to Activate SDM

For this chassis there are two kinds of SDM: an analogue SDM and a digital SDM. Tuning will happen according Table 5-1

• Analogue SDM: use the standard RC-transmitter and key in the code “062596”, directly followed by the “MENU” (or “HOME”) button. Note: It is possible that, together with the SDM, the main menu will appear. To switch it “off”, push the “MENU” (or "HOME") button again. Analogue SDM can also be activated by grounding for a moment the solder path on the SSB, with the indication “SDM” (see Service mode pad

• Digital SDM: use the standard RC-transmitter and key in the code “062593”, directly followed by the “MENU” (or "HOME") button. Note: It is possible that, together with the SDM, the main menu will appear. To switch it “off”, push the “MENU” (or "HOME") button again.

).

.

This chassis also offers the option of using ComPair, a hardware interface between a computer and the TV chassis. It offers the abilities of structured troubleshooting, error code reading, and software version read-out for all chassis. (see also section “5.4.1

Note: For the new model range, a new remote control (RC) is used with some renamed buttons. This has an impact on the activation of the Service modes. For instance the old “MENU” button is now called “HOME” (or is indicated by a “house” icon).

5.2.1 Service Default Mode (SDM)

Purpose

• To create a pre-defined setting, to get the same measurement results as given in this manual.

• To override SW protections detected by stand-by processor and make the TV start up to the step just before protection (a sort of automatic stepwise start-up). See section “5.3

• To start the blinking LED procedure where only LAYER 2 errors are displayed. (see also section “5.5

Specifications

Table 5-1 SDM default settings

Region Freq. (MHz)

Europe, AP(PAL/Multi) 475.25 PAL B/G

Europe, AP DVB-T 546.00 PID

• All picture settings at 50% (brightness, color, contrast).

• Sound volume at 25%.

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ComPair”).

Stepwise Start-up”.

Video: 0B 06 PID PCR: 0B 06 PID Audio: 0B 07

Error Codes”).

Default system

DVB-T

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Figure 5-1 Service mode pad

After activating this mode, “SDM” will appear in the upper right corner of the screen (when a picture is available).

How to Navigate

When the “MENU” (or “HOME”) button is pressed on the RC transmitter, the TV set will toggle between the SDM and the normal user menu.

How to Exit SDM

Use one of the following methods:

• Switch the set to STAND-BY via the RC-transmitter.

• Via a standard customer RC-transmitter: key in “00”sequence.

Service Modes, Error Codes, and Fault Finding

PHILIPS

MODEL:

32PF9968/10

PROD.SERIAL NO:

AG 1A0620 000001

040

39mm

27mm

(CTN Sticker)

Display Option

Code

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5.2.2 Service Alignment Mode (SAM)

Purpose

• To perform (software) alignments.

• To change option settings.

• To easily identify the used software version.

• To view operation hours.

• To display (or clear) the error code buffer.

How to Activate SAM

Via a standard RC transmitter: Key in the code “062596” directly followed by the “INFO” or “OK” button. After activating SAM with this method a service warning will appear on the screen, continue by pressing the “OK” button on the RC.

Contents of SAM (see also Table 6-11

• Hardware Info. – A. SW Version. Displays the software version of the

main software (example: Q555X-1.2.3.4 = AAAAB_X.Y.W.Z).

• AAAA= the chassis name.

• B= the SW branch version. This is a sequential number (this is no longer the region indication, as the software is now multi-region).

• X.Y.W.Z= the software version, where X is the main version number (different numbers are not compatible with one another) and Y.W.Z is the sub version number (a higher number is always compatible with a lower number).

– B. STBY PROC Version. Displays the software

version of the stand-by processor.

– C. Production Code. Displays the production code of

the TV, this is the serial number as printed on the back of the TV set. Note that if an NVM is replaced or is initialized after corruption, this production code has to be re-written to NVM. ComPair will foresee in a possibility to do this.

• Operation Hours. Displays the accumulated total of operation hours (not the stand-by hours). Every time the TV is switched “on/off”, 0.5 hours is added to this number.

• Errors (followed by maximum 10 errors). The most recent error is displayed at the upper left (for an error explanation see section “5.5

• Reset Error Buffer. When “cursor right” (or “OK” button) pressed here, followed by the “OK” button, the error buffer is reset.

• Alignments. This will activate the “ALIGNMENTS” submenu. See Chapter 6.

• Dealer Options. Extra features for the dealers.

• Options. Extra features for Service. For more info regarding option codes, 6. Note that if the option code numbers are changed, these have to be confirmed with pressing the “OK” button before the options are stored, otherwise changes will be lost.

• Initialize NVM. The moment the processor recognizes a corrupted NVM, the “initialize NVM” line will be highlighted. Now, two things can be done (dependent of the service instructions at that moment): – Save the content of the NVM via ComPair for

development analysis, before initializing. This will give the Service department an extra possibility for diagnosis (e.g. when Development asks for this).

– Initialize the NVM.

Note: When the NVM is corrupted, or replaced, there is a high possibility that no picture appears because the display code is not correct. So, before initializing the NVM via the SAM, a picture is necessary and therefore the correct display option has to be entered. Refer to Chapter 6. To adapt this option, it’s advised to use ComPair (the correct values for the options can be found in Chapter 6. or a method via a standard RC (described below). Changing the display option via a standard RC: Key in the code “062598” directly followed by the “MENU” (or "HOME")

Error Codes”).

Alignments.

)

Alignments for details.

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button and “XXX” (where XXX is the 3 digit decimal display code as mentioned on the sticker in the set). Make sure to key in all three digits, also the leading zero’s. If the above action is successful, the front LED will go out as an indication that the RC sequence was correct. After the display option is changed in the NVM, the TV will go to the Stand-by mode. If the NVM was corrupted or empty before this action, it will be initialized first (loaded with default values). This initializing can take up to 20 seconds.

Figure 5-2 Location of Display Option Code sticker

• Store - go right. All options and alignments are stored when pressing “cursor right” (or the “OK” button) and then the “OK”-button.

• Operation hours display. Displays the accumulated total of operation hours of the screen itself. In case of a display replacement, reset to “0” or to the consumed operation hours of the spare display.

• SW Maintenance. – SW Events. In case of specific software problems, the

development department can ask for this info.

– HW Events. In case of specific software problems, the

development department can ask for this info :

- Event 26: refers to a power dip, this is logged after the TV set reboots due to a power dip.

- Event 17: refers to the power OK status, sensed even before the 3 x retry to generate the error code.

• Test settings. For development purposes only.

• Development file versions. Not useful for Service purposes, this information is only used by the development department.

• Upload to USB. To upload several settings from the TV to an USB stick, which is connected to the SSB. The items are “Channel list”, “Personal settings”, “Option codes”, “Alignments”, “Identification data” (includes the set type and prod code + all 12NC like SSB, display, boards), “History list”. The “All” item supports to upload all several items at once.

First a directory “repair\” has to be created in the root of the USB stick.

To upload the settings, select each item separately, press “cursor right” (or the “OK” button), confirm with “OK” and wait until the message “Done” appears. In case the download to the USB stick was not successful, “Failure” will be displayed. In this case, check if the USB stick is connected properly and if the directory “repair” is present in the root of the USB stick. Now the settings are stored onto the USB stick and can be used to download into another TV or other SSB. Uploading is of course only possible if the software is running and preferably a picture is available. This method is created to be able to save the customer’s TV settings and to store them into another SSB.

• Download from USB. To download several settings from the USB stick to the TV, same way of working needs to be followed as described in “Upload to USB”. To make sure that the download of the channel list from USB to the TV is executed properly, it is necessary to restart the TV and tune to a valid preset if necessary. The “All” item supports to download all several items at once.

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Service Modes, Error Codes, and Fault Finding

• NVM editor. For NET TV the set “type number” must be entered correctly. Also the production code (AG code) can be entered here via the RC-transmitter. Correct data can be found on the side/rear sticker.

How to Navigate

• In SAM, the menu items can be selected with the “CURSOR UP/DOWN” key on the RC-transmitter. The selected item will be highlighted. When not all menu items fit on the screen, move the “CURSOR UP/DOWN” key to display the next/previous menu items.

• With the “CURSOR LEFT/RIGHT” keys, it is possible to: – (De) activate the selected menu item. – (De) activate the selected sub menu.

• With the “OK” key, it is possible to activate the selected action.

How to Exit SAM

Use one of the following methods:

• Switch the TV set to STAND-BY via the RC-transmitter.

• Via a standard RC-transmitter, key in “00” sequence, or select the “BACK” key.

5.2.3 Customer Service Mode (CSM)

Purpose

When a customer is having problems with his TV-set, he can call his dealer or the Customer Helpdesk. The service technician can then ask the customer to activate the CSM, in order to identify the status of the set. Now, the service technician can judge the severity of the complaint. In many cases, he can advise the customer how to solve the problem, or he can decide if it is necessary to visit the customer. The CSM is a read only mode; therefore, modifications in this mode are not possible.

When in this chassis CSM is activated, a test pattern will be displayed during 5 seconds (1 second Blue, 1 second Green and 1 second Red, then again 1 second Blue and 1 second Green). This test pattern is generated by the PNX51X0 (located on the 200Hz board as part of the display). So if this test pattern is shown, it could be determined that the back end video chain (PNX51X0 and display) is working.For TV sets without the PNX51X0 inside, every menu from CSM will be used as check for the back end chain video.

When CSM is activated and there is a USB stick connected to the TV set, the software will dump the CSM content to the USB stick. The file (CSM_model number_serial number.txt) will be saved in the root of the USB stick. This info can be handy if no information is displayed.

When in CSM mode (and a USB stick connected), pressing “OK” will create an extended CSM dump file on the USB stick. This file (Extended_CSM_model number_serial number.txt) contains:

• The normal CSM dump information,

• All items (from SAM “load to USB”, but in readable format),

• Operating hours,

• Error codes,

• SW/HW event logs.

To have fast feedback from the field, a flashdump can be requested by development. When in CSM, push the “red” button and key in serial digits ‘2679’ (same keys to form the word ‘COPY’ with a cellphone). A file “Dump_model number_serial number.bin” will be written on the connected USB device. This can take 1/2 minute, depending on the quantity of data that needs to be dumped.

Also when CSM is activated, the LAYER 1 error is displayed via blinking LED. Only the latest error is displayed (see also section 5.5

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How to Activate CSM

Key in the code “123654” via the standard RC transmitter. Note: Activation of the CSM is only possible if there is no (user) menu on the screen!

How to Navigate

By means of the “CURSOR-DOWN/UP” knob on the RCtransmitter, can be navigated through the menus.

Contents of CSM

The contents are reduced to 3 pages: General, Software versions and Quality items. The group names itself are not shown anywhere in the CSM menu.

General

• Set Type. This information is very helpful for a helpdesk/ workshop as reference for further diagnosis. In this way, it is not necessary for the customer to look at the rear of the TV-set. Note that if an NVM is replaced or is initialized after corruption, this set type has to be re-written to NVM. ComPair will foresee in a possibility to do this. The update can also be done via the NVM editor available in SAM.

• Production Code. Displays the production code (the serial number) of the TV. Note that if an NVM is replaced or is initialized after corruption, this production code has to be re-written to NVM. ComPair will foresee in a possibility to do this. The update can also be done via the NVM editor available in SAM.

• Installed date. Indicates the date of the first installation of the TV. This date is acquired via time extraction.

• Options 1. Gives the option codes of option group 1 as set in SAM (Service Alignment Mode).

• Options 2. Gives the option codes of option group 2 as set in SAM (Service Alignment Mode).

• 12NC SSB. Gives an identification of the SSB as stored in NVM. Note that if an NVM is replaced or is initialized after corruption, this identification number has to be re-written to NVM. ComPair will foresee in a possibility to do this. This identification number is the 12nc number of the SSB.

• 12NC display. Shows the 12NC of the display.

• 12NC supply. Shows the 12NC of the power supply.

• 12NC 200Hz board. Shows the 12NC of the 200Hz Panel (when present).

• 12NC AV PIP. Shows the 12NC of the AV PIP board (when present).

Software versions

• Current main SW. Displays the build-in main software version. In case of field problems related to software, software can be upgraded. As this software is consumer upgradeable, it will also be published on the Internet. Example: Q55xx1.2.3.4

• Stand-by SW. Displays the build-in stand-by processor software version. Upgrading this software will be possible via ComPair or via USB (see section 5.9

Software Upgrading).

Example: STDBY_88.68.1.2.

• e-UM version. Displays the electronic user manual SWversion (12NC version number). Most significant number here is the last digit.

• AV PIP software.

• 3D dongle software version.

Quality items

• Signal quality. Bad / average /good (not for DVB-S).

• Ethernet MAC address. Displays the MAC address present in the SSB.

• Wireless MAC address. Displays the wireless MAC address to support the Wi-Fi functionality.

• BDS key. Indicates if the set is in the BDS status.

• CI module. Displays status if the common interface module is detected.

• CI + protected service. Yes/No.

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- St by requested

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• Event counter : S : 000X 0000(number of software recoveries : SW EVENT-LOG #(reboots) S : 0000 000X (number of software events : SW EVENTLOG #(events) H : 000X 0000(number of hardware errors) H : 0000 000X (number of hardware events : SW EVENTLOG #(events).

How to Exit CSM

Press “MENU” (or "HOME") / “Back” key on the RC-transmitter.

5.3 Stepwise Start-up

When the TV is in a protection state due to an error detected by stand-by software (error blinking is displayed) and SDM is activated via shortcutting the SDM solder path on the SSB, the TV starts up until it reaches the situation just before protection. So, this is a kind of automatic stepwise start-up. In combination with the start-up diagrams below, you can see which supplies are present at a certain moment. Caution: in case the start-up in this mode with a faulty FET 7U0X is done, you can destroy all IC’s supplied by the +1V8 and +1v1, due to overvoltage (12V on XVX-line). It is recommended to measure first the FET 7U0X or others FET’s on shortcircuit before activating SDM via the service pads.

The abbreviations “SP” and “MP” in the figures stand for:

• SP: protection or error detected by the Stand-by Processor.

• MP: protection or error detected by the MIPS Main

Processor.

Figure 5-3 Transition diagram

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div. table

2010-Dec-29

EN 26 Q552.1L LA5.

18770_251_100216.eps

100216

No

EJTAG probe

connected ?

No

Yes

Release AVC system reset

Feed warm boot script

Cold boot?

Yes

No

Set I²C slave address

of Standby µP to (A0h)

An EJTAG probe (e.g . WindPower ICE prob e) can be connected for Linux Kernel debugging purposes.

Detect EJTAG debug probe

(pulling pin of the probe interface to

ground by inserting EJTAG probe)

Release AVC system reset

Feed cold boot script

Release AVC system reset

Feed initializing boot script

disable alive mechanism

Off

Standby Supply starts running.

All standby supply voltages become available.

st-by µP resets

Stand by or

Protection

Mains is applied

- Switch Audio-Reset high.

It is low in the standby mode if the standby

mode lasted longer than 10s.

start keyboard scanning, RC detection. Wake up reasons are

off.

If the protection state was left by short c ircuiting the

SDM pins, detection of a protection condition during

startup will stall the startup. Protection conditions in a

playing set will be ignored. The protection mode will

not be entered.

Detect2 is moved to an interrupt. To be checked if the detection on interrupt base is feasible or not or if we should stick to the standard 40ms interval.

+12V, +24Vs, AL and Bolt-on power

isswitched on, followed by the +1V2 DCDC convert er

Enable the supply detection algorithm

Switch ON Platform and display supply by switching

LOW the Standby line.

Initialise I/O pins of the st-by µP:

- Switch reset-AVC LOW (reset state)

- Switch reset-system LOW (reset state)

- Switch reset-Ethernet LOW (reset state)

- Switch reset-USB LOW (reset state)

- Switch reset-DVBs LOW (reset state)

-keep Audio-reset and Audio-Mute-Up HIGH

Enable the DCDC converters

(ENABLE-3V3n LOW)

No

Detect2 high received

within 2 seconds?

12V error :

Layer1: 3

Layer2: 16

Enter protection

Yes

Wait 50ms

Service Modes, Error Codes, and Fault Finding

2010-Dec-29

Figure 5-4 “Off” to “Semi Stand-by” flowchart (part 1)

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Service Modes, Error Codes, and Fault Finding

18770_252_100216.eps

100216

Yes

MIPS reads the wake up reason

from standby µP.

Semi-Standby

initialize tuner and channel decoders

Initialize video processing IC’s

Initialize source selection

initialize AutoTV by triggering CHS AutoTV Init interface

3-th try?

No

Blink Code as

error code

Bootscript ready

in 1250 ms?

Yes

No

Enable Alive check mechanism

Wait until AVC starts to

communicate

SW initialization

succeeded

within 20s?

No

Switch StandbyI/O line high

and wait 4 seconds

RPC start (comm. protocol)

Set I²C slave address

of Standby µP to (60h)

Yes

Disable all supply related protections and

switch off the +3V3 +5V DC/DC converter.

switch off the remaining DC/DC

converters

Wait 5ms

Switch AVC PNX85500 in

reset (active low)

Wait 10ms

Flash to Ram

image transfer succeeded

within 30s?

No

Yes

Code =

Layer1: 2

Layer2: 53

Code =

Layer1: 2

Layer2: 15

Initialize Ambilight with Lights off.

Timing need to be updated if more mature info is available.

Timing needs to be updated if more mature info is available.

Initialize audio

Enter protection

Reset-system is switched HIGH by the

AVC at the end of t he bootscript

AVC releases Reset-Ether net, Reset-USB and

Reset-DVBs when the end of the AVC boot-

script is detected

This cannot be done through the bootscript, the I/O is on the standby µP

Reset-Audio and Audio-Mute-Up are

switched by MIPS code later on in the

startup process

Reset-system is switched HIGH by the

AVC at the end of the bootscript

Reset-Audio and Audio-Mute-Up a re

switched by MIPS code later on in the

startup process

Wake up reason

coldboot & not semi-

standby?

85500 sends out startup screen

Startup screen cfg file

present?

85500 starts up the display.

Startup screen visible

yes

To keep this flowchart readable, the exact display turn on description is not copied here. Please see the Semi-standby to On description for the detailed display startup

sequence.

During the complete display time of the Startup screen, the preheat condition of

100% PWM is valid.

No

Startup screen shall only be visible when there is a coldboot to an active state end situation. The startup screen shall not be visible when waking up for reboot reasons or waking up to semi- standby conditions or waking up to enter Hibernate mode..

The first time after the option turn on of the startup screen or when the set is virgin, the cfg file is not present and hence the startup screen will not be shown.

AVC releases Reset-Ethernet, Reset-USB and

Reset-DVBs when the end of the AVC boot-

script is detected

200Hz set?

No

yes

85500 sends out startup screen

200Hz Tcon has started up the

display.

Startup screen visible

85500 requests Lamp on

EN 27Q552.1L LA 5.

Figure 5-5 “Off” to “Semi Stand-by” flowchart (part 2)

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div. table

2010-Dec-29

EN 28 Q552.1L LA5.

18770_253_100216.eps

100216

Active

Semi Standby

Initialize audio and video

processing IC's and functions

according needed use case.

Assert RGB video blanking

and audio mute

Wait until previous on-state is left more than2

secondsago. (to prevent LCD display problems)

The assumption here is that a fast toggle (<2s) can

only happen during ON->SEMI ->ON. In these states,

the AVC is still active and can provide the 2s delay. A

transition ON->SEMI->STBY->SEMI->ON cannot be

made in less than 2s, because the standby state will

be maintained for at least 4s.

Switch Audio-Reset low and wait 5ms

Constraints taken into account:

-Display may only be started when valid LVDS output clock can be delivered by the AVC.

-To have a reliable operation o f the EEFL backlight, the backlight should be driven with a maximum PWM duty cycle during the first seconds. Only after this first one or two seconds, the PWM may be set to the required output level (Note that the PWM output should be present b

efore the backlight is switched on). To minimize the artefacts,

the picture should only be unblanked after these first seconds.

Restore dimming backlight feature, PWM and BOOST output

and unblank the video.

Wait until valid and stable audio and video, corresponding to the

requested output is delivered by the AVC

AND

the backlight has been switched on for at least the time which is

indicated in the display file as preheat time.

The higher level requirement is that audio and video should be demuted without transient effects and that the audio should be demuted maximum 1s before or

at the same time as the unblanking of the video.

Release audio mute and wait 100ms before any other audio

handling is done (e.g. volume change)

CPipe already generates a valid output clock in the semi-standby state: display

startup can start immediately when leaving

the semi-standby state.

Switch on LCD backlight (Lamp-ON)

Switch off the dimming backlight feature, set

the BOOST control to nominal and make sure PWM output is set to maximum allowed PWM

Switch on the Ambilight functionality according the last status

settings.

Delay Lamp-on with the sum of the LVDS delay and

the Lamp delay indicated in the display file

Switch on the displaypowerby

switching LCD-PWR-ON low

Wait x ms

Switch on LVDS output in the 85500

No

The exact timings to

switch on the

display(LVDS

delay, lamp delay)

are defined in the

display file.

Start POK line

detection algorithm

return

Display already on?

(splash screen)

Yes

Display cfg file present

and up to date, according

correct display option?

Startup screen Option and Installation setting

Photoscreen ON?

Yes

No

Prepare Start screen Display config

file and copy to Flash

No

Yes

A LED set does not normally need a

preheat time. The preheat remains present

but is set to zero in the display file.

Service Modes, Error Codes, and Fault Finding

Figure 5-6 “Semi Stand-by” to “Active” flowchart (EEFL or LED backlight 50/100 Hz only)

2010-Dec-29

back to

div. table

Service Modes, Error Codes, and Fault Finding

18770_254_100216.eps

100216

Active

Semi Standby

Initialize audio and video

processing IC's and functions

according needed use case.

Assert RGB video blanking

and audio mute

Wait until previous on-state is left more than2

secondsago. (to prevent LCD display problems)

The assumption here is that a fast toggle (<2s)

can only happen during ON->SEMI ->ON. In

these states, the AVC is still active and can provide the 2s delay. If the transition ON->SEMI- >STBY->SEMI->ON can be made in less than 2s,

we have to delay the semi -> stby transition until

the requirement is met.

Switch Audio-Reset low and wait 5ms

unblank the video.

Wait until valid and stable audio and video, corresponding to

the requested output is delivered by the AVC.

The higher level requirement is that audio and

video should be demuted without transient

effects and that the audio should be demuted

maximum 1s before or at the same time as the

unblanking of the video.

Release audio mute and wait 100ms before any other audio

handling is done (e.g. volume change)

Request Tcon to Switch on the backlight in a

direct LED or

set Lamp-on I/O line in case of a side LED

Switch on the Ambilight functionality according the last status

settings.

There is no need to define the

display timings since the timing

implementation is part of the Tcon.

Start POK line

detection algorithm

return

Display cfg file present

and up to date, according

correct display option?

Startup screen Option

and Installation setting

Photoscreen ON?

Yes

No

Prepare Start screen Display config

file and copy to Flash

No

Yes

Backlight already on?

(splash screen)

No

Yes

EN 29Q552.1L LA 5.

Figure 5-7 “Semi Stand-by” to “Active” flowchart (LED backlight 200 Hz)

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18770_255_100216.eps

100216

Semi Standby

Active

Wait x ms (display file)

Mute all sound outputs via softmute

Mute all video outputs

switch off LCD backlight

(I/O or I²C)

Force ext audio outputs to ground

(I/O: audio reset)

And wait 5ms

switch off Ambilight

Set main amplifier mute (I/O: audio-mute)

Wait 100ms

Wait until Ambilight has faded out: Output power

Observer should be zero

Switch off the displaypowerby

switching LCD-PWR-ON high

Wait x ms

Switch off LVDS output in 85500

The exact timings to

switch off the

display(LVDS

delay, lamp delay)

are defined in the

display file.

Switch off POK line

detection algorithm

200Hz set?

No

Yes

Instruct 200Hz Tcon to turn off

the display

Service Modes, Error Codes, and Fault Finding

2010-Dec-29

Figure 5-8 “Active” to “Semi Stand-by” flowchart

back to

div. table

Service Modes, Error Codes, and Fault Finding

18770_256_100216.eps

100216

transfer Wake up reasons to the Stand by µP.

Stand by

Semi Stand by

Disable all supply related protections and switch off

the DC/DC converters (ENABLE-3V3n)

Switch OFF all supplies by switching HIGH the

Standby I/O line

Switch AVC system in reset state (reset-system and

reset-AVC lines)

Switch reset-USB, Reset-Ethernet and Reset-DVBs

LOW

Important remarks:

release reset audio 10 sec after entering

standby to save power

Also here, the standby state has to be

maintained for at least 4s before starting

another state transition.

Wait 5ms

Wait 10ms

Delay transition until ramping down of ambient light is

finished. *)

If ambientlight functionality was used in semi-standby (lampadaire mode), switch off ambient light (see CHS

ambilight)

*) If this is not performed and the set is switched to standby when the switch off of the ambilights is still ongoing, the lights will switch off abruptly when the supply is cut.

Switch Memories to self-refresh (this creates a more

stable condition when switching off the power).

EN 31Q552.1L LA 5.

Figure 5-9 “Semi Stand-by” to “Stand-by” flowchart

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div. table

2010-Dec-29

EN 32 Q552.1L LA5.

10000_036_090121.eps

091118

TO

UART SERVICE

CONNECTOR

TO

UART SERVICE

CONNECTOR

TO I2C SERVICE CONNECTOR

TO TV

PC

HDMI I

2

C only

Optional power

5V DC

ComPair II Developed by Philips Brugge

RC out

RC in

Optional

Switch

Power ModeLink/

Activity

I

2

C

ComPair II

Multi

function

RS232 /UART

Service Modes, Error Codes, and Fault Finding

5.4 Service Tools

5.4.1 ComPair

Introduction

ComPair (Computer Aided Repair) is a Service tool for Philips Consumer Electronics products. and offers the following:

1. ComPair helps to quickly get an understanding on how to repair the chassis in a short and effective way.

2. ComPair allows very detailed diagnostics and is therefore capable of accurately indicating problem areas. No knowledge on I because ComPair takes care of this.

3. ComPair speeds up the repair time since it can automatically communicate with the chassis (when the µP is working) and all repair information is directly available.

4. ComPair features TV software up possibilities.

Specifications

ComPair consists of a Windows based fault finding program and an interface box between PC and the (defective) product. The ComPair II interface box is connected to the PC via an USB cable. For the TV chassis, the ComPair interface box and the TV communicate via a bi-directional cable via the service connector(s). The ComPair fault finding program is able to determine the problem of the defective television, by a combination of automatic diagnostics and an interactive question/answer procedure.

How to Connect

This is described in the chassis fault finding database in ComPair.

Figure 5-10 ComPair II interface connection

Caution: It is compulsory to connect the TV to the PC as

shown in the picture above (with the ComPair interface in between), as the ComPair interface acts as a level shifter. If one connects the TV directly to the PC (via UART), ICs can be blown!

How to Order

ComPair II order codes:

• ComPair II interface: 3122 785 91020.

• Software is available via the Philips Service web portal.

• ComPair UART interface cable for Q55x.x. (using 3.5 mm Mini Jack connector): 3138 188 75051.

Note: When you encounter problems, contact your local support desk.

2010-Dec-29

2

C or UART commands is necessary,

5.5 Error Codes

5.5.1 Introduction

The error code buffer contains all detected errors since the last time the buffer was erased. The buffer is written from left to right, new errors are logged at the left side, and all other errors shift one position to the right. When an error occurs, it is added to the list of errors, provided the list is not full. When an error occurs and the error buffer is full, then the new error is not added, and the error buffer stays intact (history is maintained). To prevent that an occasional error stays in the list forever, the error is removed from the list after more than 50 hrs. of operation. When multiple errors occur (errors occurred within a short time span), there is a high probability that there is some relation between them.

New in this chassis is the way errors can be displayed:

• If no errors are there, the LED should not blink at all in

CSM or SDM. No spacer must be displayed as well.

• There is a simple blinking LED procedure for board level repair (home repair) so called LAYER 1 errors

next to the existing errors which are LAYER 2 errors (see

Table 5-2

– LAYER 1 errors are one digit errors. – LAYER 2 errors are 2 digit errors.

• In protection mode. – From consumer mode: LAYER 1. – From SDM mode: LAYER 2.

• Fatal errors, if I2C bus is blocked and the set reboots, CSM and SAM are not selectable. – From consumer mode: LAYER 1. – From SDM mode: LAYER 2.

• In CSM mode. – When entering CSM: error LAYER 1 will be displayed

• In SDM mode. – When SDM is entered via Remote Control code or the

• Error display on screen. – In CSM no error codes are displayed on screen. – In SAM the complete error list is shown.

Basically there are three kinds of errors:

• Errors detected by the Stand-by software which lead to protection. These errors will always lead to protection and an automatic start of the blinking LED LAYER 1 error. (see section “5.6

• Errors detected by the Stand-by software which not lead to protection. In this case the front LED should blink the involved error. See also section “5.5

Error Buffer”. Note that it can take up several minutes

before the TV starts blinking the error (e.g. LAYER 1 error = 2, LAYER 2 error = 15 or 53).

• Errors detected by main software (MIPS). In this case the error will be logged into the error buffer and can be read out via ComPair, via blinking LED method LAYER 1-2 error, or in case picture is visible, via SAM.

5.5.2 How to Read the Error Buffer

Use one of the following methods:

• On screen via the SAM (only when a picture is visible). E.g.: – 00 00 00 00 00: No errors detected – 23 00 00 00 00: Error code 23 is the last and only

– 37 23 00 00 00: Error code 23 was first detected and

– Note that no protection errors can be logged in the

back to

div. table

).

by blinking LED. Only the latest error is shown.

hardware pins, LAYER 2 is displayed via blinking LED.

detected error.

error code 37 is the last detected error.

error buffer.

The Blinking LED Procedure”).

Error Codes, 5.5.4

Service Modes, Error Codes, and Fault Finding

EN 33Q552.1L LA 5.

• Via the blinking LED procedure. See section 5.5.3 How to

Clear the Error Buffer.

•Via ComPair.

5.5.3 How to Clear the Error Buffer

Use one of the following methods:

• By activation of the “RESET ERROR BUFFER” command in the SAM menu.

• If the content of the error buffer has not changed for 50+ hours, it resets automatically.

5.5.4 Error Buffer

In case of non-intermittent faults, clear the error buffer before starting to repair (before clearing the buffer, write down the

Table 5-2 Error code overview

Description Layer 1 Layer 2

2

C3 2 13 MIPS E BL / EB SSB SSB

I

2

C2 2 14 MIPS E BL / EB SSB SSB

I

2

C4 2 18 MIPS E BL / EB SSB SSB

I

PNX doesn’t boot (HW cause) 2 15 Stby µP P BL PNX8550 SSB

12V 3 16 Stby µP P BL / Supply

Inverter or display supply 3 17 MIPS E EB / Supply

PNX51X0 2/9 21 MIPS E EB PNX51X0 200 Hz board

HDMI mux 2 23 MIPS E EB Sil9x87A SSB

I2C switch 2 24 MIPS E EB PCA9540 SSB

AV-PIP board 8 25 MIPS E EB / AV PIP board

Channel dec DVB-S 2 28 MIPS E EB STV0903 SSB

Lnb controller 2 31 MIPS E EB LNBH23 SSB

Tuner 2 34 MIPS E EB DTT 71300 SSB

Main nvm 2 35 MIPS E EB STM24C64 SSB

Tuner DVB-S 2 36 MIPS E EB STV6110 SSB

T° sensor SSB/set 2 42 MIPS E EB LM 75 T° sensor

T° sensor LED driver/Tcon 7 42 MIPS E EB LM 75 T° sensor

PNX doesn’t boot (SW cause) 2 53 Stby µP P BL PNX8550 SSB

Display 5 64 MIPS E BL / EB Altera Display

Monitored by

content, as this history can give significant information). This to ensure that old error codes are no longer present. If possible, check the entire contents of the error buffer. In some situations, an error code is only the result of another error code and not the actual cause (e.g. a fault in the protection detection circuitry can also lead to a protection). There are several mechanisms of error detection:

• Via error bits in the status registers of ICs.

• Via polling on I/O pins going to the stand-by processor.

• Via sensing of analog values on the stand-by processor or the PNX85500.

• Via a “not acknowledge” of an I

Take notice that some errors need several minutes before they start blinking or before they will be logged. So in case of problems wait 2 minutes from start-up onwards, and then check if the front LED is blinking or if an error is logged.

Error/

Error Buffer/

Prot

Blinking LED Device Defective Board

2

C communication.

Extra Info

• Rebooting. When a TV is constantly rebooting due to internal problems, most of the time no errors will be logged or blinked. This rebooting can be recognized via a ComPair interface and Hyperterminal (for Hyperterminal settings, see section “5.8

Fault Finding and Repair Tips, 5.8.7 Logging). It’s shown that the loggings which are generated

by the main software keep continuing. In this case diagnose has to be done via ComPair.

• Error 13 (I

2

C bus 3, SSB bus blocked). Current situation: when this error occurs, the TV will constantly reboot due to the blocked bus. The best way for further diagnosis here, is to use ComPair.

• Error 14 (I

2

C bus 2, TV set bus blocked). Current situation: when this error occurs, the TV will constantly reboot due to the blocked bus. The best way for further diagnosis here, is to use ComPair.

• Error 18 (I

2

C bus 4, Tuner bus blocked). In case this bus is blocked, short the “SDM” solder paths on the SSB during startup, LAYER error 2 = 18 will be blinked.

• Error 15 (PNX8550 doesn’t boot). Indicates that the main processor was not able to read his bootscript. This error will point to a hardware problem around the PNX8550 (supplies not OK, PNX 8550 completely dead, I between PNX and Stand-by Processor broken, etc...). When error 15 occurs it is also possible that I blocked (NVM). I

2

C1 can be indicated in the schematics as

2

C link

2

C1 bus is

follows: SCL-UP-MIPS, SDA-UP-MIPS.

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div. table

Other root causes for this error can be due to hardware problems regarding the DDR’s and the bootscript reading from the PNX8550.

• Error 16 (12V). This voltage is made in the power supply and results in protection (LAYER 1 error = 3) in case of absence. When SDM is activated we see blinking LED LAYER 2 error = 16.

• Error 17 (Invertor or Display Supply). Here the status of the “Power OK” is checked by software, no protection will occur during failure of the invertor or display supply (no picture), only error logging. LED blinking of LAYER 1 error = 3 in CSM, in SDM this gives LAYER 2 error = 17.

• Error 21 (PNX51X0). When there is no I

2

C communication towards the PNX51X0 after start-up, LAYER 2 error = 21 will be logged and displayed via the blinking LED procedure if SDM is switched on. This device is located on the 200 Hz panel from the display.

• Error 23 (HDMI). When there is no I

2

C communication towards the HDMI mux after start-up, LAYER 2 error = 23 will be logged and displayed via the blinking LED procedure if SDM is switched on.

• Error 24 (I2C switch). When there is no I communication towards the I

2

C switch, LAYER 2

2

C

error = 24 will be logged and displayed via the blinking LED procedure when SDM is switched on. Remark: this only works for TV sets with an I

• Error 28 (Channel dec DVB-S). When there is no I

2

C controlled screen included.

2

C

communication towards the DVB-S channel decoder,

2010-Dec-29

EN 34 Q552.1L LA5.

Service Modes, Error Codes, and Fault Finding

LAYER 2 error = 28 will be logged and displayed via the blinking LED procedure if SDM is switched on.

• Error 31 (Lnb controller). When there is no I communication towards this device, LAYER 2 error = 31 will be logged and displayed via the blinking LED procedure if SDM is activated.

• Error 34 (Tuner). When there is no I

2

C communication towards the tuner during start-up, LAYER 2 error = 34 will be logged and displayed via the blinking LED procedure when SDM is switched on.

• Error 35 (main NVM). When there is no I communication towards the main NVM during start-up, LAYER 2 error = 35 will be displayed via the blinking LED procedure when SDM is switched “on”. All service modes (CSM, SAM and SDM) are accessible during this failure, observed in the UART logging as follows: "<< ERRO >>> PFPOW_.C: First Error (id19, Layer_1= 2 Layer_= 35)".

• Error 36 (Tuner DVB-S). When there is no I communication towards the DVB-S tuner during start-up, LAYER 2 error = 36 will be logged and displayed via the blinking LED procedure when SDM is switched “on”.

• Error 42 (Temp sensor). Only applicable for TV sets equipped with temperature devices.

• Error 53. This error will indicate that the PNX8550 has read his bootscript (when this would have failed, error 15 would blink) but initialization was never completed because of hardware problems (NAND flash, ...) or software initialization problems. Possible cause could be that there is no valid software loaded (try to upgrade to the latest main software version). Note that it can take a few minutes before the TV starts blinking LAYER 1 error = 2 or in SDM, LAYER 2 error = 53.

• Error 64. Only applicable for TV sets with an I screen.

5.6 The Blinking LED Procedure

5.6.1 Introduction

The blinking LED procedure can be split up into two situations:

• Blinking LED procedure LAYER 1 error. In this case the error is automatically blinked when the TV is put in CSM. This will be only one digit error, namely the one that is referring to the defective board (see table “5-2

overview”) which causes the failure of the TV. This

approach will especially be used for home repair and call centres. The aim here is to have service diagnosis from a distance.

• Blinking LED procedure LAYER 2 error. Via this procedure, the contents of the error buffer can be made visible via the front LED. In this case the error contains 2 digits (see table “5-2 displayed when SDM (hardware pins) is activated. This is especially useful for fault finding and gives more details regarding the failure of the defective board.

Important remark:

For an empty error buffer, the LED should not blink at all in CSM or SDM. No spacer will be displayed.

Error code overview”) and will be

2

C

2

C

2

C

2

C controlled

Error code

2. Two short blinks of 250 ms followed by a pause of 3 s

3. Eight short blinks followed by a pause of 3 s

4. Six short blinks followed by a pause of 3 s

5. One long blink of 3 s to finish the sequence (spacer).

6. The sequence starts again.

5.6.2 How to Activate

Use one of the following methods:

• Activate the CSM. The blinking front LED will show only the latest layer 1 error, this works in “normal operation” mode or automatically when the error/protection is monitored by the Stand-by processor. In case no picture is shown and there is no LED blinking, read the logging to detect whether “error devices” are mentioned. (see section “5.8

Fault Finding and Repair

Tips, 5.8.7 Logging”).

• Activate the SDM. The blinking front LED will show the entire content of the LAYER 2 error buffer, this works in “normal operation” mode or when SDM (via hardware pins) is activated when the tv set is in protection.

5.7 Protections

5.7.1 Software Protections

Most of the protections and errors use either the stand-by microprocessor or the MIPS controller as detection device. Since in these cases, checking of observers, polling of ADCs, and filtering of input values are all heavily software based, these protections are referred to as software protections. There are several types of software related protections, solving a variety of fault conditions:

• Related to supplies: presence of the +5V, +3V3 and 1V2 needs to be measured, no protection triggered here.

• Protections related to breakdown of the safety check mechanism. E.g. since the protection detections are done by means of software, failing of the software will have to initiate a protection mode since safety cannot be guaranteed any more.

Remark on the Supply Errors

The detection of a supply dip or supply loss during the normal playing of the set does not lead to a protection, but to a cold reboot of the set. If the supply is still missing after the reboot, the TV will go to protection.

Protections during Start-up

During TV start-up, some voltages and IC observers are actively monitored to be able to optimize the start-up speed, and to assure good operation of all components. If these monitors do not respond in a defined way, this indicates a malfunction of the system and leads to a protection. As the observers are only used during start-up, they are described in the start-up flow in detail (see section “5.3

5.7.2 Hardware Protections

Stepwise Start-up”).

When one of the blinking LED procedures is activated, the front LED will show (blink) the contents of the error buffer. Error codes greater then 10 are shown as follows:

1. “n” long blinks (where “n” = 1 to 9) indicating decimal digit

2. A pause of 1.5 s

3. “n” short blinks (where “n”= 1 to 9)

4. A pause of approximately 3 s,

5. When all the error codes are displayed, the sequence finishes with a LED blink of 3 s (spacer).

6. The sequence starts again.

Example: Error 12 8 6 0 0. After activation of the SDM, the front LED will show:

1. One long blink of 750 ms (which is an indication of the decimal digit) followed by a pause of 1.5 s

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The only real hardware protection in this chassis appears in case of an audio problem e.g. DC voltage on the speakers. This protection will only affect the Class D audio amplifier (item 7D10; see diagram B03A) and puts the amplifier in a continuous burst mode (cyclus approximately 2 seconds).

Repair Tip

• There still will be a picture available but no sound. While the Class D amplifier tries to start-up again, the cone of the loudspeakers will move slowly in one or the other direction until the initial failure shuts the amplifier down, this cyclus starts over and over again. The headphone amplifier will also behaves similar.

Service Modes, Error Codes, and Fault Finding

EN 35Q552.1L LA 5.

5.8 Fault Finding and Repair Tips

Read also section “5.5 Error Codes, 5.5.4 Error Buffer, Extra

Info”.

5.8.1 Ambilight

Due to degeneration process of the LED’s fitted on the ambi module, there can be a difference in the color and/or light output of the spare ambilight modules in comparison with the originals ones contained in the TV set. Via SAM => alignments => ambilight, the spare module can be adjusted.

5.8.2 Audio Amplifier

The Class D-IC 7D10 has a powerpad for cooling. When the IC is replaced it must be ensured that the powerpad is very well pushed to the PWB while the solder is still liquid. This is needed to insure that the cooling is guaranteed, otherwise the Class DIC could break down in short time.

5.8.3 AV PIP

To check the AV PIP board (if present) functionality, a dedicated tespattern can be invoke as follows: select the “multiview” icon in the User Interface and press the “OK” button. Apply for the main picture an extended source, e.g. HDMI input. Proceed by entering CSM (push ‘123654’ on the remote control) and press the yellow button. A coloured testpattern should appear now, generated by the AV PIP board (this can take a few seconds).

• +5V-TUN supply voltage (5V nominal) for tuner and IF amplifier.

+3V3-STANDY (3V3 nominal) is the permanent voltage, supplying the Stand-by microprocessor inside PNX85500.

Supply voltage +1V1 is started immediately when +12V voltage becomes available (+12V is enabled by STANDBY signal when "low"). Supply voltages +3V3, +2V5, +1V8, +1V2 and +5V-TUN are switched "on" by signal ENABLE-3V3 when "low", provided that +12V (detected via 7U40 and 7U41) is present.

+12V is considered OK (=> DETECT2 signal becomes "high", +12V to +1V8, +12V to +3V3, +12V to +5V DC-DC converter can be started up) if it rises above 10V and doesn’t drop below 9V5. A small delay of a few milliseconds is introduced between the start-up of 12V to +1V8 DC-DC converter and the two other DC-DC converters via 7U48 and associated components.

Description DVB-S2:

• LNB-RF1 (0V = disabled, 14V or 18V in normal operation) LNB supply generated via the second conversion channel of 7T03 followed by 7T50 LNB supply control IC. It provides supply voltage that feeds the outdoor satellite reception equipment.

• +3V3-DVBS (3V3 nominal), +2V5-DVBS (2V5 nominal) and +1V-DVBS (1.03V nominal) power supply for the silicon tuner and channel decoder. +1V-DVBS is generated via a 5V to 1V DC-DC converter and is stabilized at the point of load (channel decoder) by means of feedback signal SENSE+1V0-DVBS. +3V3-DVBS and +2V5-DVBS are generated via linear stabilizers from +5V-DVBS that by itself is generated via the first conversion channel of 7T03.

5.8.4 CSM

When CSM is activated and there is a USB stick connected to the TV, the software will dump the complete CSM content to the USB stick. The file (Csm.txt) will be saved in the root of the USB stick. If this mechanism works it can be concluded that a large part of the operating system is already working (MIPS, USB...)

5.8.5 DC/DC Converter

Description basic board

The basic board power supply consists of 4 DC/DC converters and 5 linear stabilizers. All DC/DC converters have +12V input voltage and deliver:

• +1V1 supply voltage (1.15V nominal), for the core voltage of PNX85500, stabilized close to the point of load; SENSE+1V1 signal provides the DC-DC converter the needed feedback to achieve this.

• +1V8 supply voltage, for the DDR2 memories and DDR2 interface of PNX85500.

• +3V3 supply voltage (3.30V nominal), overall 3.3 V for onboard IC’s, for non-5000 series SSB diversities only.

• +5V (5.15V nominal) for USB, WIFI and Conditional Access Module and +5V5-TUN for +5V-TUN tuner stabilizer.

The linear stabilizers are providing:

• +1V2 supply voltage (1.2V nominal), stabilized close to PNX85500 device, for various other internal blocks of PNX85500; SENSE+1V2 signal provides the needed feedback to achieve this.

• +2V5 supply voltage (2.5V nominal) for LVDS interface and various other internal blocks of PNX85500; for 5000 series SSB diversities the stabilizer is 7UD2 while for the other diversities 7UC0 is used.

• +3V3 supply voltage (3V3 nominal) for 5000 series SSB diversities, provided by 7UD3; in this case the 12V to 3V3 DC-DC converter is not present.

At start-up, +24V becomes available when STANDBY signal is "low" (together with +12V for the basic board), when +3V3 from the basic board is present the two DC-DC converters channels inside 7T03 are activated. Initially only the 24V to 5V converter (channel 1 of 7T03 generating +5V-DVBS) will effectively work, while +V-LNB is held at a level around 11V7 via diode 6T55. After 7T05 is initialized, the second channel of 7T03 will start and generates a voltage higher then LNB-RF1 with 0V8. +5VDVBS start-up will imply +3V3-DVBS start-up, with a small delay of a few milliseconds => +2V5-DVBS and +1V-DVBS will be enabled.

If +24V drops below +15V level then the DVB-S2 supply will stop, even if +3V3 is still present.

Debugging

The best way to find a failure in the DC/DC converters is to check their start-up sequence at power “on” via the mains cord, presuming that the stand-by microprocessor and the external supply are operational. Take STANDBY signal "high"-to-"low" transition as time reference. When +12V becomes available (maximum 1 second after STANDBY signal goes "low") then +1V1 is started immediately. After ENABLE-3V3 goes "low", all the other supply voltages should rise within a few milliseconds.

Tips

• Behavior comparison with a reference TV550 platform can be a fast way to locate failures.

• If +12V stays "low", check the integrity of fuse 1U40.

• Check the integrity (at least no short circuit between drain and source) of the power MOS-FETs before starting up the platform in SDM, otherwise many components might be damaged. Using a ohmmeter can detect short circuits between any power rail and ground or between +12V and any other power rail.

• Short circuit at the output of an integrated linear stabilizer (7UC0, 7UD2 or 7UD3) will heat up this device strongly.

• Switching frequencies should be 500 kHz ...600 kHz for 12 V to 1.1 V and 12 V to 1.8 V DC-DC converters,

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EN 36 Q552.1L LA5.

Service Modes, Error Codes, and Fault Finding

900 kHz for 12 V to 3.3 V and 12 V to 5 V DC-DC converters. The DVB-S2 supply 24 V to 5 V and 24 V to +V LNB DC-DC converters operates at 300 kHz while for 5 V to 1.1 V DC-DC converter 900 kHz is used.

5.8.6 Exit “Factory Mode”

When an “F” is displayed in the screen’s right corner, this means the set is in “Factory” mode, and it normally happens after a new SSB is mounted. To exit this mode, push the “VOLUME minus” button on the TV’s local keyboard for 10 seconds (this disables the continuous mode). Then push the “SOURCE” button for 10 seconds until the “F” disappears from the screen.

5.8.7 Logging

When something is wrong with the TV set (f.i. the set is rebooting) you can check for more information via the logging in Hyperterminal. The Hyperterminal is available in every Windows application via Programs, Accessories, Communications, Hyperterminal. Connect a “ComPair UART”cable (3138 188 75051) from the service connector in the TV to the “multi function” jack at the front of ComPair II box. Required settings in ComPair before starting to log:

- Start up the ComPair application.

- Select the correct database (open file “Q55X.X”, this will set the ComPair interface in the appropriate mode).

- Close ComPair After start-up of the Hyperterminal, fill in a name (f.i. “logging”) in the “Connection Description” box, then apply the following settings:

1. COMx

2. Bits per second = 115200

3. Data bits = 8

4. Parity = none

5. Stop bits = 1

6. Flow control = none During the start-up of the TV set, the logging will be displayed. This is also the case during rebooting of the TV set (the same logging appears time after time). Also available in the logging is the “Display Option Code” (useful when there is no picture), look for item “DisplayRawNumber” in the beginning of the logging. Tip: when there is no picture available during rebooting you are able to check for “error devices” in the logging (LAYER 2 error) which can be very helpful to determine the failure cause of the reboot. For protection state, there is no logging.

5.8.8 Guidelines UART logging

UART loggings reporting fault conditions, error messages, error codes, fatal errors:

• Failure messages should be checked and investigated.For instance fatal error on the PNX51x0: check startup of the back-end processor, supplies..reset, I

2

C bus. => error

mentioned in the logging as: *51x0 failed to start by itself*.

• Some failures are indicated by error codes in the logging, check with error codes table (see Table “5-2

overview”).e.g. => <<<ERROR>>>PLFPOW_MERR.C :

First Error (id=10,Layer_1=2,Layer_2=23).

2

• I

C bus error mentioned as e.g.: “ I2C bus 4 blocked”.

• Not all failures or error messages should be interpreted as fault.For instance root cause can be due to wrong option codes settings => e.g. “DVBS2Suppoprted : False/True.

In the UART log startup script we can observe and check the enabled loaded option codes.

Defective sectors (bad blocks) in the Nand Flash can also be reported in the logging.

Startup in the SW upgrade application and observe the UART logging:

Starting up the TV set in the Manual Software Upgrade mode will show access to USB, meant to copy software content from USB to the DRAM.Progress is shown in the logging as follows: “cosupgstdcmds_mcmdwritepart: Programming 102400 bytes, 40505344 of 40607744 bytes programmed”.

Startup in Jett Mode:

Check UART logging in Jet mode mentioned as : “JETT UART READY”.

UART logging changing preset:

=> COMMAND: calling DFB source = RC6, system=0, key = 4”.

5.8.9 Loudspeakers

Make sure that the volume is set to minimum during disconnecting the speakers in the ON-state of the TV. The audio amplifier can be damaged by disconnecting the speakers during ON-state of the set!

5.8.10 PSL

In case of no picture when CSM (test pattern) is activated and backlight doesn’t light up, it’s recommended first to check the inverter on the PSL + wiring (LAYER 2 error = 17 is displayed in SDM).

Error code

Description possible cases:

UART loggings are displayed:

• When UART loggings are coming out, the first conclusion we can make is that the TV set is starting up and communication with the flash RAM seems to be supported. The PNX85500 is able to read and write in the DRAMs.

• We can not yet conclude : Flash RAM and DRAMs are fully operational/reliable.There still can be errors in the data transfers, DRAM errors, read/write speed and timing control.

No UART logging at all:

• In case there is no UART logging coming out, check if the startup script can be send over the I

2

C bus (3 trials to

startup) + power supplies are switched on and stable.

• No startup will end up in a blinking LED status : error LAYER 1 = “2”, error LAYER 2 = “53” (startup with SDM solder paths short).

• Error LAYER 2 = “15” (hardware cause) is more related to a supply issue while error LAYER 2 = “53” (software cause) refers more to boot issues.

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5.8.11 Tuner

Attention: In case the tuner is replaced, always check the tuner options!

5.8.12 Display option code

Attention: In case the SSB is replaced, always check the display option code in SAM, even when picture is available. Performance with the incorrect display option code can lead to unwanted side-effects for certain conditions.

New in this chassis:

While in the download application (start up in TV mode + “OK” button pressed), the display option code can be changed via 062598 HOME XXX special SAM command (XXX=display option in 3 digits).

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Service Modes, Error Codes, and Fault Finding

H_16771_007a.eps

START

C onn ect the U SB sti ck to the set,

go to SAM and save the current TV settings via “Upload to USB”

Set is stil l operating?

Yes

1.

Discon nect the WiF i module f rom the PC I conn ector (only for Q549.x SSB)

2. Replace the SSB by a Service SSB.

3. Place the WiFi module in the PCI connector.

4. Mount the Service SSB in the set.

Set behaviour?

Yes

No

Ins truction note SSB replacem ent Q543.x, Q548.x, Q549.x, and Q55x.x

Before starting:

- prepare a USB memory stick with the latest software

- download the latest Main Software (Fus) from www.p4c.philips.com

- unzip this file

- create a folder ”upgrades” in the root of a USB stick (size > 50 MB) and save the autorun.upg file in this "upgrades" folder. Note: it is possible to rename this file, e.g."Q54x_SW_version.upg"; this in case there are more than one "autorun.upg" files on the USB stick.

No pic ture displayed

Pic ture displayed

Set is starting up without software upgrade menu appearing on screen

Pic ture displayed

Set is starting up with software upgrade menu appearing on screen

Due to a possible wrong display option code in the received Service SSB (NVM), it’s possible that no picture is displayed. Due to this

the download application will not be shown either. This tree enables you to load the main software step-by-step via the UART logging on the PC (this for visual feedback).

Start-up the set

1) Start up the TV set, equiped with the Service

SSB,

and enable the UART logging on the PC.

2) The TV set will start-up automatically in the

download application if main TV software is not loaded.

3) Plug the prepared USB stick into the TV set. Follow the

instructions in the UART log file, press “Right” cursor key to enter

the list. Navigate to the “autorun.upg” file in the UART logging

printout via the cursor keys on the remote control. When the

correct file is selected, press

“Ok”.

4) Press "Down" cursor and “Ok” to start flashing the main TV software. Printouts like: “L: 1-100%, V: 1-100% and P: 1-100%” should be visible now in the UART logging.

5) Wait until the message “Operation successful !” is logged in

the UART log and remove all inserted media. Restart the TV set.

1) Plug the USB stick into the TV set a

nd select

the “autorun .upg” file in the displayed browser.

2) Now the main software will be loaded automatically,

supported by a progress bar.

3) Wait until the message “Operation successful !” is displayed and remove all inserted media. Restar t the TV set.

Set the correct “Display code” via “06259

8 -HOME- xxx” where

“xxx” is the 3 digit display panel code (see sticker on the side

or bottom of the cabinet)

After entering the “Display Option” code, the set is going to

Standby

(= validation of code)

Restart the set

Connect PC via the ComPair interface to Service connector.

Start TV in Jett mode (DVD I + (OSD))

Open ComPair browser Q54x

Program set type number, serial number, and di

splay 12 NC

Program E - DFU if needed.

Go to SAM and reload settings

via “Download from USB” function.

In case of settings reloaded from USB, the set type, serial number, display 12 NC, are automatically stored when entering display options.

- Check if correct “display option” code is programmed.

- Verify “option codes” according to sticker inside the set.

- Default

settings for “white drive” > see Service Manual.

Q54x.E SSB Board swap – VDS Updated 22-03-2010

If not already done:

Check latest software on Service website.

Update main and Stand-by software via USB.

Check and perform alignments in SAM according to the Service Manual. Option codes, colour temperature, etc.

Final check of a

ll menus in CSM.

Special attention for HDMI Keys and Mac address.

Check if E - D F U is present.

End

Attention point for Net TV: If the set type and serial number are not filled in, the Net TV functionality will not work. It will not be possible to connect to the internet.

Saved settings on USB stick?

5.8.13 SSB Replacement

Follow the instructions in the flowchart in case a SSB has to be exchanged. See figure “SSB replacement flowchart”.

EN 37Q552.1L LA 5.

Figure 5-11 SSB replacement flowchart

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EN 38 Q552.1L LA5.

H_16771_007b.eps

100322

Resta rt the set

Set is starting up in Factory mode

Set is sta rting up in Factory m ode?

Noisy picture with bands/lines is visible and the

RED LED is continuous on.

An “F” is displayed (and the HDMI 1

input is displayed).

- Press the “volume minus” button on the TVs local keyboard for 5 ~10 seconds

- Press the “SOURCE” button for 10 seconds until the “F” disappears

from the screen or the noise on the screen is replaced by “blue mute”

The noise on the screen is replaced

with the

blue mute or the “F” is disappeared!

Unplug the mains cord to verify the correct

disabling of the Factory mode.

Program display option code

via “062598 MENU”, followed by

the 3 digits code of the display

(this code can be found

on a sticker on - or inside - the set).

After entering “display option” code, the set is

going in stand-by mode (= validation of code)

Service Modes, Error Codes, and Fault Finding

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Figure 5-12 SSB replacement flowchart - Factory mode

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Service Modes, Error Codes, and Fault Finding

18753_211_100811.eps

100811

EN 39Q552.1L LA 5.

5.9 Software Upgrading

5.9.1 Introduction

The set software and security keys are stored in a NANDFlash, which is connected to the PNX85500.

It is possible for the user to upgrade the main software via the USB port. This allows replacement of a software image in a stand alone set, without the need of an E-JTAG debugger. A description on how to upgrade the main software can be found in the electronic User Manual.

Important: When the NAND-Flash must be replaced, a new SSB must be ordered, due to the presence of the security keys! (CI +, MAC address, ...). Perform the following actions after SSB replacement:

1. Set the correct option codes (see sticker inside the TV).

2. Update the TV software => see the eUM (electronic User Manual) for instructions.

3. Perform the alignments as described in chapter 6 (section

6.5

Reset of Repaired SSB).

4. Check in CSM if the CI + key, MAC address.. are valid.

For the correct order number of a new SSB, always refer to the Spare Parts list!

5.9.2 Main Software Upgrade

• The “UpgradeAll.upg” file is only used in the factory.

Figure 5-13 SSB start-up

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Automatic Software Upgrade

In “normal” conditions, so when there is no major problem with the TV, the main software and the default software upgrade application can be upgraded with the “AUTORUN.UPG” (FUS part of the one-zip file: e.g. 3104 337 05661 _FUS _Q555X_ x.x.x.x_prod.zip). This can also be done by the consumers themselves, but they will have to get their software from the commercial Philips website or via the Software Update Assistant in the user menu (see eUM). The “autorun.upg” file must be placed in the root of the USB stick. How to upgrade:

1. Copy “AUTORUN.UPG” to the root of the USB stick.

2. Insert USB stick in the set while the set is operational. The set will restart and the upgrading will start automatically. As soon as the programming is finished, a message is shown to remove the USB stick and restart the set.

Manual Software Upgrade

In case that the software upgrade application does not start automatically, it can also be started manually. How to start the software upgrade application manually:

1. Disconnect the TV from the Mains/AC Power.

2. Press the “OK” button on a Philips TV remote control or a Philips DVD RC-6 remote control (it is also possible to use a TV remote in “DVD” mode). Keep the “OK” button pressed while reconnecting the TV to the Mains/AC Power.

3. The software upgrade application will start.

Attention!

In case the download application has been started manually, the “autorun.upg” will maybe not be recognized. What to do in this case:

1. Create a directory “UPGRADES” on the USB stick.

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EN 40 Q552.1L LA5.

2. Rename the “autorun.upg” to something else, e.g. to “software.upg”. Do not use long or complicated names, keep it simple. Make sure that “AUTORUN.UPG” is no longer present in the root of the USB stick.

3. Copy the renamed “upg” file into this directory.

4. Insert USB stick into the TV.

5. The renamed “upg” file will be visible and selectable in the upgrade application.

Back-up Software Upgrade Application

If the default software upgrade application does not start (could be due to a corrupted boot sector) via the above described method, try activating the “back-up software upgrade application”. How to start the “back-up software upgrade application” manually:

1. Disconnect the TV from the Mains/AC Power.

2. Press the “CURSOR DOWN”-button on a Philips TV remote control while reconnecting the TV to the Mains/AC Power.

3. The back-up software upgrade application will start.

5.9.3 Stand-by Software Upgrade via USB

In this chassis it is possible to upgrade the Stand-by software via a USB stick. The method is similar to upgrading the main software via USB. Use the following steps:

1. Create a directory “UPGRADES” on the USB stick.

2. Copy the Stand-by software (part of the one-zip file, e.g. StandbyFactory_88.0.0.0.upg) into this directory.

3. Insert the USB stick into the TV.

4. Start the download application manually (see section “

Manual Software Upgrade”.

5. Select the appropriate file and press the “OK” button to upgrade.

Service Modes, Error Codes, and Fault Finding

5.9.4 Content and Usage of the One-Zip Software File

Below the content of the One-Zip file is explained, and instructions on how and when to use it.

• AmbiCpld_Q55XX_x.x.x.x_prod.zip. Contains the program instruction and software content, needed to upgrade the ambilight CPLD on the TV550 platform.

• BalanceFPGA_Q555X_x.x.x.x_prod.zip. Contains the BalanceFPGA software in “upg” format.

• FUS_Q555X_x.x.x.x_prod.zip. Contains the “autorun.upg” which is needed to upgrade the TV main software and the software download application.

• PNX5130UPG_Q555X_x.x.x.x_prod.zip. Contains the PNX5130 software in “upg” format.

• StandbySW_Q555X_x.x.x.x_prod.zip. Contains the StandbyFactory software in “upg” format.

• ProcessNVM_Q55XX_x.x.x.x_prod.zip. Default NVM content. Must be programmed via ComPair or can be loaded via USB, be aware that all alignments stored in NVM are overwritten here.

5.9.5 UART logging 2K10 (see section “5.8

Fault Finding and

Repair Tips, 5.8.7 Logging)

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6. Alignments

Alignments

EN 41Q552.1L LA 6.

Index of this chapter:

6.1

General Alignment Conditions

6.2 Hardware Alignments

6.3 Software Alignments

6.4 Option Settings

6.5 Reset of Repaired SSB

6.6 Total Overview SAM modes

6.1 General Alignment Conditions

Perform all electrical adjustments under the following conditions:

• Power supply voltage (depends on region): – AP-NTSC: 120 VAC or 230 V – AP-PAL-multi: 120 - 230 V – EU: 230 V

/ 50 Hz ( 10%).

AC

– LATAM-NTSC: 120 - 230 V – US: 120 V

/ 60 Hz ( 10%).

AC

/ 50 Hz ( 10%).

AC

/ 50 Hz ( 10%).

AC

/ 50 Hz ( 10%).

AC

• Connect the set to the mains via an isolation transformer with low internal resistance.

• Allow the set to warm up for approximately 15 minutes.

• Measure voltages and waveforms in relation to correct ground (e.g. measure audio signals in relation to AUDIO_GND). Caution: It is not allowed to use heat sinks as ground.

• Test probe: Ri > 10 M, Ci < 20 pF.

• Use an isolated trimmer/screwdriver to perform alignments.

6.1.1 Alignment Sequence

• First, set the correct options: – In SAM, select “Option numbers”. – Fill in the option settings for “Group 1” and “Group 2”

according to the set sticker (see also paragraph 6.4

Option Settings).

– Press OK on the remote control before the cursor is

moved to the left.

– In submenu “Option numbers” select “Store” and press

OK on the RC.

•OR: – In main menu, select “Store” again and press OK on

the RC.

– Switch the set to Stand-by.

• Warming up (>15 minutes).

6.2 Hardware Alignments

Not applicable.

6.3 Software Alignments

Put the set in SAM mode (see Chapter 5. Service Modes, Error

Codes, and Fault Finding). The SAM menu will now appear on

the screen. Select ALIGNMENTS and go to one of the sub menus. The alignments are explained below. The following items can be aligned:

• White point

• Ambilight

• TCON Alignment

• Reset TCON Alignment.

To store the data:

• Press OK on the RC before the cursor is moved to the

left

• In main menu select “Store” and press OK on the RC

• Switch the set to stand-by mode.

For the next alignments, supply the following test signals via a video generator to the RF input:

• EU/AP-PAL models: a PAL B/G TV-signal with a signal strength of at least 1 mV and a frequency of 475.25 MHz

• US/AP-NTSC models: an NTSC M/N TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3).

• LATAM models: an NTSC M TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3).

6.3.1 White Point

• Choose “TV menu”, “Setup”, “More TV Settings” and then “Picture” and set picture settings as follows:

Picture Setting

Contrast 100

Brightness 50

Colour 0

Light Sensor Off

Picture format Unscaled

• In menu “Picture”, choose “Pixel Plus HD” and set picture settings as follows:

Picture Setting

Dynamic Contrast Off

Dynamic Backlight Off

Colour Enhancement Off

Gamma 0

• Go to the SAM and select “Alignments”-> “White point”.

White point alignment LCD screens:

• Use a 90% white screen to the HDMI input and set the following values: – “Color temperature”: “Normal”. – All “White point” values to: “127”.

In case you have a color analyzer:

• Measure, in a dark environment, with a calibrated contactless color analyzer (Minolta CA-210 or Minolta CS-

200) in the centre of the screen.

• Adjust the correct x, y coordinates (while holding one of the White point registers R, G or B on 127) by means of decreasing the value of one or two other white points to the correct x, y coordinates (see Table 6-1

White D alignment values CCFL backlight panels, 6-2 White D alignment values - LED - Minolta CA-210 or 6-3 White D alignment values - LED - Minolta CS-200). Tolerance: dx:  0.002, dy:

 0.002.

• Repeat this step for the other color temperatures that need to be aligned.

• When finished press OK on the RC and then press STORE (in the SAM root menu) to store the aligned values to the NVM.

• Restore the initial picture settings after the alignments.

Table 6-1 White D alignment values CCFL backlight panels

Value Cool (11000K) Normal (9000K) Warm (6500K)

x 0.276 0.287 0.313

y 0.282 0.296 0.329

Table 6-2 White D alignment values - LED - Minolta CA-210

Value Cool (9420K) Normal (8120K) Warm (6080K)

x 0.282 0.292 0.320

y 0.298 0.311 0.345

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Alignments

Table 6-3 White D alignment values - LED - Minolta CS-200

Value Cool (11000K) Normal (9000K) Warm (6500K)

x 0.276 0.287 0.313

y 0.282 0.296 0.329

If you do not have a color analyzer, you can use the default values. This is the next best solution. The default values are average values coming from production.

• Select a COLOUR TEMPERATURE (e.g. COOL, NORMAL, or WARM).

• Set the RED, GREEN and BLUE default values according to the values in Table 6-4

to Table 6-6.

• When finished press OK on the RC, then press STORE (in the SAM root menu) to store the aligned values to the NVM.

• Restore the initial picture settings after the alignments.

Table 6-4 White tone default alignment setting van Gogh

van Gogh 32PFL5615D 40PFL5615D 46PFL5615D

Colour Temp RGBRGBRGB

Normal 117 126 112 111 124 124 122 127 111

Cool 112 125 125 96 113 126 118 126 125

Warm 127 124 75 125 126 90 127 121 71

Table 6-5 White tone default alignment setting da Vinci

da Vinci 32PFL6615D 40PFL6615D 46PFL6615D

Colour Temp RGBRGBRGB

Normal 117 127 114 108 126 126 t.b.d. t.b.d. t.b.d.

Cool 112 126 126 92 113 127 t.b.d. t.b.d. t.b.d.

Warm 126 125 76 123 127 92 t.b.d. t.b.d. t.b.d.

Matrix # fR fG fB

Matrix 4 0.95 1 1

Matrix 5 1 0.95 1

Matrix 6 1 1 0.95

Matrix 7 1 0.97 0.95

Matrix 8 0.97 0.95 1

Matrix 9 0.95 0.97 1

6.3.3 TCON/VCOM alignment

Sets with forward integration have the TCON on SSB. The alignment of this TCON is stored in the SSB, and is related to the used display. When an SSB or a display is replaced, a new value must be entered. A default value (see table below) is copied from the display file (after entering the correct display code) and is shown in the SAM menu. But on top of this, the default value can be overruled manually via the menu item “TCON alignment”. The current value is shown with 4 digits, and can be changed by a digit entry. After pressing “OK”, the value is stored. The menu item "Reset TCON alignment" can be used to return to the default value from the display file. A notification is shown: "TCON alignment has been reset".

Table 6-8 TCON default alignment setting van Gogh

Panel Panel VCOM default

SHP (Max:1023)

32 LED 106

40 LED 89

46 LED 132

Table 6-9 TCON default alignment setting da Vinci

Table 6-6 White tone default alignment setting Matisse

Matisse 40PFL8605D 52PFL8605D

Colour Temp RGBRGBRGB

Normal 112 127 106 110 127 104

Cool 107 126 118 106 127 117

Warm 124 126 70 122 127 69

6.3.2 Ambilight

Every ambient light module is aligned by a matrix and by the brightness. After replacement of a module, the brightness/color must be aligned with the other modules:

1. Go to SAM.

2. Select “Alignments”.

3. Select “Ambilight”. A white test pattern shall be displayed by the ambilight modules.

4. Select the number of the module that have to be aligned. Module 1 is the first one which will come across according the wiring path, starting at the small signal panel, proceeding towards the ambient light modules.The first module will be attached to the next module 2. Module number 2 to number 3 etc..as follows the way to define the ambilight module numbering.

5. Align the brightness compared with the neighboring modules. The brightness is automatically stored.

6. Select one of 10 matrixes which color matches most with the neighboring modules, “matrix 0” is the factory alignment and can always be retrieved. (see table “6-7

Overview matrix correction table

7. The alignment is stored automatically.

Table 6-7 Overview matrix correction table

Matrix # fR fG fB

Matrix 0 1 1 1

Matrix 1 1 0.95 0.95

Matrix 2 0.95 1 0.95

Matrix 3 0.95 0.95 1

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Panel Panel VCOM default

SHP (Max:1023)

Table 6-10 TCON default alignment setting Matisse

Panel Panel VCOM default

SHP

Note: 1). no TCON alignment required.

6.4 Option Settings

6.4.1 Introduction

The microprocessor communicates with a large number of I ICs in the set. To ensure good communication and to make digital diagnosis possible, the microprocessor has to know which ICs to address. The presence / absence of these PNX51XX ICs (back-end advanced video picture improvement IC which offers motion estimation and compensation features (commercially called HDNM) plus integrated Ambilight control) is made known by the option codes.

Notes:

• After changing the option(s), save them by pressing the OK

• The new option setting is only active after the TV is

6.4.2 Dealer Options

For dealer options, in SAM select “Dealer options”.

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32 LED 106

40 LED 89

46 LED 132

40 LED n.a.

52 LED n.a.

1

2

button on the RC before the cursor is moved to the left, select STORE in the SAM root menu and press OK on the RC.

switched “off” / “stand-by” and “on” again with the mains switch (the NVM is then read again).

C

Alignments

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See Table 6-11 SAM mode overview.

6.4.3 (Service) Options

Select the sub menu's to set the initialization codes (options) of the model number via text menus. See Table 6-11

SAM mode overview.

6.4.4 Opt. No. (Option numbers)

Select this sub menu to set all options at once (expressed in two long strings of numbers). An option number (or “option byte”) represents a number of different options. When you change these numbers directly, you can set all options very quickly. All options are controlled via eight option numbers. When the NVM is replaced, all options will require resetting. To be certain that the factory settings are reproduced exactly, you must set both option number lines. You can find the correct option numbers on a sticker inside the TV set. Example: The options sticker gives the following option numbers:

• 08192 00133 01387 45160

• 12232 04256 00164 00000 The first line (group 1) indicates hardware options 1 to 4, the second line (group 2) indicate software options 5 to 8. Every 5-digit number represents 16 bits (so the maximum value will be 65536 if all options are set). When all the correct options are set, the sum of the decimal values of each Option Byte (OB) will give the option number.

6.5.1 SSB identification

Whenever ordering a new SSB, it should be noted that the correct ordering number (12nc) of a SSB is located on a sticker on the SSB. The format is <12nc SSB><serial number>. The ordering number of a “Service” SSB is the same as the ordering number of an initial “factory” SSB.

Figure 6-1 SSB identification

Diversity

Not all sets with the same Commercial Type Number (CTN) necessarily have the same option code! Use of Alternative BOM => an alternative BOM number usually indicates the use of an alternative display or power supply. This results in another display code thus in another Option code. Refer to Chapter 2.

Technical Specifications, and Connections.

6.4.5 Option Code Overview

Refer to the sticker in the set for the correct option codes. Important: after having edited the option numbers as described above, you must press OK on the remote control

before the cursor is moved to the left!

6.5 Reset of Repaired SSB

A very important issue towards a repaired SSB from a Service repair shop (SSB repair on component level) implies the reset of the NVM on the SSB. A repaired SSB in Service should get the service Set type “00PF0000000000” and Production code “00000000000000”. Also the virgin bit is to be set. To set all this, you can use the ComPair tool or use the “NVM editor” and “Dealer options” items in SAM (do not forget to “store”).

After a repaired SSB has been mounted in the set (set repair on board level), the type number (CTN) and production code of the TV has to be set according to the type plate of the set. For this (new in this platform), you can use the NVM editor in SAM. This action also ensures the correct functioning of the “Net TV” feature and access to the Net TV portals. The loading of the CTN and production code can also be done via ComPair (Model number programming).

In case of a display replacement, reset the “Operation hours display” to “0”, or to the operation hours of the replacement display.

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6.6 Total Overview SAM modes

Table 6-11 SAM mode overview

Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description

Hardware Info A. SW version e.g. “Q5521_0.33.0.0 Display TV & Stand-by SW version and CTN serial

B. Stand-by processor version e.g. “STDBY_42.42.0.0”

C. Production code e.g. “see type plate”

Operation hours Displays the accumulated total of operation hours.TV

Errors Displayed the most recent errors

Reset error buffer Clears all content in the error buffer

Alignment White point Colour temperature Normal 3 different modes of colour temperature can be se-

Ambilight Select module

TCON alignment used when a new display code (after a SSB

Reset TCON alignment used when a new display code (after a SSB

Dealer options Virgin mode Off/On

E-sticker Off/On Select E-sticker On/Off (USP’s on-screen)

Auto store mode None

Alignments

White point red

White point green

White point blue

Brightness

Select matrix

PDC/VPS

TXT page

PDC/VPS/TXT

Warn

Cool

number

switched “on/off” & every 0.5 hours is increase one

lected

LCD White Point Alignment. For values, see Table 6-4 White tone default alignment setting

van Gogh until 6-6 White tone default alignment setting Matisse

exchange) is keyed-in and if you have alignment values from production; see Tables 6-8 TCON

default alignment setting van Gogh and 6-10 TCON default alignment setting Matisse

exchange) is keyed-in and if you do not have alignment values from production

Select Virgin mode On/Off. TV starts up / does not start up (once) with a language selection menu after the mains switch is turned “on” for the first time (virgin mode)

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Alignments

Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description

Options Digital broadcast DVB Off/On Select DVB On/Off

DVB - T installation Off/On or Country dependent Select DVB T installation On/Off or by country

DVB - T light Off/On Select DVB T light On/Off

DVB - C Off/On Select DVB C On/Off

DVB - C installation Off/On or Country dependent Select DVB C installation On/Off or by country

DVB - C light Off/On Select DVB C light On/Off

DVB - S Off/On Select DVB S On/Off

Over the air download Off/On or Country dependent Select Over the air download On/Off or by country

8 days EPG Off/On Select 8 day EPG On/Off

Digital features Ethernet Off/On Select Ethernet On/Off

Wi-Fi Off/On Select Wi-Fi On/Off

DLNA Off/On Select DLNA On/Off

On-line service On On-line service is On

Videostore SD card slot Off/On Select Videostore SD card slot On/Off

Multiview Off/On Select Multiview On/Off

Internet software update Off Internet software update is Off

Display Screen 237 / LCD Sharp D3GA23 46" Displayed the panel code & type model

LightGuide Off/On Select LightGuide On/Off

Display fans Not present/Present Select Display fans Present/Not present

Temperature sensor No sensor/On backside/In display/

Temperature LUT 0 N.A.

E-box & monitor Off/On Select E-box & monitor On/Off

Video reproduction Light sensor Off/On Select Light sensor On/Off

Audio reproduction Acoustic system Cabinet design used for setting dynamic audio pa-

Source selection EXT1/AV1 type SCART CVBS RGB LR Select input source when connected with external

Miscellaneous Region Europe Select Region/country

Light sensor type 0/1/2/3 Select Light sensor type form 0 to 3 (for difference

Super resolution Off/On Super resolution Off/On

Smart bit enhancement Off/On Smart bit enhancement Off/On

Pixel Plus type Pixel Plus HD Select type of picture improvement

Natural motion type Perfect Natural Motion Natural motion type selection

Ambilight None Select type of Ambilight modules use

Ambilight sunset Off/On Ambilight sunset On/Off

EXT2/AV2 type SCART CVBS RGB LR Select input source when connected with external

EXT3/AV3 type None Select input source when connected with external

SIDE I/O Off/On Select SIDE I/O On/Off

S-VIDEO (Y/C) Off/On Select S-VIDEO (Y/C) On/Off

HDMI 2 Off/On Select HDMI 2 On/Off

HDMI 3 Off/On Select HDMI 3 On/Off

HDMI side Off/On Select HDMI side On/Off

HDMI CEC Viewport 21:9 Off/On Select HDMI CEC Viewport 21:9 On/Off

HDMI CEC OneUX seamless Off/On Select HDMI CEC OneUX seamless On/Off

Tuner type Select type of Tuner used

Hotel mode Off Hotel mode is Off

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On SSB

Perfect Pixel HD

Pixel Precise HD

HD Natural Motion

2 sided 3/3

2 sided 4/4

2 sided 5/5

2 sided 6/6

2 sided 7/7

3 sided 5/5/5

3 sided 6/6/6

3 sided 7/7/7

3 sided 6/9/6

CVBS Y/C YPbPr LR

CVBS Y/C YPbPr HV LR

CVBS LR

YPbPr LR

None

CVBS

CVBS LR

CVBS Y/C LR

YPbPr

YPbPr LR

YPbPr HV LR

AP-PAL-Multi

China

Australia

Latam

Russia

Sensor present Yes/No and in case Yes, where

styling)

rameters

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Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description

Option numbers Group 1 e.g. “00008.01793.15421.08192” The first line (group 1) indicates hardware options 1

Group 2 e.g. “44013.34315.00000.00000” The second line (group 2) indicates software options

Initialise NVM N.A.

Store

Operation hours display 0003 In case the display must be swapped for repair, you

Software maintenance Software events Display Display information is for development purposes

Test setting Digital info Centre frequency: 774605208

Development file versions

Upload to USB All To upload several settings from the TV to an USB

Download from USB All To download several settings from the USB stick to

NVM editor Type number see type plate NVM editor; re key-in type number and production

Store Store after changing

Hardware events Display Display information is for development purposes

Install start frequency 000 Install start frequency from “0” MHz

Install end frequency 999 Install end frequency as “999” MHz

Default install frequency

Installation Digital only Select Digital only or Digital + Analogue before instal-

Development 1 file version Display parameters DISPT6.0.9.8 Display information is for development purposes

Development 2 file version 12NC one zip software Display information is for development purposes

Channel list

Personal settings

Option codes

Alignments

Identification data

History list

Channel list

Personal settings

Option codes

Alignments

Identification data

AG code see type plate

Alignments

to 4

5 to 8

Select Store in the SAM root menu after making any changes

can reset the “”Display operation hours” to “0”. So, this one does keeps up the lifetime of the display itself (mainly to compensate the degeneration behaviour)

Clear

Test reboot

Test cold reboot

Test application crash

Clear

QAM modulation: None Display information is for development purposes

Symbol rate:

Original network ID: 0

Network ID: 0

Transport stream ID: 0

Service ID: 0

Hierarchical modulation: 0

Selected video PID: 0

Selected main audio PID: 0

Selected 2nd audio PID: 0

Digital + Analogue

Acoustics parameters ACSTS

0.39.6.16

PQ - TV550 1.0.22.1

PQS- Profile set

PQF - Fixed settings

PQU - User styles

Ambilight parameters PRFAM 5.0.2.4

Initial main software

NVM version Q55x1_0.3.1.0

Flash units software

Temp com file version none

lation

stick

the TV

code after SSB replacement

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7. Circuit Descriptions

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Circuit Descriptions

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Index of this chapter:

7.1

Introduction

7.2 Power Architecture

7.3 DC/DC Converters

7.4 Front-End Analogue and DVB-T, DVB-C; ISDB-T reception

7.5 HDMI

7.6 Video and Audio Processing - PNX85500

7.7 Back-End

7.8 Ambilight

7.9 TCON

Notes:

•Only new circuits (circuits that are not published recently) are described.

• Figures can deviate slightly from the actual situation, due to different set executions.

• For a good understanding of the following circuit descriptions, please use the wiring, block (see chapter

9.

Block Diagrams) and circuit diagrams (see chapter

10.

Circuit Diagrams and PWB Layouts). Where

necessary, you will find a separate drawing for clarification.

7.1 Introduction

The Q552.1L LA chassis is part of the TV550 platform and comes with the following stylings: “van Gogh” (series xxPFL5xxx), “Da Vinci” (series xxPFL6xxx) and “Matisse” (series xxPFL8xxx). The TV550 platform is the successor of the TV543 platform.

7.1.1 Implementation

Key components of this chassis are:

• PNX85500 System-On-Chip (SOC) TV Processor

• TX31XX Hybrid Tuner (DVB-T/C, analogue)

• SII9x87 HDMI Switch

• TPA312xD2PWP Class D Power Amplifier

• LAN8710 Dual Port Gigabit Ethernet media access controller.

7.1.2 TV550 Architecture Overview

For details about the chassis block diagrams refer to chapter

Block Diagrams. An overview of the TV550 architecture can be

found in Figure 7-1

.

9.

Figure 7-1 Architecture of TV550 platform - TCON integrated in display (xxPFL8xxx)

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Class-

D

1M991M95

CA

LOW PROFILE

FLASH

Pr

Pb

Y

DDR

Tuner

9187

OUT0

3

R

L

HDMI 1.3 HDMI 1.3 HDMI 1.3

RJ45

Circuit Descriptions

Figure 7-2 Architecture of TV550 platform - TCON integrated on SSB (xxPFL5xxx & xxPFL6xxx)

7.1.3 SSB Cell Layout

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Figure 7-3 SSB layout cells (top view) TCON integrated in display (xxPFL8xxx)

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DVB-S

TCON

Tuner

HDMI 1.3 VGAHDMI 1.3HDMI 1.3

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Figure 7-4 SSB layout cells (top view) TCON integrated on SSB (xxPFL5xxx & xxPFL6xxx)

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7.2 Power Architecture

Refer to figure Figure 7-5 for the power architecture of this platform.

Circuit Descriptions

Figure 7-5 Power Architecture TV550 platform

7.2.1 Power Supply Unit

All power supplies are a black box for Service. When defective, a new board must be ordered and the defective one must be returned, unless the main fuse of the board is broken. Always replace a defective fuse with one with the correct specifications! This part is available in the regular market. Consult the Philips Service web portal for the order codes of the boards.

Important delta’s with the TV543 platform are:

• New power architecture for LED backlight (PSL, PSLS, PSDL)

• “Boost”-signal is now a PWM-signal + continuous variable.

The control signals are:

• Standby

• Lamp “on/off”

• DIM (PWM) (not for PSDL)

• Boost (PWM except for IPB)

• Power-OK: indicates that the main converter is functioning (feedback signal to the SSB).

In this manual, no detailed information is available because of design protection issues.

• Output to the display; in case of

- IPB: High voltage to the LCD panel

- PSL and PSLS (LED-driver outputs)

- PSDL (high frequent) AC-current.

7.2.2 Diversity

The diversity in power supply units is mainly determined by the diversity in displays.

The following displays can be distinguished:

• CCFL/EEFL backlight: power board is conventional IPB

• LED backlight:

- side-view LED without scanning: PSL power board

- side-view LED with scanning: PSLS power board

- direct-view LED without 2D-dimming: PSL power board

- direct-view LED with 2D-dimming: PSDL power board.

• PSL stands for Power Supply with integrated LED-drivers.

• PSLS stands for a Power Supply with integrated LEDdrivers with added Scanning functionality (added microcontroller).

• PSDL stands for a Power Supply for Direct-view LED backlight with 2D-dimming.

The output voltages to the chassis are:

• +3V3-STANDBY (standby-mode only)

• +12V (on-mode)

• +Vsnd (+24V) (audio power) (on-mode)

• +24V (bolt-on power) (on-mode)

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Circuit Descriptions

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7.2.3 Connector overview

Table 7-1 Connector overview

Connector

no. 1308 1311 1319 1316 1M95 1M99 1M09 1MP1

Descr. mains mains disp. disp. to SSB to SSB Amb. T-con

Pin CN1 CN2 CN3 CN4 CN5 CN6 CN7 CN8

1 N L’ t.b.d. t.b.d. 3V3std +12V 24Vb +12V

2 L L” t.b.d. t.b.d. Stndby +12V 24Vb +12V

3 - - - - GND1 GND1 GND1 n.c.

4 - - - - GND1 GND1 GND1 GND1

5----GND1BL_ON

6----+12VDIM--

7----+12VBoost--

8----+12Vn.c.--

9----+VsndPOK--

10----GND_

11----n.c.---

12--------

_OFF

---

SND

7.3 DC/DC Converters

The on-board DC/DC converters deliver the following voltages (depending on set execution):

• +3V3-STANDBY, permanent voltage for the standby controller, LED/IR receiver and controls; connector 1M95 pin 1

• +12V, input from the power supply for TV550 common (active mode); connector 1M95 pins 6, 7 and 8

• +24V, input from the power supply for DVB-S2 (in active mode); connector 1M09 pins 1 and 2

• +1V1, core voltage supply for PNX85500; has to be started up first and switched “off” last (diagram B03B)

• +1V2, supply voltage for analogue blocks inside PNX85500

• +1V8, supply voltage for DDR2 (diagram B03B)

• +2V5, supply voltage for analogue blocks inside PNX85500 (see diagram B03E)

• +3V3, general supply voltage (diagram B03E)

• +5V, supply voltage for USB and CAM (diagram B03E)

• +5V-TUN, supply voltage for tuner (diagram B03E)

• +V-LNB, input voltage for LNB supply IC (item no. 7T50)

• +5V-DVBS, input intermediate supply voltage for DVB-S2 (diagram B08A)

• +3V3-DVBS, clean voltage for silicon tuner and DVB-S2 channel decoder

• +2V5-DVBS, clean voltage for DVB-S2 channel decoder

• +1V-DVBS, core voltage for DVB-S2 channel decoder.

A +12 V under-voltage detector (see diagram B03C) enables the 12V to 3.3V and 12V to 5V DC/DC converters via the ENABLE-3V3-5V line, and the 12V to 1.8V DC/DC converter via the ENABLE-1V8 line. DETECT2 is the signal going to the standby microcontroller and ENABLE-3V3n is the signal coming from the standby microcontroller.

Diagram B03D contains the following linear stabilizers:

• +2V5 stabilizer, built around item no. 7UCO

• +5V-TUN stabilizer, built around items no. 7UA6 and 7UA7

• +1V2 stabilizer, built around items no. 7UA3 and 7UA4.

- GND1

• the LNBH23Q (item no. 7T50) sends a feedback signal via the V0-CNTRL line

• the switching frequency of the +5V-DVBS to +1-DVBS switched mode converter is 900 kHz (item no. 7T00)

• a delay line for the +2V5-DVBS and +1V-DVBS lines is created with item no. 3T03 (R=10k) and 2T06 (C=100n)

• a 3.3V to 2.5V linear stabilizer is built around item no. 7T01

• a 5V to 3.3V linear stabilizer is built around item no. 7T02.

7.4 Front-End Analogue and DVB-T, DVB-C; ISDB-T reception

7.4.1 European/Asia Pacific region

The Front-End for the European/Asia Pacific region consist of the following key components:

•Hybrid Tuner

• Switchable SAW filter 7/8 MHz (Eur.), or single SAW filter

(8 MHz) (Asia Pacific)

• Bandpass filter

•Amplifier

• PNX85500 SoC TV processor with integrated DVB-T and

DVB-C channel decoder and analogue demodulator.

Below find a block diagram of the front-end application for this region.

Figure 7-6 Front-End block diagram European/Asia Pacific region

7.4.2 Latin American region

The Front-End for the Latin American region consist of the following key components:

• Hybrid Tuner with integrated SAW filter and amplifier

• External ISDB-T channel decoder covering the Brazilian

digital terrestrial TV standard

• Bandpass filter

•Amplifier

• PNX85500 SoC TV with integrated analogue demodulator.

Below find a block diagram of the front-end application for this region.

Diagram B08A contains the DVB-S2-related DC/DC converters and -stabilizers:

• a +24V under-voltage detection circuitry is built around item no. 7T04

• the switching frequency of the 24 to 14...20V switched mode converter is 350 kHz (item no. 7T03 and +V-LNB lines)

• the output signal on the +V-LNB line goes to the LNBH23Q (item no. 7T50)

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Figure 7-7 Front-End block diagram Latin American region

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Circuit Descriptions

7.5 HDMI

In this platform, the Silicon Image Sil9x87 HDMI multiplexer is implemented. Refer to figure 7-8 the application.

New in this platform is the implementation of the Audio Return Channel (ARC) (pin 14 on HDMI 1). The ARC in HDMI1.4 enables a TV, via a single HDMI cable, to send audio data “upstream” to an A/V receiver or surround audio controller, increasing user flexibility and eliminating the need for any separate SPDIF audio connection.

HDMI input configuration for

• Embedded HDMI HDCP keys

• Extended color gamut and color booster

• Integrated USB2.0 host controller

• Improved MPEG artefact reduction compared with PNX8543

• Security for customers own code/settings (secure flash).

The TV550 combines front-end video processing functions, such as DVB-T channel decoding, MPEG-2/H.264 decode, analogue video decode and HDMI reception, with advanced back-end video picture improvements. It also includes next generation Motion Accurate Picture Processing (MAPP2). The MAPP2 technology provides state-of-the-art motion artifact reduction with movie judder cancellation, motion sharpness and vivid color management. High flat panel screen resolutions and refresh rates are supported with formats including 1366 × 768 @ 100Hz/120Hz and 1920 × 1080 @ 100Hz/120Hz. The combination of Ethernet, CI+ and H.264 supports new TV experiences with IPTV and VOD. On top of that, optional support is available for 2D dimming in combination with LED backlights for optimum contrast and power savings up to 50%.

For a functional diagram of the PNX85500, refer to Figure 7-9

.

Figure 7-8 HDMI input configuration

The following multiplexers can be used:

• Sil9187A (does not support “Instaport” technology for fast switching between input signals)

• Sil9287B (supports “Instaport” technology for fast switching between input signals).

The hardware default I

2

C addresses are:

• Sil9187A: 0xB0/0xB2 (random: software workaround)

• Sil9287B: 0xB2 (fixed).

The Sil9x87 has the following specifications:

• +5V detection mechanism

• Stable clock detection mechanism

• Integrated EDID

• RT control

• HPD control

• Sync detection

• TMDS output control

• CEC control

• EDID stored in Sil9x87, therefore there are no EDID pins on the SSB.

7.6 Video and Audio Processing - PNX85500

The PNX85500 is the main audio and video processor (or System-on-Chip) for this platform. It has the following features:

• Multi-standard digital video decoder (MPEG-2, H.264, MPEG-4)

• Integrated DVB-T/DVB-C channel decoder

• Integrated CI+

• Integrated motion accurate picture processing (MAPP2)

• High definition ME/MC

• 2D LED backlight dimming option

2010-Dec-29

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div. table

Circuit Descriptions

18770_241_100201.eps

100219

TS out/in for

TS input

CVBS, Y/C,

LVDS for

analog CVBS

SPDIF

Low-IF

SSIF, LR

HDMI

CI/CA

MPEG

PRIMARY

LVDS

VIDEO

SECONDARY

MEMORY

VIDEO

3D COMB

DIGITAL IF

AUDIO DEMOD

AUDIO IN

HDMI

SCALER,

AUDIO DSP

AUDIO DACS

AUDIO OUT

450 MHz

560 MHz

I2C

PWM

GPIO IR ADC UART I2C GPIO Flash

analog audio

I2S

SPDIF

SYSTEM

USB 2.0

PNX85500x

DVB-T/C

channel decoder

DVB

AV-PIP

SPI

MPEG/H.264

RECEIVER

(8051)

CONTROLLER

AND DECODE

DECODER

PCMCIA

RGB

PROCESSOR

SYSTEM

CONTROLLER

DECODER

VIDEO

24KEf CPU

MIPS32

x 8

AV-DSP

REDUCTION

AND NOISE

DE-INTERLACE

OUTPUT

VIDEO

SUB-PICTURE

ENCODER

OUTPUT

VIDEO

quad channel)

(single, dual or

flat panel display

DRAWING

ENGINE

DMA BLOCK

Motion-accurate pixel processing

SD

Memory

Card

Ethernet

MAC

EN 53Q552.1L LA 7.

Figure 7-9 PNX85500 functional diagram

back to

div. table

2010-Dec-29

EN 54 Q552.1L LA7.

18770_242_100203.eps

100909

18770_209a_100202.eps

100202

1 M 5 9

1M09

MTK

or

PNX85500

SSB

Glue

logic

1

M

8 3

1

M

8

4

AmbiLight

1

M

8 3

1

M

8

4

AmbiLight

1M09

PSU

7.7 Back-End

The following backlight types can be distinguished:

• CCFL/EEFL backlight; applicable to the xxPFL54xx sets

• LED backlight:

- side-view (edge) LED without scanning: PSL power board; applicable to xxPFL76xx sets

- side-view (edge) LED with scanning: PSLS power board; not applicable to this chassis

- direct-view LED with 0D-dimming: PSL power board; applicable to xxPFL56xx sets

- direct-view LED with 2D-dimming: PSDL power board; not applicable to this chassis.

Circuit Descriptions

Refer to section 7.2.2

Diversity for an in-depth explanation of

the different power boards that are used.

7.8 Ambilight

In this chassis, only 2-sided Ambilight is implemented. Refer to figure 7-11

Ambilight architecture.

Figure 7-10 Backlight (xxPFL54xx, xxPFL56xx, xxPFL76xx sets)

application

For an overview of the LED grouping per board, refer to figure

7-12

LED grouping per board.

2010-Dec-29

Figure 7-11 Ambilight architecture

back to

div. table

Figure 7-12 LED grouping per board

18770_210_100126.eps

100126

3

× 6 L E D

18

4 ×

6 L E D

24

5 × 6

L E D

30

4 + 5

L E D

9

2 × 6 L E

D

12

3

× 5 L E D

15

6 × 6 L E D

36

18770_211_100126.eps

100126

CPLD

PNX

SPI S PI + extra

1M59

18770_213_100126.eps

100219

LED

Driver

EEPROM

Buffer

SPI S PI

SPI

1M83

1M8 4

Extra

Tem p

sens or

Tem p

18770_214_100126.eps

100126

+3V3

8

3B30-1

220R

1

45

220R

3B30-43B01-1

100R

1 8

5

6

7B20-1

74LVC2G17

1

2

2B17

100n

33p

2B01

100R

3B01-2

27

100p

2B02

+3V3

3

25

4

74LVC2G17

7B20-2

33p

2B00

2B10

100p

PWM-CLOCK

SPI-CLOCK-BUF

PWM-CLOCK-BUF

SPI-CLOCK

18770_215_100126.eps

100126

-T

+3V3

10n

2B09

FB40

2B08

10n

1K5 1%

3 6

3B39-2

27

3B39-3

1%1K5

1

3

4

52

LMV331IDCK

7B30

+3V3

1K5 1%

8 1

3B39-1

3B34

RES

100K

10K

3004

RES

3B11

10K

+3V3

FB41

TEMP-SENSOR

18770_216_100126.eps

100126

S

GND

Q

HOLD

W

VCC

C

D

+3V3

4

1

2

3 5

7B06

74LVC1G32GW

2B20

100n

4

7

2

1

8

3

+3V3

M95010-WDW6

7B07

(64K)

Φ

6

5

+3V3

10K

3B02-2

27

1 8

3B02-1

10K

+3V3

SPI-CLOCK-BUF

SPI-DATA-IN-BUF

SPI-DATA-RETURN

SPI-CS

DATA-SWITCH

The communication between PNX85500, Complex Programmable Logic Device (CPLD) and the Ambilight module uses the SPI protocol; refer to figure 7-13

Communication protocol outside LED board. Between the CPLD and the LED

driver, as “extra” line is mentioned:

• Non-SPI signals that are required for the LED driver

• Temperature sensor line.

Circuit Descriptions

The temperature sensor is built around item no. 7B30 (diagram AL1A) and indicates overtemperature of the board. Refer to figure 7-16

EN 55Q552.1L LA 7.

Figure 7-15 Ambilight buffer

Temperature sensor.

Figure 7-13 Communication protocol outside LED board

Refer to figure for an overview of the communication inside the LED board.

Figure 7-14 Communication protocol inside LED board

The buffer is built around item no. 7B20 (diagram AL1A) and regenerates the clock signals. Refer to figure 7-15

buffer.

Ambilight

back to

div. table

Figure 7-16 Temperature sensor

The EEPROM (item no. 7B07; diagram AL1A) contains alignment information about the mounted LEDs and is programmed during the alignment process in production. Refer to figure 7-17

EEPROM.

Figure 7-17 EEPROM

The LED driver is built around item no. 7B26 (diagram AL1A) and controls the LEDs. Refer to figure 7-18

LED driver.

2010-Dec-29

EN 56 Q552.1L LA7.

18770_217_100126.eps

100126

OUT

12

11

GSCLK IREF MODE

SCLK SIN SOUT

XERR XHALF XLAT 10

NC

9

8

VCC

0 1 2

3

4 5 6 7

BLANK

13 14 15

GND GND_HS

VIA

2K0

3B31

FB20

3B21

150R

+3V3

25 32

FB35

9 10 11 14 15

1 2 23

27

22

5

16 17 18 19 20 21

6

7

8

31

30

33

24 26

3

12 13 28 29

4

TLC5946RHB

7B26-1

100n

2B11

3 6

150R

3B00-3

2B04-4

100p

45

36

373839

40

41

42

7B26-2

TLC5946RHB

34 35

3B18

1K8

1 8

150R

3B00-1

+3V3

1 8

2B04-1

100p

150R

3B00-4

45

150R

3B00-2

27

2B04-2

100p

27

3 6

2B04-3

100p

10K

3B22

BLANK

SPI-DATA-IN-BUF

PWM-G1

PWM-R1

PWM-G3 PWM-R3 PWM-R2

PWM-B2

PWM-G2

DATA-SWITCH

PWM-G4 PWM-R4 PWM-B4

PWM-R5

PWM-G5

PWM-B5

LATCH

SPI-DATA-IN SPI-DATA-OUT

PWM-CLOCK-BUF

SPI-CLOCK-BUF

PROG

PWM-B1

PWM-B3

18770_218_100126.eps

100126

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

FB32

65

2

1

4

3

99-235/RSBB7C-A24/2D

7005

18

10K

3B07-1

FB30

3B07-3

10K

3 645

FB31

10K

3B13-4

1

43

7002 99-235/RSBB7C-A24/2D

65

2

6

5

2

1

4

3

6

7004 99-235/RSBB7C-A24/2D

3B03-3

1K5

3

27

3B07-2

10K

+24V

100n

2B03

27

1K5

3B03-2

3B36

270R

+24V

2

6

1

BC847BS(COL)

7B23-1

3B35

270R

3B37

68R

5

3

4

BC847BS(COL)

7B23-2

7B25 BC847BW

1

3

2

3 6

3B13-3

10K

6

5

21

43

7001 99-235/RSBB7C-A24/2D

45

1K5

3B03-4

45

10K

3B07-4

7003

65

2

1

43

99-235/RSBB7C-A24/2D

1 8

3B03-1

1K5

+24V

43

99-235/RSBB7C-A24/2D

7000

65

21

+24V

PWM-R1

PWM-G1

PWM-B1

Circuit Descriptions

The Overvoltage Protection Circuit is built around item no. 7B50, 7B51, 7C20 and 7C22 (diagram AL1B). Refer to figure

7-19

Overvoltage Protection Circuit.

7.9 TCON

This section describes the application with the TCON integrated on the SSB.

For the basic application, refer to figure 7-20

architecture.

2010-Dec-29

Figure 7-18 LED driver

Figure 7-19 Overvoltage Protection Circuit

TCON

back to

div. table

Circuit Descriptions

18770_238_100127.eps

100402

EEPROM

TFT – LCD Panel

Mini - LVDS

Control Signals

+3.3 V +1.8 V

V

GH

(+28 V)

V

GL

(-6 V)

+12 V

LVDS

(10 bit)

Timing

Contr oller

Power Block

Gamma Refe re nce Voltage

Source Drive IC

Gate Drive IC

PNX8550

LCD Panel

TCONMain Platform

SSB

+16 V

(TCON)

18770_239_100127.eps

100127

LVD S

Receiver

LVD S

Receiver

Vertical & Horizontal

Timing generation

Data Path

Block

(Line

Buffer)

M ini-LVDS

Transmitter

M ini-LVDS

Transmitter

OPC

(Optimum

Power

Control)

(Over

Drive

Circuit)

(Dynamic

Contrast

Control)

ODC DCA

Form atter/Serializer

S pread

S pectrum

S DRAM

I2C

Slav e

I

2

C

Master

ROM

EEPROM

16 bit

H

sync

/

V

sync

DE

SS

CLK

(S pread Spectrum C loc k)

RLV P/N

Right h alf

data

Gate Driver Ctrl S ig nals

Source D riv e r Ctrl S ig nals

R1A~E

R1CLK

R2CLK

R2A~E

MiniLVDS

Output

LVDS

Input

Control

Signal

Output

Timing C ontroller IC

EN 57Q552.1L LA 7.

For the TCON block diagram, refer to figure 7-21

diagram.

Figure 7-20 TCON architecture

TCON block

Figure 7-21 TCON block diagram

back to

div. table

2010-Dec-29

EN 58 Q552.1L LA7.

18770_240_100128.eps

100128

DC/DC

Controller

+12V

LGD

SHP

Where Used

VGH

+28 V

+3 5V

To G ate Drivers (G a te

Hig h Voltag e)

VGL

-6 V

To G ate Drivers (Ga te

Low Voltage)

Vcc

+3 V 3

Timing C o ntroller IC

S upply Voltage

Vcc

+1V8

+1V2

Timing C ontroller IC

S upply Voltage

Vref

+16V

+15V2

Gamma Reference

Voltag e

Vdd

+16V

+15V6

S ource Driver Supply

Voltag e

Circuit Descriptions

Notes to figure 7-21 TCON block diagram:

• LVDS receiver: converts the data stream back into RGB data and SYNC signals (Vsync, Hsync, Data Enable - DE)

• ODC: Over Drive Circuit - to improve LC response

• Data Path Block: the video RGB data input to data path block is delayed to align the column driver start pulse with the column driver data

• Timing Control Function: generates control signals to column drivers and row drivers (Source Enable - SOE, Gate Enable - GOE, Gate Start Pulse - GSP).

For an overview of the TCON DC/DC converters, refer to figure

7-22

TCON DC/DC converters.

7.9.1 TCON Programming

For LGD - TCONs, the EEPROM can be programmed via ComPair (via I For Sharp - TCONs, the data can be flashed with a “SPI Programmer” (via SPI communication). This device has to be ordered separately via Philips.

7.9.2 TCON Alignment

The purpose of TCON alignment is to obtain equal voltages for both positive and negative LC polarity. This is to avoid “flicker” and “image sticking”. For alignment, see 6.3.3

alignment.

2

C communication).

Figure 7-22 TCON DC/DC converters

TCON/VCOM

2010-Dec-29

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div. table

8. IC Data Sheets

18770_301_100217.eps

Block diagram

Pinning information

Note : The LED port indicators only apply to USB2513i.

To Upstream

V

BUS

3.3 V

Upstream

PHY

Upstream

USB Data

Repeater

Controller

Serial

Interface

Engine

Serial

Interface

To EEPROM or

SMBus Master

SCL

SDA

Port

Controller

Bus-

Power

Detect/

V

bus

Pulse

PHY#1

USB Data

Downstream

OC

Sense

Switch/

LED

Drivers

USB Data

Downstream

Port

Power

3.3 V

PLL

24 MHz

Crystal

Routing & Port Re-Ordering Logic

Regulator

CRFILT

Port

Power

Regulator

PHY#x

Port #x

OC Sense

Switch Driver/

LED Drivers

TT

#x

TT #1

...

Port #1

OC Sense

Switch Driver/

LED Drivers

OC

Sense

Switch/

LED

Drivers

...

The ‘x’ indicates the number of available downstream ports: 2, 3, 4, or 7.

Ground Pad

(must be connected to VSS)

SMSC

USB2512/12A/12B USB2512i/12Ai/12Bi (Top View QFN-36)

26

VDD33

25

RESET_N24HS_IND / CFG_SEL[1]23SCL / SMBCLK / CFG_SEL[0]

22

SDA / SMBDATA / NON_REM[1]

21

NC

20

NC

19

VBUS_DET

27

NC

18

NC

17

OCS_N[2]

16

PRTPWR[2] / BC_EN[2]*

15

OCS_N[1]

14

VDD33

13

CRFILT

12

PRTPWR[1] / BC_EN[1]*

11

TEST

10

VDD33

SUSP_IND / LOCAL_PWR / NON_REM[0]

28

VDD33

29

USBDP_UP

31

XTALOUT

32

XTALIN / CLKIN

33

RBIAS

36

VDD33

35

PLLFILT

34

USBDM_UP

30

VDD33

1

USBDM_DN[1]

2

USBDP_DN[1]

3

USBDM_DN[2]

4

USBDP_DN[2]

5NC6

NC

7

NC

8NC9

Indicates pins on the bottom of the device.

IC Data Sheets

EN 59Q552.1L LA 8.

This chapter shows the internal block diagrams and pin configurations of ICs that are drawn as “black boxes” in the

8.1 Diagram USB Hub B01C, USB2513B (IC 7F25)

electrical diagrams (with the exception of “memory” and “logic” ICs).

Figure 8-1 Internal block diagram and pin configuration

back to

div. table

2010-Dec-29

EN 60 Q552.1L LA8.

18770_300_100217.eps

100217

Block diagram

Pinning information

LM75B

SDA

V

CC

SCLA0

OS

DNG1AA2

BIAS

REFERENCE

BAND GAP

TEMP SENSOR

OSCILLATOR

POWER-ON

RESET

11-BIT

SIGMA-DELTA

A-to-D

CONVERTER

POINTER

REGISTER

TIMER

COMPARATOR/

INTERRUPT

COUNTER

LOGIC CONTROL AND INTERFACE

CONFIGURATION

REGISTER

THYST

REGISTER

TOS

REGISTER

TEMPERATURE

REGISTER

LM75BDP

VADS

CC

0ALCS

1ASO

2ADNG

1

2

3

4

6

5

8

7

8.2 Diagram Temp Sensor + Headphone B01J, LM75BDP (IC 7FD1)

IC Data Sheets

2010-Dec-29

Figure 8-2 Pin configuration

back to

div. table

8.3 Diagram PNX NandFlash - Conditional Access B02A, PNX85500 (IC7S00)

18770_308_100217.eps

100217

Block diagram

Pinning information

TS out/in for

TS input

CVBS, Y/C,

LVD S for

analog CVBS

SPDIF

Low-IF

SSIF, LR

HDMI

CI/CA

MPEG

PRIMARY

LVD S

VIDEO

SECONDARY

MEMORY

VIDEO

3D COMB

DIGITAL IF

AUDIO DEMOD

AUDIO IN

HDMI

SCALER,

AUDIO DSP

AUDIO DACS

AUDIO OUT

450 MHz

500 MHz

I2C

PWM

Px_x IR ADC UART I2C GPIO Flash

analog audio

I2S

SPDIF

SYSTEM

USB 2.0

PNX8550x

DVB-T/C

channel decoder

DVB

AV-PIP

SPI

RECEIVER

(8051)

CONTROLLER

AND DECODE

DECODER

PCMCIA

RGB

PROCESSOR

SYSTEM

CONTROLLER

MULTI-

STANDARD

VIDEO

DECODER

24KEf CPU

MIPS32

x 10

AV-DSP

REDUCTION

AND NOISE

DE-INTERLACE

OUTPUT

VIDEO

SUB-PICTURE

ENCODER

OUTPUT

VIDEO

quad channel)

(single, dual or

flat panel display

DRAWING

ENGINE

Scatter/Gather

TS Demux

Motion-accurate pixel processing

SD

Memory

Card

Ethernet

MAC

analog Y/C

Direct-IF

PNX8550xE

Transparent top view

2468 10 121314

15 171619

18 20

21

23

22 242526

1 3 57911

ball A1 index area

AB

AD

AA

AC

Y

W

V

U

R

N

T

P

M

L

K

J

H

F

D

G

E

C

B

A

AF

AE

IC Data Sheets

EN 61Q552.1L LA 8.

Figure 8-3 Internal block diagram and pin configuration

back to

div. table

2010-Dec-29

EN 62 Q552.1L LA8.

I_18020_142.eps

100402

Block diagram

Pinning information

1 2

3

4 5 6 7

8

9

10 11 12

24 23 22 21 20 19 18 17 16

15 14 13

PVCCL

SD

PVCCL

MUTE

LIN

RIN

BYPASS

AGND AGND

PVCCR

VCLAMP

PVCCR

PGNDL PGNDL LOUT BSL AVCC AVCC GAIN0 GAIN1 BSR ROUT PGNDR PGNDR

PWP (TSSOP) PACKAGE

(TOP VIEW)

1F

SD

PVCCL

TPA3120D2

PVCCR

VCLAMP

GAIN1

BYPASS

1F

0.22 F

AGND

}

Control

Shutdown

Control

LIN

RIN

BSR

BSL

PGNDR

PGNDL

0.22 F

22 H

0.68 F

470 F

0.68 F

1F

470 F

GAIN0

AVCC

MUTE

ROUT

LOUT

8.4 Diagram Audio B03A, TPA3120D2PWP (IC7D10)

IC Data Sheets

2010-Dec-29

Figure 8-4 Internal block diagram and pin configuration

back to

div. table

8.5 Diagram DC/DC B03B, TPS53126PW (IC7U03)

18250_300_090319.eps

100402

Block diagram

Pinning information

VBST1

NC

EN1

VO1

VFB1

NC

GND

TEST1

NC

VFB2

VO2

EN2

NC

VBST2

DRVH1

LL1

DRVL1

PGND1

TRIP1

VIN

VREG5

V5FILT

TEST2

TRIP2

PGND2

DRVL2

LL2

DRVH2

28

27

26

25

24

23

22

21

20

19

18

17

16

1

2

3

4

5

6

7

8

9

10

11

12

13

14

TPS5 3124

15

IC Data Sheets

EN 63Q552.1L LA 8.

Figure 8-5 Internal block diagram and pin configuration

back to

div. table

2010-Dec-29

EN 64 Q552.1L LA8.

I_18010_083.eps

100402

Block diagram

Pinning information

PowerSO-8

DFN8 (4 × 4)

IC Data Sheets

8.6 Diagram DC/DC B03E, ST1S10PH (IC 7UD0)

2010-Dec-29

Figure 8-6 Internal block diagram and pin configuration

back to

div. table

8.7 Diagram DC/DC B03E, LD1117DT25 (IC 7UD2)

F_15710_166.eps

100402

Block diagram

Pinning information

DPAK

LD1117DT

IC Data Sheets

EN 65Q552.1L LA 8.

Figure 8-7 Internal block diagram and pin configuration

back to

div. table

2010-Dec-29

EN 66 Q552.1L LA8.

18770_302_100217.eps

100217

Block diagram

Pinning information

10M Rx

Logic

100M Rx

Logic

DSP System:

Clock

Data Recovery

Equalizer

Analog-to-

Digital

100M PLL

Squelch &

Filters

10M PLL

Receive Section

Central

Bias

HP Auto-MDIX

Management

Control

SMI

RMII / MII Logic

TXP / TXN

TXD[0:3]

TXEN TXER

TXCLK

RXD[0:3]

RXDV RXER

RXCLK

CRS

COL/CRS_DV

MDC

MDIO

LED1 LED2

LED Circuitry

MODE Control

nINT

nRST

RXP / RXN

10M Tx

Logic

10M

Transmitter

100M Tx

Logic

100M

Transmitter

Transmit Section

PLL

XTAL1/CLKIN

XTAL2

MODE0 MODE1 MODE2

PHY Address Latches

PHYAD[0:2]

Auto-

Negotiation

Interrupt

Generator

RMIISEL

MDIX

Control

Reset

Control

RBIAS

VDD2A

LED2/nINTSEL

LED1/REGOFF

XTAL2

XTAL1/CLKIN

VDDCR

RXD3/PHYAD2

RXCLK/PHYAD1

RXD2/RMIISEL

RXD1/MODE1

RXD0/MDE0

VDDIO

RXER/RXD4/PHYAD0

CRS

MDIO

COL/CRS_DV/MODE2

TXD2

MDC

nRST

nINT/TXER/TXD4

TXD0

TXEN

TXCLK

TXD1

RBIAS

TXD3

TXN

RXDV

RXN

VDD1A

TXP

RXP

1

2

3

4

5

6

7

8

SMSC

LAN8710/LAN8710i

32 PIN QFN

(Top View)

9

10

11

12

13

14

15

22

21

20

19

18

17

28

27

26

2516

24

23

32

31

30

29

VSS

IC Data Sheets

8.8 Diagram Ethernet + Service B04C, LAN8710A-EZKH (IC 7E10)

2010-Dec-29

Figure 8-8 Internal block diagram and pin configuration

back to

div. table

8.9 Diagram HDMI B04D, SII9287B (IC 7EC1)

18770_303_100217.eps

100217

Block diagram

Pinning information

IC Data Sheets

EN 67Q552.1L LA 8.

Figure 8-9 Internal block diagram and pin configuration

back to

div. table

2010-Dec-29

EN 68 Q552.1L LA8.

18770_309_100217.eps

100217

Block diagram

Pinning information

Bias

Control

8

1

7

4

V

O1

V

O2

V

DD

5

2

3

6

IN1−

BYPASS

SHUTDOWN

V

DD

/2

IN2−

−

+

−

+

1

2

3

4

8

7

6

5

V

O1

IN1−

BYPASS

GND

V

DD

V

O2

IN2− SHUTDOWN

D OR DGN PACKAGE

(TOP VIEW)

8.10 Diagram Headphone B04E, TPA6111A2DGN (IC 7EE1)

IC Data Sheets

Figure 8-10 Internal block diagram and pin configuration

2010-Dec-29

back to

div. table

9. Block Diagrams

TWEETER

(5217)

TWEETER

(5216)

MAINS

SWITCH

(8311)

11P

1M95

9P

1M99

2P3

1311

2P3

1308

1735

4P

1M95

11P

1319

32"-6P

1316

32"-12P

1319

40"-10P

1316

40"-10P

1M99

9P

1KA2

80P

1KA1

80P

1M20

8P

MAINS CORD

8191

TO DISPLAY TO D ISPLAY

3P

J1

SSB

3104 313 6417.x

(1150)

B

MAIN POWER SUPPLY 32 FSP124-3MS02 (R1 CKD) 40 DPS-206CP-1 C CKD 46 FSP173-3MS02

(1005)

LCD DISPLAY

(1004)

KEYBOARD CONTROL

(1114)

IR / LED BOARD

(1112)

8M99

8M95

8311

WIRING DIAGRAM 32"- 46" VAN GOGH

19030_401_100809.eps

100813

1M99

(B03C)

1. +12VD

2. +12VD

3. GND

4. GND

5. LAMP-ON

6. BACKLIGHT-PWM_BL-VS

7. BACKLIGHT-BOOST

8. BACKLIGHT-PWM-ANA-DISP

9. POWER-OK

1M95

(B03C)

1. +3V3-STANDBY

2. STANDBY

3. GND

4. GND

5. GND

6. +12V

7. +12V

8. +12V

9. +24V-AUDIO-POWER

10. GND-AUDIO

11. MAINS-OK

1735

(B03A)

1. LEFT-SPEAKER

2. GND-AUDIO

3. GND-AUDIO

4. RIGHT-SPEAKER

1M20

(B14F)

1. LIGHT-SENSOR

2. GND

3. RC

4. LED-2

5. +3V3-STAN D BY

6. LED-1

7. KEYBOARD

8. +5 V

1KA2

(B14E)

1. GND |

11. VLS_15V6

12. VLS_15V6 |

33. VCC_3V3

34. VCC_3V3

|

78. VGH _35V

79. VGL_-6V

80. GND

1KA1

(B14E)

1. GND |

11. VLS_15V6

12. VLS_15V6 |

33. VCC_3V3

34. VCC_3V3

|

78. VGH _35V

79. VGL_-6V

80. GND

LN

Board Level Repair

Component Level Repair Only For Authorized Workshop

USB

HDMI

TUNER

PHONE

SPDIF

HDMIHDMI

VGA

SCART

LOUDSPEAKER

(5213)

8M20

TO BACKLIGHT

8KA1

8KA2

NOT FOR 32" TV-SETS NOT FOR 32" TV-SETS

J2

3PJ18P

9-1 Wiring diagram van Gogh 32" - 46"

Block Diagrams

EN 69Q552.1L LA 9.

2010-Dec-29

back to

div. table

9-2 Wiring diagram Da Vinci 32" - 46"

TWEETER

(5217)

TWEETER

(5216)

MAINS

SWITCH

(8311)

11P

1M95

9P

1M99

2P3

1311

2P3

1308

1735

4P

1M95

11P

1319

10P

1316

10P

1M99

9P

1KA2

80P

1KA1

80P

1M20

8P

MAINS CORD

8191

TO DISPLAY TO DISPLAY

3P

J1

SSB

3104 313 6417.x

(1150)

B

MAIN POWER SUPPLY 32 FSP124-3MS02 (R1 CKD) 40 DPS-206CP-1 C CKD 46 FSP173-3MS02

(1005)

LCD DISPLAY

(1004)

KEYBOARD CONTROL

(1114)

IR / LED BOARD

(1112)

8M99

8M95

8311

WIRING DIAGRAM 32"- 46" DA VINCI

19030_402_100809.eps

100924

1M99 (B03C)

1. +12VD

2. +12VD

3. GND

4. GND

5. LAMP-ON

6. BACKLIGHT-PWM_BL-VS

7. BACKLIGHT-BOOST

8. BACKLIGHT-PWM-ANA-DISP

9. POWER-OK

1M95 (B03C)

1. +3V3-STANDBY

2. STANDBY

3. GND

4. GND

5. GND

6. +12V

7. +12V

8. +12V

9. +24V-AUDIO-POWER

10. GND-AUDIO

11. MAINS-OK

1735 (B03A)

1. LEFT-SPEAKER

2. GND-AUDIO

3. GND-AUDIO

4. RIGHT-SPEAKER

1M20 (B14F)

1. LIGHT-SENSOR

2. GND

3. RC

4. LED-2

5. +3V3-STAN D BY

6. LED-1

7. KEYBOARD

8. +5V

1KA2 (B14E)

1. GND |

11. VLS_15V6

12. VLS_15V6 |

33. VCC_3V3

34. VCC_3V3

|

78. VGH _35V

79. VGL_-6V

80. GND

1KA1 (B14E)

1. GND |

11. VLS_15V6

12. VLS_15V6 |

33. VCC_3V3

34. VCC_3V3

|

78. VGH _35V

79. VGL_-6V

80. GND

LN

Board Level Repair

Component Level Repair Only For Authorized Workshop

USB

HDMI

TUNER

PHONE

SPDIF

HDMIHDMI

VGA

LOUDSPEAKER

(5213)

8M20

TO BACKLIGHT

8KA1

8KA2

NOT FOR 32" TV-SETS NOT FOR 32" TV-SETS

J23PJ1

8P

8M59

1M59

25P

AMBILIGHT MODULE 18/24/30 LED

(1161)

AL

25P

1M83

AMBILIGHT MODULE 18/24/30 LED

(1161)

AL

1M84

25P

1M83

25P

8M83

1M09

4P

1M09

4P

8M09

ETHER

NET

1M83 (AL1A)

1. +24V

2. +24V

3. +24V

4. +24V

5. +24V

6. GND

7. GND

8. GND

9. GND

10. GND

11. TEMP-SENSOR

12. N.C.

13. N.C .

14. +3V3

15. BLANK

16. PROG

17. GND

18. LATCH

19. SPI-CS

20. +3V3

21. PWM-CLOCK

22. GND

23. SPI-DATA-RETURN

24. SPI-DATA-IN

25. SPI-CLOCK

1M84 (AL2A)

1. SPI-CLOCK-BUF

2. SPI-DATA-OUT

3. SPI-DATA-RETURN

4. GND

5. PWM-CLOCK-BUF

6. +3V3

7. SPI-CS

8. LATCH

9. GND

10. PROG

11. BLANK

12. +3V3

13. N.C .

14. N.C.

15. TEMP-SENSOR

16. GND

17. GND

18. GND

19. GND

20. GND

21. +24V

22. +24V

23. +24V

24. +24V

25. +24V

1M59 (B13)

1. AMBI-SPI-CLK-OUT

2. AMBI-SPI-SDO-OUT

3. AMBI-SPI-SDI-OUT-GI

4. GND

5. AMBI-PWM-CLK_B2

6. V-AMBI

7. AMBI-SPI-CS-OUTn_R2

8. AMBI-LATCH1_G2

9. GND

10. AMBI-PROG_B1

11. AMBI-BLANK_R1

12. V-AMBI

13. AMBI-LATCH2_DIS

14. AMBI-SPI-CS-EXTLAMPSn

15. AMBI-TEMP

16. GND

17. GND

18. GND

19. GND

20. GND

21. +24V

22. +24V

23. +24V

24. +24V

25. +24V

Block Diagrams

EN 70Q552.1L LA 9.

2010-Dec-29

back to

div. table

9-3 Wiring diagram Matisse 40" - 52"

J23PJ1

8P

MAINS CORD

TO DISPLAY TO D ISPLAY

3P

J1

2P3

1311

2P3

1308

11P

1M95

9P

1M99

MAIN POWER SUPPLY 40 PLDE-P976AREV.1 52 PLDJ-P978A

(1005)

LCD DISPLAY

(1004)

TCON

KEYBOARD CONTROL

(1114)

IR / LED BOARD (1112)

WIRING DIAGRAM 40"- 52" MATISSE

19030_403_100809.eps

100924

1M99 (B03C)

1. +12VD

2. +12VD

3. GND

4. GND

5. LAMP-ON

6. BACKLIGHT-PWM_BL-VS

7. BACKLIGHT-BOOST

8. BACKLIGHT-PWM-ANA-DISP

9. POWER-OK

1M95 (B03C)

1. +3V3-STANDBY

2. STANDBY

3. GND

4. GND

5. GND

6. +12V

7. +12V

8. +12V

9. +24V-AUDIO-POWER

10. GND-AUDIO

11. MAINS-OK

1735 (B03A)

1. LEFT-SPEAKER

2. GND-AUDIO

3. GND-AUDIO

4. RIGHT-SPEAKER

1M20 (B09A)

1. LIGHT-SENSOR

2. GND

3. RC

4. LED-2

5. +3V3-STAN D BY

6. LED-1

7. KEYBOARD

8. +5V

1G51 (B06B)

1. +VDISP

2. +VDISP

3. +VDISP

4. +VDISP |

51. N.C.

1G50 (B06B)

1. GND

2. GND |

41. N.C.

Board Level Repair

Component Level Repair Only For Authorized Workshop

8M59

1G51

51P

1G50

41P

1M20

8P

1M09

4P

1M59

25P

SSB

3104 313 6364.x

(1150)

B

USB

TUNER

SPDIF

ETHER

NET

HDMIHDMIHDMI

VGA

1M09

4P

1316

12P

1319

11P

8M99

8M95

TO BACKLIGHT

HDMI

MAINS

SWITCH

(8311)

8311

8191

1735

4P

1M95

11P

1M99

9P

8M09

AMBILIGHT MODULE 24/36 LED

(1174)

AL

25P

1M83

AMBILIGHT MODULE 24/36 LED

(1174)

AL

1M84

25P

1M83

25P

8735

8M20

1M83 (AL1A)

1. +24V

2. +24V

3. +24V

4. +24V

5. +24V

6. GND

7. GND

8. GND

9. GND

10. GND

11. TEMP-SENSOR

12. N.C.

13. N.C .

14. +3V3

15. BLANK

16. PROG

17. GND

18. LATCH

19. SPI-CS

20. +3V3

21. PWM-CLOCK

22. GND

23. SPI-DATA-RETURN

24. SPI-DATA-IN

25. SPI-CLOCK

1M84 (AL2A)

1. SPI-CLOCK-BUF

2. SPI-DATA-OUT

3. SPI-DATA-RETURN

4. GND

5. PWM-CLOCK-BUF

6. +3V3

7. SPI-CS

8. LATCH

9. GND

10. PROG

11. BLANK

12. +3V3

13. N.C .

14. N.C.

15. TEMP-SENSOR

16. GND

17. GND

18. GND

19. GND

20. GND

21. +24V

22. +24V

23. +24V

24. +24V

25. +24V

1M59 (B13)

1. AMBI-SPI-CLK-OUT

2. AMBI-SPI-SDO-OUT

3. AMBI-SPI-SDI-OUT-GI

4. GND

5. AMBI-PWM-CLK_B2

6. V-AMBI

7. AMBI-SPI-CS-OUTn_R2

8. AMBI-LATCH1_G2

9. GND

10. AMBI-PROG_B1

11. AMBI-BLANK_R1

12. V-AMBI

13. AMBI-LATCH2_DIS

14. AMBI-SPI-CS-EXTLAMPSn

15. AMBI-TEMP

16. GND

17. GND

18. GND

19. GND

20. GND

21. +24V

22. +24V

23. +24V

24. +24V

25. +24V

1M09 (B09)

1. +24V

2. +24V

3. GND

4. GND

8M83

8G50

8G51

+ -

SPEAKER LEFT

(5217)

SPEAKER RIGHT

(5217)

Block Diagrams

EN 71Q552.1L LA 9.

2010-Dec-29

back to

div. table

B02

PNX85500

B06B

VIDEO OUT - LVDS

B04A

ANALOGUE EXTERNALS A

B01I

VGA

B04B

ANALOGUE EXTERNALS B

B01F

HDMI & CI

B05A

DDR

B01C

USB HUB

B01B

FLASH

B14A

TCON CONTROL (SHARP)

B14E

MINI LVDS (SHARP)

B14D

MPD

B14C

P GAMMA & VOM & FLASH

B01H

HDMI

B04D

HDMI

B01K

TUNER BRAZIL

1E08

7S00 PNX85507EB

VIDEO STREAM

B02A

LVD S

B02F

ANALOG VIDEO

B02I

HDMI_DV

B02C

AV2-CVBS

VIDEO

Pb

Y

Pr

Pb

Y

Pr

AV 1

AV 2

AV 3

1

1E05

2

3

14

13

R-VGA

G-VGA

B-VGA

H-SYNC-VGA

V-SYNC-VGA

1

6

10

11

5

15

VGA

CONNECTOR

AB14

AC18

AB18

AE16

AD16

AF16

63

HDMIA-RXC-

HDMIA-RX0+

HDMIA-RX0-

HDMIA-RX1+

HDMIA-RX1-

HDMIA-RX2+

HDMIA-RX2-

62

61

60

59

58

57

56

HDMIA-RXC+

U26

T25

T26

W24

U25

V26

W26

W25

V25

RREF

PNX85500

19030_404_100809.eps

100813

VIDEO

2

18

14

10

15

11

7

TUNER_P

TUNER_N

VGA_R

VSYNC_IN

VGA_G

VGA_B

CVBS_Y2

AC13

AV1_R

HSYNC_IN

+3V3

3S0W

PX1

PX2

PX3

PX4

PX1

PX2

PX3

PX4

QUAD LVDS

1920x1080 100/120Hz

1G51

+VDISP

TO DISPLAY

(TCON ON DISPLAY)

I2C

50

51

49

40

3

4

2

1

1G50

TO DISPLAY

(TCON ON DISPLAY)

TO TCON SSB

N.C.

1

2

3

41

AE12

AF12

MEMORY

B02B

V1

DDR2-VREF-CTRL3

A2

DDR2-VREF-CTRL2

VREF_2

VREF_1

CONROL

B02E

FLASH

B02A

7F20 NAND04GW3B2DN6F

NAND

FLASH

512MB

4321

USB-DM

USB-DP

USB-DM2

SSB 3104 313 6417*

SSB 3104 313 6364*

USB-DP2

USB-DM1

USB-DP1

SIDE USB

CONNECTOR

1P08

+5V-USB1

R26

R25

12,37

+3V3

VCC

USB_DP

USB_DN

+5V-USB2

XIO_D

2

1

3

4

4321

SIDE USB

CONNECTOR

1P07

2

1

3

4

9F26

9F25

9F21

9F20

XIO-D(00-07)

TO DISPLAY

(TCON ON SSB)

TO DISPLAY

(TCON ON SSB)

L_LV

R_LV

1KA2

59

81

48

50

13

24

25

20

19

1KA1

81

50

13

58

53

2

13

1

7KAA UPD809900F

7KQA ISL24837IRZ

TIMING

CONTROL

GMA

REF

VOLTAGE

GEN

7KQB M25P32

FLASH

7KUE MAX17079GTL

L

EVEL

SHIFTER

CS(1U-12U)

CS(1-12)

+VCC

+VDD

41

42

37

36

+VCC

+VDD

SPI

SDO SCS

SCK

2

13

SSB 3104 313 6364*

SSB 3104 313 6417*

7EC1 *SII9187ACNU SII9287BCNU

HDMI

SWITCH

VCC33

RXC

RXD

RXB

RXA

72

71

69

68

66

65

63

62

42

41

39

36

35

33

32

23

22

20

19

17

16

14

13

90

89

87

86

84

83

81

80

19

1

18 2

1

1P05

3

4

7

9 10

12

6

DRX2+

DRX2-

DRX1+

DRX1-

DRX0+

DRX0-

DRXC+

DRXC-

HDMI SIDE

CONNECTOR

19

1

18 2

1

1P02

3

4

7

9 10

12

6

CRX2+

CRX2-

CRX1+

CRX1-

CRX0+

CRX0-

CRXC+

CRXC-

HDMI 1

CONNECTOR

1

1P03

3

4

7

9 10

12

6

BRX2+

BRX2-

BRX1+

BRX1-

BRX0+

BRX0-

BRXC+

BRXC-

1

1P04

3

4

7

9 10

12

6

ARX2+

ARX2-

ARX1+

ARX1-

ARX0+

ARX0-

ARXC+

ARXC-

19

1

18 2

HDMI 2

CONNECTOR

19

1

18 2

HDMI 3

CONNECTOR

9,27,64

+3V3-HDMI

Only on SSB3104 313 6364*

2F75

2F79

3F79-1

3F79-4

1T01 TH2603

IF-OUT1

4MHZ

IF-OUT2

MAIN HYBRID

TUNER

PNX-IF-P

PNX-IF-N

11

10

RF IN

9

IF+

IF-

RESET-SYSTEMn

IF-AGC

BANDPASS

FILTER

TUN-IF-P

IF-AGC

TUN-IF-N

DDR2-VREF-DDR

A1 E2A1 E2A1 E2A1 E2

+1V8

SDRAM

128MB

7B01 EDE1108AGBG

SDRAM

128MB

7B02 EDE1108AGBG

SDRAM

128MB

7B03 EDE1108AGBG

DQ

A

SDRAM

128MB

7B00 EDE1108AGBG

VREF

VDDL

VREF

VDDL

VREF

VDDL

VREF

VDDL

DDR2-D(0-31)

D(24-31)

D(16-23)

D(8-15)

D(0-7)

DDR2-A(0-13)

1E01

1E02

AV4-PB

AD14

AV4-PR

AC14

AV4-Y

AE14

AV1-R

AD13

AVI-B

AV1_B

AE13

AV1-G

AV1_G

*Mux SIL9187 - non Instaport on SSB3104 313 6417* Mux SIL9287 - Instaport on SSB3104 313 6364*

TNR_SER1_MIVAL

TNR_SER1_SOP

TNR_SER1_MICLK

TNR_SER1_DATA

TS-FE-VALID

TS-FE-SOP

TS-FE-CLOCK

TS-FE-DATA

R23

T22

R22

T21

7FE0 TC90517FG

OF DM

DEMODULATOR

30

9

29

58

59

61

60

42

9F03

9F02

1FE0

25M4

18

19

B02E

IF_AGC

AD12

IF-AGC

3F77

TXC_N

TXC_P

TX0_N

TX0_P

TXA_N

TX1_P

TX2_N

TX2_P

RX1_A_N

RX0_A_P

RX0_A_N

RX1_A_P

RX2_A_N

RXC_A_N

RXC_A_P

RX2_A_P

PB_B2

PR_R_C2

Y_G2

9-4 Block Diagram Video

Block Diagrams

EN 72Q552.1L LA 9.

2010-Dec-29

div. table

back to

9-5 Block Diagram Audio

AUDIO

TUNER BRAZIL

B01K

HDMI & CI

B01F

B01H

HDMI

1

18 2

19

HDMI SIDE

CONNECTOR

1

18 2

19

HDMI 3

CONNECTOR

1

18 2

19

HDMI 2

CONNECTOR

1

18 2

19

HDMI 1

CONNECTOR

1T01 TH2603

MAIN HYBRID

TUNER

RF IN

1P05

1

DRX2+

3

DRX2-

4

DRX1+

6

DRX1-

7

DRX0+

9

DRX0-

10

DRXC+

12

DRXC-

1P04

1

ARX2+

3

ARX2-

4

ARX1+

6

ARX1-

7

ARX0+

9

ARX0-

10

ARXC+

12

ARXC-

Only on SSB3104 313 6364*

BRX2+

BRX2-

BRX1+

BRX1-

BRX0+

BRX0-

BRXC-

CRX2+

CRX2-

CRX1+

CRX1-

CRX0+

CRX0-

CRXC-

9,27,64

+3V3-HDMI

1P03

1

3

4

6

7

9 10

12

1P02

1

3

4

6

7

9 10

12

14

BRXC+

CRXC+

IF-OUT1

IF-OUT2

4MHZ

TUN-IF-P

10

TUN-IF-N

11

B04D

7EC1 *SII9187ACNU SII9287BCNU

90

89

87

86

84

83

81

80

RXD

9F03

9F02

HDMI

IF-AGC

9

HDMI

SWITCH

23

22

20

19

RXA

17

16

14

13

VCC33

42

41

39

RXB

36

35

33

32

62

TXC_P

63

TXC_N 72

71

69

68

RXC

66

65

63

62

ARC-eHDMI+

*Mux SIL9187 - non Instaport on SSB3104 313 6417* Mux SIL9287 - Instaport on SSB3104 313 6364*

TX0_P

TX0_N TX1_P

TXA_N

TX2_P

TX2_N

60

61 58

59

56

57

5EC2

Block Diagrams

IF-AGC

B02E

2F75

2F79

ANALOGUE EXTERNALS A

B04A

1E01

1E02

ANALOGUE EXTERNALS B

B04B

VGA (OR DVI)

AUDI O IN

L+R

AUDI O

DIGITAL AUDI O

OUT

1E08

1E09

1E07

9

IF+

30

IF-

29

RESET-SYSTEMn

3F77

3F79-1

3F79-4

6

2

6

2

6

4

2

3

1

7FE0 TC90517FG

OF DM

DEMODULATOR

BANDPASS

FILTER

SPDIF-OUT

eHDMI+

EN 73Q552.1L LA 9.

PNX85500

B02

7S00 PNX85507EB

VIDEO STREAM

B02A

1FE0

B02D

TS-FE-CLOCK

25M4

TS-FE-VALID

TS-FE-SOP

TS-FE-DATA

IF-AGC

PNX-IF-P

PNX-IF-N

PNX85500: AUDIO

AUDIO-IN1-L

AUDIO-IN1-R

R23

TNR_SER1_MIVAL

R22

TNR_SER1_SOP

T22

TNR_SER1_MICLK

T21

TNR_SER1_DATA

B02I

AD12

IF_AGC

AE12

TUNER_P

AF12

TUNER_N

AE10

AIN1_L

AF10

AIN1_R

ANALOG VIDEO

58

59

61

60

19

18

42

B02D

AUDI O

B03H

ADAC_1

ADAC_2

STANDBY

PO_7

PO_6

ADAC3

ADAC4

AD7

AE7

AC19

AD1

AF7

AD6

PNX85500

CONROL

B02E

B02A

B02B

FLASH

MEMORY

USB_DN

USB_DP

XIO_D

VREF_1 VREF_2

R26

R25

XIO-D(00-07)

DQ

A

A2 V1

3

8

7S09

&

AUDIO-IN2-L

AUDIO-IN2-R

AUDIO-IN3-L

AUDIO-IN3-R

AUDIO-IN4-L

AUDIO-IN4-R

+3V3

2

1

4

5

HDMIA-RXC+

HDMIA-RXC-

HDMIA-RX0+

HDMIA-RX0-

HDMIA-RX1+

HDMIA-RX1-

HDMIA-RX2+

HDMIA-RX2-

SPDIF-OUT-PNX

SEL-HDMI-ARC

3S0W

+3V3

AD10

AC10

AE9

AF9

AD9

AC9

AF5

AF18

W25

W26

V25

V26 U25

U26

T25

T26

W24

AIN2_L

AIN2_R

AIN3_L

AIN3_R

AIN4_L

AIN4_R

SPDIF_OUT

STANDBY

B02G

P0_4

HDMI_DV

B02C

RXC_A_P

RXC_A_N RX2_A_P

RX2_A_N RX1_A_P

RX1_A_N

RX0_A_P

RX0_A_N

RREF

PNX 85500: AUDIO

B02D

ADAC(1)

ADAC(2)

B04E

AUDIO-MUTE-UP

B03C

HEADPHONE

B04E

ADAC(3)

ADAC(4)

USB HUB

B01C

USB-DM

USB-DP

FLASH

B01B

7F20 NAND04GW3B2DN6F

DDR

B05A

D(0-7)

DDR2-VREF-CTRL2 DDR2-VREF-CTRL3

7S05 LM324P

10

A-PLOP

DETECT2

MAINS-OK

RESET-AUDIO

NAND

FLASH

512MB

VCC

7B00 EDE1108AGBG

SDRAM

128MB

VREF

VDDL

12,37

B03A

14

8

A-PLOP

7D03

MAIN SWITCH

DETECT

+3V3

7B02 EDE1108AGBG

D(8-15)

AUDI O

+AUDIO-L

-AUDIO-R

7D15

7EE0-1 7EE0-2

SDRAM

128MB

VDDL

A-STBY

VREF

9F26

9F21

D(16-23)

7D10 TPA3123D2PWP

512

IN-L

6

IN-R

2

SD

4

MUTE

A-PLOP

7EE1 TPA6111A2DGN

5

SHUTDOWN

2

IN-1

6

IN-2

9F25

9F20

7B03 EDE1108AGBG

SDRAM

128MB

VREF

VDDL

PVCC_L

PVCC_R

OUT-L

CLASS D

POWER

AMPLIFIER

OUT-R

HEADPHONE

AMPLIFIER

VO_1

VO_2

USB-DM2

USB-DP2

USB-DM1

USB-DP1

D(24-31)

1,3

10,12

22

15

7D03

PROTECTION

B03A

B04A

1

7

8

VDD

+5V

-USB2

+5V-USB1

7B01 EDE1108AGBG

SDRAM

128MB

VDDL

A1 E2A1 E2A1 E2A1 E2

5D07

5D08

LEFT-SPEAKER

RIGHT-SPEAKER

STANDBY &

+3V3

1P08

1

2 3

4

1P07

1

2 3

4

DDR2-D(0-31)

VREF

DDR2-A(0-13)

+1V8

DDR2-VREF-DDR

+24V-AUDIO-POWER

5D03

TEMP SENSOR + HEADPHONE

B01J

SIDE USB

CONNECTOR

SIDE USB

CONNECTOR

1328

2

3

1

Only on SSB 3104 313 6364*

AMP1

AMP2

4321

SSB 3104 313 6364*

4321

SSB 3104 313 6417*

1735

1

2

SPEAKER L

3

4

SPEAKER R

1D38

1

2

3

SUBWOOFER

(RES)

HEADPHONE

OUT 3.5mm

19030_405_100809.eps

100812

2010-Dec-29

back to

div. table

Block Diagrams

B04D

HDMI

B02A

PNX85500

B06C

AMBILIGHT CPLD

B04C

ETHERNET + SERVICE

B09A

DVBS CONNECTOR BOARD

B14F

CONNECTORS

B01B

FLASH

B03C

DC / DC

B05A

DDR

B01E

PNX85500-CONTROL

B04V

ETHERNET + SERVICE

B02E

PNX85500: MIPS

B01C

USB HUB

B03C

DC / DC

B02G

PNX85500: STANDBY CONTROLLER

B02G

PNX85500: STANDBY CONTROLLER

CONTROL + CLOCK SIGNALS

B09A

NON DVBS CONNECTOR BOARD

B13

AMBILIGHT CPLD

B14F

CONNECTORS

1F51

1

3

4 5

2

LEVEL SHIFTED

FOR

DEBUG USE

ONLY

7E10 LAN8710A-EZK

1N00

ETHERNET

CONNECTOR

RJ45

B02A

TO AMBILIGHT

MODULE

TO AMBILIGHT

MODULE

2D DIMMING

B02E

ETHERNET

1M99

7

6

5

1M95

2

LED1

AD26

AE26

AA22

DETECT2

AA26

AF19

RESET-STBYn

4x HDMI

CONNECTOR

AB22

RESET-SYSTEMn

AD21

ENABLE-3V3n

PNX85500

7S00 PNX85507EB

AC25

LED2

1S02

54M

AF17

AE17

CONTROL

B02E

STAN DB Y

B02G

HDMI_DV

B02C

AD22

AV1-BLK

AF20

STANDBY

AD19

AD23

KEYBOARD

RC

LIGHT-SENSOR

AB19

RESET-AUDIO

BACKLIGHT-OUT

BACKLIGHT-BOOST

RESET-SYSTEMn

AE4

B01K

B02G

AC21

POWER-OK

B07A

B01E

7S20 NCP303LSN28G

2

INP

1

OUTP

+3V3-STANDBY

GND

B02E

7EC1 *SII9187ACNU SII9287BCNU

HDMI

SWITCH

P3_0

P3_1

P1_7

P6_4

P2_2

P2_7

P2_6

P0_6

P2_3

XTAL_I

XTAL_O

P5_1

P5_O

P3_2 P3_3

P3_5 P3_4

RESET_IN

P1_2

W24

RREF

HDMI_RX

P1_0

PWM_1

PWM_0

TO POWER SUPPLY

B04A

TO POWER SUPPLY

+3V3-STANDBY

+5V

B04E

B03C

SDM

SPI-PROG

AF22

AB20

FF04

FF29

19030_406_100809.eps

100813

RXD-UP

TXD-UP

Y23

Y24

UART

SERVICE

CONNECTOR

AE21

AF21

RXD1-MIPS

TXD1-MIPS

LED-2

LED-1

1

2

3

4

5

6

7

8

1M20

7U43

ARX-HOTPLUG

1E06

2

3

1

AC22

AV2-BLK

B04A

P2_0

AC20

LCD-PWR-ONn

B03H

RESET-STBYn

AF1

SENSE+1V1

B03B

B02H

POWER

VDD_1V1

AA15

SENSE+1V2

B03D

VDDA_1V2

AE18

RESET-ETHERNETn

B04C

P0_3

AF18

SEL-HDMI-ARC

B02D

P0_4

AE20

LAMP-ON

V23

BOOST-PWM

GPIO_10

B01E

BACKLIGHT-BOOST

9

31 BRX-HOTPLUG

CRX-HOTPLUG

41

DRX-HOTPLUG

45

35

PCEC-HDMI

CEC-HDMI

1

2

19

18

1P05-19

1P04-19 1P03-19

1P02-19

TO PIN:

1P02-13 1P03-13 1P04-13 1P05-13

FLASH

B02A

7F20 NAND04GW3B2DN6F

NAND

FLASH

512MB

12,37

+3V3

VCC

AA2

ETH-TXCLK

RXCLK

AA3

ETH-RXCLK

TXCLK

SDCD

SDWP

DDR-CLK_N

DDR-CLK_P

3

SPI_CLK

SPI_CSB

SPI_SDO

SPI_SDI

P6_5

7F52 M25P05-AVMN6P

FLASH

512K

8

+3V3-STANDBY

VCC

6

PNX-SPI-CLK

AF24

3

PNX-SPI-WPn

AE22

1

PNX-SPI-CSBn

AF23

5

PNX-SPI-SDO

AE23

2

PNX-SPI-SDI

AF25

CONTROL

+3V3-STANDBY

+12V

ENABLE -1V8

ENABLE -3V3-5V

DETECT2

XIO-D(00-07)

ETH-TXD

ETH-RXD

XIO_D

MEMORY

B02B

F8 E8F8 E8F8 E8F8 E8

SDRAM

128MB

7B01 EDE1108AGBG

SDRAM

128MB

7B02 EDE1108AGBG

SDRAM

128MB

7B03 EDE1108AGBG

DQ

A

CLK_N CLK_P

GPI0_2

RESET_SYS

PNX-SPI-CS-AMBIn

W23

B06E

B13

GPI0_6

PNX-SPI-CS-BLn

V22

B01K

B02G

GPI0_7

GPI0_3

SDRAM

128MB

7B00 EDE1108AGBG

DDR2-D(0-31)

D(24-31)

D(16-23)

D(8-15)

D(0-7)

DDR2-A(0-13)

B06C

BL_PWM

BACKLIGHT-PWM

AD5

CLK_54_OUT

PXCLK54

AC5

B06C B13

PXCLK54

B02G

+3V3

3S0W

TO IR / LED BOARD AND

KEYBOARD CONTROL

9U41

9CH0

B03E

B03B B03D

B02G B03A

EF

7EC0

7

20

4 3 21

USB-DM

USB-DP

USB-DM2

USB-DP2

USB-DM1

USB-DP1

SIDE USB

CONNECTOR

1P08

+5V-USB1

R26

R25

USB_DP

USB_DN

+5V-USB2

2

1

3

4

1M59

2

1

3

5

8

7

10

11

14

13

15

4 3 21

SIDE USB

CONNECTOR

1P07

2

1

3

4

9F26

9F25

9F21

9F20

7GA0 XC9572XL

CPLD

26

VIO

VCCIO

43

3

PNX-SPI-CS-BLn

2

PNX-SPI-CS-AMBIn

AMBI-SPI-CLK-OUT

22

AMBI-SPI-SDO-OUT

27

AMBI-SPI-SDI-OUT_G1

23

AMBI-PWM-CLK_B2

29

AMBI-SPI-CS-OUTn_R2

30

AMBI-LATCH1_G2

31

AMBI-PROG_B1

19

AMBI-BLANK_R1

20

AMBI-LATCH2_DIS

28

AMBI-SPI-CS-EXTLAMPSn

21

AMBI-TEMP

32

41

40

PNX-SPI-SDI

39

PNX-SPI-SDO

PNX-SPI-CLK

5

PNX-SPI-CSBn

HDMIB-RC

*Mux SIL9187 - non Instaport on SSB3104 313 6417*

Mux SIL9287 - Instaport on SSB3104 313 6364*

512MB on SSB 3104 313 6364*

SSB 3104 313 6417*

SSB 3104 313 6364*

SSB 3104 313 6364*SSB 3104 313 6364*

19

RESET-ETHERNETn

B02G

PXCLK54

B02E

B02G

1M59

2

1

3

5

8

7

10

11

14

13

15

1F53

I2C

3

2

5

7

13

11

7HA0 XC9572XL

CPLD

26

VIO

VCCIO

41

43

40

PNX-SPI-SDI

39

PNX-SPI-SDO

3

PNX-SPI-CS-BLn

PNX-SPI-CLK

AMBI-SPI-CLK-OUT

22

AMBI-SPI-SDO-OUT

27

AMBI-SPI-SDI-OUT_G1

23

AMBI-PWM-CLK_B2

29

BL-SPI-CLK

18

BL-SPI-SDO

12

BL-SPI-CSn

14

BACKLIGHT-PWM_BL-VSBACKLIGHT-PWM

AMBI-SPI-CS-OUTn_R2

30

AMBI-LATCH1_G2

31

AMBI-PROG_B1

19

AMBI-BLANK_R1

20

AMBI-LATCH2_DIS

28

AMBI-SPI-CS-EXTLAMPSn

21

AMBI-TEMP

32

5

PNX-SPI-CS

Bn

9HA0

SSB 3104 313 6417.*

SDM

SPI-PROG

RES

AC19

AUDIO-MUTE-UP

P0_7

B03A

2

PNX-SPI-CS-BLn

B06C B13

9-6 Block Diagram Control & Clock Signals

EN 74Q552.1L LA 9.

2010-Dec-29

back to

div. table

9-7 Block Diagram I2C

I²C

PNX85500: MIPS

B02E

DDR

B05A

FLASH

B01B

ETHERNET + SERVICE

B04C

PNX85500: CONTROL

B01E

PNX85500-CONTROL

B01E

PNX85500: STAN DBY CONTROLER

B02G

HDMI

B04D

HDMI

B01H

TEMP SENSOR + HEADPHONE

B01J

TUNER BRAZIL

B01K

HDMI & CI

B01F

PNX85500: ANALOG VIDEO

B02I

ETHERNET + SERVICE

B04C

P GAMMA & VCOM & FLASH (SHARP)

B14C

TCON CONTROL (SHARP)

B14A

VGA

B01I

VIDEO OUT - LVDS

B06B

NON DVBS CONNECTOR BOARD

B09A

CONNECTORS (SHARP)

B14F

1F52

7S00 PNX85507EB

PNX85500

SDA-SSB

SCL-SSB

C25

C26

1_SDA

1_SCL

AC23

AC24

MC_SDA

MC_SCL

B25

A24

3_SDA

3_SCL

SDA-UP-MIPS

SCL-UP-MIPS

CONTROL

STANDBY

3KTU

3KTV

VCC_3V3

7

8

SDA-TCON

SCL-TCON

1

3

DEBUG

ONLY

19030_407_100809.eps

100813

RES

3F63

3F62

56

7F58

M24C64

EEPROM

(NVM)

3F60

3F59

TUN-P7

TUN-P6

SDA-TUNER

SCL-TUNER

76

1T01

TH2603

MAIN

TUNER

3S60

3S61

3F75

3F76

53 54

7EC1 SII9287B *SII9187A

HDMI

MUX

3EC5

3EC3

HDMI

CONNECTOR 3

HDMI

CONNECTOR 2

1P04

16

15

29

30

1P03

16

15

33

34

1P02

16

15

39

40

HDMI

CONNECTOR

SIDE

1P05

16

15

3FBF-2

3FBF-1

DIN-5V

43

44

47

48

Y25

Y26

Y23

Y24

GPIO_2

GPIO_3

DDCA-SDA

DDCA-SCL

ARX-DDC-SDA

ARX-DDC-SCL

BRX-DDC-SDA

BRX-DDC-SCL

CRX-DDC-SDA

CRX-DDC-SCL

DRX-DDC-SDA

DRX-DDC-SCL

12

7FD1

LM75BDP

TEMP

SENSOR

3FD3

3FD4

46 45

7FE0

TC90517FG

DEMODULATOR

3FE9

3FE8

3S56

3S57

3S2F

3S2G

3S5Y

3S5Z

3S6D

3S6E

+3V3

3S69

3S6A

+3V3

3S6V

3S6W

+3V3-STANDBY

3S81

3S80

+3V3

3S83

3S84

+3V3

3S6F

3S6G

+3V3

AD25

AD24

1E05

12

15

VGA-SDA-EDID-HDMI

VGA-SCL-EDID-HDMI

VGA-SDA-EDID

VGA-SCL-EDID

3FC1

3FC2

+5V-VGA

9FC2

9FC4

9FC1

9FC3

RES

3S5V-1

3S5V-3

9S15

9S14

VGA-SDA-EDID-TCON

VGA-SCL-EDID-TCON

3EC1-1

3EC1-3

AIN-5V

3ECA-1

3ECA-2

BIN-5V

3ECA-3

3ECA-4

CIN-5V

3ECP-3

3ECP-1

+5V-EDID

3ECU-2

3ECU-4

+3V3

1KQB

2

1

9JB6

9JB7

12 13

7KQA

ISL24837IRZ

8-CHANNEL

PROG I2C

REF VOLT GEN

E19 E20

7KAA

UPD809900F1

CONTROL

7KQB M25P32

21

7KQH

PCA9540B

2 CHANNEL

MULTIPLEXER

B24

Y5 Y6

AB4

AC1

AA3

11 10

9

8

7

A23

4_SDA

4_SCL

AE21

AF21

P3_0

P3_1

1

6

10

11

5

15

VGA

CONNECTOR

RXD1-MIPS

TXD1-MIPS

W21

W22

GPIO_2

GPIO_3

RXD2-MIPS

TXD2-MIPS

UART

SERVICE

CONNECTOR

1E06

3

2

1

3E53-3

3E53-1

3E53-4

3E53-2

1F51

1

3

B02E

B02G

MEMORY

B02B

FLASH

B02A

ANALOGUE

VIDEO

VGA_EDID_SDA

VGA_EDID_SCL

B02I

ERR

35

ERR15ERR

53

1M71

1

3

TO

TEMPERATURE

SENSOR

4

5

2D

DIMMING

1F53

2

3

SDA-BL

SCL-BL

LVD S

CONNECTOR

1G51

50

49

SDA-DISP

SCL-DISP

RES

3C83

3C81

3S67

3S65

3S68

3S66

+3V3

B26

A25

2_SDA

2_SCL

SDA-SET

SCL-SET

3S58

3S5W

3S6B

3S6C

+3V3

3S1G

3S1H

+3V3-STANDBY

RES

7

8

9S13

9S10

3C84

3C85

1M71

3

1

TO

TEMPERATURE

SENSOR

2D

DIMMING

1F53

2

3

RES

3K83

3K81

3K84

3K85

3G2W

3G2Y

uP

LEVEL SHIFTED

FOR DEBUG

USE ONLY

RXD-UP

TXD-UP

3F65

3F64

21

7S01

PCA9540B

2 CHAN.

MULTIPLEX.

ERR

24

ERR

34

RES

SDA-DISP

SCL-DISP

ERR

23

ERR

42

RES

9S12

9S11

7E10 LAN8710A-EZK

ETH-RXD(0)

ETH-RXD(3)

ETH-RXCLK

ETH-RXD(1)

ETH-RXD(2)

AA1 AA4

AB1 AB2

AA2

22 23

24 25

20

ETH-TXD(0)

ETH-TXD(3)

ETH-TXCLK

ETH-TXD(1)

ETH-TXD(2)

RXD_0 RXD_1

RXD_2 RXD_3

RXCLK

TXD_0 TXD_1

TXD_2 TXD_3

TXCLK

XIO_D

DQ

A

ETHERNET

DDC_A_SDA

DDC_A_SCL

HDMI_DV

HDMI

CONNECTOR 1

ETHERNET

CONNECTOR

RJ45

RES

Only for SHARP display with TCON on SSB

Only for SHARP display with TCON on SSB Only for SHARP display with TCON on SSB

SDRAM

7B01 EDE1108AGBG

SDRAM

7B02 EDE1108AGBG

FLASH

256MB

SDRAM

7B03 EDE1108AGBG

SDRAM

7B00 EDE1108AGBG

DDR2-D(0-31)

XIO-D(00-07)

D(24-31)

D(16-23)

D(8-15)

D(0-7)

DDR2-A(0-13)

19

1

18 2

19

1

18 2

19

1

18 2

19

1

18 2

SPI_CLK

SPI_CSB SPI_SDO SPI_SDI

P6_5

7F52 M25P05-AVMN6P

FLASH

512K

8

+3V3-STANDBY

VCC

6

PNX-SPI-CLK

AF24

3

PNX-SPI-WPn

AE22

1

PNX-SPI-CSBn

AF23

5

PNX-SPI-SDO

AE23

2

PNX-SPI-SDI

AF25

7F20 NAND04GW3B2DN6F

ERR

13

ERR

18

ERR

14

ERR

64

STANDBY

SW

MAIN

SW

MAIN NVM

SW

EDID

SW

TCON

SW

FLASH

Programmable via USB

SW

Pre-programmed device

1N00

Block Diagrams

EN 75Q552.1L LA 9.

2010-Dec-29

back to

div. table

9-8 Supply Lines Overview

B01A

COMMON INTERFACE

B01D

SD-CARD

B01F

HDMI & CI

B01K

TUNER BRAZIL

B01C

USB HUB

B02B

PNX85500: SDRAM

B01B

FLASH

B02A

PNX85500: NANDFLASH CONDITIONAL ACCESS

B02C

PNX85500: DIGITAL VIDEO IN

B02E

PNX85500: MIPS

B02G

PNX85500: STANDBY CONTROLLER

B02H

PNX85500: POWER

B01H

HDMI

B01I

VGA

B01J

TEMP SENSOR + HEADPHONE

B01E

PNX85500: CONTROL

B01G

TOSHIBA SUPPLY

B03D

DC / DC

B03E

DC / DC

B09A

(*NON) DVBS CONNECTOR BOARD

B03G

FAN - CONTROL

B04A

ANALOGUE EXTERNALS A

B04C

ETHERNET + SERVICE

B03F

TEMPSENSOR + AMBILIGHT

B06A

DISPLAY INTERFACING-VDISP

B02D

PNX85500: AUDIO

B03A

AUDIO

B03B

DC / DC

SUPPLY LINES OVERVIEW

PSU

B03C

DC / DC

B03H

VDISP - SWITCH

B04D

HDMI

B04E

HEADPHONE

B06B

VIDEO OUT - LVDS

B06D

SPI-BUFFER

B05A

DDR

B14D

MPD

B14E

MINI LVDS

B06C

.

B14F

CONNECTORS

B14B

TCON DC / DC (SHARP)

B14C

P GAMMA & VCOM & FLASH (SHARP)

B13

AMBILIGHT CPLD

B14A

TCON CONTROL (SHARP)

+5V

+5VCA

3F01

+T

B03e

+3V3

B03e

+3V3-SD

3F40

+T

+3V3

+5V-TUN-PIN

+5V-TUN

B03e

+5V

+5V-USB2

3F32

+T

+5V-USB1

3F25

+T

B03e

+3V3

B03e

+1V8

DDR2-VREF-CTRL2

DDR2-VREF-CTRL3

B03c

+3V3

+5V

B03e

+3V3

B03e

B01g

B03e

B03b

+3V3

B03e

B03b,d,e,g, B09a,B14f

B01e,B02e, g,h,B03a,b,h, B04d,e,B09a, B14f

B03h

B02d,B03a

+

3V3

+3V3

B03e

+3V3-STAN D BY

+3V3-STANDBY

B03c

+1V1

B03b

+3V3-STAN D BY

+3V3-STANDBY

B03c

+1V1

B03b

+1V2

B03d

+1V8

B03b

+2V5

B03d

+2V5-AUDIO

B02d

+2V5-LVDS

B03d

+3V3

B03e

+3V3-STAN D BY

+3V3-

STANDBY

B03c

DIN-5V

+3V3

+1V2-BRA-VDDC

+1V2-BRA-DR1

+3V3

B03e

+3V3-STANDBY

+3V3-STAN D BY

B03c

+5V

B03e

B03d

B03e

9F71

+3V3-BRA

+3V3

+1V2-BRA-VDDC

+3V3+3V3

7FA3

IN OUT

COM

+1V2-BRA-DR1

5FA4

5FE7

5FA3

+3V3

+5V+5V

+2V5-LVDS

+2V5

B03e

+2V5-AUDIO

+3V3-ARC

+3V3+3V3

7S08

IN OUT

COM

+2V5-BRA

+3V3-BRA-FLT

+5V+5V

7FE3

IN OUT

COM

5FE9

5FE4

3S20

3S06

+24V-AUDIO-POWER

+24V-AUDIO-VDD

3S0Z

3S11

B03c

+3V3-STANDBY+3V3-STAN D BY

+24V-AUDIO-POWER

+AVCC

3D09

7U03 TPS53126PW

+12V

+1V8

12

14

+1V1

5U01

23

24

+12V

12V/1V1

COVERSION

12V/1V8

COVERSION

5U02

5U00

B03c

+3V3-STANDBY

+3V3-STAN D BY

B03c

Dual

Synchronous

Step-Down

Controller

7U04

7U01

7U02-2

7U02-1

1

1M95

11

66 77

88

1M95

+3V3-STANDBY

Optional 1M99 is 12 pin connector

3V3_ST

+12V

1M99

11

66 77

22

33

44

88

55

LAMP-ON

1M99

BACKLIGHT-BOOST

+12VD

BACKLIGHT-PWM_BL-VS

+12V

99

+24V-AUDIO-POWER

10 10

+12V +12V

+VSND

GND_SND

BACKLIGHT-PWM-ANA-DISP

BL-SPI-CSn

99

10 10

BL-SPI-SDO

11 11

12 12

BL-SPI-CLK

POWER-OK

22

33

44

55

STANDBY

GND1

11 11

N.C.

+12V

BL_ON_OFF

DIM

POK

N.C

N.C.

+12V

BOOST

GND1

N.C.

1U40

T 3.0A

MAINS-OK

CUA0

+1V2

+1V8+1V8

+12V

7UA3

B03b

+3V3-ET-ANA

+3V3+3V3

B03e

+2V5-REF

+12V+12V

B03c

B03b

B03c

B03e

B03c

B03e

3U16

3UA0

7UC0

IN OUT

COM

3U15

7UA0

VOLT. REG.

+5V-TUN

+5V5-TUN+5V5-TUN

7UA6

ENABLE-1V8

+3V3

+12V+12V

+1V1+1V1

+12V+12V

+3V3+3V3

+5V+5V

+3V3+3V3

5UD3 5UD2

+5V

+3V3

+5V5-TUN

5UD0 5UD1

6UD0

+2V5

7UD2

IN OUT

COM

7UD0

IN OUT

COM

7UD1

IN OUT

COM

7UD3

IN OUT

COM

B03e

B02h

+3V3+3V3

V-AM BI

1UM0

T 1.0A

5UM1

B03h

+VDISP-INT+VDISP-INT

1G00

T 3.0A

+VDISP

1G03

T 3.0A

1C86 *1T86

T 2.0A

5G02

5E08

+VDISP-INT

+12VD+12VD

+3V3+3V3

7UU2

LCD-PWR-ONn

7UU1

B03c

B03e

+3V3-STANDBY+3V3-STAN D BY

B03c

1P03

18

HDMI 2

CONNECTOR

BIN-5V

1P02

18

HDMI 1

CONNECTOR

+5V-EDID

+3V3-STAN D BY

+3V3

+3V3-HDMI

CIN-5V

1P04

18

HDMI 3

CONNECTOR

AIN-5V

5EC0

B03e

B03c

+5V-VGA

+5V

B01I

B03e

B02b,h,B03d, B05a

DIN-5VDIN-5V

B01h

B03e

B03c

6EC1

+3V3-STANDBY+3V3-STANDBY

+3V3+3V3

B03e

B06a

+VDISP+VDISP

+3V3+3V3

B03e

+3V3

DDR2-VREF-DDR

+1V8+1V8

B03b

B02h

B01f

3B20

VIO

+3V3+3V3

B03e

5G01

5GA1

VINT

5GA0

ONLY FOR 5000 SERIES

NOT FOR 5000 SERIES

B06a,B11b, B14b

OR

B03d

B02h

B06b

B03e

B03c

B03e

B03c

+3V3-STAN D BY+3V3-STAN D BY

+5V+5V

+12V+12V

+3V3+3V3

1M20

8

5

1M59

21

TO IR/LED PAN EL

1M09

1 2

+24V

VLS_15V6VLS_15V6

VCC_3V3VCC_3V3

VREF_15V2VREF_15V2

+VDISP+VDISP

VLS_15V6VLS_15V6

VGL_-6VVGL_-6V

VGH_35VVGH_35V

VCC_3V3VCC_3V3

B03c

B03e

B03c

B03e

B14b

B14c

B14b

+3V3-STAN D BY+3V3-STANDBY

+5V+5V

+12V+12V

+3V3+3V3

1M20

8

5

TO IR/LED PAN EL

B01,a,c,e,k, B03c,d,B04a,d, B09a,B14f

B11a

B08a

1P05

B02g,h, B03e

18

HDMI SIDE

CONNECTOR

B04d

B01k

+5V-VGA

1E05

9

VGA

CONNECTOR

B04d

B01g

18990_406_100331.eps

100723

B02G

B06C B01E

B02G

B03A

B01,a,b,c,d,e, g,j,jk,B14f B02a,c,d,e,h, B03c,f,g,h, B04a,c,d,e, B06b,c,d, B09a,B13

1HA0

T 1.5A

1KFA

T 3.0A

VCC_3V3

VGH_35V

VLS_15V6

VLS_15V6_B

7KFA ISL97653AIRZ

IC

LCD

SUPPLY

+VDISP

+VDISP-INT+VDISP-INT

VCC_1V2VCC_1V2

VIO

+3V3+3V3

B03e

+24V

5HA1

VINT

5HA0

VDDQ

VCC_+3V3VCC_3V3

B14b

5KAF

VDD33

5KAE

VCC_1V2

SSCG_AGND

+VDISP+VDISP

1M72

1 2

7KAC

VIN SW

GND

5KAG

5KAD

LVD S_AVDD

mini_AVDD

5KAC

5KAB

VDD12

5KAA

7KFE

9KFC

9KFE

VGL_-6V

7KQA ISL248371RZ

IC

LCD

SUPPLY

VREF_15V2

VLS_15V6VLS_15V6

VCC_3V3VCC_3V3

+VDISP+VDISP

B14b

B03h

B14a

B14b

3KFP

B14d

B14a,c,d

B14a,c,d,e

B14c,d,e

B14e

B14b

B14e

Block Diagrams

EN 76Q552.1L LA 9.

2010-Dec-29

back to

div. table

Circuit Diagrams and PWB Layouts

18770_600_100212.eps

100218

LiteOn 15 LED Common

AL1A AL1A

8204 000 8978

AL 2K10 LiteOn

15 LED Common

2009-12-04

6

2009-10-28

5

2009-10-07

4

2009-08-27

3

2009-07-03

2

BLUE

GREEN

RED

-T

S

GND

Q

HOLD

W

VCC

C

D

VIA

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

OUT

12

11

GSCLK IREF MODE

SCLK SIN SOUT

XERR XHALF XLAT 10

NC

9

8

VCC

0 1 2

3

4 5 6 7

BLANK

13 14 15

GND GND_HS

BLUE

GREEN

RED

BLUE

GREEN

RED

2

G

123

1

4567

3 4

F

A

H

I

B

C

910111213 14

E

567

910111213 14

D

E

F

8

H

I

A

B

C

D

8

G

3

4 5 6 7

8

9

2627

17 18 19

2

20 21 22 23 24 25

1

10 11 12 13 14 15 16

FH12-25S-0.5SH(55)

1M83

FB12

FB15

RES

3004

10K

FB06

+3V3

10K

3B11

+24V

3B00-2

150R

27

100p

2B04-2

27

2B04-3

3 6

43

+3V3

100p

LTW-008RGB

65

21

+24V

7000

3B22 10K

FB41

+3V3

2B00

33p

1K5

3B03-1

1 8

+3V3

1 8

100p

2B04-1

3B02-2

10K

27

3B39-1

8 1

10K

3B02-1

1 8

1%1K5

FB03

2B10

FB13

100p

100n

2B17

41

42

TLC5946RHB

7B26-2

34 35 36

373839

40

2

1

8

3

7B07

M95010-WDW6

6

5

4

7

3B34

Φ

(64K)

1

3

2

100K

RES

45

BC847BW

7B25

3B00-4

150R

1K8

3B18

10K

3B13-3

3 6

33p

+3V3

27

2B01

3B01-2

100R

2B02

100p

5

21

43

+3V3

+24V

LTW-008RGB

7001

6

+3V3

3B03-4

1K5

45

FB16

FB05

FB07

FB04

3B07-4

10K

45

65

21

43

7003 LTW-008RGB

2B11

100n

100R

3B01-1

1 8

7B20-2

74LVC2G17

3

25

4

1 8

3B00-1

150R

7

3B03-2

1K5

2

270R

3B36

3B39-3

3 6

1K5 1%

27

1%1K5

25

6

+24V

3B39-2

74LVC2G17

7B20-1

1

7B23-1 BC847BS(COL)

2

6

1

LMV331IDCK

1

3

4

52

7B30

270R

3B35

68R

3B37

7B23-2 BC847BS(COL)

5

3

4

3 6

3B00-3

150R

100p

2B04-4

45

+3V3

45

+3V3

FB08

3B13-4

10K

3

+3V3

FB31

LTW-008RGB

7002

65

21

4

FB35

15

1 2 23

27

22 25 32

19 20 21

6 7

8

9 10 11 14

26

3

12 13 28 29

4

5

16 17 18

7B26-1

TLC5946RHB

31

30

33

24

FB11

2

1

4

3

FB10

LTW-008RGB

7004

65

1K5

3B03-3

3 6

27

FB01

45

10K

3B07-2

3B30-4

220R

+24V

2B03

100n

2B09

10n

3B31

2K0

10n

2B08

+3V3

5

4

74LVC1G32GW

7B06

1

2

3

FB40

18

100n

2B20

3B07-1

10K

FB20

3B21

FB30

1 8

150R

220R

3B30-1

+3V3

3 6

10K

3B07-3

FB32

+3V3

5

2

1

4

3

+3V3

7005 LTW-008RGB

6

TEMP-SENSOR

BLANK

PROG

SPI-CS

PWM-CLOCK

SPI-DATA-RETURN

SPI-DATA-IN

SPI-CLOCK

LATCH

PWM-CLOCK

BLANK

SPI-DATA-IN-BUF

PWM-R1

PWM-G1

PWM-R1

PWM-G3 PWM-R3 PWM-R2

PWM-B2

PWM-G2

DATA-SWITCH

TEMP-SENSOR

PWM-G4 PWM-R4 PWM-B4

PWM-R5

PWM-G5

PWM-B5

SPI-CLOCK-BUF

SPI-DATA-IN-BUF

SPI-DATA-RETURN

SPI-CS

DATA-SWITCH

LATCH

SPI-DATA-IN SPI-DATA-OUT

PWM-CLOCK-BUF

SPI-CLOCK-BUF

PROG

SPI-CLOCK-BUF

PWM-CLOCK-BUF

SPI-CLOCK

PWM-G1

PWM-B1

PWM-B3

2B00 E8 2B01 F8 2B02 E9 2B03 I14 2B04-1 B7 2B04-2 B6 2B04-3 B8

1M83 C1

3B00-4 B6 3B01-1 E7

3B13-4 I3 3B18 A8 3B21 B7 3B22 B8

3B00-3 B6

7B23-1 F4 7B23-2 G4 7B25 H3 7B26-1 A8 7B26-2 C9

3B01-2 D7 3B02-1 E3

3B13-3 H3

3B30-1 D9 3B30-4 E9

2B04-4 B7 2B08 E12 2B09 E12

2B11 A9 2B17 D8 2B20 D4

3004 E12 3B00-1 A6 3B00-2 B6

7002 G8

FB16 C1 FB20 B7 FB30 G3 FB31 H3 FB32 I

3

FB35 A8 FB40 D12

7003 G10 7004 G11

7B30 D13 FB01 A1

3B02-2 E5 3B03-1 H14 3B03-2 H14

3B03-4 H14 3B07-1 F3 3B07-2 G3 3B07-3 H3 3B07-4 G3 3B11 E12

FB06 B2 FB07 B1 FB08 B1 FB10 B2 FB11 B1 FB12 B2 FB13 C1

7B20-1 D8 7B20-2 E8

FB15 C1

3B31 B10 3B34 D13 3B35 G14

2B10 F9

3B37 G14 3B39-1 E13 3B39-2 D12 3B39-3 D13

7000 G5 7001 G7

3B36 G14

FB41 E13

FB03 B1 FB04 B1 FB05 B1

3B03-3 H14

7005 G13 7B06 D3 7B07 D4

B007

B001 B002

10. Circuit Diagrams and PWB Layouts

10-1 AL1 820400089786 AmbiLight Common

LiteOn LED Common

EN 77Q552.1L LA 10.

2010-Dec-29

back to

div. table

LiteOn LED Common 2

18770_601_100212.eps

100212

LiteOn 15 LED Common 2

AL1B AL1B

2009-12-04

6

2009-10-28

5

2009-10-07

4

2009-08-27

3

2009-07-03

2

8204 000 8978

AL 2K10 LiteOn

15 LED Common

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

3B55-2 B3 3B55-3 A3 3B55-4 A3

7C20-2 F3

8

123

3B57-2 D3 3B57-3 C3

FC03 H3

9101112

A

B

C

7104 B6 7105 B5

F

G

3B50 B7

D

E

7200 F8

3B53-4 C7 3B55-1 C3

11 12

FC02 G3

3C12 F4

C

4

3C15-1 G4 3C15-2 G4 3C15-3 G4 3C15-4 G4

7100 B11 7101 B10 7102 B9 7103 B7

3C10 F4

7C20-1 E3

910

7201 F9 7202 F10

3C00-2 F3 3C00-3 F3

7B51 C3

FB71 C3 FB72 D3 FC01 F3

3C11 F4

D

E

3B53-2 C7 3B53-3 C7

H

2B50 C11

G

H

3C00-4 E3

7C22 G3 FB70 B3

3 4

3B51 B7

7

3B52 B7 3B53-1 B7

5

3C00-1 G3

7 8

7B50-1 A3 7B50-2 B3

A

B

21

F

3C06-1 G3 3C06-2 H3

56

6

5

21

43

6

LTW-008RGB

7201

10K

3B55-3

3 6

100n

2B50

5

3

4

FC01

12

7C20-2

BC847BS(COL)

12

270R

3C10

8

3C11

270R

10K

3B55-1

1

68R

3B52

65

21

43

7104 LTW-008RGB

3 6

45

3C15-3

1K5

3C15-4

1K5

3C12

68R

BC847BW

7C22

1

3

2

3 6

+24V

3B57-3

10K

4

+24V

FB70

BC847BS(COL)

7B50-2

5

3

10K

3B55-4

4527

3

3B57-2

10K

LTW-008RGB

7105

65

21

4

FB71

65

21

43

3

LTW-008RGB

7100

6

5

2

1

4

1

43

7101 LTW-008RGB

7200 LTW-008RGB

65

2

10K

3C06-1

1 8

+24V

27

FC03

1

43

10K

3B55-2

6

5

2

65

2

1

4

3

7103 LTW-008RGB

8

LTW-008RGB

7202

3C15-1

1K5

1

3C15-2

1K5

27

FB72

6

1

+24V

BC847BS(COL)

7C20-1

2

5

21

43

LTW-008RGB

7102

6

7B50-1

BC847BS(COL)26

1

3

2

7B51 BC847BW

3B51

270R

45

270R

3B50

3 6

1K5

3B53-4

7

1K5

3B53-3

1K5

3B53-2

2

1K5

3B53-1

1 8

27

FC02

10K

3C06-2 3C00-3

10K

3 6

3C00-2

10K

27

10K

1 8 45

3C00-1

+24V

3C00-4

10K

Green

Red

PWM-R2

PWM-G2

PWM-B2

PWM-R3

PWM-G3

PWM-B3

Blue

Circuit Diagrams and PWB Layouts

EN 78Q552.1L LA 10.

2010-Dec-29

back to

div. table

Circuit Diagrams and PWB Layouts

18770_655_100413.eps

100413

21 LED LiteOn

AL3A AL3A

8204 000 8971

3104 313 63832

21 LED LiteOn

AL 2K10

2009-10-22

2

2009-08-18

1

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

7

B

5

C C

7204 A4

10

A

B

2 3 4

D

98

6

10

7205 A5

A

2 3 6

D

87

1M84 A10

51

2C01 B6 7203 A3

14

4

3

9

LTW-008RGB

7203

6

5

21

B005

B003 B004

2C01

100n

+3V3

B006

+3V3

3

4 5 6 7

8

9

26 27

+24V

16 17 18 19

2

20 21 22 23 24 25

1M84

FH12-25S-0.5SH(55)

1

10 11 12 13 14 15

+24V

6

5

2

1

4

3

21

43

7205 LTW-008RGBLTW-008RGB

7204

6

5

TEMP-SENSOR

BLANK

PROG

LATCH

SPI-CS

PWM-CLOCK-BUF

SPI-DATA-RETURN

SPI-DATA-OUT2

SPI-CLOCK-BUF

Blue

Green

Red

10-2 AL3 820400089712 21 LED LiteOn

21 LED LiteOn

EN 79Q552.1L LA 10.

2010-Dec-29

back to

div. table

21 LED LiteOn

18770_656_100413.eps

100413

21 LED LiteOn

AL3B AL3B

2009-10-22

2

2009-08-18

1

8204 000 8971

3104 313 63832

21 LED LiteOn

AL 2K10

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

H

2E10 D13 2F10 H13

3E02-1 C2 3E02-2 C2

45678

3E02-3 B2 3E02-4 B2

9101112

3E13-1 C13 3E13-2 D13

13 14

A

B

C

D

E

F

G

H

A

B

C

D

E

F

G

3E13-3 D13 3E13-4 D13 3F02-1 G2 3F02-2 G2

3F11 F13 3F12 G13

123 45678 9 10111213 14

123

3F13-1 G13 3F13-2 G13 3F13-3 H13 3F13-4 H13

7400 C5 7401 C7 7402 C8 7403 C9

3E05-3 D2 3E05-4 D2 3E10 B13 3E11 C13 3E12 C13

7503 F9 7504 F11

7F02 H3 FD04 B2 FD05 C2 FD06 E2 FF01 F2 FF02 G2 FF03 H2

3F02-3 F2 3F02-4 F2 3F05-3 H2 3F05-4 H2 3F10 F13

7404 C11 7405 C12 7500 F5 7501 F7 7502 F8

7505 F12 7E01-1 B3 7E01-2 C3 7E02 D3 7F01-1 E3 7F01-2 G3

270R

3E10

5

2

1

4

3

3E12

68R

LTW-008RGB

7403

6

5472

3E02-2

10K

36

3E02-4

10K

45

10K

3E02-3

3

1K5

3E13-4

7400

65

21

4

1

43

LTW-008RGB

65

2

18

+24V

7503

3F02-1

10K

BC847BW

1

3

2

27

+24V

7E02

1K5

3E13-2

270R

3F10

68R

3F12

FF01

27

FF02

10K

3F02-2

2F10

100n

1K5

3F13-3

3 6

FF03

7F01-2 BC847BS(COL)

5

3

4

+24V

1

43

7505 LTW-008RGB

6

5

2

10K

3F02-4

45

65

2

1

43

LTW-008RGB

7501

65

2

1

43

36

7500 LTW-008RGB

3F02-3

10K

FD06

+24V

FD04

5

3

4

2

6

1

BC847BS(COL)

7E01-2

3

BC847BS(COL)

7E01-1

65

2

1

4

7402 LTW-008RGB

18

100n

2E10

1

4

3

10K

3E02-1

LTW-008RGB

7405

65

2

6

5

21

433

7404 LTW-008RGB

65

21

4

21

43

7401 LTW-008RGB

LTW-008RGB

7504

65

1

3

2

+24V

BC847BW

7F02

10K

3E05-3

36

+24V

10K

45

FD05

3E05-4

3E13-1

1K5

1 8

3E11

270R

1K5

3 6

10K

36

3E13-3

10K

3F05-4

45

3F05-3

1 8

+24V

1

1K5

3F13-1

7F01-1 BC847BS(COL)

2

6

270R

3F11

3F13-2

1K5

27

45

2

1

43

3F13-4

1K5

LTW-008RGB

7502

65

PWM2-B2

PWM2-G2

PWM2-R2

PWM2-B3

PWM2-R3

PWM2-G3

Circuit Diagrams and PWB Layouts

EN 80Q552.1L LA 10.

2010-Dec-29

back to

div. table

21 LED LiteOn

18770_657_100413.eps

100413

21 LED LiteOn

AL3C AL3C

2009-10-22

2

2009-08-18

1

8204 000 8971

3104 313 63832

21 LED LiteOn

AL 2K10

VIA

BLUE

GREEN

RED

OUT

12

11

GSCLK IREF MODE

SCLK SIN SOUT

XERR XHALF XLAT 10

NC

9

8

VCC

0 1 2

3

4 5 6 7

BLANK

13 14 15

GND GND_HS

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

7D01-1 E3

3D12 F13

7303 E9

3D02-2 E2 3D02-3 F2 3D02-4 F2

3D13-1 F13 3D13-2 G13 3D13-3 G13

3D02-1 E2

3D00-3 C7

7D01-2 F3

3D05-3 G2 3D05-4 G2 3D10 E13 3D11 F13

3D13-4 G13 3D18 B8 3D21 C8

7304 E10 7305 E12

7301 E7 7302 E8

2D11 B9

3D00-1 B7 3D00-2 C7

14

5678

B

C

D

E

F

3D00-4 B7

1

7300 E5

10 11 12 13

123 4

B

C

D

E

91011

14

A

2

G

H

2D04-1 C7

G

H

A

3D22 C8

8 9

F

12

2D04-2 C7 2D04-3 C8 2D04-4 C7 2D10 G14

3 45

FD02 F3 FD03 H3 FD18 B8 FD19 C7

13

150R

3D00-2

27

7D02 G3 7D26-1 B9 7D26-2 C10 FD01 E3

67

150R

3D00-4

45

FD18

33R

3D21

3D10

270R

3D12

68R

2D04-1

100p

1 8

2D04-3

100p

3 6

45 36

3D02-4

10K 10K

3D02-3

4234

35 36

373839

40

41

7D26-2

TLC5946RHB

32

3D18

1K8

10 11 14 15

1 2 23

27

22 25

5

16 17 18 19 20 21

6 7

8

9

31

30

33

24 26

3

12 13 28 29

4

3

TLC5946RHB

7D26-1

LTW-008RGB

7304

6

5

21

+24V

+3V3

2D04-4

100p

45

+3V3

10K

3D22

100p

27

3D11

270R

2D04-2

7

3D02-2

10K

2

10K

3D02-1

18

27

1 8

1K5

3D13-2

3D13-1

1K5

100n

2D10

3 6

FD01

3D05-3

10K

FD03

1

43

7305 LTW-008RGB

65

2

+24V

LTW-008RGB

7300

65

21

4

3

+24V

3D05-4

45

+24V

2

6

1

10K

5

3

4

BC847BS(COL)

7D01-1

BC847BS(COL)

7D01-2

100n

2D11

7D02 BC847BW

1

3

2

1K5

3D13-4

45

3D13-3

1K5

3 6

FD19

3 6

FD02

1 8

150R

3D00-3

3

150R

3D00-1

7303 LTW-008RGB

65

2

1

4

65

21

4

343

LTW-008RGB

7302

7301 LTW-008RGB

65

21

BLANK

PWM2-G3 PWM2-R3 PWM2-R2

PWM2-B2

PWM2-G2

PWM2-G1

PWM2-R1

PWM2-G1

SPI-DATA-OUT2

LATCH

SPI-DATA-OUT

PWM-CLOCK-BUF

SPI-CLOCK-BUF

PROG

PWM2-B1

PWM2-B3

Circuit Diagrams and PWB Layouts

EN 81Q552.1L LA 10.

2010-Dec-29

back to

div. table

10-3 AL1 Layout AmbiLight LiteOn

19030_602_100809.eps

100809

AmbiLight LiteOn

3104 313 6383.2

36 LED

1M83 1M84

2B00

2B01

2B02

2B03

2B04

2B08

2B09

2B10

2B11

2B17

2B20

2B50

2C01

2D04

2D10

2D11

2E10

2F10

3004

3B00

3B01

3B02

3B03

3B07

3B11

3B13

3B18

3B21

3B22

3B30

3B31

3B34

3B35

3B36

3B37

3B39

3B50

3B51

3B52

3B53

3B55

3B57

3C00

3C06

3C10

3C11

3C12

3C15

3D00

3D02

3D05

3D10

3D11

3D12

3D13

3D18

3D21

3D22

3E02

3E05

3E10

3E11

3E12

3E13

3F02

3F05

3F10 3F11

3F12

3F13

7000 7001 7002 7003 7004 7005 7100 7101 7102 7103 7104 7105 7200 7201 7202 7203 7204 7205 7300 7301 7302 7303 7304 7305 7400 7401 7402 7403 7404 7405 7500 7501 7502 7503 7504 7505

7B06

7B07

7B20

7B23

7B25

7B26

7B30

7B50

7B51

7C20

7C22

7D01

7D02

7D26

7E01

7E02

7F01

7F02

B001

B002

B003

B004

B005

B006

B007

FB01

FB03

FB04

FB05 FB06

FB07

FB08

FB10

FB11

FB12

FB13

FB15FB16

FB20

FB30

FB31

FB32

FB35

FB40

FB41

FB70

FB71

FB72

FC01

FC02

FC03

FD01 FD02

FD03

FD04

FD05

FD06

FD18

FD19

FF01FF02

FF03

Layout AmbiLight LiteOn

Circuit Diagrams and PWB Layouts

EN 82Q552.1L LA 10.

2010-Dec-29

back to

div. table

Circuit Diagrams and PWB Layouts

18770_670_100212.eps

100219

Everlight 15 LED Common

AL1A AL1A

8204 000 9059

AL 2K10 Everlight

15 LED Common

2009-11-27

2

2009-11-03

1

BLUE

GREEN

RED

BLUE

GREEN

RED

OUT

12

11

GSCLK IREF MODE

SCLK SIN SOUT

XERR XHALF XLAT 10

NC

9

8

VCC

0 1 2

3

4 5 6 7

BLANK

13 14 15

GND GND_HS

BLUE

GREEN

RED

BLUE

GREEN

RED

S

GND

Q

HOLD

W

VCC

C

D

VIA

BLUE

GREEN

RED

BLUE

GREEN

RED

-T

FB07 B1 FB08 B1

FB15 C1

3B37 G14 3B39-1 E13

3B34 D13

3B36 G14

7003 G10 7004 G11

7B30 D13 FB01 A1

3B02-2 E5 3B03-1 H14

3B03-4 H14 3B07-1 F3

FB41 E13

FB03 B1 FB04 B1 FB05 B1

3B03-3 H14

7005 G13 7B06 D3

FB12 B2 FB13 C1

7B20-1 D8 7B20-2 E8

7B07 D4

3B30-1 D9 3B30-4 E9

2B04-4 B7 2B08 E12

3B35 G14

2B10 F9 2B11 A9 2B17 D8

3B39-2 D12 3B39-3 D1

3

7000 G5 7001 G7

FB20 B7 FB30 G3

3B31 B10

FB35 A8 FB40 D12

7B23-1 F4

7B25 H3 7B26-1 A8 7B26-2 C9

3B01-2 D7 3B02-1 E3

D

E

3B03-2 H14

G

H

I

3B07-2 G3 3B07-3 H3 3B07-4 G3 3B11 E12

FB06 B2

FB10 B2 FB11 B1

3B18 A8 3B21 B7 3B22 B8

56

2B09 E12

8 910

2B20 D4

3004 E12 3B00-1 A6 3B00-2 B6

7002 G8

FB16 C1

FB31 H3 FB32 I3

7B23-2 G4

3B00-4 B6 3B01-1 E7

B

C

F

8 910

A

B

C

D

3B13-3 H3 3B13-4 I3

3 4

7111213 14

3B00-3 B6

H

I

1M83 C1

2B02 E9

2B00 E8

11 12 13 14

E

4567

3

1

12

F

A

2

G

2B01 F8

2B03 I14 2B04-1 B7 2B04-2 B6 2B04-3 B8

FB32

65

2

1

4

3

+3V3

99-235/RSBB7C-A24/2D

7005

+3V3

10n

2B09

2K0

3B31

4

+3V3

1

2

3 5

7B06

74LVC1G32GW

FB40

18

2B20

100n

10K

3B07-1

FB20

FB30

8

3B21

150R

3B30-1

220R

1

B002

+3V3

FB08

3B07-3

10K

3 645

+3V3

FB31

10K

3B13-4

1

43

+3V3

7002 99-235/RSBB7C-A24/2D

65

2

25 32

FB35

9 10 11 14 15

1 2 23

27

22

5

16 17 18 19 20 21

6

7

8

31

30

33

24 26

3

12 13 28 29

4

TLC5946RHB

7B26-1

FB10

FB11

6

5

2

1

4

3

6

7004 99-235/RSBB7C-A24/2D

3B03-3

1K5

3

FB01

27

45

3B07-2

10K

+24V

220R

3B30-4

100n

2B03

100n

2B11

3B01-1

100R

1 8

2B08

10n

27

1K5

3B03-2

3B36

270R

1K5 1%

3 6

3B39-2

27

3B39-3

5

6

+24V

1%1K5

7B20-1

74LVC2G17

1

2

6

1

3

4

52

BC847BS(COL)

7B23-1

LMV331IDCK

7B30

3B35

270R

3B37

68R

5

3

4

B001

3 6

BC847BS(COL)

7B23-2

150R

3B00-3

2B17

100n

2B04-4

100p

45

36

373839

40

41

42

7B26-2

TLC5946RHB

34 35

4

7

2

1

8

3

+3V3

M95010-WDW6

7B07

(64K)

Φ

6

5

7B25 BC847BW

1

3

2

3 6

3B18

1K8

+3V3

3B13-3

10K

33p

2B01

100R

3B01-2

27

+24V

100p

2B02

65

21

43

+3V3

7001 99-235/RSBB7C-A24/2D

45

FB16

1K5

3B03-4

FB05

FB07

FB04

45

10K

3B07-4

7003

6

5

21

43

99-235/RSBB7C-A24/2D

3

25

4

+3V3

1 8

74LVC2G17

7B20-2

150R

3B00-1

33p

2B00

1 8

+3V3

1 8

3B03-1

1K5

2B04-1

100p

10K

3B02-2

27

1K5 1%

8 1

1 8

3B39-1

FB03

3B02-1

10K

FB13

2B10

100p

3B34

RES

100K

150R

3B00-4

45

5 6 7

8

9

2627

18 19

2

20 21 22 23 24 25

3

4

1M83

FH12-25S-0.5SH(55)

1

10 11 12 13 14 15 16 17

FB12

B007

FB15

10K

3004

RES

FB06

+3V3

3B11

10K

150R

3B00-2

27

+24V

2B04-2

100p

27

3 6

43

+3V3

2B04-3

100p

99-235/RSBB7C-A24/2D

7000

65

21

+24V

10K

3B22

FB41

TEMP-SENSOR

BLANK

PROG

SPI-CS

PWM-CLOCK

SPI-DATA-RETURN

SPI-DATA-IN

SPI-CLOCK

LATCH

PWM-CLOCK

BLANK

SPI-DATA-IN-BUF

PWM-R1

PWM-G1

PWM-R1

PWM-G3

PWM-R3 PWM-R2

PWM-B2

PWM-G2

DATA-SWITCH

TEMP-SENSOR

PWM-G4

PWM-R4 PWM-B4

PWM-R5

PWM-G5

PWM-B5

SPI-CLOCK-BUF

SPI-DATA-IN-BUF

SPI-DATA-RETURN

SPI-CS

DATA-SWITCH

LATCH

SPI-DATA-IN SPI-DATA-OUT

PWM-CLOCK-BUF

SPI-CLOCK-BUF

PROG

SPI-CLOCK-BUF

PWM-CLOCK-BUF

SPI-CLOCK

PWM-G1

PWM-B1

PWM-B3

10-4 AL1 820400090592 AmbiLight Common

Everlight LED Common

EN 83Q552.1L LA 10.

2010-Dec-29

back to

div. table

Everlight LED Common 2

18770_671_100212.eps

100212

Everlight 15 LED Common 2

AL1B AL1B

2009-11-27

2

2009-11-03

1

8204 000 9059

AL 2K10 Everlight 15 LED Common

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

3B57-3 C3

FC03 H3

11 12

A

B

C

7104 B6 7105 B5

F

G

3B55-2 B3 3B55-3 A3

E

7200 F8

3B55-4 A3

7C20-2 F3

8

12

3B53-4 C7 3B55-1 C3

11 12

FC02 G3

3

3B57-2 D3

4

3C15-3 G4 3C15-4 G4

910

7102 B9 7103 B7

3C10 F4

7C20-1 E3

3B50 B7

D

910

7201 F9 7202 F10

7B51 C3

FB71 C3 FB72 D3 FC01 F3

3C11 F4 3C12 F4

C

D

E

H

2B50 C11

3C15-1 G4 3C15-2 G4

7100 B11 7101 B10

3C00-4 E3

7C22 G3 FB70 B3

3 4

3B51 B7

7

3B52 B7 3B53-1 B7

5

3C00-1 G3 3C00-2 F3 3C00-3 F3

7B50-1 A3 7B50-2 B3

A

B

3B53-2 C7 3B53-3 C7

1

F

G

H

3C06-1 G3 3C06-2 H3

56

678

5

3

4

+24V

2

45

BC847BS(COL)

7B50-2

7

10K

3B55-4

3B57-2

10K

2

21

43

99-235/RSBB7C-A24/2D

7105

65

BC847BS(COL)

2

6

1

65

21

43

7B50-1

99-235/RSBB7C-A24/2D

7100

6

5

2

1

4

3

1

43

7101 99-235/RSBB7C-A24/2D

99-235/RSBB7C-A24/2D

65

2

10K

3C06-1

1 8

7200

1

43

+24V

99-235/RSBB7C-A24/2D

7201

6

5

2

10K

3B55-3

3 6

100n

2B50

4

FC01

7C20-2

BC847BS(COL)

5

3

270R

3C10

12

270R

12

10K

3B55-1

1 8

3C11

3B52

68R

21

43

7104 99-235/RSBB7C-A24/2D

65

3

2

FB71

7B51 BC847BW

1

3B51

270R

3B50

1K5

3B53-4

45

1K5

3B53-3

3 6

3B53-2

27

1 8

1K5

3B53-1

27

FC02

3 6

10K

3C06-2

27

3C00-3

10K

8

3C00-2

10K

5

3C00-1

10K

1

3C00-4

10K

4

+24V

3 6

45

3C15-3

1K5

3C15-4

1K5

2

3C12

68R

BC847BW

7C22

1

3

3 6

+24V

3B57-3

10K

FB72

FB70

FC03

10K

3B55-2

27

6

5

2

1

4

3

7103 99-235/RSBB7C-A24/2D

99-235/RSBB7C-A24/2D

7202

6

5

2

1

4

1 8

27

3C15-1

1K5

3C15-2

1K5

2

6

1

+24V

BC847BS(COL)

7C20-1

6

5

2

1

43

PWM-R2

PWM-G2

99-235/RSBB7C-A24/2D

7102

PWM-B2

PWM-R3

PWM-G3

PWM-B3

Blue

Green

Red

Circuit Diagrams and PWB Layouts

EN 84Q552.1L LA 10.

2010-Dec-29

back to

div. table

Circuit Diagrams and PWB Layouts

18770_650_100212.eps

100219

3 LED Everlight

AL2A AL2A

8204 000 9061

3104 313 64201

3 LED Everlight

AL 2K10

2009-11-27

1

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

3

5678

1456

A

B

C

D

A

B

7203 A3 7204 A4 7205 A5

1 10

2

2 3 4

9

7 8 910

C

D

1M84 A10 2C15 B6

B003

+3V3

2C15

100n

+3V3

7

8

9

26 27

+24V

20 21 22 23 24 25

3

4 5 6

10 11 12 13 14 15 16 17 18 19

2

1M84

FH12-25S-0.5SH(55)

1

5

2

1

43

+24V

3

7205 99-235/RSBB7C-A24/2D

6

99-235/RSBB7C-A24/2D

7204

6

5

21

44

3

99-235/RSBB7C-A24/2D

7203

65

2

1

TEMP-SENSOR

BLANK

PROG

LATCH

SPI-CS

PWM-CLOCK-BUF

SPI-DATA-RETURN

SPI-DATA-OUT

SPI-CLOCK-BUF

Blue

Green

Red

10-5 AL2 820400090611 3 LED Everlight

3 LED Everlight

EN 85Q552.1L LA 10.

2010-Dec-29

back to

div. table

Circuit Diagrams and PWB Layouts

18770_640_100212.eps

100219

9 LED Everlight

AL2A AL2A

8204 000 9060

3104 313 64191

9 LED Everlight

AL 2K10

2009-11-03

1

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

51 67

3 89

A

B

C

48

7203 A3

2 10

421

3

B

C

D

10

1M84 A10 2D01 B6

7204 A4

D

9

567

A

7205 A5

B003

100n

2D01

+3V3

26 27

+24V

22 23 24 25

3 4 5 6 7 8 9

13 14 15 16 17 18 19

2

20 21

1

10 11 12

FH12-25S-0.5SH(55)

1M84

43

+24V

99-135/RSGBB7C-A24/2D

7205

6

5

21

5

21

4

3

7204 99-135/RSGBB7C-A24/2D

66

5

2

1

4

3

7203 99-135/RSGBB7C-A24/2D

B004

TEMP-SENSOR

BLANK

PROG

LATCH

SPI-CS

PWM-CLOCK-BUF

SPI-DATA-RETURN

SPI-DATA-OUT

SPI-CLOCK-BUF

Blue

Green

Red

10-6 AL2 820400090601 9 LED Everlight

9 LED Everlight

EN 86Q552.1L LA 10.

2010-Dec-29

back to

div. table

9 LED Everlight

18770_641_100212.eps

100212

9 LED Everlight

AL2B AL2B

2009-11-03

1

8204 000 9060

3104 313 64191

9 LED Everlight

AL 2K10

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

3D13-2 C12

FD03 D1 FD04 D1

3D05-3 C1 3D05-4 C1 3D10 A12 3D11 B12 3D12 B12 3D13-1 B12

3D13-3 C12 3D13-4 C12

7300 B5 7301 B6 7302 B7 7303 B8 7304 B10 7305 B11 7D01-1 A2 7D01-2 B2

FD01 A1

45678 910 12

7 8 910111213

1

7D02 C2

3

FD02 C1

45

13

A

B

C

D

11

6

A

B

C

D

2D10 C13

3D02-1 A1 3D02-2 A1 3D02-3 B1 3D02-4 B1

36

2

123

3D02-3

K01K01

3D02-2

27

1

4

3

+24V

7300 99-135/RSGBB7C-A24/2D

65

2

3D10

12

270R

+24V

68R

3D12

2

6

1

FD01

7D01-1 BC847BS(COL)

3D02-4

45

FD02

10K

1K5

3D13-3

3 6

FD04

45

FD03

3D13-4

1K5

7D01-2 BC847BS(COL)

5

3

4

2

1

4

3

7305 99-135/RSGBB7C-A24/2D

6

5

6

5

2

1

4

3

4

3

99-135/RSGBB7C-A24/2D

7304

99-135/RSGBB7C-A24/2D

7301

6

5

2

1

3

2

18

BC847BW

7D02

3D02-1

10K

+24V

45

2D10

100n

3 6

3D05-4

10K 10K

3D05-3

1K5

3D13-1

1 8

270R

3D11

12

27

1

4

3

3D13-2

1K5

99-135/RSGBB7C-A24/2D

6

5

2

65

21

4

3

7303

+24V

99-135/RSGBB7C-A24/2D

7302

PWM-B4

PWM-R4

PWM-G4

Circuit Diagrams and PWB Layouts

EN 87Q552.1L LA 10.

2010-Dec-29

back to

div. table

Circuit Diagrams and PWB Layouts

18770_660_100212.eps

100526

15 LED Everlight

AL2A AL2A

8204 000 9062

3104 313 64211

15 LED Everlight

AL 2K10

2009-11-27

1

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

A

B

C

D

A

B

C

7

6

5421

7205 A5

9108

9

8

7

643 10

3

1M84 A10 2D01 B6 7203 A3 7204 A4

FD18 C7

12

5

D

FD18

43

+24V

99-235/RSBB7C-A24/2D

7205

6

5

21

2

1

4

3

7204 99-235/RSBB7C-A24/2D

6

5

6

5

2

1

4

3

7203 99-235/RSBB7C-A24/2D

B004 B005B003

100n

2D01

+3V3

5 6 7

8

9

26

27

+24V

18 19

2

20 21 22 23 24 25

3

4

1

10 11 12 13 14 15 16 17

1M84

TEMP-SENSOR

BLANK

PROG

LATCH

SPI-CS

PWM-CLOCK-BUF

SPI-DATA-RETURN

SPI-DATA-OUT

SPI-CLOCK-BUF

Blue

Green

Red

10-7 AL2 820400090621 15 LED Everlight

15 LED Everlight

EN 88Q552.1L LA 10.

2010-Dec-29

back to

div. table

15 LED Everlight

18770_661_100212.eps

100212

15 LED Everlight

AL2B AL2B

2009-11-27

1

8204 000 9062

3104 313 64211

15 LED Everlight

AL 2K10

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

BLUE

GREEN

RED

7305 B11 7400 F5

7403 F8 7404 F10 7405 F11 7D01-1 A2

F

G

H

FD06 H1

7301 B6

3D18-4 G12 7300 B5

7401 F6 7402 F7

91011

3D03-4 G2 3D04-1 F2 3D04-2 G2 3D04-3 E2

12

FD04 F1 FD05 G1

B

C

D

E

123 67

10 11 12 13

3D02-2 A1 3D02-3 B1 3D02-4 B1 3D03-3 H2

3D15 F12

3D04-4 F2 3D05-3 C1

13

A

3D11 B12 3D12 B12 3D13-1 B12 3D13-2 C12

7D01-2 B2 7D02 C2 7D03-1 E2 7D03-2 F2

FD02 C1 FD03 D1

45

12

8 9

2D10 C13 2D11 H13

3D02-1 A1

3D16 F12

3D18-2 G12 3D18-3 G12

3D13-3 C12 3D13-4 C12

F

G

7302 B7 7303 B8 7304 B10

3D05-4 D1 3D10 B12

H

A

B

C

3 456

7D04 G2 FD01 A1

D

E

FD02

7 8

3D17 F12 3D18-1 G12

45

FD01

3

3D04-4

10K

99-235/RSBB7C-A24/2D

65

21

4

5

3

4

7403

3D13-2

27

BC847BS(COL)

7D01-2

1K5

3 6

100n

2D10

45

3D13-3

1K5

45

1K5

3D13-4

43

3D02-4

10K

7400 99-235/RSBB7C-A24/2D

65

21

3

4

+24V

7D03-2 BC847BS(COL)

5

3D11

68R

3D18-2

1K5

27

RES

6

5

2

1

43

18

99-235/RSBB7C-A24/2D

7305

1

43

10K

3D04-1

7301 99-235/RSBB7C-A24/2D

65

2

7D02 BC847BW

1

3

2

10K

3D02-1

18

10K

3D03-4

45

65

21

43

45

99-235/RSBB7C-A24/2D

7401

10K

3D05-4

65

21

43

99-235/RSBB7C-A24/2D

7300

+24V

RES

68R

3D16

68R

3D15

3D10

68R

5

2

1

43

7304 99-235/RSBB7C-A24/2D

6

36

+24V

3D03-3

10K

FD04

+24V

FD06

10K

3 6

1 8

3D05-3

3D13-1

1K5

3D18-4

1K5

45

7D04

1

3

2

6

1

BC847BW

7303

6

5

2

1

4

3

BC847BS(COL)

7D01-1

1

43

99-235/RSBB7C-A24/2D

7302 99-235/RSBB7C-A24/2D

65

2

7D03-1 BC847BS(COL)

2

6

1

10K

3D02-3

36

2D11

100n

65

2

1

4

3

1

43

7405 99-235/RSBB7C-A24/2D

99-235/RSBB7C-A24/2D

7404

6

5

2

1K5

3D18-3

3 6

FD05

1K5

3D18-1

1 8

27

FD03

6

3D04-2

10K 10K

3D04-3

3

99-235/RSBB7C-A24/2D

7402

65

21

43

3D12

68R

3D17

+24V

27

PWM-R4

PWM-G4

PWM-B5

3D02-2

10K

PWM-B4

PWM-G5

PWM-R5

Circuit Diagrams and PWB Layouts

EN 89Q552.1L LA 10.

2010-Dec-29

back to

div. table

Circuit Diagrams and PWB Layouts

18770_672_100216.eps

100527

AmbiLight Everlight

1M83 1M84

2B00

2B01

2B02

2B03

2B04

2B08

2B09

2B10

2B11

2B17

2B20

2B50

2C15

3004

3B00

3B01

3B02

3B03

3B07

3B11

3B13

3B18

3B21

3B22

3B30

3B31

3B34

3B35

3B36

3B37

3B39

3B50

3B51

3B52

3B53

3B55

3B57

3C00

3C06

3C10

3C11

3C12

3C15

7000 7001 7002 7003 7004 7005 7100 7101 7102 7103 7104 7105 7200 7201 7202

7203 7204 7205

7B06

7B07

7B207B23

7B25

7B26

7B30

7B50

7B51

7C20

7C22

B001

B002

B003

B007

FB01

FB03

FB04

FB05 FB06

FB07

FB08

FB10

FB11

FB12

FB13

FB15FB16

FB20

FB30

FB31

FB32

FB35

FB40

FB41

FB70

FB71

FB72

FC01

FC02

FC03

1M83 1M84

2B00

2B01

2B02

2B03

2B04

2B08

2B09

2B10

2B11

2B17

2B20

2B50

2D01

2D10

3004

3B00

3B01

3B02

3B03

3B07

3B11

3B13

3B18

3B21

3B22

3B30

3B31

3B34

3B35

3B36

3B37

3B39

3B50

3B51

3B52

3B53

3B55

3B57

3C00

3C06

3C10

3C11

3C12

3C15

3D02

3D05

3D10

3D11

3D12

3D13

7000 7001 7002 7003 7004 7005 7100 7101 7102 7103 7104 7105 7200 7201 7202 7203 7204 7205 7300 7301 7302 7303 7304 7305

7B06

7B07

7B207B23

7B25

7B26

7B30

7B50

7B51

7C20

7C22

7D01

7D02

B001

B002

B003

B004

B007

FB01

FB03

FB04

FB05 FB06

FB07

FB08

FB10

FB11

FB12

FB13

FB15FB16

FB20

FB30

FB31

FB32

FB35

FB40

FB41

FB70

FB71

FB72

FC01

FC02

FC03

FD01 FD02

FD03

FD04

1M83 1M84

2B00

2B01

2B02

2B03

2B04

2B08

2B09

2B10

2B11

2B17

2B20

2B50

2D01

2D10

2D11

3004

3B00

3B01

3B02

3B03

3B07

3B11

3B13

3B18

3B21

3B22

3B30

3B31

3B34

3B35

3B36

3B37

3B39

3B50

3B51

3B52

3B53

3B55

3B57

3C00

3C06

3C10

3C11

3C12

3C15

3D02

3D03

3D04

3D05

3D10

3D11

3D12

3D13

3D15

3D16

3D17

3D18

7000 7001 7002 7003 7004 7005 7100 7101 7102 7103 7104 7105 7200 7201 7202

7203 7204 7205 7300 7301 7302 7303 7304 7305 7400 7401 7402 7403 7404 7405

7B06

7B07

7B207B23

7B25

7B26

7B30

7B50

7B51

7C20

7C22

7D01

7D02

7D03

7D04

B001

B002

B003

B004

B005

B007

FB01

FB03

FB04

FB05 FB06

FB07

FB08

FB10

FB11

FB12

FB13

FB15FB16

FB20

FB30

FB31

FB32

FB35

FB40

FB41

FB70

FB71

FB72

FC01

FC02

FC03

FD01 FD02

FD03

FD04

FD05

FD06

FD18

3104 313 6419.1

3104 313 6421.1

3104 313 6420.1

18 LED

24 LED

30 LED

10-8 Layout AmbiLight Everlight

Layout AmbiLight Everlight

EN 90Q552.1L LA 10.

2010-Dec-29

back to

div. table

Circuit Diagrams and PWB Layouts

18770_500_100118.eps

100218

Common Interface

B01A B01A

2009-10-22

3

8204 000 8994

TUNER, HDMI & CI

G3

1

2

3EN2

3EN1

G3

1

2

3EN2

3EN1

G3

1

2

3EN2

3EN1

G3

1

2

3EN2

3EN1

G3

1

2

3EN2

3EN1

G3

1

2

3EN2

3EN1

+T

3F04-4 C4

2F01 A2

C

10

1P00-B G10 2F00 A6

IF04 B9

3F09-1 B9

3F08-4 B9

7F02 D5

51

D

3F04-1 C4

4

3F09-2 B9

2

3

2F04 E6

3F05-4 C4

3F09-3 B9

3F03-2 A4

IF02 A5

3F05-1 C4

3F04-2 C4 3F04-3 C4

11

3F08-3 B9

IF08 D9

2

3F09-4 B9

3F11-1 D9

7F03 E5

2F02 B6

7F05 I5

3F07-4 A9

E

F

3F08-2 A9

IF03 A4

G

IF06 C5

B

A

H

8

3F07-3 A9

2F06 H6

3F11-4 D9

3F02 A4 3F03-1 A4

7F01 B5

H

7

B

3F12 C9

3F11-3 D9

IF07 C5

3F07-2 A9

3F07-1 A9

8

D

3F10-1 C9

3F08-1 A9

I

9

2F03 D6

3

1P00-A D10

11

15-BIT ADDRESS

3F11-2 C9

3F01 A2

2F05 G6

CONTROL

I

7F04 G5

3F10-3 C9 3F10-4 C9

3F06 A9

C

A

E

4

8-BIT DATA

61

TRANSPORT STREAM FROM CAM

IF05 C4

3F10-2 C9

3F05-3 C4

7F00 A5

F

G

76

3F05-2 C4

IF01 A4

109

5

3F08-2

10K

27

3F05-1 100R18

100R36

45

3F04-3

3F10-4

10K

100n

2F06

45

RES

36

3F08-4

10K

3F08-3

10K

45

3F11-4

3F09-3

10K

36

100R

183F04-1

IF02

+3V3

13 12 11

1

10

19

20

5 6 7 8 9

18

17 16 15 14

74LVC245A

7F01

2

3 4

18

3F04-4 4 5

3F11-1

10K

45

100R

10K

3F09-4

14 13 12 11

1

10

19

20

3 4 5 6 7 8 9

18

17 16 15

74LVC245A

7F03

2

3 6 100R3F05-3

18

3F12

10K

3F03-1

100R

20

17 16 15 14 13 12 11

1

10

19

2

3 4 5 6 7 8 9

18

7F04 74LVC245A

IF07

18

10K

3F10-1

IF03

100n

2F04

RES

27

100R

3F03-2

RES

100n

2F02

+3V3

+5VCA

3F02

100R

IF06

12 11

1

10

19

20

5 6 7 8 9

18

17 16 15 14 13

7F00

74LVC245A

2

3 4

REF EMC HOLE

1X01

REF EMC HOLE

1X04

2 7 100R

3F04-2

45

+3V3

45

3F07-4

10K

100R3F05-4

10K

3F11-3

36

IF05

RES

2F03

100n

IF04

16

VCC1

17

VPP1

18

WE|P

15

33

WP|IOIS16

IF01

4

D5 D6

5

D7

6

GND1

1

34

GND2

6970

OE

9

RDY|BSY

A8

A9

11

CE1

7

D0

30

D1

31

D2

32

D3

2

D4

3

A15

20

A16

19

A2

27

A3

26

A4

25

A5

24

A6

23

A7

22

12

A0

29

A1

28

A10

8

A11

10

A12

21

A13

13

A14

14

10074595-050MLF

ROW_A

1P00-A

3F06

100K

10K

3F10-3

36

+3V3

27

+3V3

+5VCA

3F05-2 100R

+5V

+5VCA

10K

3F08-1

18

2F05

100n

18

RES

3F09-1

10K

16V22u

2F01

72

61

REG

58

RESET

51

VCC2

52

VPP2

43

VS1

57

VS2

59

WAIT

64

D8

65

D9

35

GND3

68

GND4

60

INPACK

44

IORD

45

IOWR

71

CD2

42

CE2

66

D10

37

D11

38

D12

39

D13

40

D14

41

D15

A21

53

A22

54

A23

55

A24

56

A25

63

BVD1|STSCHG

62

BVD2|SPKR

36

CD1

67

46

A17

47

A18

48

A19

49

A20

50

11

1

10

19

20

1P00-B

ROW_B

10074595-050MLF

6 7 8 9

18

17 16 15 14 13 12

74LVC245A

7F05

2

3 4 5

27

3F10-2

10K

IF08

36

3F07-3

10K

RES

+3V3

27

2F00

100n

3F11-2

10K

+3V3

10K

3F07-1

18

27

10K

3F09-2

27

10K

3F07-2

0R4

3F01

13 12 11

1

10

19

20

5 6 7 8 9

18

17 16 15 14

7F02 74LVC245A

2

3 4

+5VCA

CA-RDY

CA-D00

CA-D01 CA-D02 CA-D03 CA-D04 CA-D05 CA-D06 CA-D07

CA-DATADIR

CA-DATAENn

MOVAL

MOSTRT

MDO0

MDO1

MDO2

MDO3

MDO4

MDO5

MDO6

MDO7

CA-WAITn

CA-INPACKn

CA-WP

CA-VS1n

CA-WEn

CA-OEn

CA-CE2n

CA-CE1n

CA-REGn

CA-MOCLK

CA-MOVAL CA-MOSTRT

CA-MDO0

CA-MDO1 CA-MDO2 CA-MDO3 CA-MDO4

CA-MDO6

CA-MDO5

CA-MDO7

CA-RST

CA-CD1n

CA-CD2n

CA-DATAENn

CA-DATADIR

CA-ADDENn

MOCLK

XIO-D07

XIO-D06

XIO-D05

XIO-D04

XIO-D03

XIO-D02

XIO-D01

XIO-D00

CA-ADDENn

CA-WAITn

XIO-D15

XIO-D14

XIO-WEn

XIO-OEn

XIO-D08

XIO-D09

XIO-D11

XIO-D10

CA-IOWRn

CA-IORDn

CA-A03 CA-A04 CA-A05 CA-A06 CA-A07

XIO-A00

XIO-A01 XIO-A02 XIO-A03 XIO-A04 XIO-A05 XIO-A06 XIO-A07

CA-ADDENn

CA-A08

CA-A09 CA-A10 CA-A11 CA-A12 CA-A13 CA-A14

XIO-A08

XIO-A09 XIO-A10 XIO-A11 XIO-A12 XIO-A13 XIO-A14

CA-ADDENn

CA-D07

CA-D06

CA-D05

CA-D04

MOCLK

MOVAL

MOSTRT

CA-D03

MDO0

MDO1 MDO2 MDO3 MDO4 MDO5 MDO6 MDO7

CA-A00

CA-A01 CA-A02

CA-CE2n

MDO7

MDO6

MDO5

MDO4

MDO3

CA-CD1n

CA-WP

CA-D02

CA-D01

CA-D00

CA-A00

CA-A01

CA-A02

CA-A03

CA-A04

CA-A05

CA-A06

CA-A07

CA-A12

CA-MICLK

CA-MIVAL

CA-RDY

CA-WEn

CA-A14

CA-A13

CA-A08

CA-A09

CA-A11

CA-OEn

CA-A10

CA-CE1n

CA-CD2n

MDO2

MDO1

MDO0

MOSTRT

MOVAL

CA-REGn

CA-INPACKn

CA-WAITn

CA-RST

MOCLK

CA-MDI7

CA-MDI6

CA-MDI5

CA-MDI4

CA-MDI3

CA-MDI2

CA-MDI1

CA-MDI0

CA-MISTRT

CA-IOWRn

CA-IORDn

CA-VS1n

10-9 B01 820400089943 Tuner, HDMI & CI

Common Interface

EN 91Q552.1L LA 10.

2010-Dec-29

div. table

back to

Flash

18770_501_100118.eps

100118

Flash

B01B B01B

2009-10-22

3

8204 000 8994

TUNER, HDMI & CI

WE

B

R

WP

VCC

VSS

IO

NC

0 1 2

3

4 5 6 7

CLE ALE CE RE

3

C

3F21-1 C12F21 A3

IF23 D3

2

3F22-1 C2

3F22-2 C13F21-3 C1

42

3F20-1 B1

C

IF21 C3

3F21-2 C2

3F21-4 C2

A

7F20 B3

1

D

B

D

1

3F22-3 C2

4

3F20-4 C2

A

IF22 D3

B

3F23 C2

3F22-4 C2

3

2F20 A3

3F24 D2

3F19 D2

3F20-2 B2

IF21

3F20-3 B1

45

3F23 10K

3F20-4 100R

2F21

100n

+3V3

27

100R3F20-2

27

3F22-2 100R

+3V3

100R3F21-2

100R3F21-33 6

3F21-1 100R1 8

1 83F20-1 100R

IF23

6

3F24

2K2

100R3F20-33

+3V3

100n

2F20

3F19

10K

4 5 100R3F22-4

11 14

8

7

12

37

13

36

18 19

39 40 45 46 47

3

48

4 5 6

10

24 25 26 27 28

2

33 34 35 38

41 42 43 44

1

15 20 21 22 23

17 9

16

29

30 31 32

3 6

4Gx16

[FLASH]

Φ

NAND04GW3B2DN6F

7F20

45

100R3F22-3

8

3F21-4 100R

3F22-1 100R1

IF22

NAND-CE1n

NAND-RDY1n

XIO-D01

XIO-D00

XIO-D03

XIO-D02

XIO-D05

XIO-D04

XIO-D07

XIO-D06

NAND-ALE

NAND-CLE

XIO-OEn XIO-WEn NAND-WPn

Circuit Diagrams and PWB Layouts

EN 92Q552.1L LA 10.

2010-Dec-29

back to

div. table

USB Hub

18770_502_100118.eps

100118

USB Hub

B01C B01C

2009-10-22

3

8204 000 8994

TUNER, HDMI & CI

VDD_3V3

CR PLL

FILT

OSC1

OSC3

OSC2

VIA

GND_HS

USBUP

NC

VBUS_DET

RESET

DM

XTALOUT

DP

RBIAS

TEST

+T

B

3

2F29 A4

6

2F31 A5

IF40 C2 IF41 C2 IF42 C2

2F34 B1 2F35 B2

IF32 C1

FF33 C9 FF34 C7

IF37 C5 IF39 D2

IF45 D9

5

3F34-4 D8

7 8

A

4

FF30 E8 FF31 E9 FF32 E9

C

FF36 D7

2F30 A4

SIDE USB TOP

2F32 A5

3F32 C8 3F34-1 C8

12

IF31 C1

12

FF35 C7

IF35 B5 IF36 C5

3F26-4 B8 3F28 B2 3F30 C2

1P07 B9 1P08 D9 2F25 A2

IF43 A3 IF44 A3

9

3F26-1 A8

IF33 B2 IF34 B2

567

SIDE USB BOTTOM

FF37 D7 FF38 E9

3F31-4 D2

FF40 A8 IF30 C2

9F26 B8

2F33 A5

3F35 B1

9F20 B7

3 4

8 9

A

B

D

E

1F24 E9 1F25 B1

3F34-2 C8 3F34-3 D8

E

3F25 A8

3F26-2 A8 3F26-3 A8

3F31-2 C2 3F31-3 C2

C

D

FF39 E8

3F36 D6 7F25 B2

2F27 A2 2F28 A4

9F21 B7 9F25 B8

2F26 A2

1u0

2F27

23

36

383940

41

33

XTALIN|CLKIN

32

2

USBDP_DN1|PRT_DIS_P1

4

USBDP_DN2|PRT_DIS_P2

7

USBDP_DN3|PRT_DIS_P3

31

27

51029

15

SCL|SMBCLK|CFG_SEL0

22

SDA|SMBDATA|NON_REM1

28

SUSP_IND|LOCAL_PWR|NON_REM0

11

1

USBDM_DN1|PRT_DIS_M1

3

USBDM_DN2|PRT_DIS_M2

6

USBDM_DN3|PRT_DIS_M3

30

8

9 20 21

13

17

19

34

35

26

24

12

BC_EN1|PWRTPWR1

16

BC_EN2|PWRTPWR2

18

BC_EN3|PWRTPWR3

14

37

25

HS_IND|CFG_SEL1

Φ

USB HUB

USB2513B-AEZG

7F25

100K

3F34-3

3 6

FF35

FF39

IF44

45

IF37

100K

3F26-4

FF40

100K

3 6

1

3F26-3

100K

3F34-1

FF36

3 6

IF33

10K

3F31-3

3F26-1

100K

1

IF35

3F34-2

100K

27

3F36

10K

9F20

2F34

10p

100n

2F30

FF32

+5V

2F33

100n

45

+5V-USB1

3F34-4

100K

0R4

3F32

IF36

FF34

IF32

+5V-USB2

+3V3

100n

2F32

1P08

1 2

3

4

56

292303-4

IF42

FF38

FF33

+3V3

+5V-USB1

IF43

10K

3F35

27

IF31

100K

3F26-2

3F31-2

10K

27

FF31

3F25

0R4

2F31

100n

2

4

1 3

2F28

1u0

24M

1F25

IF45

+3V3

100n

FF30

2F29

9F25

2F25

100n

9F21

+5V-USB2

100n

2F26

+3V3

45

FF37

3F31-4

10K

1M0

3F28

IF34

10p

2F35

IF39

IF30

56

1 2

3

4

IF41

1P07

292303-4

12K

3F30

+5V

9F26

1 2

3

4 5

67

+5V

502382-0570

1F24

IF40

USB-DP1

USB-DP

USB-DM1

USB-DM

RESET-USBn

USB-OC3n

USB-OC2n

USB-OC1n

USB-DM3 USB-DP3

USB-DM2

USB-DP2

USB-DM2

USB-OC1n

USB-OC2n

USB-OC3n

USB-DM1

U

SB-DM2

USB-DM3

USB-DP1

USB-DP2

USB-DP3USB-DM

USB-DP

Circuit Diagrams and PWB Layouts

EN 93Q552.1L LA 10.

2010-Dec-29

back to

div. table

SD Card

18770_503_100118.eps

100118

SD Card

B01D B01D

2009-10-22

3

8204 000 8994

TUNER, HDMI & CI

+T

4

1

C

D

123

2 3 4

A

D

A

B

47K

27

B

C

27

3F41-2

100R

3F44-1

1 8

3F44-2

100R

3F43-3

3 6

1 8

100R

3F43-1

100R

2F40

22u 16V

IF47

RES

IF46

10K

3F45

FF46

FF45

12

+3V3 +3V3-SD

1939115-1

1P09-2

10 11

FF50

FF47

3F42-3

47K

3 6

27

3F41-1

1 8

47K

3F42-2

3 6

47K

3 6

3F41-3

47K

3F44-3

100R

+3V3-SD

3F40

0R4

FF42

FF44

FF41

14

FF43

1 2

3

4 5 6 7

8

9

13

1939115-1

1P09-1

FF49

FF48

3F43-2

100R

27

+3V3

47K

3F42-1

1 8

47K

3F41-4

45

SDIO-CLK

SDIO-DAT3

SDIO-CMD

SDIO-CLK

SDIO-DAT0

SDIO-DAT1

SDIO-DAT2

SDIO-CDn

SDIO-WP

SDIO-DAT3

SDIO-CMD

SDIO-DAT0

SDIO-DAT1

SDIO-DAT2

SDIO-CDn

SDIO-WP

1P09-1 C4

3F44-3 C3 3F45 C1

1D 2-24F3

4D 2-90P1

3F42-3 D1 3F43-1 C3

2F40 A2

3F40 A2 3F41-1 C1 3F41-2 C1 3F41-3 C1

FF47 C3 FF48 C3

FF50 D3 IF46 D1

IF47 B1

FF41 C3 FF42 C3

FF43 C3 FF44 D3

3F41-4 C1 3F42-1 C1

3F43-3 C3 3F44-1 C3 3F44-2 C3

3F43-2 C3

FF45 A2 FF46 C4

FF49 C3

Circuit Diagrams and PWB Layouts

EN 94Q552.1L LA 10.

2010-Dec-29

back to

div. table

PNX85500 Control

18770_504_100118.eps

100118

PNX85500 Control

B01E B01E

2009-10-22

3

8204 000 8994

TUNER, HDMI & CI

D

C

S

W

HOLD

VSS

Q

VCC

SCL

ADR

0 1 2 SDA

WC

IF53 B3 IF54 C3

DEBUG / RS232 INTERFACE

SCL

FOR

FF29 C4 FF55 E3 FF56 E3

SHIFTED

UP

FF66 F4 IF50 B3 IF51 B1 IF52 B3

DEBUG

3F63 E5 3F64 F5 3F65 F5

IF55 C6 IF56 C7 IF57 C7 IF58 D2 IF59 E1 IF61 C4 IF62 C4

7F54-2 C7 7F58 D1 9CH0 C7 FF04 C4

DEBUG ONLY

SDA

USE ONLY

1F52 D8

FF57 E2 FF58 C7 FF61 D4 FF62 D7 FF63 E4 FF64 F7 FF65 F4

3F58 E1 3F59 E3 3F60 E3 3F62 D5

A

B

C

D

E

F

A

3F66 B7 3F67 B6 3F68 C7 3F69 D7

7F52 B2 7F53 B7 7F54-1 C7

D

E

F

1F51 F8

LEVEL

MAIN NVM

B

C

2F52 B1 2F53 D6 2F58 D2

3F51 B1 3F52 B3 3F53 C6 3F54 D7

123 45678 9

3F54

FF66

RES

1K0

FF57

IF50

2F52

100n

IF55

RES

5

3

4

IF56

BC847BPN(COL)

7F54-2

RES

FF62

1F51

1 2

3

4 5

67

10K

3F58

RES

9CH0

IF51

IF57

100R

3F62

3F64

100R

FF61

+5V

+3V3-STANDBY

7

2

1

84

3

Φ

512K

FLASH

M25P05-AVMN6

7F52

6

5

RES

3F68

47K

FF58

100R

3F59

IF61

10K

RES

3F69

FF04

PDTA114EU

RES7F53

IF59

+3V3

FF64

100R

3F60

10K

3F51

1 2

3

4

5

1F52

+3V3

IF52

+3V3

RES

+3V3-STANDBY

100n

2F58

IF54

RES

2

6

1

FF65

BC847BPN(COL)

7F54-1

2

3

6

5

84

7

7F58

EEPROM

Φ

(8K×8)

1

+3V3

3F53

10K

IF53

3F66

10K

+3V3-STANDBY

RES

3F67

10K

2F53

1u0

RES

+3V3-STANDBY

FF63

3F63

FF56

FF55

100R

3F52

10K

IF58

FF29

3F65

100R

IF62

BOOST-PWM

BACKLIGHT-BOOST

SDM

SPI-PROG

RESET-STBYn SPI-PROG

SDA-UP-MIPS

SCL-UP-MIPS

SCL-SSB

SDA-SSB

TXD-UP

RXD-UP

PNX-SPI-CLK

PNX-SPI-SDO

PNX-SPI-CSBn

PNX-SPI-SDI

PNX-SPI-WPn

Circuit Diagrams and PWB Layouts

EN 95Q552.1L LA 10.

2010-Dec-29

back to

div. table

HDMI & CI

18770_505_100118.eps

100118

HDMI & CI

B01F B01F

2009-10-22

3

8204 000 8994

TUNER, HDMI & CI

AGC CONTROL

I

O2

IGND

O1

GND

B

C

D

E

1F75 B5 1T01 A1 2F59 B1 2F60 B1

12345678910

A

B

C

D

E

A

2F61 B1

2F62 B10 2F63 C9 2F64 C9 2F65 B10 2F66 C10

2F70 B10 2F71 A7 2F72 A9 2F73 A9 2F74 B6

2F75 B8 2F76 B9 2F77 B9 2F78 B6 2F79 B8

2F80 B9 2F81 B1 2F82 B9 2F84 C1 2F85 C4

2F86 D1 2F88 E5 2F90 C6 2F91 D6 2F92 C7

2F93 C2 2F94 D7 3F71 C7 3F72 C7 3F75 D2

3F76 C2 3F77 C4 3F78 C7 3F79-1 B8 3F79-4 B8

3F80 C9 3F81 C9 3F82 B10 5F66 C10 5F70 D6

5F71 B9 5F72 E4 5F73 C5 5F74 B10 5F76 B10

6F72 C7 7F70 D8 7F75 A6 9F00 A6 9F01 A6

9F02 A8 9F03 A8 9F04 B3 9F05 C4 9F06 C4

9F71 E4 AF70 B3 AF71 B3 AF72 B9 AF73 B9

FF00 B2 FF01 C4 FF71 A1 FF74 B1 FF75 B2

FF76 B1 FF81 C1 FF82 C2 IF10 A5 IF11 A5

IF12 C9 IF13 C9 IF14 C9 IF15 C9 IF16 B10

IF72 C5 IF73 B6 IF74 B8 IF75 B6

9F04

IF76 B8

IF77 B6 IF78 B8 IF79 C5 IF80 B8 IF81 B6

IF82 C4 IF86 C5 IF87 C2 IF88 D2 IF89 D5

IF90 D7

2F77

22p

2F66

RF_IO

4

TUN

IF11

IF_OUT110IF_OUT2

11

13

1415

16

12

NC

3

RF_AGC

1

1T01

TX31XX

TUNER

4MHZ_REF

9

2

B+_LNA

B+_TUN

8

5

I2C_ADR6I2C_SCL

I2C_SDA

7

FF81

10n

2F71

680n

5F66

1K0

3F72

BA591

6F72

820n

5F74

2F64

10n

IF13

IF81

IF90

3F79-1

220R

1

100n

2F93

3F75

47R

10n

2F92

220R

3F80

3F82

820R

220R

3F81

IF86

GND2

5

INPUT12

INPUT2

3

OUTPUT1 7

OUTPUT2 6

VAGC

4

VCC

1

UPC3221GV-E1

7F75

GND1

8

RES

IF74

30R

5F72

IF73

2F81

4n7

RES

IF79

9F06

IF75

47R

3F76

IF14

FF76

10n

2F79

+5V-TUN

FF71

47n

2F85

RES

2F91

10n

2F84

15p

2F65

15p

IF16

10n

2F90

IF80

220R

3F79-4

4

1p0

2F82

FF01

9F02

3K3

3F78

10n

RES

+5V-TUN-PIN

2F94

9F01

2F78

10n

5F70

470n

IF89

AF70

2F59

4u7

RES

9F71

IF82

IF15

4u7

2F61

AF73

100n

2F60

4K7

3F77

9F03

15p

2F722F80

15p

9F05

FF75

10n

2F74

9F00

+5V-TUN-PIN

15p

2F86

2F73

1p0

FF00

IF76

+5V-TUN-PIN

4K7

3F71

5F73

ATB2012

23

14

IF78

1 2

4 5

36M17

1F75

X7251X

3

AF72

10p

2F62

5F76

330n

IF77

2F76

2p2

RES

IF72

IF10

2F88

22u

2F63

10n

5F71

680n

PDTC114EU

7F70

IF87

IF12

IF88

2F75

10n

1p0

2F70

FF74

FF82

AF71

+5V-TUN-PIN

SELECT-SAW

IF-AGC

TUN-IF-N

TUN-IF-P

PNX-IF-P

PNX-IF-N

SDA-TUNER

SCL-TUNER

TUN-IF-N

TUN-P7

IF-AGC

IF+

IF-

PNX-IF-AGC

TUN-P6

TUN-P7

TUN-P1

TUN-IF-P

TUN-P6

Circuit Diagrams and PWB Layouts

EN 96Q552.1L LA 10.

2010-Dec-29

back to

div. table

Toshiba Supply

18770_506_100118.eps

100525

To shiba Supply

B01G B01G

2009-10-22

3

8204 000 8994

TUNER, HDMI & CI

COM

OUTIN

D

A

C

D

1

5FA3 B2 5FA4 B3

A

FFA2 C2 FFAF B2

B

2FA2 C1

7FA3 B2

123

2 3

B

C

2FA3 C2 2FA4 C3

30R

5FA4

5FA3

30R

2FA4

10u

100n

2FA3

FFAF

1

3 2

FFA2

7FA3

LD1117DT12

+3V3

2FA2

100n

+1V2-BRA-DR1

+1V2-BRA-VDDC

Circuit Diagrams and PWB Layouts

EN 97Q552.1L LA 10.

2010-Dec-29

back to

div. table

HDMI

18770_507_100118.eps

100118

HDMI

B01H B01H

2009-10-22

3

8204 000 8994

TUNER, HDMI & CI

3FBF-1 C4 3FBF-2 C4 FFB6 C2

4

A

B

FFB3 C2

C

1

FFB4 C2

2

FFB1 C2 FFB2 C2 FFB5 C1

HDMI CONNECTOR SIDE

1

A

2 3

B

3

FFB2

C

1P05 B1

27

DIN-5V

3FBF-2

47K

3FBF-1

1 8

DIN-5V

4 5 6 7

8

9

2021

2223

11 12 13 14 15 16 17 18

19

2

3

1P05

1

10

FFB1

FFB5

FFB6

FFB3 FFB4

DRX0+

DRX0-

DRX-DDC-SCL DRX-DDC-SDA

DRX2+

DRXC+

DRXC-

PCEC-HDMI

DRX-DDC-SCL

DRX-DDC-SDA

DRX-HOTPLUG

DRX2-

DRX1+

DRX1-

Circuit Diagrams and PWB Layouts

EN 98Q552.1L LA 10.

2010-Dec-29

back to

div. table

VGA

18770_508_100118.eps

100118

VGA

B01I B01I

2009-10-22

3

8204 000 8994

TUNER, HDMI & CI

9FC6 D6

3FC3 C6

C

FFC3 C4 FFC4 C3

FFC6 D2 FFC7 D4 FFC8 D4

6FC2 B5 6FC3 C5 6FC4 C5

3FC7 C6 6FC1 B5

6

FFC5 C4

8

CONNECTOR

FFC1 A4

9FC1 D6

6FC6 E5 6FC7 E5 6FC8 F5

3FC5 A6

E

9FC3 E6 9FC4 E6 9FC5 C6

6FC5 D5

A

C

E

A

B

2FC7 E4

D

3FC1 D3

FFC2 B4

9FC2 E6

VGA

FFC9 E4

5

7

3FC2 E3

9

3FC4 D6

2

3FC6 B6

45 7

2FC5 D4

1FC5 D4

F

9

B

3

D

F

2FC4 C4

8

2FC6 E4

61

1FC6 F4

1E05 B2

4

2

3

1FC1 B4 1FC2 B4 1FC3 C4 1FC4 C4

1

2FC8 F4

2FC1 B4 2FC2 B4 2FC3 C4

9FC5

FFC3

2FC1

100p

2FC2

100p

RES

10K

3FC1

RES

12V

CDS4C12GTA

6FC3

1FC6

RES

3FC2

10K

3FC4

4K7

2FC6

47p

RES

9FC2

1FC1

FFC4

18R

3FC6

FFC1

7

8

9

16

17

11 12 13 14 15

2

3

4 5 6

1216-00D-15S-1EF

1

10

6FC7

CDS4C12GTA

12V

1E05

FFC8

FFC6

12V

CDS4C12GTA

6FC2RES

2FC5

47p

1FC5

6FC4RES

12V

CDS4C12GTA

100p

2FC3

12V

6FC5

CDS4C12GTA

RES

FFC7

47p

2FC4

2FC8

47p

1FC2

RES

9FC4

FFC2

9FC3

9FC6

1FC3

3FC7

18R

12V

CDS4C12GTA

6FC6

4K7

3FC3

47p

2FC7

12V

CDS4C12GTA

6FC8

1FC4

FFC5

12V

CDS4C12GTA

6FC1RES

9FC1

FFC9

3FC5

18R

VGA-SCL-EDID

VGA-SDA-EDID

VGA-SDA-EDID-HDMI

VGA-SCL-EDID-HDMI

+5V-VGA

R-VGA

G-VGA

B-VGA

H-SYNC-VGA

V-SYNC-VGA

Circuit Diagrams and PWB Layouts

EN 99Q552.1L LA 10.

2010-Dec-29

back to

div. table

Temp Sensor + Headphone

18770_509_100118.eps

100118

Temp Sensor + Headphone

B01J B01J

2009-10-22

3

8204 000 8994

TUNER, HDMI & CI

C

3 45 7

2 3 4

2FD1 A4 2FDC D5

8 9

A

B

C

12

E

A

B

7FD1 B3

1328 D6 1329 C6 1FD2 D4 1FD3 D5

6FD1 B3 6FD2 D4

IFD2 B3 IFD3 B4

2FDD D5 3FD1 A3

IFD4 B3 IFD5 B4

3FDG-2 D4

3FD3 B3

6

3FD6 C4 3FD7 C4 3FDG-1 D4

1

9FD1 A4 9FD2 A4 9FD5 C5

IFD1 B4

5678

D

E

3FD4 B2

6FD3 D5

9

FFDA D5 FFDB D5 FFDC D6

D

IFD4

3FD2 B5

1FD3

IFD5

2FD1

12V

CDS4C12GTA

6FD2

100n

3FD2

1K0

RES

9FD5

9FD1

9FD2

FFDB

FFDA

6FD3

CDS4C12GTA

12V

IFD2

RES

1K0

3FD1

1K0

27

RES

3FDG-2

1K0

3FD6

IFD3

1n0

2FDD

IFD1

1FD2

1 8

+3V3

FFDC

1K0

3FDG-1

6FD1

LTST-C190KGKT

1328

MSJ-035-29D PPO (PHT)

2

1

3

RES

A2

5

4

GND

OS

3

SCL

2

SDA

1

7FD1

+VS

8

A0

7

6

A1

LM75BDP

2FDC

1n0

RES3FD7

1K0

3FD3

100R

5

3FD4

100R

1 2

3

4

AMP1

AMP2

502382-0370

1329

SDA-SSB

SCL-SSB

Circuit Diagrams and PWB Layouts

EN 100Q552.1L LA 10.

2010-Dec-29

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div. table

Philips 32PFL5615D/78 Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual

Contents Page Contents Page

1. Revision List

2. Technical Specifications, and Connections

2.2 Directions for Use

Table 2-1 Described Model Numbers and Diversity

2.1 Technical Specifications

2.3 Connections

Figure 2-1 Connection overview

2.3.1 Side Connections

1 - Common Interface (optional)

2 - USB2.0

Figure 2-2 USB (type A)

3 - HDMI: Digital Video, Digital Audio - In

2.3.2 Rear Connections

4 - RJ45: Ethernet (optional)

Figure 2-3 HDMI (type A) connector

Figure 2-4 Ethernet connector

5 - CVI 2: Cinch: Video YPbPr - In, Audio - In

6 - Service Connector (UART)

7 - Cinch: Video CVBS - In, Audio - In

8 - S-Video (Hosiden): Video Y/C - In (optional)

9 - Head phone (Output) (optional)

2.3.3 Rear Connections - Bottom

10 - CVI 1: Video RGB - In, CVBS - In/Out, Audio - In/Out

11 - Cinch: S/PDIF - Out

12 - HDMI 2 (& 3 optional): Digital Video, Digital Audio - In

14 - Cinch: Audio - In (VGA/DVI)

15 - Aerial - In

16 - VGA: Video RGB - In

Figure 2-6 VGA Connector

13 - HDMI 1: Digital Video - In, Digital Audio with ARC - In/ Out

Figure 2-5 HDMI (type A) connector

2.4 Chassis Overview

3. Precautions, Notes, and Abbreviation List

3.2 Warnings

3.3 Notes

3.1 Safety Instructions

3.3.2 Schematic Notes

3.3.3 Spare Parts

3.3.4 BGA (Ball Grid Array) ICs

Introduction

BGA Temperature Profiles

3.3.1 General

3.3.5 Lead-free Soldering

3.3.6 Alternative BOM identification

Figure 3-1 Serial number (example)

3.3.7 Board Level Repair (BLR) or Component Level Repair (CLR)

3.3.8 Practical Service Precautions

3.4 Abbreviation List

4. Mechanical Instructions

4.1 Cable Dressing van Gogh & da Vinci styling (5000 & 6000 series)

Figure 4-1 Cable dressing 32"

Figure 4-2 Cable dressing 40"

Figure 4-3 Cable dressing 46"

4.2 Cable Dressing Matisse styling (8000 series)

Figure 4-4 Cable dressing 40"

Figure 4-5 Cable dressing 52"

4.3 Service Positions

4.4 Assy/Panel Removal Van Gogh Styling (5000 series)

4.4.1 Rear Cover

Figure 4-7 Rear cover 40" -2-

Special note:

Figure 4-6 Rear cover 40" -1-

Figure 4-8 Rear cover 40" -3-

Figure 4-9 Rear cover 40" -4-

4.4.2 Speakers

Tweeters

Subwoofer

4.4.3 Main Power Supply

4.4.5 Mains Switch

4.4.6 IR & LED Board

Figure 4-10 Main Power Supply

4.4.4 Small Signal Board (SSB)

Figure 4-12 IR & LED Board -1-

Figure 4-13 IR & LED Board -2-

Figure 4-11 SSB