Packard Bell EasyNote MZ35 Schematic
1
2
3
4
5
6
7
8
CPU CORE
VCC_CORE
PL5
ISL6262A
A A
+3VPCU
+3V_S5/+3VSUS
+3V
+5VSUS/+5V
10V/15V
+1.8V_S5
MAXIM
MAX8744ETJ+
+1.8VSUS/+1.8V
+1.2V
MAXIM
B B
MAX8743EEI
+1.05V
SENTECH
SC4215*2
+0.9VSUS
+0.9V
GMT
G2996
BATTERY CHARGER
MAXIM
C C
MAX8724
Power State Table
Power Name
VCC_CORE
+3VPCU
+3V_S5
+3VSUS
+3V
+5VPCU
+5V_S5
+5VSUS
+5V
15V/10V
D D
+1.2V
+1.05V
+0.9V MAINON
+1.8V_S5
+1.8VSUS
+1.8V
Page:26,29
Control
Signal
VRON
N/A
S5_ON
SUSON
MAINON
N/A
S5_ON
SUSON
MAINON
N/A
MAINON
MAINON
S5_ON
SUSON
MAINON
1
Page:25
Page:26
Page:27
Page:29
Page:28
+3VPCU
+3V_S5
+3VSUS
+3V
+5VSUS
+5V
10V/15V
+1.8V_S5
+1.8VSUS
+1.8V
+1.2V
+1.05V
+0.9VSUS
+0.9V
Power
State
S0
ALWAYS
S0-S5
S0-S3
S0
ALWAYS
S0-S5
S0-S3
S0
S0
S0
S0
S0
S0-S5
S0-S3
S0
Power
Source
VIN
VIN
+3VPCU
+3VPCU
+3VPCU
VIN
+5VPCU
+5VPCU
+5VPCU
+5VPCU
VIN
+1.8VSUS
+1.8VSUS
+3VPCU
VIN
+1.8VSUS
+3VS0+1.5V MAINON
2
MIC IN
Page: 20
CLOCK GEN
RTM865-300
+3V
Page:4
Yonah /Merom
INTEL Mobile_479 CPU
SOCKET_M
Page:2, 3
HOST BUS 400M/533M/667M HZ
RGB
LVDS
DDR-II SODIMM1
Page: 9
DDR-II
NB
RC410ME
ATI
DDR-II SODIMM2
Page: 9
400M/533M/667M HZ
SATA HDD
Page: 18
SATA
ATA 66/100
IDE-ODD
Page: 18
AUDIO CODEC
REALTEK
ALC861
Page: 19
GMT
G1432+G1410
Page: 20
SPEAKER
Page: 20 Page: 20 Page: 24 Page: 24
LINE OUT
3
HD AUDIO
MODEM
AGERE
DELPHI-MOM
Page: 21,22
RJ11
Touchpad
4
Page: 5, 6 , 7, 8
ATi SB450
Page: 11, 12, 13, 14
KBC
NS
PC97551
Page: 24
2X PCIE
SB
Keyboard
PCI BUS 33MHZ
USB 2.0
Page: 23
FLASH FAN
Page: 24
5
CRT (option)
Page: 10
LVDS
Page: 10
ENE PCMCIA
CB1410 (option)
AD17
REQ3# / GNT3#
TYPE II
SLOT
Page: 16
INTE#
Page: 16
MINI-PCI
Wireless LAN
AD20
REQ1# / GNT1#
INTG# , INTH#
Page: 17
REALTEK
RTL8100CL
AD18
REQ0# / GNT0#
INTF#
Page: 15
SYSTEM
USB PORT *1
Page: 17
Connector
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
Date: Sheet
Date: Sheet
6
Date: Sheet
7
BOTHHAND
TRANSFORMER
NS0013
Page: 15
USB BOARD
USB PORT *2
Page: 17
PROJECT : PL5
PROJECT : PL5
Quanta Computer Inc.
Quanta Computer Inc.
130Thursday, December 07, 2006
130Thursday, December 07, 2006
130Thursday, December 07, 2006
8
RJ45
Page: 15
of
of
of
1A
1A
1A
5
U12A
HA#[3..16]5
D D
HADSTB0#5
HREQ#[0..4]5
R416 300_4R416 300_4
1 2
R421 200_4R421 200_4
1 2
R423 200_4R423 200_4
1 2
R426 56_4R426 56_4
R428 *54.9/F_4R428 *54.9/F_4
R431 54.9/F_4R431 54.9/F_4
R434 54.9/F_4R434 54.9/F_4
R436 54.9/F_4R436 54.9/F_4
R437 54.9/F_4R437 54.9/F_4
R438 54.9/F_4R438 54.9/F_4
1 2
HA#[17..31]
A20M#
FERR#
IGNNE#
STPCLK#
SMI#
T78T78
T77T77
T79T79
T81T81
T82T82
T83T83
T85T85
T89T89
T90T90
T91T91
T94T94
12
R407 0_4R407 0_4
TP_RSVD#1
TP_RSVD#2
TP_RSVD#3
TP_RSVD#4
TP_RSVD#5
TP_RSVD#6
TP_RSVD#7
TP_RSVD#8
TP_RSVD#9
TP_RSVD#10
TP_RSVD#11
+1.05V
XDP_TCK PD 27.4/1%
XDP_TRST PD 680ohm /5%
XDP_TDI PU 150ohm /1.05V
XDP_TMS PU 39.2/1%
+1.05V
CPU H/W MONITOR
+1.05V
HA#[17..31]5
HADSTB1#5
A20M#11
FERR#11
C C
B B
A A
IGNNE#11
STPCLK#11
INTR11
NMI11
SMI#11
CPUPWRGD
DPSLP#
CPUSLP#
FERR#
XDP_DBRESET#
XDP_TMS
XDP_TDI
XDP_BPM#5
XDP_TCK
XDP_TRST#
CPURST#
R424 *220_4R424 *220_4
CPU
5
U12A
HA#3
J4
L4
M3
K5
M1
N2
J1
N3
P5
P2
L1
P4
P1
R1
L2
K3
H2
K2
J3
L5
Y2
U5
R3
W6
U4
Y5
U2
R4
T5
T3
W3
W5
Y4
W2
Y1
V4
A6
A5
C4
D5
C6
B4
A3
AA1
AA4
AB2
AA3
M4
N5
T2
V3
B2
C3
B25
R432 56_4R432 56_4
R433 56_4R433 56_4
+3VPCU
R440 47_6R440 47_6
THERMDC
THERMDA
10 mil trace /
10 mil space
A[3]#
A[4]#
A[5]#
A[6]#
ADDR GROUP 0
ADDR GROUP 0
A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#
REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#
A[17]#
A[18]#
A[19]#
A[20]#
A[21]#
A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
ADSTB[1]#
A20M#
FERR#
IGNNE#
STPCLK#
LINT0
LINT1
SMI#
RSVD[01]#
RSVD[02]#
RSVD[03]#
RSVD[04]#
RSVD[05]#
RSVD[06]#
RSVD[07]#
RSVD[08]#
RSVD[09]#
RSVD[10]#
RSVD[11]#
PZ47903-2741-01
PZ47903-2741-01
THERMTRIP#
12
12
15 MIL
3V_THM
C559
C559
.1U_4
.1U_4
C560
C560
2200P_4
2200P_4
DEFER#
CONTROL
CONTROL
RESET#
BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
XDP/ITP SIGNALS
XDP/ITP SIGNALS
PROCHOT
THERMDA
THERMDC
THERMTRIP#
THERMH CLK
THERMH CLK
BCLK[0]
BCLK[1]
RSVD[12]#
RSVD[13]#
RSVD[14]#
RSVD[15]#
RSVD[16]#
RESERVED
RESERVED
RSVD[17]#
RSVD[18]#
RSVD[19]#
RSVD[20]#
IERR#
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
HA#17
HA#18
HA#19 ITP_BPM#0
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#27
HA#28
HA#29
HA#30
HA#31
ADS#
BNR#
BPRI#
DRDY#
DBSY#
BR0#
IERR#
INIT#
LOCK#
RS[0]#
RS[1]#
RS[2]#
TRDY#
HIT#
HITM#
PRDY#
PREQ#
TCK
TDO
TMS
TRST#
DBR#
TDI
1 3
1
3
2
4
T80T80
T84T84
T86T86
T87T87
T88T88
T93T93
T92T92
T95T95
T96T96
IMVP_PWRGD23,25
R459 0_4R459 0_4
+3VPCU
R443
R443
10K_4
10K_4
+1.05V
12
R405
R405
200_4
200_4
RS#[2..0] 5
R422 *20K/F_4R422 *20K/F_4
R425
R425
*10K_4
*10K_4
FAN_FULL_RUN# 24
PWROK6,12,23
BR0# 5
+3VPCU
H1
E2
G5
H5
F21
E1
F1
IERR#
D20
CPUINIT#
B3
H4
CPURST#
B1
RS#0
F3
RS#1
F4
RS#2
G3
G2
G6
E4
AD4
ITP_BPM#1
AD3
ITP_BPM#2
AD1
ITP_BPM#3
AC4
ITP_BPM#4
AC2
XDP_BPM#5
AC1
XDP_TCK
AC5
XDP_TDIHA#26
AA6
XDP_TDO
AB3
XDP_TMS
AB5
XDP_TRST#
AB6
XDP_DBRESET#
C20
H_PROCHOT#
D21
THERMDA
A24
THERMDC
A25
THERMTRIP#
C7
A22
A21
TP_RSVD#12
T22
TP_RSVD#13
D2
TP_RSVD#14
F6
TP_RSVD#15
D3
TP_RSVD#16
C1
TP_RSVD#17
AF1
TP_RSVD#18
D22
TP_RSVD#19
C23
TP_RSVD#20
C24
Q29
Q29
2
MMBT3904
MMBT3904
Address 98H
U11 G781U11 G781
VCC
DXN
SMDATA
DXP
SMCLK
-OVT4GND
4
ADS# 5
BNR# 5
BPRI# 5
DEFER# 5
DRDY# 5
DBSY# 5
CPUINIT# 11
HLOCK# 5
CPURST# 5
HTRDY# 5
HIT# 5
HITM# 5
T71T71
T73T73
T72T72
T75T75
T74T74
T76T76
HCLK_CPU 4
HCLK_CPU# 4
THERM_SYS_PWR 26
+3VPCU
R441
R441
*10K_4
*10K_4
6
-ALT
KBSMDAT
7
KBSMCLK
8
5
THER_OVT# THERM_SYS_PWR
3
HD#[0..63]5
HD#[0..63]5
Place voltage
divider within
0.5" of GTLREF
pin
+1.05V
R406
R406
1K/F_4
1K/F_4
R408
R408
2K/F_4
2K/F_4
Q36
Q36
2
FDV301N
FDV301N
PWROK
+3V_S5
R439
R439
10K_4
10K_4
+3V_S5
R455 4.7K_4R455 4.7K_4
R456 *330_4R456 *330_4
3
+1.05V
3
1
1
R442
R442
10K_4
10K_4
HDSTBN0#5
HDSTBP0#5
1
HDBI0#5
HDSTBN1#5
HDSTBP1#5
HDBI1#5
R409
R409
R410 1K/F_4R410 1K/F_4
CPU_HBSEL04
CPU_HBSEL14
CPU_HBSEL24
R458
R458
*8.2K_4
*8.2K_4
Q31
Q31
2
2N7002
2N7002
2
2
1 3
Q35 MMBS3904Q35 MMBS3904
HD#[0..63]
1 2
1 2
Pop R694 for Yonah B0 & forward
2 1
3
Q32
Q32
2N7002
2N7002
V_CPU_BTLREF
*1K/F_4
*1K/F_4
D33
D33
*MTW355
*MTW355
C604 *1U_6C604 *1U_6
3
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
TEST1
TEST2
MBDATA 23,28
MBCLK 23,28
AD26
E22
F24
E26
H22
F23
G25
E25
E23
K24
G24
J24
J23
H26
F26
K22
H25
H23
G22
J26
N22
K25
P26
R23
L25
L22
L23
M23
P25
P22
P23
T24
R24
L26
T25
N24
M24
N25
M26
C26
D25
B22
B23
C21
U12B
U12B
D[0]#
D[1]#
D[2]#
D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#
D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#
GTLREF
MISC
MISC
TEST1
TEST2
BSEL[0]
BSEL[1]
BSEL[2]
PZ47903-2741-01
PZ47903-2741-01
2
HD#[0..63]
HD#32
AA23
DATA GRP 0 DATA GRP 1
DATA GRP 0 DATA GRP 1
DATA GRP 2
DATA GRP 2
DSTBN[2]#
DSTBP[2]#
DINV[2]#
DATA GRP 3
DATA GRP 3
DSTBN[3]#
DSTBP[3]#
DINV[3]#
COMP[0]
COMP[1]
COMP[2]
COMP[3]
DPRSTP#
DPSLP#
PWRGOOD
DPRSLPVR11,25
D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
DPWR#
AB24
V24
V26
W25
U23
U25
U22
AB25
W22
Y23
AA26
Y26
Y22
AC26
AA24
W24
Y25
V23
AC22
AC23
AB22
AA21
AB21
AC25
AD20
AE22
AF23
AD24
AE21
AD21
AE25
AF25
AF22
AF26
AD23
AE24
AC20
R26
U26
U1
V1
E5
B5
D24
D6
D7
SLP#
AE6
PSI#
H_PROCHOT#
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
COMP0
COMP1
COMP2
COMP3
DPRSTP#
R419 470_4R419 470_4
+1.05V
12
R429
R429
56_4
56_4
HD#[0..63]HD#[0..63]
+1.05V
2
+1.05V
1 3
R435
R435
*0_4
*0_4
HDSTBN2# 5
HDSTBP2# 5
HDBI2# 5
HDSTBN3# 5
HDSTBP3# 5
HDBI3# 5
DPSLP# 11
DPWR# 5
CPUPWRGD 11
CPUSLP# 11
H_PSI# 25
R415
R415
470_4
470_4
R417 0_4R417 0_4
Q27
Q27
MMBT3904
MMBT3904
1 3
R427
R427
*330_4
*330_4
Q30
Q30
2
*MMBT3904
*MMBT3904
Signal Resistor Value Connect To Resistor Placement
TDI
TMS
TRST#
TCK
TDO
150 ohm +/- 5%
39 ohm +/- 5%
680 ohm +/- 5%
27 ohm +/- 5%
Open
VTT
VTT
GND
GND
VTT
ITP_EN R268 Depop +3VRUN Close to CK410M Pin8
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Yanah CPU(HOST Bus)-1
Yanah CPU(HOST Bus)-1
Yanah CPU(HOST Bus)-1
Date: Sheet
Date: Sheet
2
Date: Sheet
1
HD#[0..63] 5
HD#[0..63] 5
R414
R414
R411
R411
27.4/F_4
27.4/F_4
54.9/F_4
54.9/F_4
1 2
1 2
Comp0,2 connect with Zo=27.4ohm.
Comp1,3 connect with Zo=55ohm,
make these trace length shorter than 0.5".
+3V
PROCHOT#
DPRSTP#
R430
R430
*10K_4
*10K_4
1 2
DPSLP#
1 2
Populate for Yonah A0,
de-pop for Yonah A1
R412
R412
54.9/F_4
54.9/F_4
1 2
R418 *56_4R418 *56_4
R420 *56_4R420 *56_4
PROCHOT# 12,25
1 2
R413
R413
27.4/F_4
27.4/F_4
Within 2.0" of the CPU
Within 2.0" of the CPU
Within 2.0" of the CPU
Within 2.0" of the CPU
Within 2.0" of the CPU
PROJECT : PL5
PROJECT : PL5
Quanta Computer Inc.
Quanta Computer Inc.
230Saturday, December 23, 2006
230Saturday, December 23, 2006
230Saturday, December 23, 2006
of
of
1
of
1A
1A
1A
A
U12D
U12D
A4
VSS[001]
A8
VSS[002]
A11
VSS[003]
A14
VCC_CORE VCC_CORE
VCC_CORE
C562
C561
C561
C566
C566
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
C568
C568
C563
C563
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
C571
C571
C572
C572
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
C580
C580
C575
C575
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
C577
C577
C565
C565
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
C582
C582
C583
C583
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
C586
C586
22U/6.3V_8
22U/6.3V_8
C590
C590
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
C587
C587
22U/6.3V_8
22U/6.3V_8
C591
C591
22U/6.3V_8
22U/6.3V_8
A A
22uF 0805 X6S->105 degree C
8 inside cavity north side secondary layer, 8 inside cavity
south side secondary layer, 6 inside cavity north side
primary layer, 6 inside cavity south side primary layer.
C567
C567
22U/6.3V_8
22U/6.3V_8
C569
C569
22U/6.3V_8
22U/6.3V_8
C573
C573
22U/6.3V_8
22U/6.3V_8
C576
C576
22U/6.3V_8
22U/6.3V_8
C578
C578
22U/6.3V_8
22U/6.3V_8
C584
C584
22U/6.3V_8
22U/6.3V_8
C588
C588
22U/6.3V_8
22U/6.3V_8
C594
C594
22U/6.3V_8
22U/6.3V_8
C562
22U/6.3V_8
22U/6.3V_8
C570
C570
22U/6.3V_8
22U/6.3V_8
C574
C574
22U/6.3V_8
22U/6.3V_8
C564
C564
22U/6.3V_8
22U/6.3V_8
C579
C579
22U/6.3V_8
22U/6.3V_8
C585
C585
22U/6.3V_8
22U/6.3V_8
C589
C589
22U/6.3V_8
22U/6.3V_8
C595
C595
22U/6.3V_8
22U/6.3V_8
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AC10
AB10
AB12
AB14
AB15
AB17
AB18
A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AB9
U12C
U12C
VCC[001]
VCC[002]
VCC[003]
VCC[004]
VCC[005]
VCC[006]
VCC[007]
VCC[008]
VCC[009]
VCC[010]
VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]
VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]
VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]
VCC[033]
VCC[034]
VCC[035]
VCC[036]
VCC[037]
VCC[038]
VCC[039]
VCC[040]
VCC[041]
VCC[042]
VCC[043]
VCC[044]
VCC[045]
VCC[046]
VCC[047]
VCC[048]
VCC[049]
VCC[050]
VCC[051]
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]
VCCSENSE
VCC[066]
VCC[067]
VSSSENSE
PZ47903-2741-01
PZ47903-2741-01
AB20
VCC[68]
AB7
VCC[69]
AC7
VCC[70]
AC9
VCC[71]
AC12
VCC[72]
AC13
VCC[73]
AC15
VCC[74]
AC17
VCC[75]
AC18
VCC[76]
AD7
VCC[77]
AD9
VCC[78]
AD10
VCC[79]
AD12
VCC[80]
AD14
VCC[81]
AD15
VCC[82]
AD17
VCC[83]
AD18
VCC[84]
AE9
VCC[85]
AE10
VCC[86]
AE12
VCC[87]
AE13
VCC[88]
AE15
VCC[89]
AE17
VCC[90]
AE18
VCC[91]
AE20
VCC[92]
AF9
VCC[93]
AF10
VCC[94]
AF12
VCC[95]
AF14
VCC[96]
AF15
VCC[97]
AF17
VCC[98]
AF18
VCC[99]
AF20
VCC[100]
V6
VCCP[01]
G21
VCCP[02]
J6
VCCP[03]
K6
VCCP[04]
M6
VCCP[05]
J21
VCCP[06]
K21
VCCP[07]
M21
VCCP[08]
N21
VCCP[09]
N6
VCCP[10]
R21
VCCP[11]
R6
VCCP[12]
T21
VCCP[13]
T6
VCCP[14]
V21
VCCP[15]
W21
VCCP[16]
B26
VCCA
AD6
VID[0]
AF5
VID[1]
AE5
VID[2]
AF4
VID[3]
AE3
VID[4]
AF2
VID[5]
AE2
VID[6]
AF7
AE7
Route VCCSENSE and VSSSENSE
traces at 27.4ohms with 50mil
spacing. Place PU and PD within
0.5 inch of CPU.
+1.05V
+
+
C581
C581
*330U/2.5V_7343
*330U/2.5V_7343
CPU_VID0 [25]
CPU_VID1 [25]
CPU_VID2 [25]
CPU_VID3 [25]
CPU_VID4 [25]
CPU_VID5 [25]
CPU_VID6 [25]
VCCSENSE
VSSSENSE
12
C592
C592
.01U_4
.01U_4
VCC_CORE
R444
R444
100/F_4
100/F_4
R445
R445
100/F_4
100/F_4
+1.5V
12
C593
C593
10U_8
10U_8
Place C28
near PIN B26
VCCSENSE [25]
VSSSENSE [25]
Place PU & PD within
1 inch of CPU
A16
A19
A23
A26
B6
B8
B11
B13
B16
B19
B21
B24
C5
C8
C11
C14
C16
C19
C2
C22
C25
D1
D4
D8
D11
D13
D16
D19
D23
D26
E3
E6
E8
E11
E14
E16
E19
E21
E24
F5
F8
F11
F13
F16
F19
F2
F22
F25
G4
G1
G23
G26
H3
H6
H21
H24
J2
J5
J22
J25
K1
K4
K23
K26
L3
L6
L21
L24
M2
M5
M22
M25
N1
N4
N23
N26
P3
PZ47903-2741-01
PZ47903-2741-01
VSS[004]
VSS[005]
VSS[006]
VSS[007]
VSS[008]
VSS[009]
VSS[010]
VSS[011]
VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
AF3
AF6
AF8
AF11
AF13
AF16
AF19
AF21
AF24
CPU
+1.05V
12
12
12
C596
C596
.1U_4
.1U_4
C597
C597
.1U_4
.1U_4
C598
C598
.1U_4
.1U_4
12
C599
C599
.1U_4
.1U_4
12
12
C600
C600
.1U_4
.1U_4
C601
C601
.1U_4
.1U_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Yanah CPU(Power/NC)-2
Yanah CPU(Power/NC)-2
Yanah CPU(Power/NC)-2
Date: Sheet
Date: Sheet
A
Date: Sheet
PROJECT : PL5
PROJECT : PL5
Quanta Computer Inc.
Quanta Computer Inc.
330Monday, December 18, 2006
330Monday, December 18, 2006
330Monday, December 18, 2006
of
of
of
1A
1A
1A
5
+3V
R97
R97
*4.7K_6
*4.7K_6
32
Q8
Q8
D D
C C
33P_4C216 33P_4C216
CLK_VDD_USB
12
Y2
Y2
14.318MHz
14.318MHz
ALINK_RST#5,11,17,18
STP_CPU#11
CLK_VDD CLK_VDDA
45
35
32
21
14
3
51
56
44
36
31
26
20
15
5
49
55
1
2
1
U3
U3
VDDCPU
VDD_SRC
VDD_SRC1
VDD_SRC2
VDD_SRC3
VDD_48
VDD_PCI
VDD_REF
VSS_CPU
VSS_SRC
VSS_SRC1
VSS_SRC2
VSS_SRC3
VSS_SRC4
VSS_48
VSS_PCI
VSS_REF
XIN
XOUT
*CH2507S
*CH2507S
Parallel Resonance Crystal
CLK_EN#25
SCLK9,12
SDATA9,12
Ioh = 5 * Iref
B B
(2.32mA)
Voh = 0.71V @ 60 ohm
CLK_EN#
EXT_CPU_STP#
R80
R80
402/F_6
402/F_6
6
VTTPWRGD#/PD
48
CPU_STP#
7
SCLK
8
SDATA
37
IREF
RTM865-300
RTM865-300
CY28RS400 and ICS951413
are fully pin compatible and
can be interchanged without
any hardware modification.
4
Reserved
R104 0_6R104 0_6
SRCST0
SRCSC0
SRCST1
SRCSC1
CLKREQ0
CLKREQ1
PCIF0/CK410#
REF1/FSB
REF0/FSA
VDDA
VSSA
CPUT0
CPUC0
CPUT1
CPUC1
CPUT2
CPUC2
SRCT0
SRCC0
SRCT1
SRCC1
SRCT2
SRCC2
SRCT3
SRCC3
SRCT4
SRCC4
SRCT5
SRCC5
USB_48
FSC
REF2
EXT_CPU_STP#
39
38
47
46
CPUCLK_R
43
CPUCLK#_R
42
NBCLK_R
41
NBCLK#_R
40
ALINKCLK_R
34
ALINKCLK#_R
33
30
29
27
28
SBSRCCLK_R
24
SBSRCCLK#_R
25
22
23
18
19
16
17
12
13
10
11
R79 10K_6R79 10K_6
50
USBCLK_R
4
9
53
54
52
FSC
FSB
FSA
OSC14M_R
3
1- PLACE ALL THE SERIES TERMINATION
RESISTORS AS CLOSE AS CLK GEN AS
POSSIBLE
2- ROUTE ALL CPUCLK/#, NBCLK/# AND
ITPCLK/# AS DIFFERENT PAIR RULE
R85 33_4R85 33_4
R86 33_4R86 33_4
R87 33_4R87 33_4
R88 33_4R88 33_4
R90 33_4R90 33_4
R91 33_4R91 33_4
R120 33_4R120 33_433P_4C226 33P_4C226
R121 33_4R121 33_4
R122 33_6R122 33_6
C246
C246
*10P_4
*10P_4
R83 22_4R83 22_4
R84 33/F_4R84 33/F_4
C171
C171
C177
C177
*10P_4
*10P_4
*10P_4
*10P_4
2
+3V CLK_VDD
L9
L9
SBK160808T-301Y-S
SBK160808T-301Y-S
NBCLK# 7
NBCLK 7
HCLK_CPU# 2
R66 49.9/F_4R66 49.9/F_4
R67 49.9/F_4R67 49.9/F_4
R68 49.9/F_4R68 49.9/F_4
R69 49.9/F_4R69 49.9/F_4
R72 49.9/F_4R72 49.9/F_4
R73 49.9/F_4R73 49.9/F_4
R135 49.9/F_4R135 49.9/F_4
R136 49.9/F_4R136 49.9/F_4
USBCLK 12
T6T6
SB_OSCIN 12
OSC14M 7
HCLK_CPU 2
ALINKCLK 6
ALINKCLK# 6
SBSRCCLK 11
SBSRCCLK# 11
R123 4.7K_4R123 4.7K_4
R78 4.7K_4R78 4.7K_4
R89 4.7K_4R89 4.7K_4
+3V
L14 SBK160808T-301Y-SL14 SBK160808T-301Y-S
+3V
BSEL2
BSEL1
BSEL0
CK410 FREQUENCY SELECT TABLE(MHZ)
C195
C195
22U/16V_1206
22U/16V_1206
L13 SBK160808T-301Y-SL13 SBK160808T-301Y-S
22U/16V_1206
22U/16V_1206
CPU_HBSEL22
CPU_HBSEL12
CPU_HBSEL02
R75 0_4R75 0_4
R65 0_4R65 0_4
R453 0_4R453 0_4
C175
C175
10U/6.3V_8
10U/6.3V_8
CLK_VDD_USB
C247
C247
10U/6.3V_8
10U/6.3V_8
C205
C205
C180
C180
.1U_4
.1U_4
CLK_VDDA
C178
C178
.1U_4
.1U_4
R70
R70
*1K_4
*1K_4
R82
R82
*0_4
*0_4
C245
C245
.1U_4
.1U_4
R64
R64
*1K_4
*1K_4
R128
R128
*0_4
*0_4
+1.05V
C238
C238
.1U_4
.1U_4
R452
R452
*1K_4
*1K_4
BSEL2
BSEL1
BSEL0
R454
R454
*0_4
*0_4
1
C239
C239
C235
C235
.1U_4
.1U_4
FSC
FSB
FSA
.1U_4
.1U_4
BSEL2 6
BSEL1 6
BSEL0 6
C179
C179
.1U_4
.1U_4
FSA
BSEL0
CPU
100
133
166
200
FSB
BSEL2
BSEL1
1 0 1
A A
0 0 1
0 1 1
0 1 0
0 0 0
CLK
5
1 0 0
1 1 0
1 1 1
4
3
333
400
Resv
SRCFSC
100
100
100
100
100
100
100
100
PCI
33
33
33
33
33266
33
REF
14.31
14.31
14.31
14.31
14.31
14.3133
14.31
14.3133
2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
EXTERNAL CLKGEN
EXTERNAL CLKGEN
EXTERNAL CLKGEN
Date: Sheet
Date: Sheet of
Date: Sheet of
PROJECT : PL5
PROJECT : PL5
Quanta Computer Inc.
Quanta Computer Inc.
of
430Saturday, December 23, 2006
430Saturday, December 23, 2006
430Saturday, December 23, 2006
1
1A
1A
1A
5
M_CLKOUT0#9
M_CLKOUT09
M_CLKOUT1#9
M_CLKOUT19
M_CLKOUT3#9
M_CLKOUT39
M_CLKOUT4#9
M_CLKOUT49
MA[17..0]
M_DM[7..0]
M_DQS[7..0]
M_DQS#[7..0]
M_CKE09
M_CKE19
M_CKE29
M_CKE39
M_CS#09
M_CS#19
M_CS#29
M_CS#39
T42T42
T43T43
T44T44
T45T45
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13
MA14
MA15
MA16
MA17
M_DM0
M_DM1
M_DM2
M_DM3
M_DM4
M_DM5
M_DM6
M_DM7
M_DQS0
M_DQS1
M_DQS2
M_DQS3
M_DQS4
M_DQS5
M_DQS6
M_DQS7
M_DQS#0
M_DQS#1
M_DQS#2
M_DQS#3
M_DQS#4
M_DQS#5
M_DQS#6
M_DQS#7
MA[17..0]9
D D
M_DM[7..0]9
M_RAS#9
M_CAS#9
M_WE#9
C C
M_DQS[7..0]9
M_DQS#[7..0]9
B B
10/27
Support
DDR-II
667
A A
U9C
U9C
AK27
MEM_A0
PART 3 OF 6
MEM_A1
MEM_A2
MEM_A3
MEM_A4
MEM_A5
MEM_A6
MEM_A7
MEM_A8
MEM_A9
MEM_A10
MEM_A11
MEM_A12
MEM_A13
MEM_A14
MEM_A15
MEM_A16
MEM_A17
MEM_DM0
MEM_DM1
MEM_DM2
MEM_DM3
MEM_DM4
MEM_DM5
MEM_DM6
MEM_DM7
MEMB_RAS#
MEMB_CAS#
MEMB_WE#
MEM_DQS0P
MEM_DQS1P
MEM_DQS2P
MEM_DQS3P
MEM_DQS4P
MEM_DQS5P
MEM_DQS6P
MEM_DQS7P
MEM_DQS0N
MEM_DQS1N
MEM_DQS2N
MEM_DQS3N
MEM_DQS4N
MEM_DQS5N
MEM_DQS6N
MEM_DQS7N
MEM_CK0N
MEM_CK0P
MEM_CK1N
MEM_CK1P
MEM_CK2N
MEM_CK2P
MEM_CK3N
MEM_CK3P
MEM_CK4N
MEM_CK4P
MEM_CK5N
MEM_CK5P
MEM_CKE0
MEM_CKE1
MEM_CKE2
MEM_CKE3
MEM_CS0#
MEM_CS1#
MEM_CS2#
MEM_CS3#
MEM_ODT0
MEM_ODT1
MEM_RSRV2
MEM_RSRV3
PART 3 OF 6
MEM_B I/F
MEM_B I/F
MEM_COMPN
MEM_COMPP
MEM_VMODE
MEM_DQ10
MEM_DQ11
MEM_DQ12
MEM_DQ13
MEM_DQ14
MEM_DQ15
MEM_DQ16
MEM_DQ17
MEM_DQ18
MEM_DQ19
MEM_DQ20
MEM_DQ21
MEM_DQ22
MEM_DQ23
MEM_DQ24
MEM_DQ25
MEM_DQ26
MEM_DQ27
MEM_DQ28
MEM_DQ29
MEM_DQ30
MEM_DQ31
MEM_DQ32
MEM_DQ33
MEM_DQ34
MEM_DQ35
MEM_DQ36
MEM_DQ37
MEM_DQ38
MEM_DQ39
MEM_DQ40
MEM_DQ41
MEM_DQ42
MEM_DQ43
MEM_DQ44
MEM_DQ45
MEM_DQ46
MEM_DQ47
MEM_DQ48
MEM_DQ49
MEM_DQ50
MEM_DQ51
MEM_DQ52
MEM_DQ53
MEM_DQ54
MEM_DQ55
MEM_DQ56
MEM_DQ57
MEM_DQ58
MEM_DQ59
MEM_DQ60
MEM_DQ61
MEM_DQ62
MEM_DQ63
MEM_CAP2
MEM_CAP1
MEM_VREF
AJ27
AH26
AJ26
AH25
AJ25
AH24
AH23
AJ24
AJ23
AH27
AH22
AJ22
AF28
AJ21
AG27
AJ28
AH21
AJ17
AG15
AE20
AF25
Y27
AB28
R26
R28
AJ29
AG28
AH30
AJ18
AE14
AF22
AE25
W27
AB29
P25
R29
AH17
AF15
AE22
AF26
W26
AB30
R25
R30
AC26
AC25
AF16
AE16
V29
V30
AC24
AC23
AG17
AF17
W29
W28
AH20
AJ20
AE24
AE21
AH29
AG29
AH28
AF29
AG30
AE28
AC30
Y30
RC410ME
RC410ME
MPVSS need to connect to GND plane
immediately through
a dedicated VIA
MEM_DQ0
MEM_DQ1
MEM_DQ2
MEM_DQ3
MEM_DQ4
MEM_DQ5
MEM_DQ6
MEM_DQ7
MEM_DQ8
MEM_DQ9
MPVDD
MPVSS
CLG
5
AJ16
AH16
AJ19
AH19
AH15
AK16
AH18
AK19
AF13
AF14
AE19
AF19
AE13
AG13
AF18
AE17
AF20
AF21
AG23
AF24
AG19
AG20
AG22
AF23
AD25
AG25
AE27
AD27
AE23
AD24
AE26
AD26
AA25
Y26
W24
U25
AA26
Y25
V26
W25
AC28
AC29
AA29
Y29
AD30
AD29
AA30
Y28
U27
T27
N26
M27
U26
T26
P27
P26
U29
T29
P29
N29
U28
T28
P28
N27
AE29
AJ15
N30
AJ14
AB27
AD28
AB26
AA27
4
MDQ0
MDQ1
MDQ2
MDQ3
MDQ4
MDQ5
MDQ6
MDQ7
MDQ8
MDQ9
MDQ10
MDQ11
MDQ12
MDQ13
MDQ14
MDQ15
MDQ16
MDQ17
MDQ18
MDQ19
MDQ20
MDQ21
MDQ22
MDQ23
MDQ24
MDQ25
MDQ26
MDQ27
MDQ28
MDQ29
MDQ30
MDQ31
MDQ32
MDQ33
MDQ34
MDQ35
MDQ36
MDQ37
MDQ38
MDQ39
MDQ40
MDQ41
MDQ42
MDQ43
MDQ44
MDQ45
MDQ46
MDQ47
MDQ48
MDQ49
MDQ50
MDQ51
MDQ52
MDQ53
MDQ54
MDQ55
MDQ56
MDQ57
MDQ58
MDQ59
MDQ60
MDQ61
MDQ62
MDQ63
MEM_COMPN
MEM_COMPP
R44 1K_6R44 1K_6
L8 SBK160808T-301Y-SL8 SBK160808T-301Y-S
C136
C136
1U_6
1U_6
4
R45 61.9/F_6R45 61.9/F_6
R264 61.9/F_6R264 61.9/F_6
C145 .47U_6C145 .47U_6
C392 .47U_6C392 .47U_6
MEM_VREF
MDQ[63..0]
MDQ[63..0] 9
+1.8VSUS
C135
C88
C88
.1U_4
.1U_4
C33
C33
.1U_4
.1U_4
ALINK_RST#
C143
C143
.1U_6
.1U_6
C144
C144
.1U_6
.1U_6
C135
.1U_4
.1U_4
C386
C386
.1U_4
.1U_4
+1.8V
Q3
Q3
1 3
*PDTC143TT
*PDTC143TT
R46
R46
1K/F_6
1K/F_6
R47
R47
1K/F_6
1K/F_6
C129
C129
.1U_4
.1U_4
+1.8V
C388
C388
.1U_4
.1U_4
This pull-up rail is applicable to
both DDRII applications and can
be an S0 or S3 rail. ATI have
release note
SUS_STAT#12
ALINK_RST#4,11,17,18
+1.8VSUS
+1.8VSUS
+1.8VSUS
+1.8V
3
3
2
C100
C100
.1U_4
.1U_4
C34
C34
.1U_4
.1U_4
D2
BAT254D2BAT254
D36
D36
BAT254
BAT254
+1.05V
+1.8VSUS
R38
R38
200K/F_6
200K/F_6
R28 49.9/F_4R28 49.9/F_4
R30 24.9/F_6R30 24.9/F_6
L6 SBK160808T-301Y-SL6 SBK160808T-301Y-S
+1.8V
C113
C113
10U/10V_8
10U/10V_8
+1.05V
R40
R40
49.9/F_4
49.9/F_4
R39
R39
100/F_6
100/F_6
HA#[3..31]2
HREQ#[0..4]2
HADSTB0#2
HADSTB1#2
DEFER#2
HLOCK#2
HTRDY#2
RS#[2..0]2
CPURST#2
NB_PWRGD10,23
NB_GTLREF
C134
C134
1U_6
1U_6
ADS#2
BNR#2
BPRI#2
DRDY#2
DBSY#2
DPWR#2
HITM#2
HIT#2
BR0#2
C114
C114
2.2U_6
2.2U_6
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
R410_4 R410_4
T3T3
CPU_COMP_P
CPU_COMP_N
CPVDD
Place close to NB
NB_GTLREF
C127
C127
T5T5
T4T4
220P_6
220P_6
R260
R260
4.7K_6
4.7K_6
ATI FAE Suggestion
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
RS#0
RS#1
RS#2
NB_BR0#
2
AH14
AH13
AJ13
2
U9A
U9A
G28
CPU_A3#
H26
CPU_A4#
G27
CPU_A5#
G30
CPU_A6#
G29
CPU_A7#
G26
CPU_A8#
H28
CPU_A9#
J28
CPU_A10#
H25
CPU_A11#
K28
CPU_A12#
H29
CPU_A13#
J29
CPU_A14#
K24
CPU_A15#
K25
CPU_A16#
F29
CPU_REQ0#
G25
CPU_REQ1#
F26
CPU_REQ2#
F28
CPU_REQ3#
E29
CPU_REQ4#
H27
CPU_ADSTB0#
M28
CPU_A17#
K29
CPU_A18#
K30
CPU_A19#
J26
CPU_A20#
L28
CPU_A21#
L29
CPU_A22#
M30
CPU_A23#
K27
CPU_A24#
M29
CPU_A25#
K26
CPU_A26#
N28
CPU_A27#
L26
CPU_A28#
N25
CPU_A29#
L25
CPU_A30#
N24
CPU_A31#
L27
CPU_ADSTB1#
F25
CPU_ADS#
F24
CPU_BNR#
E23
CPU_BPRI#
E25
CPU_DEFER#
G24
CPU_DRDY#
F23
CPU_DBSY#
G22
CPU_DPWR#
E27
CPU_LOCK#
F22
CPU_TRDY#
E24
CPU_HITM#
D26
CPU_HIT#
E26
CPU_RS0#
G23
CPU_RS1#
D23
CPU_RS2#
D25
RESERVED0
C11
CPU_CPURST#
E11
RESERVED1
SUS_STAT#
A3
SYSRESET#
E3
POWERGOOD
B11
CPU_COMP_P
D11
CPU_COMP_N
H21
CPVDD
H20
CPVSS
H22
CPU_VREF
THERMALDIODE_P
THERMALDIODE_N
C4
TESTMODE
RC410ME
RC410ME
1
PART 1 OF 6
PART 1 OF 6
DATA GROUP 0DATA GROUP 1DATA GROUP 2DATA GROUP 3
DATA GROUP 0DATA GROUP 1DATA GROUP 2DATA GROUP 3
CPU_DBI0#
CPU_DSTB0N#
CPU_DSTB0P#
ADDR. GROUP 1 ADDR. GROUP 0CONTROLMISC.
ADDR. GROUP 1 ADDR. GROUP 0CONTROLMISC.
CPU_DBI1#
CPU_DSTB1N#
CPU_DSTB1P#
CPU_DBI2#
CPU_DSTB2N#
CPU_DSTB2P#
AGTL+ I/F
AGTL+ I/F
CPU_DBI3#
CPU_DSTB3N#
CPU_DSTB3P#
CPVSS need to connect to GND plane
immediately through
a dedicated VIA
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet of
E28
CPU_D0#
D28
CPU_D1#
D29
CPU_D2#
C29
CPU_D3#
D30
CPU_D4#
C30
CPU_D5#
B29
CPU_D6#
C28
CPU_D7#
C26
CPU_D8#
B25
CPU_D9#
B27
CPU_D10#
C25
CPU_D11#
A27
CPU_D12#
C24
CPU_D13#
A24
CPU_D14#
B26
CPU_D15#
C27
A28
B28
C19
CPU_D16#
C23
CPU_D17#
C20
CPU_D18#
C22
CPU_D19#
B22
CPU_D20#
B23
CPU_D21#
C21
CPU_D22#
B24
CPU_D23#
E21
CPU_D24#
B21
CPU_D25#
B20
CPU_D26#
G19
CPU_D27#
F21
CPU_D28#
B19
CPU_D29#
E20
CPU_D30#
D21
CPU_D31#
A21
D22
E22
C18
CPU_D32#
F19
CPU_D33#
E19
CPU_D34#
A18
CPU_D35#
D19
CPU_D36#
B18
CPU_D37#
C17
CPU_D38#
B17
CPU_D39#
E17
CPU_D40#
B16
CPU_D41#
C15
CPU_D42#
A15
CPU_D43#
B15
CPU_D44#
F16
CPU_D45#
G18
CPU_D46#
F18
CPU_D47#
C16
D18
E18
E16
CPU_D48#
D16
CPU_D49#
C14
CPU_D50#
B14
CPU_D51#
E15
CPU_D52#
D15
CPU_D53#
C13
CPU_D54#
E14
CPU_D55#
F13
CPU_D56#
B13
CPU_D57#
A12
CPU_D58#
C12
CPU_D59#
E12
CPU_D60#
D13
CPU_D61#
D12
CPU_D62#
B12
CPU_D63#
E13
F15
G15
PROJECT : PL5
PROJECT : PL5
Quanta Computer Inc.
Quanta Computer Inc.
RC410ME-AGTL+ I/F
RC410ME-AGTL+ I/F
RC410ME-AGTL+ I/F
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22HA#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
HD#[0..63]
1
HD#[0..63] 2
HDBI0# 2
HDSTBN0# 2
HDSTBP0# 2
HDBI1# 2
HDSTBN1# 2
HDSTBP1# 2
HDBI2# 2
HDSTBN2# 2
HDSTBP2# 2
HDBI3# 2
HDSTBN3# 2
HDSTBP3# 2
530Saturday, December 23, 2006
530Saturday, December 23, 2006
530Saturday, December 23, 2006
of
of
1A
1A
1A
5
4
3
2
1
+3V
NB strapping
R448
A
D D
VSYNC7,10
B
C B A
0 0 0
0 0 1
0 1 0
C C
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
B B
100
133
Reserved
166
100
100
Reserved
Reserved
SCL_STRAP7
HSYNC7,10
C
MMBT3904
MMBT3904
BMREQ#
Q1
Q1
2
Q2
Q2
1 3
MMBT3904
MMBT3904
R448
4.7K_4
4.7K_4
R16
R16
*4.7K_4
*4.7K_4
R450
R450
4.7K_4
4.7K_4
R14
R14
*4.7K_4
*4.7K_4
R257
R257
4.7K_4
4.7K_4
R256
R256
*4.7K_4
*4.7K_4
R21 *4.7K_4R21 *4.7K_4
R20 4.7K_6R20 4.7K_6
2
1 3
+3V +1.05V
+3V
R12
R12
4.7K_4
4.7K_4
R23 1K_6R23 1K_6
+1.05V
R17
R17
4.7K_4
4.7K_4
2
R15
R15
4.7K_4
4.7K_4
2
+1.05V
R451
R451
4.7K_4
4.7K_4
2
13
Q17
Q17
MMBT3904
MMBT3904
+3V
DAC_SCL: CPU VCC
DEFAULT:0
0: MOBILE CPU
1: DESKTOP CPU
R447
R447
4.7K_4
4.7K_4
Q33
Q33
MMBT3904
MMBT3904
13
R449
R449
4.7K_4
4.7K_4
Q34
Q34
MMBT3904
MMBT3904
13
BSEL0 4
BSEL1 4
BSEL2 4
PWROK 2,12,23
U9B
U9B
PART 2 OF 6
J5
GFX_RX0P
J4
GFX_RX0N
K4
GFX_RX1P
L4
GFX_RX1N
L6
GFX_RX2P
L5
GFX_RX2N
M5
GFX_RX3P
M4
GFX_RX3N
N4
GFX_RX4P
P4
GFX_RX4N
P6
GFX_RX5P
P5
GFX_RX5N
R5
GFX_RX6P
R4
GFX_RX6N
T4
GFX_RX7P
T3
GFX_RX7N
U6
GFX_RX8P
U5
GFX_RX8N
V5
GFX_RX9P
V4
GFX_RX9N
W4
GFX_RX10P
W3
GFX_RX10N
Y6
GFX_RX11P
Y5
GFX_RX11N
AA5
GFX_RX12P
AA4
GFX_RX12N
AB4
GFX_RX13P
AB3
GFX_RX13N
AC6
GFX_RX14P
AC5
GFX_RX14N
AD5
GFX_RX15P
AD4
GFX_RX15N
AF8
GPP_RX0P
AG8
GPP_RX0N
AG6
GPP_RX1P
AG7
GPP_RX1N
AK7
GPP_RX2P
AJ7
GPP_RX2N
AG4
GPP_RX3P
AH4
GPP_RX3N
AG9
SB_RX0P
A_RX0N11
A_RX1P11
A_RX1N11
ALINKCLK4
ALINKCLK#4
T2T2
T40T40
BMREQ#11
AG10
AE9
AF10
M2
M1
K2
L2
H2
SB_RX0N
SB_RX1P
SB_RX1N
SB_CLKP
SB_CLKN
GFX_CLKP
GFX_CLKN
BMREQ#
RC410ME
RC410ME
PART 2 OF 6
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
PCE_TXSET
PCE_ISET
PCE_PCAL
PCE_NCAL
N1
N2
P2
R2
R1
T1
T2
U2
V2
V1
W1
W2
Y2
AA2
AA1
AB1
AB2
AC2
AD2
AD1
AE1
AE2
AF2
AG2
AG1
AH1
AH2
AJ2
AJ3
AJ4
AK4
AJ5
AJ8
AJ9
AE6
AF6
AJ6
AK6
AE4
AF4
AJ10
AJ11
AK9
AK10
AK13
AJ12
AH12
AG12
A_TX0P_C
A_TX0N_C
A_TX1P_C
A_TX1N_C
PCE_TXSET
PCE_ISET
PCE_PCAL
PCE_NCAL
C385 .1U_4C385 .1U_4
C387 .1U_4C387 .1U_4
C381 .1U_4C381 .1U_4
C383 .1U_4C383 .1U_4
R263 8.25K_6R263 8.25K_6
R262 10K_6R262 10K_6
R261 150/F_6R261 150/F_6
R29 82.5/_6R29 82.5/_6
A_TX0P 11A_RX0P11
A_TX0N 11
A_TX1P 11
A_TX1N 11
VDDA12
STRP_DATA:Debug strap
A A
STRP_DATA7
R19 4.7K_6R19 4.7K_6
CLG
5
DEFAULT:1
0: MEMORY CHANNEL STRAPING
+3V
1: E2PROM STRAPING
4
PROJECT : PL5
PROJECT : PL5
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
RC410ME-PCIE LINK I/F
RC410ME-PCIE LINK I/F
RC410ME-PCIE LINK I/F
Date: Sheet
Date: Sheet
3
2
Date: Sheet
630Saturday, December 23, 2006
630Saturday, December 23, 2006
630Saturday, December 23, 2006
of
of
1
of
1A
1A
1A
5
4
3
2
1
L1
L1
SBK160808T-301Y-S
SBK160808T-301Y-S
C422
C422
.1U_4
.1U_4
D D
C C
L5 0.22UH_6L5 0.22UH_6
C423
C423
.1U_4
.1U_4
SBK160808T-301Y-S
SBK160808T-301Y-S
L33
L33
C424
C424
.1U_4
.1U_4
C425
C425
.1U_4
.1U_4
12
C417
C417
+
+
*150U/4V_3528
*150U/4V_3528
AVDDQ+1.8V
C384
C384
10U/6.3V_8
10U/6.3V_8
SBK160808T-301Y-S
SBK160808T-301Y-S
L4
L4
RSET resistor need 10mils
trace with at least 10mils
spacing.
Also need to connect GND
at AVSSQ HF cap.
B B
NB_VDDR+3V
C14
C14
1U_6
1U_6
C42
C42
.1U_6
.1U_6
AVDD_NB+3V
C15
C15
.1U_6
.1U_6
C49
C49
10U/6.3V_8
10U/6.3V_8
REV_2A 7/27 Add
C382
C382
C377
C377
1U_6
1U_6
.1U_6
.1U_6
PLVDD+1.8V
C79
C79
10U/6.3V_8
10U/6.3V_8
C59
C59
1U_6
1U_6
VSYNC6,10
HSYNC6,10
R24 715/F_6R24 715/F_6
VGA_RED10
VGA_GRN10
VGA_BLU10
OSC14M4
NBCLK4
NBCLK#4
PHL_CLK10
PHL_DATA10
+1.8V
C31
C31
.1U_6
.1U_6
C47
C47
C63
C63
.1U_4
.1U_4
.1U_6
.1U_6
R22 10K_6R22 10K_6
T1T1
G5
G4
C9
C10
D8
C8
B8
B9
H10
H9
H3
C3
B10
F10
E10
D10
G1
K1
G2
D2
C1
J2
B3
J1
F1
U9D
U9D
VDDR3_1
VDDR3_2
AVDD
AVSSN
AVDDDI
AVSSDI
AVDDQ
AVSSQ
PLLVDD
PLLVSS
TMDS_HPD
DDC_DATA
DACVSYNC
DACHSYNC
RSET
RED
GREEN
BLUE
OSCIN
CPU_CLKP
CPU_CLKN
TVCLKIN
OSCOUT
I2C_CLK
I2C_DATA
PART 4 OF 6
PART 4 OF 6
CRT
CRT
CLK. GEN.
CLK. GEN.
SVID
SVID
TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
TXOUT_U2N
TXOUT_U2P
TXOUT_U3N
TXOUT_U3P
TXOUT_L0N
TXOUT_L0P
TXOUT_L1N
TXOUT_L1P
TXOUT_L2N
TXOUT_L2P
TXOUT_L3N
TXOUT_L3P
LPVDD
LPVSS
LVDDR18A_1
LVDDR18A_2
LVSSR_1
LVSSR_2
LVSSR_3
LVDDR18D
LVDS_DIGON
LVDS_BLON
LVDS_BLEN
TXCLK_UP
TXCLK_UN
TXCLK_LP
TXCLK_LN
COMP
DACSCL
DACSDA
STRP_DATA
B4
A4
B5
C6
B6
A6
B7
A7
E5
F5
D5
C5
E6
D6
E7
E8
J8
J7
H8
H7
G9
G8
G7
C7
E2
G3
F2
F8
F7
F6
G6
D9
C
F9
Y
E9
B2
C2
NB_LVDDR18D
R396 *10K_4R396 *10K_4
R18 0_6R18 0_6
R13 0_6R13 0_6
TXLOUT0- 10
TXLOUT0+ 10
TXLOUT1- 10
TXLOUT1+ 10
TXLOUT2- 10
TXLOUT2+ 10
NB_LPVDD +1.8V
C36
C36
C27
C27
1U_6
1U_6
.1U_6
.1U_6
NB_LVDDR18A
C391
C391
1U_6
1U_6
C16 1U_4C16 1U_4
C390
C390
.1U_4
.1U_4
C389
C389
.1U_4
.1U_4
L2
L2
SBK160808T-301Y-S
SBK160808T-301Y-S
L34
L34
SBK160808T-301Y-S
SBK160808T-301Y-S
L32
L32
SBK160808T-301Y-S
SBK160808T-301Y-S
LCD_POWER_ON 10
BLON 10
+1.8V
+1.8V
For ATI LVDS BLON Implementation Details
TXLCLKOUT+ 10
TXLCLKOUT- 10
SCL_STRAP 6
DDCCLK 10
DDCDAT 10
DAC_SCL is totem-pole output
D1
STRP_DATA 6
RC410ME
RC410ME
A A
CLG
5
4
3
PROJECT : PL5
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
RC410MD-VIDEO & CLKGEN
RC410MD-VIDEO & CLKGEN
RC410MD-VIDEO & CLKGEN
Date: Sheet
Date: Sheet
Date: Sheet
2
PROJECT : PL5
Quanta Computer Inc.
Quanta Computer Inc.
730Saturday, December 23, 2006
730Saturday, December 23, 2006
730Saturday, December 23, 2006
of
of
of
1
1A
1A
1A
5
FOR VDD_CORE S0 max:5A FOR VDD_MEM ,S0 max:7A
C375
C374
C374
+
+
150U/4V_3528
150U/4V_3528
D D
C375
+
+
470U/2.5V_7343
470U/2.5V_7343
C108
C108
1U_6
1U_6
C91
C91
1U_6
1U_6
C80
C80
.1U_4
.1U_4
C107
C107
1U_6
1U_6
C64
C64
.1U_4
.1U_4
C106
C106
1U_6
1U_6
C89
C89
.1U_4
.1U_4
C94
C94
1U_6
1U_6
C65
C65
.1U_4
.1U_4
C75
C75
1U_6
1U_6
C81
C81
.1U_4
.1U_4
C105
C105
1U_6
1U_6
Power sequence requirement
D5 SW1010CD5 SW1010C C99
2 1
+3V
C C
FOR VDD18 ,S0 max:300mA
+1.8V
L7 TI201209G121L7 TI201209G121
D4 SW1010CD4 SW1010C
2 1
21
D3
D3
SW1010C
SW1010C
C39
C39
1U_6
1U_6
C41
C41
1U_6
1U_6
C104
C104
1U_6
1U_6
C116
C116
1U_6
1U_6
FOR VDDA18 ,S0 max:600mA
+1.8V
L3 TI201209G121L3 TI201209G121
C46
C46
1U_6
1U_6
C20
C20
1U_6
1U_6
C17
C17
1U_6
1U_6
C55
C55
1U_6
1U_6
VDDA18
C22
C22
1U_6
1U_6
FOR VDDA_12 ,S0 max:2.5A
+1.2V
B B
A A
L31 TI201209G121L31 TI201209G121
C372
C372
+
+
470U/2.5V_7343
470U/2.5V_7343
C26
C26
1U_6
1U_6
C24
C24
1U_6
1U_6
C13
C13
1U_6
1U_6
C12
C12
1U_6
1U_6
C29
C29
.1U_4
.1U_4
C28
C28
.1U_4
.1U_4
CLG
5
C90
C90
.1U_4
.1U_4
VDD18
VDDA12
C23
C23
1U_6
1U_6
4
C60
C60
C50
C50
1U_6
1U_6
1U_6
1U_6
C82
C82
.1U_4
.1U_4
C403
C403
*100U/6.3V_3528
*100U/6.3V_3528
+
+
C19
C19
1U_6
1U_6
4
+1.2V
C66
C66
.1U_4
.1U_4
C21
C21
1U_6
1U_6
C51
C51
1U_6
1U_6
U16
M13
M15
M17
R16
V15
N12
T15
N14
N16
N18
M19
R12
P13
P15
P17
P19
U12
T13
U14
T17
U18
T19
V13
R14
V17
R18
V19
W12
W14
W16
W18
AB22
AB9
AB8
AE11
AC9
AD10
AC10
AG11
AF11
AC7
AB7
J9
J22
Y8
U8
Y7
U7
H5
H4
P8
P7
L7
L8
J6
U9E
U9E
VDD_CORE#M12
VDD_CORE#M13
VDD_CORE#M14
VDD_CORE#M17
VDD_CORE#M18
VDD_CORE#M19
VDD_CORE#N12
VDD_CORE#N13
VDD_CORE#N14
VDD_CORE#N17
VDD_CORE#N18
VDD_CORE#N19
VDD_CORE#P12
VDD_CORE#P13
VDD_CORE#P14
VDD_CORE#P17
VDD_CORE#P19
VDD_CORE#U12
VDD_CORE#U13
VDD_CORE#U14
VDD_CORE#U17
VDD_CORE#U18
VDD_CORE#U19
VDD_CORE#V13
VDD_CORE#V14
VDD_CORE#V17
VDD_CORE#V18
VDD_CORE#V19
VDD_CORE#W12
VDD_CORE#W14
VDD_CORE#W17
VDD_CORE#W18
VDD_18
VDD_18#AF26
VDD_18#AF9
VDD_18#J26
VDDA_18#U8
VDDA_18#AD8
VDDA_18#W6
VDDA_18#AA8
VDDA_18#AA7
VDDA_18#AE7
VDDA_18#AD7
VDDA_18#AC8
VDDA_18#AC7
VDDA_18#AG6
VDDA_18#AF6
VDDA_12#K6
VDDA_12#K4
VDDA_12#F6
VDDA_12#F5
VDDA_12#B3
VDDA_12#A3
VDDA_12#B4
VDDA_12#M8
VDDA_12#W5
RC410ME
RC410ME
PART 5 OF 6
PART 5 OF 6
VDD_MEM#AG27
CORE POWER
CORE POWER
POWER
POWER
MEM POWER
MEM POWER
PCIE IF
PCIE IF
PCIE POWER
PCIE POWER
+1.2V
C376
C376
.1U_6
.1U_6
FOR EMI
3
VDD_MEM#AB30
VDD_MEM#AJ21
VDD_MEM#AK21
VDD_MEM#AC13
VDD_MEM#AC14
VDD_MEM#AC15
VDD_MEM#AC18
VDD_MEM#AC21
VDD_MEM#AD10
VDD_MEM#AD13
VDD_MEM#AD15
VDD_MEM#AD18
VDD_MEM#AD21
VDD_MEM#AE15
VDD_MEM#AE18
VDD_MEM#AE21
VDD_MEM#AJ30
VDD_MEM#AK18
VDD_MEM#AK24
VDD_MEM#AK9
VDD_MEM#W23
VDD_CPU#H17
VDD_CPU#H19
VDD_CPU#K23
VDD_CPU#L23
VDD_CPU#L24
VDD_CPU#M23
VDD_CPU#M24
VDD_CPU#T23
VDD_CPU#U23
VDD_CPU#U24
VDD_CPU#V23
VDD_CPU#V24
VDD_CPU#G16
VDD_CPU#G15
VDD_CPU#F22
VDD_CPU#F19
VDD_CPU#F16
VDD_CPU#F15
VDD_CPU#E15
VDD_CPU#A16
VDD_CPU#H16
VDD_CPU#H15
VDD_CPU#G22
VDD_CPU#G21
CPU IF POWER
CPU IF POWER
VDD_CPU#G19
VDDA_12#N8
VDDA_12#C3
VDDA_12#R7
VDDA_12#R8
VDDA_12#U7
VDDA_12#B2
VDDA_12#K8
VDDA_12#L7
VDDA_12#L8
3
Y24
AC21
AD21
AC13
AD23
AC16
AD19
AD22
V23
AD13
AD16
AC19
AB24
AK24
T24
AK28
AB23
Y23
AK21
T23
V24
AC22
H11
H13
G20
L23
L24
P23
N23
H17
G17
H14
F17
G14
A10
H16
H23
H12
F12
G12
F11
P24
H19
G11
H24
G16
G13
AC8
K6
M8
T8
T7
M7
W8
W7
AD9
+1.8VSUS
C393
C393
100U/10V_7343
100U/10V_7343
C131
C131
.1U_4
.1U_4
+1.05V
C99
22U/16V_1206
22U/16V_1206
C101
C101
.1U_4
.1U_4
VDDA12
C45
C45
1U_6
1U_6
C138
C138
.1U_4
.1U_4
C85
C85
.1U_4
.1U_4
2
C69
C103
C103
.1U_4
.1U_4
C57
C57
1U_6
1U_6
C110
C110
.1U_4
.1U_4
C69
1U_6
1U_6
C398
C398
*100U/10V_7343
*100U/10V_7343
C115
C115
C77
C77
.1U_4
.1U_4
.1U_4
.1U_4
FOR VDD_CPU ,S0 max:3.5A
C98
C25
C25
1U_6
1U_6
C73
C73
1U_6
1U_6
C124
C124
.1U_4
.1U_4
C44
C44
1U_6
1U_6
C98
1U_6
1U_6
C122
C122
.1U_4
.1U_4
VDDA12
C68
C68
1U_6
1U_6
C373
C373
+
+
150U/4V_3528
150U/4V_3528
2
C83
C83
1U_6
1U_6
C130
C130
.1U_4
.1U_4
C40
C40
1U_6
1U_6
C92
C92
1U_6
1U_6
C56
C56
.1U_4
.1U_4
C78
C78
1U_6
1U_6
C93
C93
1U_6
1U_6
1
U9F
U9F
W5
VSSA#U5
W6
VSSA#U6
AB5
VSSA#Y5
AB6
C128
C128
C111
C111
1U_6
1U_6
1U_6
1U_6
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
VSSA#Y6
V8
VSSA#P8
V7
VSSA#P7
AA8
VSSA#U8
AA7
VSSA#U7
AD7
VSSA#Y7
AD8
VSSA#Y8
R8
VSSA#L8
N8
VSSA#K7
R7
VSSA#AD7
N7
VSSA#A2
AF7
VSSA#AF5
AE8
VSSA#AC6
AG5
VSSA#AC5
T6
VSSA#P6
T5
VSSA#P5
N6
VSSA#L6
N5
VSSA#L5
AH5
VSSA#H6
K5
VSSA#H5
AH3
VSSA#P4
AH8
VSSA#AE3
AH7
VSSA#AD3
AH6
VSSA#AC3
AD3
VSSA#AA3
AC3
VSSA#Y3
AA3
VSSA#V3
Y3
VSSA#U3
V3
VSSA#R3
U3
VSSA#P3
R3
VSSA#M3
P3
VSSA#L3
M3
VSSA#J3
L3
VSSA#H3
AF5
VSSA#F3
AF3
VSSA#N3
AF9
VSSA#AG3
AH9
VSSA#AE9
AH10
VSSA#AH7
AC20
VSS#A15
J23
VSS#A24
A29
VSS#A29
W30
VSS#AA23
W23
VSS#AA24
AA28
VSS#AA30
AJ30
VSS#AB27
AC12
VSS#AC12
AC15
VSS#AC16
K8
VSS#AC8
AD12
VSS#AD12
AD15
VSS#AD16
AD18
VSS#AD19
AC17
VSS#AD23
AE30
VSS#AD30
AD14
VSS#AD8
AC11
VSS#AD9
AF12
VSS#AE12
AF27
VSS#AE27
AC18
VSS#AC19
AG14
VSS#AG12
F4
VSS#AF7
AG18
VSS#AG18
AG21
VSS#AG21
AK25
VSS#AG9
V27
VSS#AH28
AJ1
VSS#AJ1
AD20
VSS#AK10
AK12
VSS#AK13
AK15
VSS#AK16
AK18
VSS#AK19
AK2
VSS#AK2
AH11
VSS#AH11
J3
VSS#AJ11
AC27
VSS#AK25
RC410ME
RC410ME
RC410MD-POWER
RC410MD-POWER
RC410MD-POWER
PART 6 OF 6
PART 6 OF 6
GND
GND
PROJECT : PL5
PROJECT : PL5
Quanta Computer Inc.
Quanta Computer Inc.
VSS#M15
VSS#G14
VSS#G18
VSS#G27
VSS#G3
VSS#H13
VSS#H14
VSS#H18
VSS#H23
VSS#H4
VSS#J23
VSS#J24
VSS#J30
VSS#K27
VSS#V30
VSS#U19
VSS#M16
VSS#AD11
VSS#M30
VSS#N15
VSS#N16
VSS#N23
VSS#N27
VSS#G5
VSS#P15
VSS#P16
VSS#P23
VSS#P24
VSS#R12
VSS#R13
VSS#R14
VSS#R15
VSS#R16
VSS#R17
VSS#R18
VSS#R19
VSS#R23
VSS#R24
VSS#R30
VSS#T12
VSS#T13
VSS#T14
VSS#T15
VSS#T16
VSS#T17
VSS#T18
VSS#T19
VSS#T27
VSS#U15
VSS#U16
VSS#V15
VSS#V16
VSS#W16
VSS#W27
VSS#V12
VSS#W13
VSS#V14
VSS#W15
VSS#Y23
VSS#Y24
VSS#C19
VSS#C17
VSS#AH26
VSS#AH25
VSS#AG25
VSS#F30
VSS#F25
VSS#D27
VSS#D25
VSS#D23
VSS#D20
VSS#D17
VSS#C3
VSS#C28
VSS#B30
VSS#B1
VSS#AK29
VSS#AK22
1
M14
AC14
AG16
A22
A2
D27
AG26
H18
A16
A9
AD17
J24
R27
D24
T30
U19
M16
AD11
H15
N15
N19
D3
A25
F3
R15
P16
G10
M24
M12
R13
P12
P14
U13
R17
V18
R19
R23
R24
J30
T12
N13
T14
P18
T16
U17
T18
W19
J27
U15
N17
M18
V16
W17
M26
V12
W13
V14
W15
U23
U24
A13
V28
AG24
AA24
AA23
F30
K23
D20
A19
D17
D14
F27
D4
M23
B30
B1
AK29
AK22
1A
1A
of
of
of
830Tuesday, December 19, 2006
830Tuesday, December 19, 2006
830Tuesday, December 19, 2006
1A
5
MDQ[63..0]5
M_DM[7..0]5
M_DQS[7..0]5
M_DQS#[7..0]5
MA[17..0]5
D D
C C
10/27
Support
DDR-II
667
B B
A A
MDQ[63..0]
M_DM[7..0]
M_DQS[7..0]
+0.9VSUS
M_DQS#[7..0]
MA[17..0]
M_CLKOUT45
M_CLKOUT4#5
M_CLKOUT35
M_CLKOUT3#5
+3V
+3V
M_RAS#5
M_CAS#5
M_WE#5
M_CS#25
M_CS#35
+1.8VSUS
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13
MA14
MA15
MA16
MA17
M_DM6 MDQ0
M_DM1
M_DM0
M_DM2
M_DM3
M_DM4
M_DM5
M_DM7
M_DQS6
M_DQS1
M_DQS0
M_DQS2
M_DQS3
M_DQS4
M_DQS5
M_DQS7
M_DQS#6
M_DQS#1
M_DQS#0
M_DQS#2
M_DQS#3
M_DQS#4
M_DQS#5
M_DQS#7
M_RAS#
M_CAS#
M_WE#
R51 4.7K_6R51 4.7K_6
R53 4.7K_6R53 4.7K_6
SDATA
SCLK
C8
.1U_6C8.1U_6
C9
.1U_6C9.1U_6
SMBus ADDRESS: A1 SMBus ADDRESS: A0
+1.8VSUS
103
111
104
112
117
102
A0
101
A1
99
98
97
94
92
93
91
90
89
86
84
85
10
26
52
67
13
31
51
70
11
29
49
68
30
32
79
80
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
1
2
3
8
9
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
BA0
BA1
BA2
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
CK0
CK0
CK1
CK1
CKE0
CKE1
RAS
CAS
WE
S0
S1
ODT0
ODT1
SA0
SA1
SDA
SCL
VDDspd
VREF
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VDD081VDD182VDD287VDD388VDD495VDD596VDD6
59
100
105
116
107
106
130
147
170
185
131
148
169
188
129
146
167
186
164
166
108
113
109
110
115
114
119
198
200
195
197
199
118
VDD8
VDD7
VDD9
VDD10
VDD11
NC/TEST
SO-DIMM
(STD)
SO-DIMM
(STD)
VSS33
VSS32
VSS31
VSS30
VSS29
VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21
132
128
127
122
121
AMP-DDR-SODIMM-200P
AMP-DDR-SODIMM-200P
DDR
5
J2
J2
5
DQ0
7
DQ1
17
DQ2
19
DQ3
4
DQ4
6
DQ5
14
DQ6
16
DQ7
23
DQ8
25
DQ9
35
DQ10
37
DQ11
20
DQ12
22
DQ13
36
DQ14
38
DQ15
43
DQ16
45
DQ17
55
DQ18
57
DQ19
44
DQ20
46
DQ21
56
DQ22
58
DQ23
61
DQ24
63
DQ25
73
DQ26
75
DQ27
62
DQ28
64
DQ29
74
DQ30
76
DQ31
123
DQ32
125
DQ33
135
DQ34
137
DQ35
124
DQ36
126
DQ37
134
DQ38
136
DQ39
141
DQ40
143
DQ41
151
DQ42
153
DQ43
140
DQ44
142
DQ45
152
DQ46
154
DQ47
157
DQ48
159
DQ49
173
DQ50
175
DQ51
158
DQ52
160
DQ53
174
DQ54
176
DQ55
179
DQ56
181
DQ57
189
DQ58
191
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
50
NC1
69
NC2
83
NC3
120
NC4
163
196
VSS56
193
VSS55
190
VSS54
187
VSS53
184
VSS52
183
VSS51
178
VSS50
177
VSS49
172
VSS48
171
VSS47
168
VSS46
165
VSS45
162
VSS44
161
VSS43
156
VSS42
155
VSS41
150
VSS40
149
VSS39
145
VSS38
144
VSS37
139
VSS36
138
VSS35
133
VSS34
DDR2-SODIMM(H4)
DDR2-SODIMM(H4)
4
MDQ55
MDQ54
MDQ52
MDQ48
MDQ50
MDQ51
MDQ53
MDQ49
MDQ13
MDQ9
MDQ14
MDQ11
MDQ12
MDQ8
MDQ10
MDQ15
MDQ1
MDQ4
MDQ7
MDQ2
MDQ5
MDQ3
MDQ6
MDQ20
MDQ21
MDQ18
MDQ23
MDQ17
MDQ16
MDQ19
MDQ22
MDQ25
MDQ24
MDQ27
MDQ31
MDQ29
MDQ28
MDQ30
MDQ26
MDQ33
MDQ36
MDQ39
MDQ35
MDQ32
MDQ37
MDQ38
MDQ34
MDQ41
MDQ40
MDQ43
MDQ47
MDQ44
MDQ45
MDQ46
MDQ42
MDQ57
MDQ61
MDQ59
MDQ63
MDQ56
MDQ60
MDQ58
MDQ62
10/27
Support
DDR-II
667
4
+0.9VSUS
M_CLKOUT15
M_CLKOUT1#5
M_CLKOUT05
M_CLKOUT0#5
M_CKE05M_CKE15
M_CS#05
M_CS#15
M_CKE25M_CKE35
+3V
SDATA4,12
SCLK4,12
+3V
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA14
MA15
MA16
MA17
M_DM6
M_DM1
M_DM0
M_DM2
M_DM3
M_DM4
M_DM5
M_DM7
M_DQS6
M_DQS1
M_DQS0
M_DQS2
M_DQS3
M_DQS4
M_DQS5
M_DQS7
M_DQS#6
M_DQS#1
M_DQS#0
M_DQS#2
M_DQS#3
M_DQS#4
M_DQS#5
M_DQS#7
M_RAS#
M_CAS#
M_WE#
R52 4.7K_6R52 4.7K_6
+1.8VSUS
C11
C11
.1U_6
.1U_6
C10
C10
.1U_6
.1U_6
3
+1.8VSUS
103
111
104
112
117
118
J1
102
A0
101
A1
99
98
97
94
92
93
91
90
89
86
84
85
10
26
52
67
13
31
51
70
11
29
49
68
30
32
79
80
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
1
2
3
8
9
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
BA0
BA1
BA2
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
CK0
CK0
CK1
CK1
CKE0
CKE1
RAS
CAS
WE
S0
S1
ODT0
ODT1
SA0
SA1
SDA
SCL
VDDspd
VREF
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VDD081VDD182VDD287VDD388VDD495VDD596VDD6
59
100
105
116
107
106
130
147
170
185
131
148
169
188
129
146
167
186
164
166
108
113
109
110
115
114
119
198
200
195
197
199
J1
DQ0
DQ1
VDD8
VDD7
VDD9
DQ2
VDD10
VDD11
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
NC1
NC2
NC3
NC4
NC/TEST
SO-DIMM
(STD)
SO-DIMM
(STD)
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21
DDR2-SODIMM(H8)
DDR2-SODIMM(H8)
DDR-AS0A426-MAS-200P
DDR-AS0A426-MAS-200P
132
128
127
122
121
MDQ55
5
MDQ54
7
MDQ52
17
MDQ48
19
MDQ50
4
MDQ51
6
MDQ53
14
MDQ49
16
MDQ13
23
MDQ9
25
MDQ14
35
MDQ11
37
MDQ12
20
MDQ8MA13
22
MDQ10
36
MDQ15
38
MDQ1
43
MDQ4
45
MDQ7
55
MDQ2
57
MDQ5
44
MDQ0
46
MDQ3
56
MDQ6
58
MDQ20
61
MDQ21
63
MDQ18
73
MDQ23
75
MDQ17
62
MDQ16
64
MDQ19
74
MDQ22
76
MDQ25
123
MDQ24
125
MDQ27
135
MDQ31
137
MDQ29
124
MDQ28
126
MDQ30
134
MDQ26
136
MDQ33
141
MDQ36
143
MDQ39
151
MDQ35
153
MDQ32
140
MDQ37
142
MDQ38
152
MDQ34
154
MDQ41
157
MDQ40
159
MDQ43
173
MDQ47
175
MDQ44
158
MDQ45
160
MDQ46
174
MDQ42
176
MDQ57
179
MDQ61
181
MDQ59
189
MDQ63
191
MDQ56
180
MDQ60
182
MDQ58
192
MDQ62
194
50
69
83
120
163
196
193
190
187
184
183
178
177
172
171
168
165
162
161
156
155
150
149
145
144
139
138
133
R42 180_4R42 180_4
R43 180_4R43 180_4
10/27
Support
DDR-II
667
2
M_CKE2
M_CKE3
+1.8VSUS
+1.8VSUS
+0.9V
12
C378
C378
+
+
220U/2.5V_3528
220U/2.5V_3528
12
C394
C394
+
+
220U/2.5V_3528
220U/2.5V_3528
12
C380
C380
+
+
220U/2.5V_3528
220U/2.5V_3528
MA5
MA2
MA8
MA9
MA15
M_WE#
MA3
MA0
MA1
M_CS#0
M_RAS#
M_CS#2
M_CKE3
M_CS#3
MA16
MA17
M_ODT0
M_CAS#
M_CKE2
M_ODT1
MA12
MA11
M_CKE1
M_CKE0
M_CS#1
MA13
MA10
MA14
MA7
MA6
MA4
C74
C74
1U_6
1U_6
C86
C86
1U_6
1U_6
R37 56_4R37 56_4
R32 56_4R32 56_4
R26 56_4R26 56_4
R35 56_4R35 56_4
R33 *56_4R33 *56_4
R36 56_4R36 56_4
R27 56_4R27 56_4
R34 *56_4R34 *56_4
RP1 56X4_4RP1 56X4_4
2
4
6
RP6 56X4_4RP6 56X4_4
2
4
6
2
4
6
RP2 56X4_4RP2 56X4_4
C70
C70
1U_6
1U_6
C102
C102
1U_6
1U_6
12
C397
C397
+
+
220U/2.5V_3528
220U/2.5V_3528
RP3 56X4_4RP3 56X4_4
RP4 56X4_4RP4 56X4_4
RP5 56X4_4RP5 56X4_4
1
2
3
4
5
6
78
1
2
3
4
5
6
78
1
2
3
4
5
6
78
R31 56_4R31 56_4
R25 56_4R25 56_4
1
3
5
78
1
3
5
78
1
3
5
78
C52
C52
C62
C62
1U_6
1U_6
1U_6
1U_6
C119
C119
C95
C95
1U_6
1U_6
1U_6
1U_6
+1.8VSUS
+0.9V
C30 *1U_6C30 *1U_6
C126 1U_6C126 1U_6
C38 1U_6C38 1U_6
C123 1U_6C123 1U_6
C43 1U_6C43 1U_6
C72 1U_6C72 1U_6
C121 1U_6C121 1U_6
C37 1U_6C37 1U_6
C18 *1U_6C18 *1U_6
C133 1U_6C133 1U_6
C112 1U_6C112 1U_6
C32 1U_6C32 1U_6
C132 1U_6C132 1U_6
C97 1U_6C97 1U_6
C109 1U_6C109 1U_6
C87 1U_6C87 1U_6
C54 1U_6C54 1U_6
C35 1U_6C35 1U_6
C48
C48
C71
C71
1U_6
1U_6
1U_6
1U_6
C76
C76
C96
C96
1U_6
1U_6
1U_6
1U_6
12
C395
C395
+
+
220U/2.5V_3528
220U/2.5V_3528
C399
C399
.1U_6
.1U_6
C84
C84
1U_6
1U_6
C125
C125
1U_6
1U_6
1
+1.8VSUS
+1.8VSUS
+1.8VSUS
+1.8VSUS
C396
C396
.1U_6
.1U_6
+1.8VSUS
+1.8VSUS
+1.8VSUS
+1.8VSUS
+1.8VSUS
C61
C61
.1U_6
.1U_6
C118
C118
.1U_6
.1U_6
C120
C120
.1U_6
.1U_6
C117
C117
.1U_6
.1U_6
C53
C53
.1U_6
.1U_6
C379
C379
.1U_6
.1U_6
C58
C58
.1U_6
.1U_6
C67
C67
.1U_6
.1U_6
+1.8V+1.8VSUS
C137
C137
.1U_6
.1U_6
FOR EMI
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDR2 SO-DIMM
DDR2 SO-DIMM
DDR2 SO-DIMM
Date: Sheet
Date: Sheet
3
2
Date: Sheet
PROJECT : PL5
PROJECT : PL5
Quanta Computer Inc.
Quanta Computer Inc.
of
of
of
930Saturday, December 23, 2006
930Saturday, December 23, 2006
930Saturday, December 23, 2006
1
1A
1A
1A
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