Emitter−Base VoltageV
Collector Current − ContinuousI
THERMAL CHARACTERISTICS
CharacteristicSymbolMaxUnit
Total Device Dissipation FR−5 Board,
(Note 1) TA = 25°C
Derate above 25°C
Thermal Resistance,
Junction−to−Ambient
Total Device Dissipation Alumina
Substrate, (Note 2) TA = 25°C
Derate above 25°C
Thermal Resistance,
Junction−to−Ambient
Junction and Storage TemperatureTJ, T
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. FR−5 = 1.0 x 0.75 x 0.062 in.
2. Alumina = 0.4 x 0.3 x 0.024 in 99.5% alumina.
= 25°C unless otherwise noted)
A
V
V
R
R
CEO
CBO
EBO
C
P
q
P
q
D
JA
D
JA
stg
BC857
BC858, BC859
BC857
BC858, BC859
−65
−45
−30
−80
−50
−30
−5.0V
−100mAdc
225
1.8
556°C/W
300
2.4
417°C/W
− 55 to +150°C
mW
mW/°C
mW
mW/°C
V
V
http://onsemi.com
COLLECTOR
3
1
BASE
2
EMITTER
3
1
2
SOT−23
CASE 318
STYLE 6
MARKING DIAGRAM
xx M G
G
1
xx= Device Code
xx = (Refer to page 5)
M= Date Code*
G= Pb−Free Package
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t
T
J(pk)
q
− TC = P
q
(pk)
JC
JA
1
R
= 83.3°C/W MAX
(t) = r(t) R
= 200°C/W MAX
(t)
q
JC
−200
−100
−50
TA = 25°C
T
J
1 s
= 25°C
3 ms
The safe operating area curves indicate IC−VCE limits
the transistor that must be observed for reliable operatio
Collector load lines for specific circuits must fall below th
limits indicated by the applicable curve.
The data of Figure 14 is based upon T
= 150°C; TC
J(pk)
TA is variable depending upon conditions. Pulse curves a
valid for duty cycles to 10% provided T
may be calculated from the data in Figure 13. At high case
ambient temperatures, thermal limitations will reduce th
power that can be handled to values less than the limitatio
imposed by the secondary breakdown.
, COLLECTOR CURRENT (mA)
−5.0
C
I
−2.0
−10
−1.0
BC558, BC559
BC557
BC556
BONDING WIRE LIMIT
THERMAL LIMIT
SECOND BREAKDOWN LIMIT
−5.0−10−30 −45 −65 −100
VCE, COLLECTOR−EMITTER VOLTAGE (V)
Figure 14. Active Region Safe Operating Area
ORDERING INFORMATION
DeviceMarkingPackageShipping
BC856ALT1
BC856ALT1GSOT−23
BC856ALT3SOT−23
BC856ALT3GSOT−23
BC856BLT1
BC856BLT1GSOT−23
BC856BLT3SOT−23
BC856BLT3GSOT−23
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
3A
3B
SOT−23
3,000 / Tape & Reel
(Pb−Free)
10,000 / Tape & Reel
(Pb−Free)
SOT−23
3,000 / Tape & Reel
(Pb−Free)
10,000 / Tape & Reel
(Pb−Free)
≤ 150°C. T
J(pk)
†
J(p
http://onsemi.com
5
BC856ALT1 Series
ORDERING INFORMATION
DeviceShipping
BC857ALT1
BC857ALT1GSOT−23
BC857BLT1
BC857BLT1GSOT−23
BC857BLT3SOT−23
BC857BLT3GSOT−23
BC857CLT1
BC857CLT1GSOT−23
BC858ALT1
BC858ALT1GSOT−23
BC858BLT1
BC858BLT1GSOT−23
BC858BLT3
BC858BLT3GSOT−23
BC858CLT1SOT−23
BC858CLT1GSOT−23
BC858CLT3SOT−23
BC858CLT3GSOT−23
BC859BLT1
BC859BLT1GSOT−23
BC859BLT3SOT−23
BC859BLT3GSOT−23
BC859CLT1
BC859CLT1GSOT−23
BC859CLT3SOT−23
BC859CLT3GSOT−23
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
3E
3F
3G
3J
3K
3L
4B
4C
PackageMarking
SOT−23
(Pb−Free)
SOT−23
(Pb−Free)
(Pb−Free)
SOT−23
(Pb−Free)
SOT−23
(Pb−Free)
SOT−23
(Pb−Free)
SOT−23
(Pb−Free)
(Pb−Free)
(Pb−Free)
SOT−23
(Pb−Free)
(Pb−Free)
SOT−23
(Pb−Free)
(Pb−Free)
3,000 / Tape & Reel
10,000 / Tape & Reel
3,000 / Tape & Reel
10,000 / Tape & Reel
3,000 / Tape & Reel
10,000 / Tape & Reel
3,000 / Tape & Reel
10,000 / Tape & Reel
3,000 / Tape & Reel
10,000 / Tape & Reel
†
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6
BC856ALT1 Series
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318−08
ISSUE AM
D
H
SEE VIEW C
E
0.25
3
E
12
b
e
q
A
L
A1
L1
VIEW C
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS OF
BASE MATERIAL.
4. 318−01 THRU −07 AND −09 OBSOLETE, NEW
STANDARD 318−08.
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada
Fax: 480−829−7709 or 800−344−3867Toll Free USA/Canada
Email: orderlit@onsemi.com
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
http://onsemi.com
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
For additional information, please contact your
local Sales Representative.
BC856ALT1/D
7
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