OKI MSM6408-xxxRS, MSM6408-xxxGS-2K, MSM6408-xxxGS-K Datasheet

E2E0014-38-93

¡ Semiconductor

This version: Sep. 1998

Previous version: Mar. 1996

MSM6408¡ Semiconductor

MSM6408

High speed and High performance 4-Bit Microcontroller

GENERAL DESCRIPTION

The MSM6408 microcontroller is a low-power, single-chip device implemented in complementary metal-oxide semiconductor technology. The MSM6408 is optimized for high-speed processing and complicated-control applications, in which conventional microcontrollers are difficult to use.

FEATURES

• Mask ROM : 8096 words ¥ 8 bits

• RAM (including the stack area) : 256 words ¥ 4 bits

• I/O port Input-output port : 8 ports ¥ 4 bits Input port : 1 port ¥ 4 bits

4 bits are for input ports having a latch; the other 32 bits are for input/output ports that allow bit manipulation

• Three built-in counters : 12-bit time-base counter

12-bit programmable timer 8-bit high-speed programmable timer/event

counter

• Built-in 8-bit serial I/O register (with 3-bit counter)

• Five interrupts with five priority levels (4 internal, 1 external)

• 32 stack levels (in RAM)

• Power down features

• Minimum instruction execution time : 1.0 ms @ 4.0 MHz clock

• Instruction systems suitable for control

• Fully static operation

• Low power consumption

• Single 5 V power supply

• Package options: 42-pin plastic DIP (DIP42-P-600-2.54) (Product name : MSM6408-¥¥¥RS) 44-pin plastic QFP (QFP44-P-910-0.80-K) (Product name : MSM6408-¥¥¥GS-K) 44-pin plastic QFP (QFP44-P-910-0.80-2K) (Product name : MSM6408-¥¥¥GS-2K)

¥¥¥ indicates a code number.

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BLOCK DIAGRAM

MSM6408¡ Semiconductor

P8

3210

16 ¥ 16 ¥ 4 bits

P7

3210

P6

3210

RAM

DEC

HSP L

P5

3210

P9 8-bit T/C12-bit Timer

P4

3210

P3

3210

C

PA 8-bit SR

P2

3210

INT

P1

3210

TCK

ACC

ALU

CIN

TMO

P0

3210

SCK, CTO, CLK

SO

SI

INSTR

Interrupt

Control

12-bit TBC

DEC

F

PC INTE

PD IRQ

ROM

8096 ¥ 8 bits

DEC

12 0

PC

PB

Timing

&

Control

OSC

0

OSC

1

TEST

RESET

V

DD

GND

2/19

PIN CONFIGURATION (TOP VIEW)

MSM6408¡ Semiconductor

P4.0

P4.1

P4.2

P4.3

P3.0

P3.1

P3.2

P3.3

OSC

RESET

TEST

P2.0

P2.1

P2.2

P2.3

P0.0 P0.1

P0.2

P0.3

1

2

3

4

5

6

7

8

9

0

10

1

11

12

13

14

15

16

17 18

19

20

21GND P1.022

42

41

40

39

38

37

36

35

34

33 32

31

30

29

28

27

26 25

24

23

V

DD

P5.3

P5.2

P5.1

P5.0

P6.3

P6.2

P6.1

P6.0

P7.3 P7.2

P7.1

P7.0

P8.3

P8.2

P8.1

P8.0 P1.3

P1.2

P1.1

42-Pin Plastic DIP

3/19

PIN CONFIGURATION (TOP VIEW) (continued)

MSM6408¡ Semiconductor

P3.1

P3.2

P3.3

OSC

RESET

TEST

P2.0

P2.1

P2.2

P2.3

P3.0

P4.3

P4.2

P4.1

44

43

42

41

1

2

3

4

0

5

1

6

7

8

9

10

11

12

13

14

15

P0.0

P0.1

P0.2

P0.3

P4.0

40

16

GND

DD

V

39

17

NC

P5.3

38

18

P1.0

P5.2

37

19

P1.1

P5.1

36

20

P1.2

P5.0

35

21

P1.3

P6.3

34

22

P8.0

33

32

31

30

29

28

27

26

25

24

23

P6.2

P6.1

P6.0

NC

P7.3

P7.2

P7.1

P7.0

P8.3

P8.2

P8.1

NC : No-connection pin

44-Pin Plastic QFP

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MSM6408¡ Semiconductor

PIN DESCRIPTIONS

Symbol Type Description During reset

P0.0 P0.1/SCK

P0.2/SO

I/O

P0.3/SI P1.0/CIN P1.1/TMO P1.1 is shared with timer output (TMO). P1.2/TCK

I/O

P1.3 P2.0/INT

P2.1

I

P2.3

P3.0 to 3.3

P4.0 to 4.3

P5.0 to 5.3

P6.0 to 6.3

P7.0 to 7.3

OSC

0

OSC

1

I/O

I

O

P0.1 is shared with serial clock (SLK) input/output.

P0.2 is shared with serial data (SO) output.

P0.3 is shared with serial data (SI) input. P1.0 is shared with counter input (CIN).

P1.2 is shared with timer clock input (TCK).

P2.0 is shared with external interrupt input (INT).

Input ports with a latch, with built-in pull-up resistor.P2.2

—

Crystal connection pins for clock oscillation.

The latch is

reset.

Oscillation

waveform

"1"

"0"

"0"P8.0 to 8.3

TEST

RESET

V

DD

—

O

I

Input pin for system reset.

Power supply voltage pins.

GND

Note: 1. The pins except for pins P2.0 to P2.3 are pseudo bidirectional ports.

2. When each port is used for output, the MSM6408 can drive one TTL (one input).

Pulse output(Test pin for manufacturer)

—

5/19

INSTRUCTION LIST

Mnemonic Byte DescriptionCode Cycle

LAI n 1 A¨n9n 1

LLI n 1 L¨n8n 1

LHLI nn 2 HL¨nn15nn 2

LMI nn 2 M(w)¨nn14nn 2

LAL 1 A¨L21 1

LLA 1 L¨A2D 1

LAH 1 A¨H22 1

LHA 1 H¨A2E 1

LAM 1 A¨M38 1

LMA 1 M¨A2F 1

LAM+ 1 A¨M, L¨L + 1,Skip if L = 024 1

LAM– 1 A¨M, L¨L – 1,Skip if L = F25 1

LMA+ 1 M¨A, L¨L + 1,Skip if L = 026 1

LMA– 1 M¨A, L¨L – 1,Skip if L = F27 1

Load, Push, PopExchange

LAMM n

LAMD mm 2 A¨Md10mm 2

LMAD mm 2 Md¨A11mm 2

LMTD mm 2 Md(w)¨T (M(w), A), T = ROM table19mm 3

LMCT 2 M(w)¨CT3E59 2

LCTM 2 CT¨M(w)3E51 2

LMSR 2 M(w)¨SR3E5A 2

LSRM 2 SR¨M(w)3E52 2

LTMM 2 TM¨(M(w), A)3E50 2

PUSH 1 ST¨C, A, H, L, SP¨SP – 41C 3

POP 1 C, A, H, L, ¨ST SP¨SP + 41D 3

X1A´M28 1

XM n

X+ 1 A´M, L¨L+1, Skip if L = 03C 1

X– 12C 1

INA 1 A¨A + 1, Skip if A = 030 1

INM 1 A¨M + 1, Skip if M = 033 1

INL 1 L¨L + 1, Skip if L = 031 1

Decrement

Increment/

2

39-3B 1

29-2B 1

1A¨M, H¨H n

1A´M, H¨H n

MSM6408¡ Semiconductor

2

A´M, L¨L–1, Skip if L = F

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