OKI MSM5117800D-50TS-K, MSM5117800D-70TS-L, MSM5117800D-60TS-L, MSM5117800D-50TS-L, MSM5117800D-50JS Datasheet
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Semiconductor
M SM5117800D
2,097,152-Word
´´´´
8-Bit DYNA MIC RAM : FAST PAGE MODE TY PE
DESCRIPTION
The MSM5117800D is a 2,097,152-word ´ 8-bit dynamic RAM fabricated in Oki’s silicon-gate CMOS
technology. The MSM5117800D achieves high integration, high-speed operation, and low-power consumption
because Oki manufactures the device in a quadruple-layer polysilicon/double-layer metal CMOS process. The
MSM5117800D is available in a 28-pin plastic SOJ, 28-pin plastic TSOP.
FEATURES
·
2,097,152-word ´ 8-bit configuration
·
Single 5V power supply, ±10% tolerance
·
Input : TTL compatible, low input capacitance
· Output : TTL compatible, 3-state
· Refresh : 2048 cycles/32 ms
· Fast page mode, read modify write capability
·
CAS before RAS refresh, hidden refresh, RAS-only refresh capability
· Multi-bit test mode capability
· Package options:
28-pin 400mil plastic SOJ (SOJ28-P-400-1.27) (Product : MSM5117800D-xxJS)
28-pin 400mil plastic TSOP (TSOPII28-P-400-1.27-K) (Product : MSM5117800D-xxTS-K)
(TSOPII28-P-400-1.27-L) (Product : MSM5117800D-xxTS-L)
xx : indicates speed rank.
PRODUCT FAMILY
Access Time (Max.) Power Dissipation
Family
t
RAC
t
AA
t
CAC
t
OEA
Cycle Time
(Min.)
Operating (Max.) Standby (Max.)
MSM5117800D-50 50ns 25ns 13ns 13ns 90ns 550mW
MSM5117800D-60 60ns 30ns 15ns 15ns 110ns 495mW
MSM5117800D-70 70ns 35ns 20ns 20ns 130ns 440mW
5.5mW
This version:Apr.1999
MSM5117800D
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PIN CONFIGRATION (TOP VIEW)
Pin Name Function
A0–A9, A10R Address Input
RAS Row Address Strobe
CAS Column Address Strobe
DQ1–DQ8 Data Input/Data Output
OE Output Enable
WE Write Enable
V
CC
Power Supply (5V)
V
SS
Ground (0V)
NC No Connection
28-Pin Plastic SOJ
28-Pin Plastic TSOP
(L T
y
pe)
1
2
3
4
5
6
7
9
10
11
12
13
26
25
24
23
22
21
19
18
17
16
15
27DQ1
DQ2
V
CC
V
CC
V
SS
V
SS
DQ6
A8
A7
A6
A10R
A1
A2
A3
WE
RAS
NC
DQ3
A5
A4
OE
DQ8
DQ7
CAS
8
DQ4
20
A9
14
A0
DQ5
281
2
3
4
5
6
7
9
10
11
12
13
26
25
24
23
22
21
19
18
17
16
15
27DQ1
DQ2
V
CC
V
CC
V
SS
V
SS
DQ6
A8
A7
A6
A10R
A1
A2
A3
WE
RAS
NC
DQ3
A5
A4
OE
DQ8
DQ7
CAS
8
DQ4
20
A9
14
A0
DQ5
28
1
2
3
4
5
6
8
9
10
11
12
13
28
27
26
23
22
21
19
18
17
16
15
20
DQ1
DQ2
V
CC
V
CC
V
SS
V
SS
DQ8
DQ7
A9
A8
A7
A6
A0
A1
A2
A3
WE
RAS
NC
A10R
A5
A4
CAS
OE
7
DQ4
14
DQ3
25
24
DQ6
DQ5
28-Pin Plastic TSOP
(K T
y
pe)
MSM5117800D
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BLOCK DIAGRAM
A
0 – A9
8
8
8
10
11
10
Timing
Generator
Column
Address
Buffers
Internal
Address
Counter
Row
Address
Buffers
Refresh
Control Clock
Column Decoders
Sense Amplifiers
Memory
Cells
Word
Drivers
Row
Deco-
ders
I/O
Selector
Input
Buffers
Output
Buffers
DQ1 – DQ
8
OE
WE
RAS
CAS
VCCV
SS
On Chip
V
BB
Generator
I/O
Controller
On Chip
IV
CC
Generator
8
8
8
10
A10R
1
MSM5117800D
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ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Parameter Symbol Rating Unit
Voltage on Any Pin Relative to V
SS
VIN, V
OUT
-
0.5 to V
CC
+ 0.5
V
Voltage VCC supply Relative to V
SS
V
CC
0.5 to 7.0 V
Short Circuit Output Current
I
OS
50 mA
Power Dissipation
P
D*
1W
Operating Temperature
T
opr
0 to 70 °C
Storage Temperature
T
stg
-
55 to 150
°C
*: Ta = 25°C
Recommended Operating Conditions
(Ta = 0°C to 70°C)
Parameter Symbol Min. Typ. Max. Unit
V
CC
4.5 5.0 5.5 V
Power Supply Voltage
V
SS
000V
Input High Voltage
V
IH
2.4
¾
V
CC
+
0.5
*1
V
Input Low Voltage
V
IL
-
0.5
*2
¾
0.8 V
Notes: *1. The input voltage is VCC + 2.0V when the pulse width is less than 20ns (the pulse width is with
respect to the point at which V
CC
is applied).
*2. The input voltage is V
SS
- 2.0V when the pulse width is less than 20ns (the pulse width respect to
the point at which V
SS
is applied).
Capacitance
(VCC = 5V ± 10%, Ta = 25°C, f=1MHz )
Parameter Symbol Typ. Max. Unit
Input Capacitance (A0 – A9, A10R)
C
IN1
¾
5pF
Input Capacitance
(RAS, CAS, WE, OE)
C
IN2
¾
7pF
Output Capacitance (DQ1 – DQ8)
C
I/O
¾
7pF
MSM5117800D
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DC Characteristics
(VCC = 5V ± 10%, Ta = 0°C to 70°C)
MSM5117800
D-50
MSM5117800
D-60
MSM5117800
D-70
Parameter
Symbol
Condition
Min.
Max
Min.
Max
Min.
Max
Unit Note
Output High Voltage
V
OH
IOH = -5.0mA
2.4 V
CC
2.4 V
CC
2.4 V
CC
V
Output Low Voltage
V
OLIOL
= 4.2mA
00.400.400.4V
Input Leakage
Current
I
LI
0V £ VI £ 6.5V ;
All other pins not
under test = 0V
-
10
10
-
10
10
-
10
10
m
A
Output Leakage
Current
I
LO
DQ disable
0V £ V
O
£ V
CC
-
10
10
-
10
10
-
10
10
m
A
Average Power
Supply Current
(Operating)
I
CC1
RAS, CAS cycling,
t
RC
= Min.
¾
100
¾
90
¾
80 mA 1,2
RAS, CAS = V
IH
¾
2
¾
2
¾
2
Power Supply
Current
(Standby)
I
CC2
RAS, CAS
³
V
CC
– 0.2V
¾
1
¾
1
¾
1
mA 1
Average Power
Supply Current
(RAS-only Refresh)
I
CC3
RAS cycling,
CAS = V
IH
,
t
RC
= Min.
¾
100
¾
90
¾
80 mA 1,2
Power Supply
Current
(Standby)
I
CC5
RAS = VIH,
CAS = V
IL
,
DQ = enable
¾
5
¾
5
¾
5mA1
Average Power
Supply Current
(CAS before RAS
Refresh)
I
CC6
RAS = cycling,
CAS before RAS
¾
100
¾
90
¾
80 mA 1,2
Average Power
Supply Current
(Fast Page Mode)
I
CC7
RAS = VIL,
CAS cycling,
t
PC
= Min.
¾
80
¾
70
¾
60 mA 1,3
Notes: 1. ICC Max. is specified as ICC for output open condition.
2. The address can be changed once or less while RAS = V
IL
.
3. The address can be changed once or less while CAS = V
IH
.
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