OKI 8p, 8w Troubleshooting Manual

OKIPAGE8

LED Page Printer

Troubleshooting Manual with Component Parts List

(ODA/OEL/INT)

All specifications are subject to change without notice.

CONTENTS

1. OUTLINE..................................................................................................... 1

2. TOOLS........................................................................................................ 1

3. CIRCUIT DESCRIPTION............................................................................ 2

3.1 Outline ..................................................................................................................... 2

3.2 CPU and Memory .................................................................................................... 4

3.3 Reset Control........................................................................................................... 6

3.4 EEPROM Control..................................................................................................... 7

3.5 Centronics Parallel Interface.................................................................................... 8

3.6 Front Operator Panel ............................................................................................... 9

3.7 LED Head Control ................................................................................................. 10

3.8 Motor and clutch control ........................................................................................ 12

3.9 Fuser Temperature Control.................................................................................... 14

3.10 Sensor Control....................................................................................................... 17

3.11 Cover Open ........................................................................................................... 18

3.12 Power Supply Part ................................................................................................. 19

4. TROUBLESHOOTING.............................................................................. 21

4.1 Troubleshooting T able ............................................................................................ 21

4.2 Troubleshooting Flowchart..................................................................................... 23

5. CIRCUIT DIAGRAM.................................................................................. 27

6. COMPONENT PARTS LIST

1. OUTLINE

This manual has been written to provide guidance for troubleshooting of the OKIPAGE8p Printer (primarily for its printed circuit boards), on an assumption that the reader is knowledgeable of the printer. Read the maintenance manual for this printer if necessary.

Note:

1. High voltage power supply board and power supply unit containing a high voltage power supply is dangerous. From the viewpoint of the safety standards, the local repairing of a defective board is not allowed. Thus, the objects to be locally repaired as a result of troubleshooting are switches.

2. TOOLS

For troubleshooting the printer, the tools listed below may be needed in addition to general maintenance tools.

Oscilloscope Frequency response 100 MHz or higher

Soldering iron A slender tip type, 15-20 watts

Tool Remarks

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3. CIRCUIT DESCRIPTION

3.1 Outline

The circuit of OKIPAGE8p consists of a main control board, a main high voltage power supply board, a sub-high voltage power supply board and a power supply unit. The block diagram is shown in Fig. 3-1. The main control board controls the reception and transmission of data with a host I/f and processes command analysis, bit image development, raster buffer read. It also controls the engine and high voltage outputs.

(1) Reception control

The main control board has one parallel I/F port which is compliant to the IEEE 1284 specification. The parallel I/F port can specify the following item when set by the control panel:

I-PRIME: Enabled/ Disabled

(2) Command analysis processing

The OKIPAGE8p printers support PCL5e (Hewlett Packard LJ6P compatible). An edit task fetches data from the receive buffer, analizes commands, and reconstructs the data in such a way that print data are aligned from up to down and from right to left; then it writes the resultant data into a page buffer with such control data as print position coordinate, font type, etc. added.

(3) Font Processing

When one page editing is finished, a developing task makes an engine start and fetches data from the page buffer synchronizing with a printing operation; then it developes the fetched data to a bit map as referring to data from a character generator, and writes the resultant data into the raster buffer (of band buffer structure).

(4) Raster buffer read

As controlling the engine operation, an engine task sends data from the raster buffer to the LED head.

(5) High voltage control (main, sub)

The high voltage control circuit in the CPU.

The high voltage power supply board generates high voltage outputs, and have sensors, LED for display. The power supply unit generates +26VDC output, +5DC output.

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PLUNGER LED HEAD

Motor

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HEAD2HEAD1PJ

Figure 3-1 OKIPAGE8p Block Diagram

Parallel

I/F

CENT

LS07

+5V+26V

POWER

MOTOR Main PCB NMA-

0V5V

0VP0V

Motor Driver

MTD2005F

CPU

(NKK3 or 5)

Data Bus

Address Bus

OSC

7MHz

RST

EEPROM

Serial I/F

(x16)

LC26023A

1kb

OSC

10MHz

LSI

HIVOL

DRAM 2MB

M-ROM 4M x 16

Mask ROM 8MB

HC244

HIVOL2

Red Amber

Amber

DRAM

1M x 16

OPTION

O P

I O N

PCB N4A-

DRAM

1M x 16

DRAM 4MB

Power Supply Unit

(120V/ 230V)

Heater

(Halogen lamp)

High Voltage Power Unit

P2H

High Voltage Power Unit

P6L

ID Unit

3.2 CPU and Memory

(1) CPU (NKK3 or NKK5)

CPU core RISC CPU (MIPS R3000) CPU clock 7.067 MHz, Internal CPU CLK 28.268 MHz Data bus width External 16 bits, Internal 32 bits

(2) Program ROM

ROM capacity 8M-bytes (Mask ROM) ROM type 64Mbits (4M x 16 bits) Access time 100 nsec

(3) Resident RAM

RAM capacity 2M bytes (1Mx 16 bits) RAM type 16M bits (1M x 16 bits) Access time 60 ns

(4) Option Board

RAM capacity 4M bytes (16M bits D-RAM two pieces) RAM type 16M bits D-RAM two pieces Access time 60 n

The block diagram of CPU and memory circuit is shown in Fig. 3-2.

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CPU

CS0

RAS0 RAS1 RAS2

A00 to A25

D00 to D15

CS0

Mask ROM

(4M x 16 bits)

CAS0 CAS1

RAS0

RD/WR

CAS0, 1

RAS1, 2CAS0, 1 WR

RAS1, 2 WR

CAS0,1

DRAM

(1M x 16 bits)

Main control board

Option board

DRAM

4M Byte

Figure 3-2 Block Diagram of CPU & Memory in OKIPAGE8p

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3.3 Reset Control

When power is turned on, RST-N signal is generated by RST.

+5V+5V

+5V

Power ON

RST

Power OFF

172

CPU

RSTN

CL RST-N

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3.4 EEPROM Control

The BR93LC46A on the main control board is an electrical erasable/programmable ROM of 64bit x 16-bit configuration. Data input to and output from the ROM are bidirectionally transferred in units of 16 bits through I/O port (EEPRMDT-P) in serial transmission synchronized with a clock signal from the CPU.

The EEPROM operates in the following instruction modes.

Instruction Start bit Operation Address Data

Read (READ) 1 10 A5 to A0

Write Enabled (WEN) 1 00 11XXXX

Write (WRITE) 1 01 A5 to A0 D15 to D0

CPU

154

150

151

SSTXD-P

EEPRMCSO-P

EEPRMCLK-P

code

DI DO

EEPROM

IC4

Write All Address (WRAL) 1 00 01XXXX D15 to D0

Write Disabled (WDS) 1 00 00XXXX

Erase 1 11 A5 to A0

Chip Erasable (ERAL) 1 00 10XXXX

Write cycle timing (WRITE)

1 2 4 9 10 25

10 1

HIGH-Z

A5 A4 A1 A0 D15

D14

D1 D0

Min. 450 ns

STATUS

Max. 500 ns

BUSY READY

Max. 10 ms

Read cycle timing (READ)

110

A5 A4 A1 A0

910

25 26

HIGH-Z

D15 D14 D1 D00 D15 D14

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3.5 Centronics Parallel Interface

The CPU sets a BUSY-P signal to ON at the same time when it reads the parallel data (PDATA1P to PDATA 8-P) from the parallel port at the fall of PSTB-N signal. Furthermore, it makes the store processing of received data into a receive buffer terminate within a certain fixed time and outputs an ACK-N signal, setting the BUSY-P signal to OFF.

87, 88, 91 to 96

CPU

PDATA1-P to PDATA8-P

PSTB-N

PBUSY-P

PACK-N

PRE-P

PSEL-P

PERROR-P

PINIT-N

PSELIN-N

PALITOFD-N

2 to 9

CENT

DATA8-P

DATA1-P STB-N

BUSY-P

ACK-N PE-P

SEL-P

FAULT-N

IPRIME-N SELIN-N AUTOFEED-N

PARALLEL DATA (DATA BITs 1 to 8)

DATA STOROBE

BUSY

ACKNOWLEDGE

0.5 µs min.

0.5 µs max.

0 min.

0.5 µs to 10 µs

+5V+5V or High Level

0.5 µs min.

0 min.

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3.6 Front Operator Panel

Front operator panel have three LED lamps and a switch on the main control board which is connected to by the CPU.

The light from the LED lamp can be seen on the Lens Cover through the LED Lens.

CPU

110

Ready (Amber)

114

Manual Feed (Amber)

113

Error (Red)

161

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3.7 LED Head Control

An LED correcting head, which is capable of correcting the illumination of the LED for each dot, is being used in this printer. LED illumination correction function of 16 steps is carried out by using an EEPROM which is installed in the LSI that maintains the LED illumination correction values, and an LED correction drivers (MSM6731BWAF or MSM6732BWAF) together as a pair.

The LED correcting head consists of the correction control LSI (MSM6730WAF), LED drivers (MSM6731BWAF or MSM6732BWAF), and an LED array.

From

CPU

STRB1-N STRB2-N STRB3-N STRB4-N

LOADI

CLOCKI

DATAI0 DATAI1 DATAI2 DATAI3

MSM6730

WAF

EEPROM

Correction

Values

LED Driver

MSM6732BWAF

LED Array

LED LED LED LED LED LED LED

LED Driver

MSM6731BWAF

Printing and correction data combined signal line Correction data signal line

LED Driver

MSM6731BWAF

LED Driver

MSM6732BWAF

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CLOCKI

LOADI

DATAI3~0

STRB1I-N

STRB2I-N

STRB3I-N

STRB4I-N

Normal Mode Printing Timing Chart

First line printing data sent Second line printing data sent

First line printing

The printing operation is carried out in the following sequence. First, the printing data DATAI3 through DATAI0 are stored, sequentially shifted, in the shift registers of the LED drivers, by the printing data synchronous clock, CLOCKI. Then the printing data stored in shift registers are latched by the high level pulse of LOADI. The latched printing data turns the LEDs on by STRB1IN through STRB4I-N and actuates printing.

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3.8 Motor and clutch control

The electromagnetic clutch is driven by a control signal from the CPU and the drive circuit shown below. The main motor is driven by the control signals from the CPU and the driver IC.

CPU

DMON1N

DMPH1P DMPH2P

127

132 131

MTDV

+5V

ENA A

To Out3, 4Logic

DECAY

PHASE A PHASE B

Motor

Out1

SW1 SW3

GATE CIRCUIT

Main Motor

+26V OPEN

37 1 1412 24

Out2 Out3

Out4Vmm A Vmm B

ALARM

120°C 140°C

ENA B

SW1 SW3

GATE CIRCUIT

Signal of

DECACY

+5V +26V

RMONN

128

(1) Main motor

+5V

BRUNK

SW4SW2

Current

Sensor

OSC

Vref A Vref B

Vs A Vs BRs A Rs BLG A PG LG B

23 22 28 15 10 21 20TAB5

Electromagnetic clutch

0VP

SW4SW2

Current

Sensor

DMON-P

DMPH1-P

DMPH2-P

Rotation

T0 T1 T2 T3

Forward rotation

Reverse rotationStop

Operation at normal speed: T0 to T3 = 0.781 ms

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(2) Motor drive control

Time T0 to T3 determines the motor speed, while the phase different direction between phase signals DMPH1-P and DMPH2-P determines the rotation direction. DMON-N signal control a motor coil current. According to the polarity of the phase signal, the coil current flow as follows:

1) +26V → SW1 → motor coil → SW4 → resistor → earth

2) +26V → SW3 → motor coil → SW2 → resistor → earth The drop voltage across the resistor is input to comparator, where it is compared with a

reference voltage. If an overcurrent flows, a limiter operates to maintain it within a certain fixed current.

(3) Electromagnetic clutch control

Mechanical operation mode is switched by the combination of the clutch status and the direction of motor rotation.

clutch status

off off

on on

rotation direction

Forward Reverse

operation mode

cleaning

Hopping from manual

feed slot

illegal operation

Hopping from tray

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3.9 Fuser Temperature Control

For the temperature control by heater control, the variation in the resistance of the thermistor is A/D converted in LSI and the resultant digital value is read and transferred to the CPU. The CPU turns on or off the HTON-N signal according to the value of the signal received from LSI to keep the temperature at a constant level. Immediately after the power is turned on, the thermistor is checked for shortcircuit and breakdown. If the thermistor is shorted, the A/D converted value shows an abnormally high temperature, so that the shortcircuit can be detected. If the breakdown of the thermistor occurs, the A/D converted value shows the normal temperature. In this case, the thermistor breakdown can be detected by the sequence shown at the end of this section. If the heater is overheated, 5V supply is turned off when the resistance of the thermistor is detected to be exceeding the predetermined value.

Main Control BoardHigh Voltage Power Supply Board

CN2

Thermistor

Heater

TH1

TH2

Power Supply Unit

CN1

1 2 PC1

ACIN

LSI CPU

Abnormally

High

Temperature

Detection

Circuit

HTON

116

Shutdown

Circuit

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Flowchart of Thermistor Circuit Check

START

HEATER OFF

Short check timer(t16)set

Time-out ?

Short error TEMP ?

Thermistor error check

timer (t2) set

Thermistor disconnection

check timer (t35) set

Heater On

Temperature > Tn

Thermistor

error check timer (t2)

within time

Yes

Thermistor short error

End

Yes

To constant

temperature control

Fuser error

Thermistor

disconnection check timer

(t35) within time

Yes

t2 =

90 sec

t16 =

520 msec

t35 =

10 sec

A/D value changed?

Yes

Thermistor

disconnection error

End

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Thermistor gain change (THERMCMP-N"0" "Z")

A/D value more than

End

20H?

Yes

Fuser error

End

Temperature

Controlled

Temperature

HEATER ON

OFF

Time

Temperature table

THERMCMP-N

O Z

T 145˚C: 150˚C: 155˚C: 160˚C: 165˚C:

Heater control mode Normal operation Fuser Error Check

Paper Thickness light medium light medium medium heavy heavy

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3.10 Sensor Control

The CPU supervises the state of each sensor every 40 ms.

Main Control Board High Voltage Power Supply Board

HIVOL CN1

+5V

CPU

Sensor signal

124

120

122

123

OFF

+5V

TNRSNS-N

PSIN-N

PSOUT-N

WRSNS-N

TransparentShield

PS1

PS2

PS3

PS4

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3.11 Cover Open

When the cover is opened, a cover open microswitch is opened. This makes a CVOPN-N signal low, thereby the CPU detects that cover is open. Furthermore, opening the cover stops applying a +5V power to the high voltage power supply part, resulting in stopping all high voltage outputs.

HIVOL CN1

Main Control Board

CVOPN-N

CPU

+5V

125

Cover close Cover open

CVOPN-N

Cover Open Microswitch

+5V

High Voltage Power Supply Board

High

Voltage

Power

Supply

+5V

Part

High

voltage

output

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