NXP PDTD113ZT Schematic [ru]
PDTD113ZT
NPN 500 mA, 50 V resistor-equipped transistor;
R1 = 1 kΩ, R2 = 10 kΩ
Rev. 02 — 23 March 2009 Product data sheet
1. Product profile
1.1 General description
NPN 500 mA Resistor-Equipped Transistor (RET) in a small Surface-Mounted
Device (SMD) plastic package.
PNP complement: PDTB113ZT.
1.2 Features
n Built-in bias resistors n Reduces component count
n Simplifies circuit design n Reduces pick and place costs
n 500 mA output current capability n ±10 % resistor ratio tolerance
1.3 Applications
n Digital application in automotive and
industrial segments
n Controlling IC inputs n Switching loads
n Cost-savingalternative forBC817 series
in digital applications
1.4 Quick reference data
Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
V
CEO
I
O
R1 bias resistor 1 (input) 0.7 1 1.3 kΩ
R2/R1 bias resistor ratio 9 10 11
collector-emitter voltage open base - - 50 V
output current - - 500 mA
NXP Semiconductors
2. Pinning information
Table 2. Pinning
Pin Description Simplified outline Graphic symbol
1 input (base)
2 GND (emitter)
3 output (collector)
3. Ordering information
Table 3. Ordering information
Type number Package
PDTD113ZT - plastic surface-mounted package; 3 leads SOT23
PDTD113ZT
NPN 500 mA resistor-equipped transistor; R1 = 1 kΩ, R2 = 10 kΩ
3
R1
1
12
Name Description Version
R2
sym007
3
2
4. Marking
Table 4. Marking codes
Type number Marking code
PDTD113ZT *7V
[1] * = -: made in Hong Kong
* = p: made in Hong Kong
* = t: made in Malaysia
* = W: made in China
5. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
CBO
V
CEO
V
EBO
V
I
I
O
[1]
collector-base voltage open emitter - 50 V
collector-emitter voltage open base - 50 V
emitter-base voltage open collector - 5 V
input voltage
positive - +10 V
negative - −5V
output current - 500 mA
PDTD113ZT_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 23 March 2009 2 of 9
NXP Semiconductors
PDTD113ZT
NPN 500 mA resistor-equipped transistor; R1 = 1 kΩ, R2 = 10 kΩ
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
P
tot
T
j
T
amb
T
stg
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
total power dissipation T
junction temperature - 150 °C
ambient temperature −65 +150 °C
storage temperature −65 +150 °C
6. Thermal characteristics
Table 6. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
R
th(j-a)
thermal resistance from
junction to ambient
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
7. Characteristics
Table 7. Characteristics
T
=25°C unless otherwise specified.
amb
Symbol Parameter Conditions Min Typ Max Unit
I
CBO
I
CEO
I
EBO
h
FE
V
CEsat
V
I(off)
V
I(on)
R1 bias resistor1 (input) 0.7 1 1.3 kΩ
R2/R1 bias resistor ratio 9 10 11
C
c
collector-base cut-off
current
collector-emitter cut-off
current
emitter-base cut-off
current
DC current gain VCE=5V; IC=50mA 70 - collector-emitter
saturation voltage
off-state input voltage VCE=5V; IC= 100 µA 0.3 0.6 1 V
on-state input voltage VCE= 0.3 V; IC= 20 mA 0.4 0.8 1.4 V
collector capacitance VCB=10V; IE=ie=0A;
…continued
≤ 25 °C
amb
in free air
[1]
- 250 mW
[1]
- - 500 K/W
VCB=40V; IE= 0 A - - 100 nA
=50V; IE= 0 A - - 100 nA
V
CB
VCE=50V; IB= 0 A - - 0.5 µA
VEB=5V; IC= 0 A - - 0.8 mA
IC= 50 mA; IB= 2.5 mA - - 0.3 V
-7-pF
f = 100 MHz
PDTD113ZT_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 23 March 2009 3 of 9
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