NXP 74LVC 1G3157GW Datasheet

Page 1

74LVC1G3157

2-channel analog multiplexer/demultiplexer

Rev. 5 — 6 December 2012 Product data sheet

1. General description

The 74LVC1G3157 provides one analog multiplexer/demultiplexer with one digital select input (S), two independent inputs/outputs (Y0, Y1) and a common input/output (Z).

Schmitt trigger action at the select input makes the circuit tolerant of slower input rise and fall times across the entire V

2. Features and benefits

 Wide supply voltage range from 1.65 V to 5.5 V  Very low ON resistance:

 7.5  (typical) at V  6.5  (typical) at V

 6  (typical) at V  Switch current capability of 32 mA  Break-before-make switching  High noise immunity  CMOS low power consumption  TTL interface compatibility at 3.3 V  Latch-up performance meets requirements of JESD 78 Class I  ESD protection:

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V  Control input accepts voltages up to 5.5 V  Multiple package options  Specifie d from 40 C to +85 C and from 40 C to +125 C

range from 1.65 V to 5.5 V.

=2.7V

=3.3V

=5V

Page 2

NXP Semiconductors

001aac354

64S

1 3

001aac355

3. Ordering information

74LVC1G3157

2-channel analog multiplexer/demultiplexer

Table 1. Ordering information

Type number Package

Temperature range Name Description Version

74LVC1G3157GW 40 C to +125 C SC-88 plastic surface-mounted package; 6 leads SOT363 74LVC1G3157GV 40 C to +125 C SC-74 plastic surface-mounted package (TSOP6); 6 leads SOT457 74LVC1G3157GM 40 C to +125 C XSON6 plastic extremely thin small outline package; no leads;

SOT886

6 terminals; body 1  1.45  0.5 mm

74LVC1G3157GF 40 C to +125 C XSON6 plastic extremely thin small outline package; no leads;

SOT891

6 terminals; body 1  1  0.5 mm

74LVC1G3157GN 40C to +125 C XSON6 extremely thin small outline package; no leads;

SOT1115

6 terminals; body 0.9  1.0  0.35 mm

74LVC1G3157GS 40 C to +125 C XSON6 extremely thin small outline package; no leads;

SOT1202

6 terminals; body 1.0  1.0  0.35 mm

4. Marking

Table 2. Marking

Type number Marking code

74LVC1G3157GW YJ 74LVC1G3157GV YJ 74LVC1G3157GM YJ 74LVC1G3157GF YJ 74LVC1G3157GN YJ 74LVC1G3157GS YJ

[1]

[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.

5. Functional diagram

Fig 1. Logic symbo l Fig 2. Logic diagram

Product data sheet Rev. 5 — 6 December 2012 2 of 25

Page 3

NXP Semiconductors

74LVC1G3157

Y1 S

GND

Y0 Z

001aac356

74LVC1G3157

GND

001aac357

Transparent top view

74LVC1G3157

GND

001aaf546

Transparent top view

6. Pinning information

6.1 Pinning

74LVC1G3157

2-channel analog multiplexer/demultiplexer

Fig 3. Pin configuration SOT363

and SOT457

Fig 4. Pin configuration SOT886 Fig 5. Pin configuration SOT891,

SOT1115 and SOT1202

6.2 Pin description

Table 3. Pin description

Symbol Pin Description

Y1 1 independent input or output GND 2 ground (0 V) Y0 3 independent input or output Z 4 common output or input V

S 6 select input

5 sup ply voltage

7. Functional description

Table 4. Function table

Input S Channel on

LY0 HY1

[1] H =HIGH voltage level; L = LOW voltage level.

[1]

Product data sheet Rev. 5 — 6 December 2012 3 of 25

Page 4

NXP Semiconductors

8. Limiting values

74LVC1G3157

2-channel analog multiplexer/demultiplexer

Table 5. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions Min Max Unit

GND

stg

tot

[1] The minimum input voltage rating may be exceeded if the input current rating is observed. [2] The minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed. [3] For SC-88 and SC-74 packages: above 87.5 C the value of P

For XSON6 package: above 118C the value of P

supply voltage 0.5 +6.5 V input voltage

[1]

0.5 +6.5 V input clamping current VI< 0.5 V or VI>VCC + 0.5 V 50 - mA switch clamping current VI< 0.5 V or VI>VCC + 0.5 V - 50 mA switch voltage enable and disable mode

[2]

0.5 VCC + 0.5 V switch current VSW> 0.5 V or VSW< VCC + 0.5 V - 50 mA supply current - 100 mA ground current 100 - mA storage temperature 65 +150 C total power dissipation T

= 40 Cto+125C

amb

derates linearly with 4.0 mW/K.

tot

derates linearly with 7.8 mW/K.

tot

[3]

- 250 mW

9. Recommended operating conditions

Table 6. Recommended operating conditions

Symbol Parameter Conditions Min Typ Max Unit

amb

t/V input transition rise and fall rate V

[1] To avoid sinking GND current from terminal Z when switch current flows in terminal Yn, the voltage drop across the bidirectional switch

must not exceed 0.4 V. If the switch current flows into terminal Z, no GND current will flow from terminal Yn. In this case, there is no limit for the voltage drop across the switch.

[2] Applies to control signal levels.

supply voltage 1.65 - 5.5 V input voltage 0 - 5.5 V switch voltage enable and disable mode

[1]

0- VCCV

ambient temperature 40 - +125 C

=1.65Vto2.7V

= 2.7 V to 5.5 V

[2]

--20ns/V

[2]

--10ns/V

Product data sheet Rev. 5 — 6 December 2012 4 of 25

Page 5

NXP Semiconductors

10. Static characteristics

74LVC1G3157

2-channel analog multiplexer/demultiplexer

Table 7. Static characteristics

At recommended operating conditions; voltages are referenced to GND (ground 0 V).

Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit

[1]

Max Min Max

- - 0.65V

- - 0.7V

-0.35VCCV

-V

0.3V

S(OFF)

HIGH-level input voltage

LOW-level input voltage

input leakage current

OFF-state

Min Typ

VCC= 1.65 V to 1.95 V 0.65V

= 2.3 V to 2.7 V 1.7 - - 1.7 - V

= 3 V to 3.6 V 2.0 - - 2.0 - V

= 4.5 V to 5.5 V 0.7V

VCC= 1.65 V to 1.95 V - - 0.35V

= 2.3 V to 2.7 V - - 0.7 - 0.7 V

= 3 V to 3.6 V - - 0.8 - 0.8 V

= 4.5 V to 5.5 V - - 0.3V

pin S; VI=5.5VorGND;

=0Vto5.5V

VCC= 5.5 V; see Figure 6

[2]

- 0.1 2-10 A

- 0.1 5-20 A leakage current

S(ON)

ON-state

VCC= 5.5 V; see Figure 7

[2]

- 0.1 5-20 A leakage current

supply current VI= 5.5 V or GND;

=GNDorVCC; VCC= 1.65 V

[2]

-0.110 - 40A

to 5.5 V

I

additional supply current

input

pin S; VI=VCC 0.6 V; VCC= 5.5 V; VSW = GND or V

[2]

- 5 500 - 5000 A

-2.5- - -pF capacitance

S(OFF)

OFF-state

-6.0- - -pF capacitance

S(ON)

ON-state

-18- - -pF capacitance

[1] Typical values are measured at T [2] These typical values are measured at V

Product data sheet Rev. 5 — 6 December 2012 5 of 25

amb

= 25 C.

=3.3V

Page 6

NXP Semiconductors

001aac358

S Z

Y0 Y1

GND

switch

22V

VIL or V

001aac359

S Z

Y0 Y1

GND

switch

22V

VIL or V

10.1 Test circuits

74LVC1G3157

2-channel analog multiplexer/demultiplexer

VI=VCC or GND and VO=GNDor V

CC.

Fig 6. Test circuit for measuring OFF-state leakage current

VI=VCC or GND and VO= open circuit.

Fig 7. Test circuit for measuring ON-state leakage current

10.2 ON resistance

Table 8. ON resistance

At recommended operating conditions; voltages are referenced to GND (ground 0 V); for graphs see Figure 9 to Figure 14.

Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit

ON(peak)

ON resistance (peak) VI=GNDtoVCC; see Figure 8

Min Typ

ISW=4mA; V

= 1.65 V to 1.95 V

=8mA; VCC= 2.3 V to 2.7 V - 12.0 30 - 45 

=12mA; VCC= 2.7 V - 10.4 25 - 38 

=24mA; VCC= 3 V to 3.6 V - 7.8 20 - 30 

=32mA; VCC= 4.5 V to 5.5 V - 6.2 15 - 23 

- 34.0 130 - 195 

[1]

Max Min Max

Product data sheet Rev. 5 — 6 December 2012 6 of 25

Page 7

NXP Semiconductors

74LVC1G3157

2-channel analog multiplexer/demultiplexer

Table 8. ON resistance

…continued

At recommended operating conditions; voltages are referenced to GND (ground 0 V); for graphs see Figure 9 to Figure 14.

Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit

[1]

Max Min Max

ON(rail)

ON resistance (rail) VI= GND; see Figure 8

ISW=4mA;

Min Typ

-8.218 - 27

VCC= 1.65 V to 1.95 V

=8mA; VCC= 2.3 V to 2.7 V - 7.1 16 - 24 

=12mA; VCC= 2.7 V - 6.9 14 - 21 

=24mA; VCC= 3 V to 3.6 V - 6.5 12 - 18 

=32mA; VCC= 4.5 V to 5.5 V - 5.8 10 - 15 

; see Figure 8

I=VCC

ISW=4mA;

- 10.4 30 - 45 

VCC= 1.65 V to 1.95 V

=8mA; VCC= 2.3 V to 2.7 V - 7.6 20 - 30 

=12mA; VCC= 2.7 V - 7.0 18 - 27 

=24mA; VCC= 3 V to 3.6 V - 6.1 15 - 23 

=32mA; VCC= 4.5 V to 5.5 V - 4.9 10 - 15 

ON(flat)

ON resistance (flatness)

VI=GNDtoV

ISW=4mA;

= 1.65 V to 1.95 V

=8mA; VCC= 2.3 V to 2.7 V - 5.0 - - - 

=12mA; VCC=2.7V - 3.5 - - - 

=24mA; VCC=3Vto3.6V - 2.0 - - - 

=32mA; VCC= 4.5 V to 5.5 V - 1.5 - - - 

[2]

-26.0- - - 

[1] Typical values are measured at T [2] Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical V

temperature.

Product data sheet Rev. 5 — 6 December 2012 7 of 25

= 25 C and nominal VCC.

amb

and

Page 8

NXP Semiconductors

001aac360

S Z

Y0 Y1

GND

switch

22V

VIL or V

VI (V)

054231

mna673

(Ω)

(1)

(2) (3)

(4)

(5)

VI (V)

0 2.01.60.8 1.20.4

001aaa712

(Ω)

(4) (3) (2) (1)

VI (V)

0 2.52.01.0 1.50.5

001aaa708

(Ω)

(1)

(2)

(3) (4)

10.3 ON resistance test circuit and graphs

74LVC1G3157

2-channel analog multiplexer/demultiplexer

RON=VSW / ISW.(1)V

(2) V (3) V (4) V (5) V

= 1.8 V.

= 2.5 V.

= 2.7 V.

= 3.3 V.

= 5.0 V.

Fig 8. Test circuit for measuring ON resistance Fig 9. Typical ON resistance as a function of input

voltage; T

amb

= 25 C

(1) T (2) T (3) T (4) T

Fig 10. ON resistance as a function of input voltage;

Product data sheet Rev. 5 — 6 December 2012 8 of 25

= 125 C.

amb

=85C.

amb

=25C.

amb

= 40 C.

amb

=1.8V

(1) T (2) T (3) T (4) T

Fig 11. ON resistance as a function of input voltage;

= 125 C.

amb

=85C.

amb

=25C.

amb

= 40 C.

amb

VCC=2.5V

Page 9

NXP Semiconductors

001aaa709

VI (V)

0 3.02.01.0 2.51.50.5

(Ω)

(1)

(2)

(3)

(4)

VI (V)

04312

001aaa710

(Ω)

(1) (2)

(3)

(4)

VI (V)

054231

001aaa711

(Ω)

(2)

(4)

(1)

(3)

74LVC1G3157

2-channel analog multiplexer/demultiplexer

(1) T (2) T (3) T (4) T

amb amb amb amb

= 125 C. =85C. =25C. = 40 C.

Fig 12. ON resistance as a function of input voltage;

VCC=2.7V

amb amb amb amb

= 125 C. =85C. =25C. = 40 C.

(1) T (2) T (3) T (4) T

Fig 13. ON resistance as a function of input voltage;

VCC=3.3V

(1) T

amb

(2) T

Fig 14. ON resistance as a function of input voltage; VCC=5.0V

Product data sheet Rev. 5 — 6 December 2012 9 of 25

(3) T (4) T

amb amb amb

= 125 C. =85C. =25C. = 40 C.

Page 10

NXP Semiconductors

11. Dynamic characteristics

74LVC1G3157

2-channel analog multiplexer/demultiplexer

Table 9. Dynamic characteristics

At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see Figure 18.

Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit

Min Typ

propagation delay Z to Yn or Yn to Z; see Figure 15

[2][3]

[1]

Max Min Max

VCC= 1.65 V to 1.95 V - - 2 - 3.0 ns

= 2.3 V to 2.7 V - - 1.2 - 2.0 ns

= 2.7 V - - 1.0 - 1.5 ns

= 3 V to 3.6 V - - 0.8 - 1.5 ns

= 4.5 V to 5.5 V - - 0.6 - 1.0 ns

enable time S to Yn; see Figure 16

[4]

VCC= 1.65 V to 1.95 V 1.0 8.7 14 1.0 14.0 ns

= 2.3 V to 2.7 V 1.0 5.3 7.5 1.0 7.5 ns

= 2.7 V 1.0 4.9 6.0 1.0 6.0 ns

= 3 V to 3.6 V 0.5 4.0 5.5 0.5 5.5 ns

= 4.5 V to 5.5 V 0.5 3.0 4.0 0.5 4.0 ns

dis

disable time S to Yn; see Figure 16

[5]

VCC= 1.65 V to 1.95 V 2.5 6.0 8.5 2.5 8.5 ns

= 2.3 V to 2.7 V 2.0 4.4 6.0 2.0 6.0 ns

= 2.7 V 1.5 4.2 5.0 1.5 5.0 ns

= 3 V to 3.6 V 1.5 3.6 4.5 1.5 4.5 ns

= 4.5 V to 5.5 V 0.8 2.9 3.5 0.8 3.5 ns

b-m

break-before-make time

see Figure 17

VCC= 1.65 V to 1.95 V 0.5 - - 0.5 - ns

= 2.3 V to 2.7 V 0.5 - - 0.5 - ns

=2.7V 0.5 - - 0.5 - ns

=3Vto3.6V 0.5 - - 0.5 - ns

= 4.5 V to 5.5 V 0.5 - - 0.5 - ns

[6]

[1] Typical values are measured at T [2] t

is the same as t

[3] Propagation delay is the calculated RC time constant of the typical ON resistance of the switch and the specified capacitance when

driven by an ideal voltage source (zero output impedance).

is the same as t

[4] t

[5] t

is the same as t

dis

[6] Break-before-make specified by design.

Product data sheet Rev. 5 — 6 December 2012 10 of 25

PLH

PZH

PLZ

and t

and t and t

PHL

PZL PHZ

=25C and nominal VCC.

amb

Page 11

NXP Semiconductors

PLH

PHL

GND

Yn or Z

input

Z or Yn

output

001aac361

PLZ

PHZ

switch

disabled

switch

enabled

switch

enabled

output LOW to OFF OFF to LOW

output HIGH to OFF OFF to HIGH

S input

GND

PZL

PZH

001aac362

1 1.1 Waveforms and test circuits

Measurement points are given in Table 10. Logic levels: V

Fig 15. Input (Yn or Z) to output (Z or Yn) propaga tio n delays

and VOH are typical output voltage levels that occur with the output load.

74LVC1G3157

2-channel analog multiplexer/demultiplexer

Measurement points are given in Table 10. Logic levels: V

and VOH are typical output voltage levels that occur with the output load.

Fig 16. Enable and disable times

0.5V

VOL+0.3V VOH 0.3 V

Table 10. Measurement points

Supply voltage Input Output V

1.65 V to 5.5 V 0.5V

Product data sheet Rev. 5 — 6 December 2012 11 of 25

Page 12

NXP Semiconductors

001aac367

S Z

Y0 Y1

0.5V

GND

001aag572

b-m

0.9V

0.5V

EXT

mna616

DUT

a. Test circuit

74LVC1G3157

2-channel analog multiplexer/demultiplexer

b. Input and output measurement points

Fig 17. Test circuit for measuring break-before-make timing

Test data is given in Table 11. Definitions test circuit:

= Termination resistance should be equal to output impedance Zo of the pulse generator.

= Load capacitance including jig and probe capacitance.

= Load resistance.

= External voltage for measuring switching times.

EXT

Fig 18. Test circuit for measuring switching times

Product data sheet Rev. 5 — 6 December 2012 12 of 25

Page 13

NXP Semiconductors

74LVC1G3157

2-channel analog multiplexer/demultiplexer

Table 11. Test data

Supply voltage Input Load V V

1.65 V to 1.95 V V

2.3 V to 2.7 V V

2.7 V V 3 V to 3.6 V V

4.5 V to 5.5 V V

EXT

CC CC CC CC CC

tr, t

PLH, tPHL

PZH, tPHZ

 2.0ns 50pF 500 open GND 2V  2.0ns 50pF 500 open GND 2V  2.5ns 50pF 500 open GND 2V  2.5ns 50pF 500 open GND 2V  2.5ns 50pF 500 open GND 2V

PZL, tPLZ

CC CC CC CC CC

11.2 Additional dynamic characteristics

Table 12. Additional dynamic characteristics

At recommended operating conditions; voltages are referenced to GND (ground = 0 V); T

Symbol Parameter Conditions Min Typ Max Unit

THD total harmonic distortion f

(-3dB)



iso

inj

3 dB frequency response RL=50; CL= 5 pF; see Figure 20

isolation (OFF-state) RL=50; CL=5pF; fi=10MHz;

charge injection CL= 0.1 nF; V

=25 C.

amb

= 600 Hz to 20 kHz; RL= 600 ;

CL=50pF; VI= 0.5 V (p-p); see Figure 19

VCC=1.65V - 0.260 - %

= 2.3 V - 0.078 - %

= 3.0 V - 0.078 - %

= 4.5 V - 0.078 - %

VCC=1.65V - 200 - MHz

=2.3V - 300 - MHz

=3.0V - 300 - MHz

=4.5V - 300 - MHz

see Figure 21

VCC=1.65V - 42 - dB

=2.3V - 42 - dB

=3.0V - 40 - dB

=4.5V - 40 - dB

=0V; R

= 1 MHz; RL=1 M; see Figure 22

gen

=0;

VCC= 1.8 V - 3.3 - pC

= 2.5 V - 4.1 - pC

= 3.3 V - 5.0 - pC

= 4.5 V - 6.4 - pC

= 5.5 V - 7.5 - pC

Product data sheet Rev. 5 — 6 December 2012 13 of 25

Page 14

NXP Semiconductors

001aac363

600 Ω

10 μF

0.1 μF

S Z

Y0 Y1

0.5V

GND

switch

22V

VIL or V

001aac364

50 Ω

0.1 μF

S Z

Y0 Y1

0.5V

GND

switch

22V

VIL or V

001aac365

50 Ω

0.1 μF

S Z

Y0 Y1

0.5V

GND

0.5V

switch

22V

VIL or V

11.3 Test circuits

Fig 19. Test circuit for measuring total harmonic distortion

74LVC1G3157

2-channel analog multiplexer/demultiplexer

Adjust fi voltage to obtain 0 dBm level at output. Increase fi frequency until dB meter reads 3dB.

Fig 20. Test circuit for measuring the frequency response when switch is in ON-state

Adjust fi voltage to obtain 0 dBm level at input.

Fig 21. Test circuit for measuring isolation (OFF-state)

Product data sheet Rev. 5 — 6 December 2012 14 of 25

Page 15

NXP Semiconductors

001aac366

S Z

Y0 Y1

GND

gen

switch

1 2

001aac478

ΔV

offonoff

logic

input

(S)

a. Test circuit

74LVC1G3157

2-channel analog multiplexer/demultiplexer

b. Input and output pulse definitions

= VO  CL.

inj

V

= output voltage variation.

= generator resistance.

gen

= generator voltage.

gen

Fig 22. Test circuit for measuring charge injection

Product data sheet Rev. 5 — 6 December 2012 15 of 25

Page 16

NXP Semiconductors

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC JEDEC JEITA

SOT363 SC-88

wBM

pin 1 index

detail X

v M

0 1 2 mm

scale

132

456

Plastic surface-mounted package; 6 leads SOT363

UNIT

max

Qywv

0.1

0.30

0.20

2.2

1.8

0.25

0.10

1.35

1.15

0.65

1.3

2.2

2.0

0.2 0.10.2

DIMENSIONS (mm are the original dimensions)

0.45

0.15

0.25

0.15

1.1

0.8

04-11-08 06-03-16

74LVC1G3157

2-channel analog multiplexer/demultiplexer

12. Package outline

Fig 23. Package outline SOT363 (SC-88)

Product data sheet Rev. 5 — 6 December 2012 16 of 25

Page 17

NXP Semiconductors

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC JEDEC JEITA

SOT457 SC-74

wBM

pin 1 index

detail X

v M

scale

132

0 1 2 mm

Plastic surface-mounted package (TSOP6); 6 leads SOT457

UNIT

Qywv

0.1

0.013

0.40

0.25

3.1

2.7

0.26

0.10

1.7

1.3

0.95

3.0

2.5

0.2 0.10.2

DIMENSIONS (mm are the original dimensions)

0.6

0.2

0.33

0.23

1.1

0.9

05-11-07 06-03-16

74LVC1G3157

2-channel analog multiplexer/demultiplexer

Fig 24. Package outline SOT457 (SC-74)

Product data sheet Rev. 5 — 6 December 2012 17 of 25

Page 18

NXP Semiconductors

74LVC1G3157

2-channel analog multiplexer/demultiplexer

XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm SOT886

(2)

terminal 1 index area

0 1 2 mm

scale

Dimensions (mm are the original dimensions)

Unit

Notes

1. Including plating thickness.

2. Can be visible in some manufacturing processes. Outline

version

SOT886

(1)

max

0.5 0.04 1.50

nom

min

A1b

DEee

1.45

1.40

1.05

1.00

0.95

0.25

0.20

0.17

IEC JEDEC JEITA

0.6

MO-252

0.5

References

0.35

0.40

0.30

0.35

0.27

0.32

sot886_po

European projection

Issue date

04-07-22 12-01-05

Fig 25. Package outline SOT886 (XSON6)

Product data sheet Rev. 5 — 6 December 2012 18 of 25

Page 19

NXP Semiconductors

terminal 1 index area

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC JEDEC JEITA

SOT891

05-04-06 07-05-15

XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm

0 1 2 mm

scale

DIMENSIONS (mm are the original dimensions)

UNIT

0.20

0.12

1.05

0.95

0.35

0.27

max

b E

1.05

0.95

ee1L

0.40

0.32

0.350.55

max

0.5 0.04

6×

(1)

4×

(1)

Note

1. Can be visible in some manufacturing processes.

74LVC1G3157

2-channel analog multiplexer/demultiplexer

Fig 26. Package outline SOT891 (XSON6)

Product data sheet Rev. 5 — 6 December 2012 19 of 25

Page 20

NXP Semiconductors

References

Outline version

European projection

Issue date

IEC JEDEC JEITA

SOT1115

sot1115_po

10-04-02 10-04-07

Unit

max nom

min

0.35 0.04 0.95

0.90

0.85

1.05

1.00

0.95

0.55 0.3

0.40

0.35

0.32

(1)

Dimensions

Note

1. Including plating thickness.

2. Visible depending upon used manufacturing technology.

XSON6: extremely thin small outline package; no leads; 6 terminals; body 0.9 x 1.0 x 0.35 mm

SOT1115

A1b

0.20

0.15

0.12

DEee

0.35

0.30

0.27

0 0.5 1 mm

scale

terminal 1 index area

(4×)

(2)

b 321

6 5 4

(6×)

(2)

74LVC1G3157

2-channel analog multiplexer/demultiplexer

Fig 27. Package outline SOT1115 (XSON6)

Product data sheet Rev. 5 — 6 December 2012 20 of 25

Page 21

NXP Semiconductors

References

Outline version

European projection

Issue date

IEC JEDEC JEITA

SOT1202

sot1202_po

10-04-02 10-04-06

Unit

max nom

min

0.35 0.04 1.05

1.00

0.95

1.05

1.00

0.95

0.55 0.35

0.40

0.35

0.32

(1)

Dimensions

Note

1. Including plating thickness.

2. Visible depending upon used manufacturing technology.

XSON6: extremely thin small outline package; no leads; 6 terminals; body 1.0 x 1.0 x 0.35 mm

SOT1202

A1b

0.20

0.15

0.12

DEee

0.35

0.30

0.27

0 0.5 1 mm

scale

terminal 1 index area

(4×)

(2)

123

6 5 4

(6×)

(2)

74LVC1G3157

2-channel analog multiplexer/demultiplexer

Fig 28. Package outline SOT1202 (XSON6)

Product data sheet Rev. 5 — 6 December 2012 21 of 25

Page 22

NXP Semiconductors

13. Abbreviations

74LVC1G3157

2-channel analog multiplexer/demultiplexer

Table 13. Abbreviations

Acronym Description

CMOS Complementary Metal Oxide Semiconductor TTL Transistor-Transistor Logic HBM Human Body Model ESD ElectroStatic Discharge MM Machine Model DUT Device Under Test

14. Revision history

Table 14. Revision history

Document ID Release date Data sheet status Change notice Supersedes

74LVC1G3157 v.5 20121206 Product data sheet - 74LVC1G3157 v.4 Modifications: 74LVC1G3157 v.4 20111206 Product data sheet - 74LVC1G3157 v.3 74LVC1G3157 v.3 20100916 Product data sheet - 74LVC1G3157 v.2 74LVC1G3157 v.2 20070918 Product data sheet - 74LVC1G3157 v.1 74LVC1G3157 v.1 20050207 Product data sheet - -

• Package outline drawing of SOT886 (Figure 25) modi fied.

Product data sheet Rev. 5 — 6 December 2012 22 of 25

Page 23

NXP Semiconductors

74LVC1G3157

2-channel analog multiplexer/demultiplexer

15. Legal information

15.1 Data sheet status

Document status

Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.

[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) d escribed i n this docu ment may have changed si nce this d ocument was p ublished and may dif fer in case of multiple devices. The latest product statu s

information is available on the Internet at URL http://www.nxp.com.

[1][2]

Product status

[3]

Definition

15.2 Definitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to co nt ain det ailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.

Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.

15.3 Disclaimers

Limited warranty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors.

In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory.

Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semi conductors’ aggregat e and cumulative liabil ity towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors.

Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.

Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the cust omer’s own risk.

Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.

Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products.

NXP Semiconductors does not accept any liability related to any default , damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third part y customer(s). NXP does not accept any liability in this respect.

Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device.

Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer.

No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell product s that is open for accept ance or the gr ant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.

, unless otherwise

Product data sheet Rev. 5 — 6 December 2012 23 of 25

Page 24

NXP Semiconductors

74LVC1G3157

2-channel analog multiplexer/demultiplexer

Export control — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior authorization from competent authorities.

Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It i s neit her qua lif ied nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications.

In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, custome r (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond

NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, da mages or failed produ ct claims result ing from custome r design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications.

Translations — A non-English (t ranslated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions.

15.4 Trademarks

Notice: All referenced brands, prod uct names, service names and trademarks are the property of their respective owners.

16. Contact information

For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com

Product data sheet Rev. 5 — 6 December 2012 24 of 25

Page 25

NXP Semiconductors

17. Contents

1 General description. . . . . . . . . . . . . . . . . . . . . . 1

2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1

3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2

4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2

6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 3

6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3

7 Functional description . . . . . . . . . . . . . . . . . . . 3

8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4

9 Recommended operating conditions. . . . . . . . 4

10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5

10.1 Test circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

10.2 ON resistance. . . . . . . . . . . . . . . . . . . . . . . . . . 6

10.3 ON resistance test circuit and graphs. . . . . . . . 8

11 Dynamic characteristics . . . . . . . . . . . . . . . . . 10

11.1 Waveforms and test circuits . . . . . . . . . . . . . . 11

11.2 Additional dynamic characteristics . . . . . . . . . 13

11.3 Test circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . 14

12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 16

13 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 22

14 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 22

15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 23

15.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 23

15.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

15.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 23

15.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 24

16 Contact information. . . . . . . . . . . . . . . . . . . . . 24

17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

74LVC1G3157

2-channel analog multiplexer/demultiplexer

Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’.

For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 6 December 2012

Document identifier: 74LVC1G3157

NXP 74LVC 1G3157GW Datasheet

Specifications and Main Features

Frequently Asked Questions

User Manual

1. General description

2. Features and benefits

3. Ordering information

4. Marking

5. Functional diagram

6. Pinning information

6.1 Pinning

6.2 Pin description

7. Functional description

8. Limiting values

9. Recommended operating conditions

10. Static characteristics

10.1 Test circuits

10.2 ON resistance

10.3 ON resistance test circuit and graphs

11. Dynamic characteristics

1 1.1 Waveforms and test circuits

11.2 Additional dynamic characteristics

11.3 Test circuits

12. Package outline

13. Abbreviations

14. Revision history

15. Legal information

15.1 Data sheet status

15.2 Definitions

15.3 Disclaimers

15.4 Trademarks

16. Contact information

17. Contents