NXP 74HC 4066D NXP Datasheet

INTEGRATED CIRCUITS

DATA SH EET

74HC4066; 74HCT4066

Quad bilateral switches

Product specification
Supersedes data of 1998 Nov 10

2003 Jun 17

Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

FEATURES

• Very low ON-resistance:
–50Ω(typical) at VCC= 4.5 V
–45Ω(typical) at VCC= 6.0 V
–35Ω(typical) at VCC= 9.0 V.

• Complies with JEDEC standard no. 8-1A

• ESD protection:

HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.

• Specified from −40 to +85 °C and −40 to +125 °C.

QUICK REFERENCE DATA

GND = 0 V; T

=25°C; tr=tf= 6 ns.

amb

SYMBOL PARAMETER CONDITIONS

t

PZH/tPZL

t

PHZ/tPLZ

C

I

C

PD

turn-on time nE to V
turn-off time nE to V

os
os

input capacitance 3.5 3.5 pF
power dissipation

CL= 15 pF; RL=1kΩ; VCC=5V1112ns
CL= 15 pF; RL=1kΩ; VCC=5V1316ns

notes 1 and 2 11 12 pF

capacitance per switch

C

S

maximum switch
capacitance

GENERAL DESCRIPTION

The 74HC4066 and 74HCT4066 are high-speed Si-gate
CMOS devices and are pin compatible with the
HEF4066B. Theyare specified in compliance with JEDEC
standard no. 7A.

The 74HC4066 and 74HCT4066 have four independent
analog switches. Each switch has two input/output pins
(pins nY or nZ) and an active HIGH enable input pin
(pin nE).Whenpin nE = LOW the belonging analogswitch
is turned off.

The 74HC4066/74HCT4066 is pin compatible with the
74HC4016/74HCT4066 but exhibits a much lower
on-resistance. In addition, the on-resistance is relatively
constant over the full input signal range.

TYPICAL

UNIT

74HC4066 74HCT4066

88pF

Notes

1. C

is used to determine the dynamic power dissipation (PDin µW).

PD

PD=CPD× V

2

× fi× N+Σ[(CL+CS)×V

CC

2

× fo] where:

CC

fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
CS= maximum switch capacitance in pF;
VCC= supply voltage in Volts;
N = total load switching outputs;
Σ[(CL+CS)×V

2

× fo] = sum of the outputs.

CC

2. For 74HC4066 the condition is VI= GND to VCC.

For 74HCT4066 the condition is VI= GND to VCC− 1.5 V.

2003 Jun 17 2

Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

FUNCTION TABLE

See note 1.

INPUT nE SWITCH

L off

Hon

Note

1. H = HIGH voltage level.

L = LOW voltage level.

ORDERING INFORMATION

TYPE NUMBER

PACKAGE

TEMPERATURE RANGE PINS PACKAGE MATERIAL CODE

74HC4066N −40 to 125 °C 14 DIP14 plastic SOT27-1
74HCT4066N −40 to 125 °C 14 DIP14 plastic SOT27-1
74HC4066D −40 to 125 °C 14 SO14 plastic SOT108-1
74HCT4066D −40 to 125 °C 14 SO14 plastic SOT108-1
74HC4066DB −40 to 125 °C 14 SSOP14 plastic SOT337-1
74HCT4066DB −40 to 125 °C 14 SSOP14 plastic SOT337-1
74HC4066PW −40 to 125 °C 14 TSSOP14 plastic SOT402-1
74HCT4066PW −40 to 125 °C 14 TSSOP14 plastic SOT402-1
74HC4066BQ −40 to 125 °C 14 DHVQFN14 plastic SOT762-1
74HCT4066BQ −40 to 125 °C 14 DHVQFN14 plastic SOT762-1

PINNING

PIN SYMBOL DESCRIPTION

1 1Y independent input/output
2 1Z independent input/output
3 2Z independent input/output
4 2Y independent input/output

handbook, halfpage

1Y
1Z
2Z

1
2
3

14

V

CC

13

1E

12

4E

5 2E enable input (active HIGH)
6 3E enable input (active HIGH)
7 GND ground (0 V)
8 3Y independent input/output
9 3Z independent input/output

10 4Z independent input/output

2Y
2E
3E

GND

4

4066

5
6
7

MGR253

11

4Y

10

4Z

9

3Z

8

3Y

11 4Y independent input/output
12 4E enable input (active HIGH)
13 1E enable input (active HIGH)
14 V

CC

supply voltage

Fig.1 Pin configuration DIP14, SO14 and

(T)SSOP14.

2003 Jun 17 3

Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

handbook, halfpage

2

1Z

3

2Z

4

2Y

5

2E

6

3E

Top view

(1) The die substrate is attached to this pad using conductive die

attach material. It can not be used as a supply pin or input.

V

1Y

CC

114

(1)

GND

8

7

GND 3Y

13

12

11

10

9

MBL891

1E

4E

4Y

4Z

3Z

Fig.2 Pin configuration DHVQFN14.

handbook, halfpage

1E

13

52E

63E

12 4E

MGR254

Fig.3 Logic symbol.

11Y
21Z

42Y
32Z

83Y
93Z

114Y
104Z

handbook, halfpage

1
13 #
4
5#
8
6#
11
12 #

MGR255

2

3

9

10

Fig.4 IEC logic symbol.

2003 Jun 17 4

handbook, halfpage

1

11

13 #

X1

4

11

5#

X1

8

11

6#

X1

11

11

12 #

X1

2

3

9

10

MGR256

Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

handbook, halfpage

6

4

5

1

13
1E

1Y

1Z
2

2E

2Y

3E

2Z
3

Fig.5 Functional diagram.

8
3Y

3Z
9

12
4E

11
4Y

4Z
10

MGR257

handbook, halfpage

nE

Fig.6 Schematic diagram (one switch).

V

GND

CC

nY

V

CC

nZ

MGR258

2003 Jun 17 5

Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

RECOMMENDED OPERATING CONDITIONS

SYMBOL PARAMETER CONDITIONS

UNIT

MIN. TYP. MAX. MIN. TYP. MAX.

74HC4066 74HCT4066

V

CC

V

I

V

S

T

amb

supply voltage 2.0 5.0 10.0 4.5 5.0 5.5 V
input voltage GND − V
switch voltage GND − V
operating ambient

temperature

see DC and AC
characteristics

−40 +25 +85 −40 +25 +85 °C

−40 − +125 −40 − +125 °C

GND − V

CC

GND − V

CC

CC
CC

V
V

per device

t

r,tf

input rise and fall times VCC= 2.0 V − 6.0 1000 − 6.0 500 ns

= 4.5 V −−500 −−−ns

V

CC

V

= 6.0 V −−400 −−−ns

CC

V

= 10.0 V −−250 −−−ns

CC

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

CC

I

IK

I

SK

I

S

I

, I

CC

T

stg

P

tot

P

S

supply voltage −0.5 +11.0 V
input diode current VI< −0.5 Vor VI>VCC+ 0.5 V −±20 mA
switch diode current VS< −0.5 Vor VS>VCC+ 0.5 V −±20 mA
switch current −0.5V<VO<VCC+ 0.5 V; note 1 −±25 mA

GNDVCC

or GND current −±50 mA
storage temperature −65 +150 °C
power dissipation T

= −40 to +125 °C; note 2 − 500 mW

amb

power dissipation per switch − 100 mW

Notes

1. To avoid drawing V

current out of pin nZ, when switch current flows in pin nY, the voltage drop across the

CC

bidirectional switch must not exceed 0.4 V. If the switch current flows into pin nZ, no VCCcurrent will flow out of
pin nY. In this case there is no limit for the voltage drop across the switch, but the voltages at pins nY and nZ may
not exceed VCCor GND.

2. For DIP14 packages: above 70 °C derate linearly with 12 mW/K.
For SO14 packages: above 70 °C derate linearly with 8 mW/K.
For SSOP14 and TSSOP16 packages: above 60 °C derate linearly with 5.5 mW/K.
For DHVQFN14 packages: above 60 °C derate linearly with 4.5 mW/K.

2003 Jun 17 6

Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

DC CHARACTERISTICS
Family 74HC4066

Voltages are referenced to GND (ground = 0 V); Visis the input voltage at pins nY or nZ, whichever is assigned as an
input; V

is the output voltage at pins nY or nZ, whichever is assigned as an output.

os

SYMBOL PARAMETER

T

= −40 to +85 °C; note 1

amb

V

IH

HIGH-level input
voltage

V

IL

I

LI

I

S(OFF)

LOW-level input voltage 2.0 − 0.8 0.50 V

input leakage current VI=VCCor GND 6.0 −−±1.0 µA

analog switch current
OFF-state

I

S(ON)

analog switch current
ON-state

I

CC

quiescent supply
current

TEST CONDITIONS

OTHER V

per channel; VI=VIHor VIL;
VS=VCC− GND; see Fig.7

VI=VIHor VIL; VS=VCC− GND;
see Fig.8

VI=VCCor GND; Vis= GND or VCC;
Vos=VCCor GND

MIN. TYP. MAX. UNIT

(V)

CC

2.0 1.5 1.2 − V

4.5 3.15 2.4 − V

6.0 4.2 3.2 − V

9.0 6.3 4.7 − V

4.5 − 2.1 1.35 V

6.0 − 2.8 1.80 V

9.0 − 4.3 2.70 V

10.0 −−±2.0 µA

10.0 −−±1.0 µA

10.0 −−±1.0 µA

6.0 −−20.0 µA

10.0 −−40.0 µA

2003 Jun 17 7

Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

SYMBOL PARAMETER

= −40 to +125 °C

T

amb

V

IH

HIGH-level input
voltage

V

IL

I

LI

I

S(OFF)

LOW-level input voltage 2.0 −−0.50 V

input leakage current VI=VCCor GND 6.0 −−±1.0 µA

analog switch current
OFF-state

I

S(ON)

analog switch current
ON-state

I

CC

quiescent supply
current

Note

1. All typical values are measured at T

TEST CONDITIONS

OTHER V

per channel; VI=VIHor VIL;
VS=VCC− GND; see Fig.7

VI=VIHor VIL; VS=VCC− GND; see
Fig.8

VI=VCCor GND; Vis= GND or VCC;
Vos=VCCor GND

=25°C.

amb

MIN. TYP. MAX. UNIT

(V)

CC

2.0 1.5 −−V

4.5 3.15 −−V

6.0 4.2 −−V

9.0 6.3 −−V

4.5 −−1.35 V

6.0 −−1.80 V

9.0 −−2.70 V

10.0 −−±2.0 µA

10.0 −−±1.0 µA

10.0 −−±1.0 µA

6.0 −−40.0 µA

10.0 −−80.0 µA

2003 Jun 17 8

Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

Family 74HCT4066

Voltages are referenced to GND (ground = 0 V); Visis the input voltage at pins nY or nZ, whichever is assigned as an
input; V

is the output voltage at pins nY or nZ, whichever is assigned as an output.

os

SYMBOL PARAMETER

T

= −40 to +85 °C; note 1

amb

V

IH

HIGH-level input
voltage

V

IL

I

LI

I

S(OFF)

LOW-level input voltage 4.5 to 5.5 − 1.2 0.8 V
input leakage current VI=VCCor GND 5.5 −−±1.0 µA
analog switch current

OFF-state

I

S(ON)

analog switch current
ON-state

I

CC

quiescent supply
current

∆I

CC

additional quiescent
supply current per input

T

= −40 to +125 °C

amb

V

IH

HIGH-level input
voltage

V

IL

I

LI

I

S(OFF)

LOW-level input voltage 4.5 to 5.5 −−0.8 V
input leakage current VI=VCCor GND 5.5 −−±1.0 µA
analog switch current

OFF-state

I

S(ON)

analog switch current
ON-state

I

CC

quiescent supply
current

∆I

CC

additional quiescent
supply current per input

TEST CONDITIONS

OTHER V

per channel; VI=VIHor VIL;
VS=VCC− GND; see Fig.7

VI=VIHor VIL; VS=VCC− GND; see
Fig.8

VI=VCCor GND; Vis= GND or VCC;
Vos=VCCor GND

VI=VCC− 2.1 V; other inputs at V

CC

or GND

per channel; VI=VIHor VIL;
VS=VCC− GND; see Fig.7

VI=VIHor VIL; VS=VCC− GND; see
Fig.8

VI=VCCor GND; Vis= GND or VCC;
Vos=VCCor GND

VI=VCC− 2.1 V; other inputs at V

CC

or GND

MIN. TYP. MAX. UNIT

(V)

CC

4.5 to 5.5 2.0 1.6 − V

5.5 −−±1.0 µA

5.5 −−±1.0 µA

4.5 to 5.5 −−20.0 µA

4.5 to 5.5 − 100 450 µA

4.5 to 5.5 2.0 −− V

10.0 −−±1.0 µA

10.0 −−±1.0 µA

4.5 to 5.5 −−40.0 µA

4.5 to 5.5 −−490 µA

Note

1. All typical values are measured at T

amb

=25°C.

2003 Jun 17 9

Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

handbook, full pagewidth

(from enable inputs)

VI = VCC or GND

LOW

nY

nZ

MGR260

AA

GND

Fig.7 Test circuit for measuring OFF-state current.

VO = GND or V

CC

handbook, full pagewidth

VI = VCC or GND

HIGH

(from enable inputs)

nY

Fig.8 Test circuit for measuring ON-state current.

2003 Jun 17 10

nZ

MGR261

AA

GND

VO (open circuit)