NXP 74HC14BQ, 74HC14D, 74HC14DB, 74HC14N, 74HC14PW Schematics

...

74HC14; 74HCT14

Hex inverting Schmitt trigger

Rev. 6 — 19 September 2012 Product data sheet

1. General description

The 74HC14; 74HCT14 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7A.

The 74HC14; 74HCT14 provides six inverting buffers with Schmitt-trigger action. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.

2. Features and benefits

 Low-power dissipation  ESD protection:

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V  Multiple package options  Specifie d from 40 C to +85 C and from 40 C to +125 C

3. Applications

 Wave and pulse shapers  Astable multivibrators  Monostable multivibrators

NXP Semiconductors

mna204

1A 1Y

2A 2Y

3A 3Y

4A 4Y

5A 5Y

6A 6Y

001aac497

mna025

4. Ordering information

74HC14; 74HCT14

Hex inverting Schmitt trigger

Table 1. Ordering information

Type number Package

Temperature range Name Description Version

74HC14N 40 C to +125 C DIP14 plastic dual in-line package; 14 leads (300 mil) SOT27-1 74HCT14N 74HC14D 40 C to +125 C SO14 plastic small outline package; 14 leads; body width 74HCT14D

3.9 mm

74HC14DB 40 C to +125 C SSOP14 plastic shrink small outline package; 14 leads; body 74HCT14DB

width 5.3 mm

74HC14PW 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads; 74HCT14PW

body width 4.4 mm

74HC14BQ 40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced very 74HCT14BQ

thin quad flat package; no leads; 14 terminals; body 2.5  3 0.85 mm

SOT108-1

SOT337-1

SOT402-1

SOT762-1

5. Functional diagram

Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram

(one Schmitt trigger)

Product data sheet Rev. 6 — 19 September 2012 2 of 21

NXP Semiconductors

1A V

1Y 6A 2A 6Y 2Y 5A 3A 5Y 3Y 4A

GND 4Y

001aac498

1 2 3 4 5 6 7

12 11

14 13

001aac499

GND

(1)

Transparent top view

3Y 4A

3A 5Y

2Y 5A

2A 6Y

1Y 6A

GND

6 9

5 10

4 11

3 12

2 13

terminal 1

index area

74HC14; 74HCT14

Hex inverting Schmitt trigger

6. Pinning information

6.1 Pinning

(1) The die substrate is attached to this pad using

conductive die attach material. It cannot be used as a supply pin or input.

Fig 4. Pin configuration DIP14, SO14 and (T)SSOP14 Fig 5. Pin configuration DHVQFN14

6.2 Pin description

Table 2. Pin description

Symbol Pin Description

1A to 6A 1, 3, 5, 9, 11, 13 data input 1 1Y to 6Y 2, 4, 6, 8, 10, 12 data output 1 GND 7 ground (0 V) V

14 supply voltage

7. Functional description

Table 3. Function table

Input Output nA nY

LH HL

[1] H = HIGH voltage level;

L = LOW voltage level.

[1]

Product data sheet Rev. 6 — 19 September 2012 3 of 21

NXP Semiconductors

8. Limiting values

74HC14; 74HCT14

Hex inverting Schmitt trigger

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions Min Max Unit

V I

GND

T P

stg tot

supply voltage 0.5 +7 V input clamping current VI < 0.5 V or VI>VCC+0.5 V output clamping current VO< 0.5 V or VO>VCC+0.5V

[1]

- 20 mA

[1]

- 20 mA output current 0.5 V < VO < VCC+0.5V - 25 mA supply current - 50 mA ground current 50 - mA storage temperature 65 +150 C total power dissipation

[2]

DIP14 package - 750 mW SO14, (T)SSOP14 and

- 500 mW

DHVQFN14 packages

[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For DIP14 package: P

For SO14 package: P For (T)SSOP14 packages: P For DHVQFN14 packages: P

derates linearly with 12 mW/K above 70 C.

tot

derates linearly with 8 mW/K above 70 C.

tot

derates linearly with 5.5 mW/K above 60 C.

tot

derates linearly with 4.5 mW/K above 60 C.

tot

9. Recommended operating conditions

Table 5. Recommended operating conditions

Voltages are referenced to GND (ground = 0 V)

Symbol Parameter Conditions 74HC14 74HCT14 Unit

amb

supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V input voltage 0 - V output voltage 0 - V ambient temperature 40 +25 +125 40 +25 +125 C

Min Typ Max Min Typ Max

CC CC

0-VCCV 0-VCCV

Product data sheet Rev. 6 — 19 September 2012 4 of 21

NXP Semiconductors

10. Static characteristics

74HC14; 74HCT14

Hex inverting Schmitt trigger

Table 6. Static characteristics

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions T

= 25 C T

amb

to +85 C

Min Typ Max Min Max Min Max

74HC14

HIGH-level output voltage

LOW-level output voltage

input leakage

VI= VT+ or V

T

IO = 20 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V

= 20 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V

= 20 A; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V

= 4.0 mA; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V

= 5.2 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V

VI= VT+ or V

T

IO = 20 A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V

= 20 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V

= 20 A; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V

= 4.0 mA; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V

= 5.2 mA; VCC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V

VI = VCC or GND; VCC=6.0V - - 0.1 - 1.0 - 1.0 A

current

supply current VI = VCC or GND; IO=0A;

=6.0V

input

--2.0- 20 - 40A

-3.5- - - - - pF

capacitance

74HCT14

HIGH-level output voltage

LOW-level output voltage

input leakage

VI= VT+ or VT; VCC = 4.5 V

= 20 A 4.4 4.5 - 4.4 - 4.4 - V

= 4.0 mA 3.98 4.32 - 3.84 - 3.7 - V

VI= VT+ or VT; VCC = 4.5 V

= 20 A; - 0 0.1 - 0.1 - 0.1 V

= 4.0 mA; - 0.15 0.26 - 0.33 - 0.4 V

VI = VCC or GND; VCC=5.5V - - 0.1 - 1.0 - 1.0 A

current

I

supply current VI=VCCor GND; IO = 0 A;

=5.5V

additional supply current

per input pin; VI=VCC 2.1 V; other pins

--2.0- 20 - 40A

- 30 108 - 135 - 147 A

at VCCor GND; IO=0A;

= 4.5 V to 5.5 V

input

-3.5- - - - - pF

capacitance

= 40 C

amb

to +125 C

Unit

Product data sheet Rev. 6 — 19 September 2012 5 of 21

NXP Semiconductors

11. Dynamic characteristics

74HC14; 74HCT14

Hex inverting Schmitt trigger

Table 7. Dynamic characteristics

GND = 0 V; CL=50pF; for test circuit see Figure 7.

Symbol Parameter Conditions T

Min Typ Max Max

74HC14

propagation delay nA to nY; see Figure 6

[1]

VCC = 2.0 V - 41 125 155 190 ns

= 4.5 V - 15 25 31 38 ns

= 5.0 V; CL=15pF - 12 - - - ns

= 6.0 V - 12 21 26 32 ns

transition time see Figure 6

[2]

VCC = 2.0 V - 19 75 95 110 ns

= 4.5 V - 7 15 19 22 ns

= 6.0 V - 6 13 15 19 ns

power dissipation

per package; VI=GNDtoV

[3]

-7- - -pF

capacitance

74HCT14

propagation delay nA to nY; see Figure 6

[1]

VCC = 4.5 V - 20 34 43 51 ns

= 5.0 V; CL=15pF - 17 - - - ns

transition time VCC = 4.5 V; see Figure 6 power dissipation

capacitance

per package;

=GNDtoVCC 1.5 V

[2]

- 7 15 19 22 ns

[3]

-8- - -pF

= 25 C T

amb

= 40 C to

amb

+125 C

(85 C)

Unit

Max

(125 C)

[1] tpd is the same as t

is the same as t

[2] t

[3] C

Product data sheet Rev. 6 — 19 September 2012 6 of 21

is used to determine the dynamic power dissipation (PD in W):

P f

C V N = number of inputs switching;

 (C

 V

D=CPD

= input frequency in MHz; = output frequency in MHz;

= output load capacitance in pF;

= supply voltage in V;

 V

 fo) = sum of outputs.

and t

PHL

THL

 fi N+ (CL V

and t

TLH

PLH

 fo) where:

NXP Semiconductors

mna722

PLH

PHL

90 %

10 %

nY output

nA input

GND

TLH

THL

001aah768

negative

pulse

GND

positive

pulse

GND

10 %

90 %

10 %

DUT

12. Waveforms

Measurement points are given in Table 8.

and VOH are typical voltage output levels that occur with the output load.

Fig 6. Input to output propagation delays

74HC14; 74HCT14

Hex inverting Schmitt trigger

Table 8. Measurement points

Type Input Output

74HC14 0.5V

0.5V

0.1V

74HCT14 1.3 V 1.3 V 0.1V

CC CC

0.9V

CC CC

Fig 7. Load circuitry for measuring switching times

Product data sheet Rev. 6 — 19 September 2012 7 of 21

Test data is given in Table 9. Definitions test circuit:

= termination resistance should be equal to output impedance Zo of the pulse generator.

= load capacitance including jig and probe capacitance.

NXP Semiconductors

mna207

T+

T−

mna208

T+

T−

74HC14; 74HCT14

Hex inverting Schmitt trigger

Table 9. Test data

Type Input Load Test

74HC14 V

74HCT14 3.0 V 6.0 ns 15 pF , 50 pF t

tr, t

6.0 ns 15 pF , 50 pF t

PLH PLH

, t

PHL

, t

PHL

13. Transfer characteristics

Table 10. Transfer characteristics

At recommended operating conditions; voltages are referenced to GND (ground = 0 V); see Figure 8 and Figure 9.

Symbol Parameter Conditions T

74HC14

T+

positive-going threshold voltage

T

negative-going threshold voltage

hysteresis voltage

74HCT14

T+

positive-going threshold voltage

T

negative-going threshold voltage

hysteresis voltage

= 25 C T

amb

= 40 C

amb

to +85 C

= 40 C

amb

to +125 C

Min Typ Max Min Max Min Max

VCC = 2.0 V 0.7 1.18 1.5 0.7 1.5 0.7 1.5 V

= 4.5 V 1.7 2.38 3.15 1.7 3.15 1.7 3.15 V

= 6.0 V 2.1 3.14 4.2 2.1 4.2 2.1 4.2 V

VCC = 2.0 V 0.3 0.52 0.9 0.3 0.9 0.3 0.9 V

= 4.5 V 0.9 1.4 2.0 0.9 2.0 0.9 2.0 V

= 6.0 V 1.2 1.89 2.6 1.2 2.6 1.2 2.6 V

VCC = 2.0 V 0.2 0.66 1.0 0.2 1.0 0.2 1.0 V V

= 4.5 V 0.4 0.98 1.4 0.4 1.4 0.4 1.4 V

= 6.0 V 0.6 1.25 1.6 0.6 1.6 0.6 1.6 V

VCC = 4.5 V 1.2 1.41 1.9 1.2 1.9 1.2 1.9 V

= 5.5 V 1.4 1.59 2.1 1.4 2.1 1.4 2.1 V

VCC = 4.5 V 0.5 0.85 1.2 0.5 1.2 0.5 1.2 V

= 5.5 V 0.6 0.99 1.4 0.6 1.4 0.6 1.4 V

VCC = 4.5 V 0.4 0.56 - 0.4 - 0.4 - V

= 5.5 V 0.4 0.6 - 0.4 - 0.4 - V

Unit

14. Transfer characteristics waveforms

Fig 8. Transfer characteristics Fig 9. Transfer characteristics definitions

Product data sheet Rev. 6 — 19 September 2012 8 of 21

NXP Semiconductors

0 2.0

0.4 0.8 1.2 1.6

mna846

(μA)

(V)

1.0

0.2

0.4

0.6

0.8

1234

mna847

(mA)

(V)

0 6.0

(mA)

(V)

1.0

0.2

0.4

0.6

0.8

1.2 2.4 3.6 4.8

mna848

a. VCC=2.0V b. VCC=4.5V

74HC14; 74HCT14

Hex inverting Schmitt trigger

=6.0V

c. V

Fig 10. Typical 74HC transfer characteristics

Product data sheet Rev. 6 — 19 September 2012 9 of 21

NXP Semiconductors

1.5

0.3

0.6

0.9

1.2

1234

mna849

(mA)

(V)

0123 6

1.8

0.6

0.3

1.2

1.5

0.9

mna850

(mA)

(V)

a. VCC=4.5V b. VCC=5.5V

Fig 11. Typical 74HCT transfer characteristics

74HC14; 74HCT14

Hex inverting Schmitt trigger

15. Application information

The slow input rise and fall times cause additional power dissipation, this can be calculated using the following formula:

add=fi

Average I and Figure 13

An example of a relaxation circuit using the 74HC14; 74HCT14 is shown in Figure 14

 (trI

= additional power dissipation (W);

add

= input frequency (MHz);

=rise time (ns); 10%to90%;

= fall time (ns); 90 % to 10 %;

I

= average additional supply current (A).

CC(AV)

differs with positive or negative input transitions, as shown in Figure 12

CC(AV)

CC(AV)+tf

I

)  VCC where:

CC(AV)

Product data sheet Rev. 6 — 19 September 2012 10 of 21

NXP Semiconductors

0246

400

300

100

200

mna852

CC(AV)

(μA)

(V)

positive - going

edge

negative - going

edge

0246

400

300

100

200

mna853

VCC (V)

CC(AV)

(μA)

negative - going

edge

positive - going

edge

74HC14; 74HCT14

Hex inverting Schmitt trigger

(1) Positive-going edge. (2) Negative-going edge.

Fig 12. Average additional supply current as a function of VCC for 74HC14; linear change of VI between 0.1VCC to

0.9V

(1) Positive-going edge. (2) Negative-going edge.

Fig 13. Average additional supply current as a function of VCC for 74HCT14; linear change of VI between 0.1VCC

to 0.9V

Product data sheet Rev. 6 — 19 September 2012 11 of 21

NXP Semiconductors

mna035

1 T

-- -

KRC

----------------- -

=

9&&9



DDD











9&&9

  

DDD















For 74HC14 and 74HCT14:

For K-factor see Figure 15

Fig 14. Relaxation oscillator

74HC14; 74HCT14

Hex inverting Schmitt trigger

K-factor for 74HC14 K-factor for 74HCT14

Fig 15. Typical K-factor for relaxation oscillator

Product data sheet Rev. 6 — 19 September 2012 12 of 21

NXP Semiconductors

UNIT

max.

1 2

(1) (1)

(1)

Ee M

REFERENCES

OUTLINE VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC JEDEC JEITA

inches

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

SOT27-1

99-12-27 03-02-13

min.

max.

1.73

1.13

0.53

0.38

0.36

0.23

19.50

18.55

6.48

6.20

3.60

3.05

0.2542.54 7.62

8.25

7.80

10.0

8.3

2.24.2 0.51 3.2

0.068

0.044

0.021

0.015

0.77

0.73

0.014

0.009

0.26

0.24

0.14

0.12

0.010.1 0.3

0.32

0.31

0.39

0.33

0.0870.17 0.02 0.13

050G04 MO-001 SC-501-14

(e )

seating plane

w M

pin 1 index

0 5 10 mm

scale

Note

1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.

DIP14: plastic dual in-line package; 14 leads (300 mil)

SOT27-1

16. Package outline

74HC14; 74HCT14

Hex inverting Schmitt trigger

Fig 16. Package outline SOT27-1 (DIP14)

Product data sheet Rev. 6 — 19 September 2012 13 of 21

NXP Semiconductors

UNIT

max.

A1A2A

(1)E(1)

(1)

eHELLpQZywv θ

REFERENCES

OUTLINE VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC JEDEC JEITA

inches

1.75

0.25

0.10

1.45

1.25

0.25

0.49

0.36

0.25

0.19

8.75

8.55

4.0

3.8

1.27

6.2

5.8

0.7

0.6

0.7

0.3

8 0

o o

0.25 0.1

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Note

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

1.0

0.4

SOT108-1

w M

detail X

v M

(A )

076E06 MS-012

pin 1 index

0.069

0.010

0.004

0.057

0.049

0.01

0.019

0.014

0.0100

0.0075

0.35

0.34

0.16

0.15

0.05

1.05

0.041

0.244

0.228

0.028

0.024

0.028

0.012

0.01

0.25

0.01 0.004

0.039

0.016

99-12-27 03-02-19

0 2.5 5 mm

scale

SO14: plastic small outline package; 14 leads; body width 3.9 mm

SOT108-1

74HC14; 74HCT14

Hex inverting Schmitt trigger

Fig 17. Package outline SOT108-1 (SO14)

Product data sheet Rev. 6 — 19 September 2012 14 of 21

NXP Semiconductors

UNIT A1A2A3b

(1)E(1)

eHELLpQZywv θ

REFERENCES

OUTLINE VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC JEDEC JEITA

0.21

0.05

1.80

1.65

0.25

0.38

0.25

0.20

0.09

6.4

6.0

5.4

5.2

0.65 1.25 0.2

7.9

7.6

1.03

0.63

0.9

0.7

1.4

0.9

8 0

o o

0.13 0.1

DIMENSIONS (mm are the original dimensions)

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

SOT337-1

99-12-27 03-02-19

(1)

w M

v M

detail X

(A )

MO-150

pin 1 index

0 2.5 5 mm

scale

SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm

SOT337-1

max.

74HC14; 74HCT14

Hex inverting Schmitt trigger

Fig 18. Package outline SOT337-1 (SSOP14)

Product data sheet Rev. 6 — 19 September 2012 15 of 21

NXP Semiconductors

UNIT A1A2A

(1)E(2) (1)

eHELLpQZywv θ

REFERENCES

OUTLINE VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC JEDEC JEITA

0.15

0.05

0.95

0.80

0.30

0.19

0.2

0.1

5.1

4.9

4.5

4.3

0.65

6.6

6.2

0.4

0.3

0.72

0.38

8 0

o o

0.13 0.10.21

DIMENSIONS (mm are the original dimensions)

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.

0.75

0.50

SOT402-1 MO-153

99-12-27 03-02-18

w M

0.25

detail X

(A )

v M

0 2.5 5 mm

scale

TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm

SOT402-1

max.

1.1

pin 1 index

74HC14; 74HCT14

Hex inverting Schmitt trigger

Fig 19. Package outline SOT402-1 (TSSOP14)

Product data sheet Rev. 6 — 19 September 2012 16 of 21

NXP Semiconductors

terminal 1 index area

0.51

UNIT

0.2

REFERENCES

OUTLINE VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC JEDEC JEITA

3.1

2.9

1.65

1.35

2.6

2.4

1.15

0.85

0.30

0.18

0.05

0.00

0.05 0.1

DIMENSIONS (mm are the original dimensions)

SOT762-1 MO-241 - - -- - -

0.5

0.3

0.1v0.05

0 2.5 5 mm

scale

SOT762-1

DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 x 3 x 0.85 mm

(1)

max.

detail X

02-10-17 03-01-27

terminal 1 index area

ACCB

(1)

Note

1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.

(1)

74HC14; 74HCT14

Hex inverting Schmitt trigger

Fig 20. Package outline SOT762-1 (DHVQFN14)

Product data sheet Rev. 6 — 19 September 2012 17 of 21

NXP Semiconductors

74HC14; 74HCT14

Hex inverting Schmitt trigger

17. Abbreviations

Table 11. Abbreviations

Acronym Description

CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model LSTTL Low-power Schottky Transistor-Transistor Logic MM Machine Model

18. Revision history

Table 12. Revision history

Document ID Release date Data sheet status Change notice Supersedes

74HC_HCT14 v.6 20120919 Product data sheet - 74HC_HCT14 v.5 Modifications: 74HC_HCT14 v.5 20111219 Product data sheet - 74HC_HCT14 v.4 Modifications: 74HC_HCT14 v.4 20110117 Product data sheet - 74HC_HCT14 v.3 74HC_HCT14 v.3 20031030 Product specification - 74HC_HCT14_CNV v.2 74HC_HCT14_CNV v.2 19970826 Product specification - -

• Figure 15 added (typical K-factor for relaxation oscillator).

• Legal pages updated.

Product data sheet Rev. 6 — 19 September 2012 18 of 21

NXP Semiconductors

74HC14; 74HCT14

Hex inverting Schmitt trigger

19. Legal information

19.1 Data sheet status

Document status

Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.

[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed si nce this d ocument was pub lished and may dif fer in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

[1][2]

Product status

[3]

Definition

19.2 Definitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to co nt ain det ailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.

Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.

19.3 Disclaimers

Limited warranty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors.

In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory.

Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semi conductors’ aggregat e and cumulative liabil ity towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors.

Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.

Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the cust omer’s own risk.

Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.

Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products.

NXP Semiconductors does not accept any liability related to any default , damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third part y customer(s). NXP does not accept any liability in this respect.

Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device.

Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer.

No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell product s that is open for accept ance or the gr ant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.

, unless otherwise

Product data sheet Rev. 6 — 19 September 2012 19 of 21

NXP Semiconductors

74HC14; 74HCT14

Hex inverting Schmitt trigger

Export control — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior authorization from competent authorities.

Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It i s neit her qua lif ied nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications.

In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, custome r (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond

NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, da mages or failed produ ct claims result ing from custome r design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications.

Translations — A non-English (t ranslated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions.

19.4 Trademarks

Notice: All referenced brands, prod uct names, service names and trademarks are the property of their respective owners.

20. Contact information

For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com

Product data sheet Rev. 6 — 19 September 2012 20 of 21

NXP Semiconductors

21. Contents

1 General description. . . . . . . . . . . . . . . . . . . . . . 1

2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1

3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

4 Ordering information. . . . . . . . . . . . . . . . . . . . . 2

5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2

6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 3

6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3

7 Functional description . . . . . . . . . . . . . . . . . . . 3

8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4

9 Recommended operating conditions. . . . . . . . 4

10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5

11 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6

12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

13 Transfer characteristics . . . . . . . . . . . . . . . . . . 8

14 Transfer characteristics waveforms. . . . . . . . . 8

15 Application information. . . . . . . . . . . . . . . . . . 10

16 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13

17 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 18

18 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 18

19 Legal information. . . . . . . . . . . . . . . . . . . . . . . 19

19.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 19

19.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

19.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 19

19.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 20

20 Contact information. . . . . . . . . . . . . . . . . . . . . 20

21 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

74HC14; 74HCT14

Hex inverting Schmitt trigger

Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’.

For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 19 September 2012

Document identifier: 74HC_HCT14

NXP 74HC14BQ, 74HC14D, 74HC14DB, 74HC14N, 74HC14PW Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual

1. General description

2. Features and benefits

3. Applications

4. Ordering information

5. Functional diagram

6. Pinning information

6.1 Pinning

6.2 Pin description

7. Functional description

8. Limiting values

9. Recommended operating conditions

10. Static characteristics

11. Dynamic characteristics

12. Waveforms

13. Transfer characteristics

14. Transfer characteristics waveforms

15. Application information

16. Package outline

17. Abbreviations

18. Revision history

19. Legal information

19.1 Data sheet status

19.2 Definitions

19.3 Disclaimers

19.4 Trademarks

20. Contact information

21. Contents