NSC LF156MW8, LF156H, LF156AH-883, LF156H-883, JM38510-11402SG Datasheet

TL/H/5646

LF155/LF156/LF157 Series Monolithic JFET Input Operational Amplifiers

December 1994

LF155/LF156/LF157 Series Monolithic
JFET Input Operational Amplifiers

General Description

These are the first monolithic JFET input operational ampli­fiers to incorporate well matched, high voltage JFETs on the
same chip with standard bipolar transistors (BI-FET

TM

Tech­nology). These amplifiers feature low input bias and offset
currents/low offset voltage and offset voltage drift, coupled
with offset adjust which does not degrade drift or common­mode rejection. The devices are also designed for high slew
rate, wide bandwidth, extremely fast settling time, low volt­age and current noise and a low 1/f noise corner.

Advantages

Y

Replace expensive hybrid and module FET op amps

Y

Rugged JFETs allow blow-out free handling compared
with MOSFET input devices

Y

Excellent for low noise applications using either high or
low source impedanceÐvery low 1/f corner

Y

Offset adjust does not degrade drift or common-mode
rejection as in most monolithic amplifiers

Y

New output stage allows use of large capacitive loads
(5,000 pF) without stability problems

Y

Internal compensation and large differential input volt­age capability

Applications

Y

Precision high speed integrators

Y

Fast D/A and A/D converters

Y

High impedance buffers

Y

Wideband, low noise, low drift amplifiers

Y

Logarithmic amplifiers

Y

Photocell amplifiers

Y

Sample and Hold circuits

Common Features

(LF155A, LF156A, LF157A)

Y

Low input bias current 30 pA

Y

Low Input Offset Current 3 pA

Y

High input impedance 1012X

Y

Low input offset voltage 1 mV

Y

Low input offset voltage temp. drift 3 mV/§C

Y

Low input noise current 0.01 pA/0Hz

Y

High common-mode rejection ratio 100 dB

Y

Large dc voltage gain 106 dB

Uncommon Features

Y

Extremely
fast settling
time to

0.01%

Y

Fast slew
rate

Y

Wide gain
bandwidth

Y

Low input
noise voltage

LF155A LF156A

LF157A

Units

(A

V

e

5)

4 1.5 1.5 ms

51250V/ms

2.5 5 20 MHz

20 12 12 nV/

0

Hz

Simplified Schematic

*3 pF in LF157 series. TL/H/5646– 1

BI-FETTM, BI-FET IITMare trademarks of National Semiconductor Corporation.

C

1995 National Semiconductor Corporation RRD-B30M115/Printed in U. S. A.

Absolute Maximum Ratings

If Military/Aerospace specified devices are required, contact the National Semiconductor Sales Office/Distributors for
availability and specifications.
(Note 8)

LF155A/6A/7A LF155/6/7

LF355B/6B/7B LF355/6/7

LF255/6/7 LF355A/6A/7A

Supply Voltage

g

22V

g

22V

g

22V

g

18V

Differential Input Voltage

g

40V

g

40V

g

40V

g

30V

Input Voltage Range (Note 2)

g

20V

g

20V

g

20V

g

16V

Output Short Circuit Duration Continuous Continuous Continuous Continuous

T

jMAX

H-Package 150§C 150§C 115§C 115§C
N-Package 100

§

C 100§C

M-Package 100

§

C 100§C

Power Dissipation at T

A

e

25§C (Notes 1 and 9)
H-Package (Still Air) 560 mW 560 mW 400 mW 400 mW
H-Package (400 LF/Min Air Flow) 1200 mW 1200 mW 1000 mW 1000 mW
N-Package 670 mW 670 mW
M-Package 380 mW 380 mW

Thermal Resistance (Typical) i

JA

H-Package (Still Air) 160§C/W 160§C/W 160§C/W 160§C/W
H-Package (400 LF/Min Air Flow) 65

§

C/W 65§C/W 65§C/W 65§C/W

N-Package 130

§

C/W 130§C/W

M-Package 195

§

C/W 195§C/W

(Typical) i

JC

H-Package 23§C/W 23§C/W 23§C/W 23§C/W

Storage Temperature Range

b

65§Ctoa150§Cb65§Ctoa150§Cb65§Ctoa150§Cb65§Ctoa150§C

Soldering Information (Lead Temp.)

Metal Can Package

Soldering (10 sec.) 300

§

C 300§C 300§C 300§C

Dual-In-Line Package

Soldering (10 sec.) 260

§

C 260§C 260§C

Small Outline Package

Vapor Phase (60 sec.) 215

§

C 215§C

Infrared (15 sec.) 220

§

C 220§C
See AN-450 ‘‘Surface Mounting Methods and Their Effect on Product Reliability’’ for other methods of soldering surface
mount devices.
ESD tolerance

(100 pF discharged through 1.5 kX) 1000V 1000V 1000V 1000V

DC Electrical Characteristics (Note 3) T

A

e

T

j

e

25§C

Symbol Parameter Conditions

LF155A/6A/7A LF355A/6A/7A

Units

Min Typ Max Min Typ Max

V

OS

Input Offset Voltage R

S

e

50X,T

A

e

25§C1212mV

Over Temperature 2.5 2.3 mV

DVOS/DT Average TC of Input R

S

e

50X

35 35mV/

§

C

Offset Voltage

DTC/DV

OS

Change in Average TC R

S

e

50X, (Note 4)

0.5 0.5

mV/§C

with VOSAdjust per mV

I

OS

Input Offset Current T

j

e

25§C, (Notes 3, 5) 3 10 3 10 pA

T

j

s

T

HIGH

10 1 nA

I

B

Input Bias Current T

j

e

25§C, (Notes 3, 5) 30 50 30 50 pA

T

j

s

T

HIGH

25 5 nA

R

IN

Input Resistance T

j

e

25§C101210

12

X

A

VOL

Large Signal Voltage V

S

e

g

15V, T

A

e

25§C 50 200 50 200 V/mV

Gain V

O

e

g

10V, R

L

e

2k

25 25 V/mV

Over Temperature

V

O

Output Voltage Swing V

S

e

g

15V, R

L

e

10k

g

12g13

g

12g13 V

V

S

e

g

15V, R

L

e

2k

g

10g12

g

10g12 V

2

DC Electrical Characteristics (Note 3) T

A

e

T

j

e

25§C (Continued)

Symbol Parameter Conditions

LF155A/6A/7A LF355A/6A/7A

Units

Min Typ Max Min Typ Max

V

CM

Input Common-Mode

V

S

e

g

15V

g

11

a

15.1

g

11

a

15.1 V

Voltage Range

b

12

b

12 V

CMRR Common-Mode Rejection

85 100 85 100 dB

Ratio

PSRR Supply Voltage Rejection (Note 6)

85 100 85 100 dB

Ratio

AC Electrical Characteristics T

A

e

T

j

e

25§C, V

S

e

g

15V

Symbol Parameter Conditions

LF155A/355A LF156A/356A LF157A/357A

Units

Min Typ Max Min Typ Max Min Typ Max

SR Slew Rate LF155A/6A; A

V

e

1, 3 5 10 12 V/ms

LF157A; A

V

e

54050V/ms

GBW Gain Bandwidth

2.5 4 4.5 15 20 MHz

Product

t

s

Settling Time to 0.01% (Note 7) 4 1.5 1.5 ms

e

n

Equivalent Input Noise R

S

e

100X

Voltage f

e

100 Hz 25 15 15 nV/0Hz

f

e

1000 Hz 20 12 12 nV/0Hz

i

n

Equivalent Input fe100 Hz 0.01 0.01 0.01 pA/0Hz
Noise Current f

e

1000 Hz 0.01 0.01 0.01 pA/0Hz

C

IN

Input Capacitance 3 3 3 pF

DC Electrical Characteristics (Note 3)

Symbol Parameter Conditions

LF155/6/7

LF255/6/7

LF355/6/7

Units

LF355B/6B/7B

Min Typ Max Min Typ Max Min Typ Max

V

OS

Input Offset Voltage R

S

e

50X,T

A

e

25§C 3 5 3 5 3 10 mV

Over Temperature 7 6.5 13 mV

DVOS/DT Average TC of Input R

S

e

50X

555mV/

§

C

Offset Voltage

DTC/DVOSChange in Average TC R

S

e

50X, (Note 4)

0.5 0.5 0.5

mV/§C

with V

OS

Adjust per mV

I

OS

Input Offset Current T

j

e

25§C, (Notes 3, 5) 3 20 3 20 3 50 pA

T

j

s

T

HIGH

20 1 2 nA

I

B

Input Bias Current T

j

e

25§C, (Notes 3, 5) 30 100 30 100 30 200 pA

T

j

s

T

HIGH

50 5 8 nA

R

IN

Input Resistance T

j

e

25§C101210

12

10

12

X

A

VOL

Large Signal Voltage V

S

e

g

15V, T

A

e

25§C 50 200 50 200 25 200 V/mV

Gain V

O

e

g

10V, R

L

e

2k

Over Temperature 25 25 15 V/mV

V

O

Output Voltage Swing V

S

e

g

15V, R

L

e

10kg12g13

g12g

13

g12g

13 V

V

S

e

g

15V, R

L

e

2kg10g12

g10g

12

g10g

12 V

V

CM

Input Common-Mode

V

S

e

g

15V

g

11

a

15.1

g

11

g

15.1

a

10

a

15.1 V

Voltage Range

b

12

b

12

b

12 V

CMRR Common-Mode Rejec-

85 100 85 100 80 100 dB

tion Ratio

PSRR Supply Voltage Rejec- (Note 6)

85 100 85 100 80 100 dB

tion Ratio

3

DC Electrical Characteristics T

A

e

T

j

e

25§C, V

S

e

g

15V

LF155A/155,

LF156A/156, LF157A/157

Parameter

LF255, LF355

LF256/356B

LF356A/356

LF257/357B

LF357A/357

Units

LF355A/355B

Typ Max Typ Max Typ Max Typ Max Typ Max Typ Max

Supply Current 2 4 2 4 5 7 5 10 5 7 5 10 mA

AC Electrical Characteristics T

A

e

T

j

e

25§C, V

S

e

g

15V

LF155/255/ LF156/256, LF156/256/ LF157/257, LF157/257/

Symbol Parameter Conditions 355/355B LF356B 356/356B LF357B 357/357B Units

Typ Min Typ Min Typ

SR Slew Rate LF155/6: A

V

e

1, 5 7.5 12 V/ms

LF157: A

V

e

53050V/ms

GBW Gain Bandwidth 2.5 5 20 MHz

Product

t

s

Settling Time to 0.01% (Note 7) 4 1.5 1.5 ms

e

n

Equivalent Input Noise R

S

e

100X

Voltage f

e

100 Hz 25 15 15 nV/0Hz

f

e

1000 Hz 20 12 12 nV/0Hz

i

n

Equivalent Input fe100 Hz 0.01 0.01 0.01 pA/0Hz
Current Noise f

e

1000 Hz 0.01 0.01 0.01 pA/0Hz

C

IN

Input Capacitance 3 3 3 pF

Notes for Electrical Characteristics

Note 1: The maximum power dissipation for these devices must be derated at elevated temperatures and is dictated by T

jMAX

, ijA, and the ambient temperature,

T

A

. The maximum available power dissipation at any temperature is P

d

e

(T

jMAX

b

TA)/ijAor the 25§CP

dMAX

, whichever is less.

Note 2: Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage.

Note 3: Unless otherwise stated, these test conditions apply:

LF155A/6A/7A

LF255//6/7 LF355A/6A/7A LF355B/6B/7B LF355//6/7

LF155//6/7

Supply Voltage, V

S

g

15VsV

S

s

g

20V

g

15VsV

S

s

g

20Vg15VsV

S

s

g

18Vg15VsV

S

g

20V V

S

e

g

15V

T

A

b

55§CsT

A

s

a

125§Cb25§CsT

A

s

a

85§C0§CsT

A

s

a

70§C0§CsT

A

s

a

70§C0§CsT

A

s

a

70§C

T

HIGH

a

125§C

a

85§C

a

70§C

a

70§C

a

70§C

and VOS,IBand IOSare measured at V

CM

e

0.

Note 4: The Temperature Coefficient of the adjusted input offset voltage changes only a small amount (0.5mV/

§

C typically) for each mV of adjustment from its

original unadjusted value. Common-mode rejection and open loop voltage gain are also unaffected by offset adjustment.

Note 5: The input bias currents are junction leakage currents which approximately double for every 10

§

C increase in the junction temperature, TJ. Due to limited
production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient
temperature as a result of internal power dissipation, Pd. T

j

e

T

A

a

ijAPd where ijAis the thermal resistance from junction to ambient. Use of a heat sink is

recommended if input bias current is to be kept to a minimum.

Note 6: Supply Voltage Rejection is measured for both supply magnitudes increasing or decreasing simultaneously, in accordance with common practice.

Note 7: Settling time is defined here, for a unity gain inverter connection using 2 kX resistors for the LF155/6. It is the time required for the error voltage (the

voltage at the inverting input pin on the amplifier) to settle to within 0.01% of its final value from the time a 10V step input is applied to the inverter. For the LF157,
A

V

eb

5, the feedback resistor from output to input is 2 kX and the output step is 10V (See Settling Time Test Circuit).

Note 8: Refer to RETS155AX for LF155A, RETS155X for LF155, RETS156AX for LF156A, RETS156X for LF156, RETS157A for LF157A and RETS157X for
LF157 military specifications.

Note 9: Max. Power Dissipation is defined by the package characteristics. Operating the part near the Max. Power Dissipation may cause the part to operate
outside guaranteed limits.

4

Typical DC Performance Characteristics

Curves are for LF155, LF156 and LF157 unless otherwise specified.

Input Bias Current Input Bias Current Input Bias Current

Voltage Swing Supply Current Supply Current

Negative Current Limit Positive Current Limit

Positive Common-Mode
Input Voltage Limit

TL/H/5646– 2

Negative Common-Mode
Input Voltage Limit Open Loop Voltage Gain Output Voltage Swing

TL/H/5646– 3

5

Typical AC Performance Characteristics

Gain Bandwidth Gain Bandwidth Normalized Slew Rate

TL/H/5646– 4

Output Impedance Output Impedance Output Impedance

TL/H/5646– 12

LF155 Small Signal Pulse
Response, A

V

ea

1

TL/H/5646– 5

LF156 Small Signal Pulse
Response, A

V

ea

1

TL/H/5646– 6

Small Signal Pulse
Response, A

V

ea

5

TL/H/5646– 7

LF155 Large Signal Pulse
Response, A

V

ea

1

TL/H/5646– 8

LF156 Large Signal Pulse
Response, A

V

ea

1

TL/H/5646– 9

LF157 Large Signal Pulse
Response, A

V

ea

5

TL/H/5646– 10

6