NSC DM54LS283J-MLS Datasheet

TL/F/6421
54LS283/DM54LS283/DM74LS283 4-Bit Binary Adders with Fast Carry
June 1989
54LS283/DM54LS283/DM74LS283 4-Bit Binary Adders with Fast Carry
General Description
These full adders perform the addition of two 4-bit binary numbers. The sum (R) outputs are provided for each bit and the resultant carry (C4) is obtained from the fourth bit. These adders feature full internal look ahead across all four bits. This provides the system designer with partial look­ahead performance at the economy and reduced package count of a ripple-carry implementation.
The adder logic, including the carry, is implemented in its true form meaning that the end-around carry can be accom­plished without the need for logic or level inversion.
Features
Y
Full-carry look-ahead across the four bits
Y
Systems achieve partial look-ahead performance with the economy of ripple carry
Y
Typical add times
Two 8-bit words 25 ns Two 16-bit words 45 ns
Y
Typical power dissipation per 4-bit adder 95 mW
Y
Alternate Military/Aerospace device (54LS283) is avail­able. Contact a National Semiconductor Sales Office/ Distributor for specifications.
Connection Diagram
Dual-In-Line Package
TL/F/6421– 1
Order Number 54LS283DMQB, 54LS283FMQB, 54LS283LMQB,
DM54LS283J, DM54LS283W, DM74LS283M or DM74LS283N See NS Package Number E20A, J16A, M16A, N16E or W16A
C
1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.
Absolute Maximum Ratings (Note)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.
Supply Voltage 7V
Operating Free Air Temperature Range
DM54LS and 54LS
b
55§Ctoa125§C
DM74LS 0
§
Ctoa70§C
Storage Temperature Range
b
65§Ctoa150§C
Note:
The ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaran­teed. The device should not be operated at these limits. The parametric values defined in the ‘‘Electrical Characteristics’’ table are not guaranteed at the absolute maximum ratings. The ‘‘Recommended Operating Conditions’’ table will define the conditions for actual device operation.
Recommended Operating Conditions
Symbol Parameter
DM54LS283 DM74LS283
Units
Min Nom Max Min Nom Max
V
CC
Supply Voltage 4.5 5 5.5 4.75 5 5.25 V
V
IH
High Level Input Voltage 2 2 V
V
IL
Low Level Input Voltage 0.7 0.8 V
I
OH
High Level Output Current
b
0.4
b
0.4 mA
I
OL
Low Level Output Current 4 8 mA
T
A
Free Air Operating Temperature
b
55 125 0 70
§
C
Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)
Symbol Parameter Conditions Min
Typ
Max Units
(Note 1)
V
I
Input Clamp Voltage V
CC
e
Min, I
I
eb
18 mA
b
1.5 V
V
OH
High Level Output V
CC
e
Min, I
OH
e
Max DM54 2.5 3.4
V
Voltage V
IL
e
Max, V
IH
e
Min
DM74 2.7 3.4
V
OL
Low Level Output V
CC
e
Min, I
OL
e
Max DM54 0.25 0.4
Voltage V
IL
e
Max, V
IH
e
Min
DM74 0.35 0.5 V
I
OL
e
4 mA, V
CC
e
Min DM74 0.25 0.4
I
I
Input Current@Max V
CC
e
Max A, B 0.2
mA
Input Voltage V
I
e
7V
C0 0.1
I
IH
High Level Input V
CC
e
Max A, B 40
mA
Current V
I
e
2.7V C0 20
I
IL
Low Level Input V
CC
e
Max A, B
b
0.8 mA
Current V
I
e
0.4V C0
b
0.4
I
OS
Short Circuit V
CC
e
Max DM54
b
20
b
100
mA
Output Current (Note 2)
DM74
b
20
b
100
I
CC1
Supply Current V
CC
e
Max (Note 3) 19 34 mA
I
CC2
Supply Current V
CC
e
Max (Note 4) 22 39 mA
Note 1: All typicals are at V
CC
e
5V, T
A
e
25§C.
Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 3: I
CC1
is measured with all outputs open, all B inputs low and all other inputs at 4.5V, or all inputs at 4.5V.
Note 4: I
CC2
is measured with all outputs open and all inputs grounded.
2
Switching Characteristics at V
CC
e
5V and T
A
e
25§C (See Section 1 for Test Waveforms and Output Load)
From (Input)
R
L
e
2kX
Symbol Parameter
To (Output)
C
L
e
15 pF C
L
e
50 pF Units
Min Max Min Max
t
PLH
Propagation Delay Time C0 to
24 28 ns
Low to High Level Output R1, R2
t
PHL
Propagation Delay Time C0 to
24 30 ns
High to Low Level Output R1, R2
t
PLH
Propagation Delay Time C0 to
24 28 ns
Low to High Level Output R3
t
PHL
Propagation Delay Time C0 to
24 30 ns
High to Low Level Output R3
t
PLH
Propagation Delay Time C0 to
24 28 ns
Low to High Level Output R4
t
PHL
Propagation Delay Time C0 to
24 30 ns
High to Low Level Output R4
t
PLH
Propagation Delay Time Aior B
i
24 28 ns
Low to High Level Output to R
i
t
PHL
Propagation Delay Time Aior B
i
24 30 ns
High to Low Level Output to R
i
t
PLH
Propagation Delay Time C0 to
17 24 ns
Low to High Level Output C4
t
PHL
Propagation Delay Time C0 to
17 25 ns
High to Low Level Output C4
t
PLH
Propagation Delay Time Aior B
i
17 24 ns
Low to High Level Output to C4
t
PHL
Propagation Delay Time Aior B
i
17 26 ns
High to Low Level Output to C4
Function Table
TL/F/6421– 3
HeHigh Level, LeLow Level
Note: Input conditions at A1, B1, A2, B2, and C0 are used to determine outputs R1 and R2 and the value of the internal carry C2. The values at C2, A3, B3, A4, and B4 are then used to determine outputs R 3, R 4, and C4.
3
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