NSC DM54L73J-883 Datasheet
TL/F/6630
DM54L73 Dual Master-Slave J-K Flip-Flops
with Clear and Complementary Outputs
August 1989
DM54L73 Dual Master-Slave J-K Flip-Flops
with Clear and Complementary Outputs
General Description
This device contains two independent positive pulse triggered J-K flip-flops with complementary outputs. The J and
K data is processed by the flip-flops after a complete clock
pulse. While the clock is low the slave is isolated from the
master. On the positive transition of the clock, the data from
the J and K inputs is transferred to the master. While the
clock is high, the data from the J and K inputs are
disabled. On the negative transition of the clock, the data
from the master is transferred to the slave. The logic states
of the J and K inputs must not be allowed to change while
the clock is high. Data is transferred to the outputs on the
falling edge of the clock pulse. A low logic level on the clear
input will reset the outputs regardless of the logic states of
the other inputs.
Connection Diagram
Dual-In-Line Package
TL/F/6630– 1
Order Number DM54L73J or DM54L73W
See NS Package Number J14A or W14B
Function Table
Inputs Outputs
CLR CLK J K Q Q
LXXXLH
HÉLLQ
O
Q
O
H ÉHL H L
H É LH L H
H É H H Toggle
HeHigh Logic Level
X
e
Either Low or High Logic Level
L
e
Low Logic Level
É
e
Positive pulse data. The J and K inputs must be held constant while
the clock is high. Data is transferred to the outputs on the falling edge of the
clock pulse.
Q
O
e
The output logic level before the indicated input conditions were
established.
Toggle
e
Each output changes to the complement of its previous level on
each complete high level clock pulse.
C
1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.
Absolute Maximum Ratings (Note)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage 8V
Input Voltage 5.5V
Storage Temperature Range
b
65§Ctoa150§C
Operating Free Air Temperature Range
DM54L
b
55§Ctoa125§C
Note:
The ‘‘Absolute Maximum Ratings’’ are those values
beyond which the safety of the device can not be guaranteed. The device should not be operated at these limits. The
parametric values defined in the ‘‘Electrical Characteristics’’
table are not guaranteed at the absolute maximum ratings.
The ‘‘Recommended Operating Conditions’’ table will define
the conditions for actual device operation.
Recommended Operating Conditions
Symbol Parameter
DM54L73
Units
Min Nom Max
V
CC
Supply Voltage 4.5 5 5.5 V
V
IH
High Level Input Voltage 2 V
V
IL
Low Level Input Voltage Clock 0.6
V
Others 0.7
I
OH
High Level Output Current
b
0.2 mA
I
OL
Low Level Output Current 2 mA
f
CLK
Clock Frequency (Note 2) 0 6 MHz
t
W
Pulse Width (Note 2) Clock High 100
Clock Low 100 ns
Clear Low 100
t
SU
Input Setup Time (Notes1&2) 0
u
ns
t
H
Input Hold Time (Notes1&2) 0
v
ns
T
A
Free Air Operating Temperature
b
55 125
§
C
Note 1: The symbols (u,v) indicate the edge of the clock pulse used for reference:ufor rising edge,vfor falling edge.
Note 2: T
A
e
25§C and V
CC
e
5V.
2
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