NSC ADC08234CIWMX, ADC08234CIWM, ADC08234CIMF, ADC08234BIWM, ADC08238CIWM Datasheet

...
TL/H/11015
ADC08231/ADC08234/ADC08238 8-Bit 2 ms Serial I/O A/D Converters
with MUX, Reference, and Track/Hold
December 1994
ADC08231/ADC08234/ADC08238 8-Bit 2 ms Serial I/O A/D Converters with MUX, Reference, and Track/Hold
General Description
The ADC08231/ADC08234/ADC08238 are 8-bit succes­sive approximation A/D converters with serial I/O and con­figurable input multiplexers with up to 8 channels. The serial I/O is configured to comply with the NSC MICROWIRE
TM
serial data exchange standard for easy interface to the COPS
TM
family of controllers, and can easily interface with
standard shift registers or microprocessors.
Designed for high-speed/low-power applications, the devic­es are capable of a fast 2 ms conversion when used with a 4 MHz clock.
All three devices provide a 2.5V band-gap derived reference with guaranteed performance over temperature.
A track/hold function allows the analog voltage at the posi­tive input to vary during the actual A/D conversion.
The analog inputs can be configured to operate in various combinations of single-ended, differential, or pseudo-differ­ential modes. In addition, input voltage spans as small as 1V can be accommodated.
Applications
Y
High-speed data acquisition
Y
Digitizing automotive sensors
Y
Process control/monitoring
Y
Remote sensing in noisy environments
Y
Disk drives
Y
Portable instrumentation
Y
Test systems
Features
Y
Serial digital data link requires few I/O pins
Y
Analog input track/hold function
Y
4- or 8-channel input multiplexer options with address logic
Y
On-chip 2.5V band-gap reference (g2% over tempera­ture guaranteed)
Y
No zero or full scale adjustment required
Y
TTL/CMOS input/output compatible
Y
0V to 5V analog input range with single 5V power supply
Y
Pin compatible with Industry-Standards ADC0831/4/8
Key Specifications
Y
Resolution 8 Bits
Y
Conversion time (f
C
e
4 MHz) 2 ms (Max)
Y
Power dissipation 20 mW (Max)
Y
Single supply 5 VDC(g5%)
Y
Total unadjusted error
g
(/2 LSB andg1 LSB
Y
Linearity Error (V
REF
e
2.5V)
g
(/2 LSB
Y
No missing codes (over temperature)
Y
On-board Reference
a
2.5Vg1.5% (Max)
ADC08238 Simplified Block Diagram
TL/H/11015– 4
TRI-STATEÉis a registered trademark of National Semiconductor Corporation. COPS
TM
microcontrollers and MICROWIRETMare trademarks of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation RRD-B30M75/Printed in U. S. A.
Ordering Information
Industrial
Package
(
b
40§CsT
A
s
a
85§C)
ADC08231BIN, ADC08231CIN N08E, DIP
ADC08234BIN, ADC08234CIN N14A, DIP
ADC08234CIMF MTB24, TSSOP
ADC08238BIN, ADC08238CIN N20A, DIP
ADC08231BIWM, ADC08231CIWM M14B, SO
ADC08234BIWM, ADC08234CIWM M14B, SO
ADC08238BIWM, ADC08238CIWM M20B, SO
Connection Diagrams
ADC08238
SO and DIP
TL/H/11015– 1
ADC08231
DIP
TL/H/11015– 3
ADC08231
SO
TL/H/11015– 26
ADC08234
SO and DIP
TL/H/11015– 2
ADC08234
TSSOP
TL/H/11015– 27
2
Absolute Maximum Ratings (Notes1&3)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.
Supply Voltage (V
CC
) 6.5V
Voltage at Inputs and Outputs
b
0.3V to V
CC
a
0.3V
Input Current at Any Pin (Note 4)
g
5mA
Package Input Current (Note 4)
g
20 mA
Power Dissipation at T
A
e
25§C (Note 5) 800 mW
ESD Susceptibility (Note 6) 1500V
Soldering Information
N Package (10 sec.) 260
§
C
TSSOP and SO Package (Note 7):
Vapor Phase (60 sec.) 215
§
C
Infrared (15 sec.) 220
§
C
Storage Temperature
b
65§Ctoa150§C
Operating Ratings (Notes2&3)
Temperature Range T
MIN
s
T
A
s
T
MAX
ADC08231BIN, ADC08231CIN,
b
40§CsT
A
s
a
85§C
ADC08234BIN, ADC08234CIN,
ADC08238BIN, ADC08238CIN,
ADC08231BIWM, ADC08231CIWM,
ADC08234BIWM, ADC08238BIWM,
ADC08234CIWM, ADC08238CIWM,
ADC08234CIMF
Supply Voltage (V
CC
) 4.5 VDCto 6.3 V
DC
Electrical Characteristics
The following specifications apply for V
CC
ea
5VDC,V
REF
ea
2.5 VDCand f
CLK
e
4 MHz, R
Source
e
50X unless otherwise
specified. Boldface limits apply for T
A
e
T
J
e
T
MIN
to T
MAX
; all other limits T
A
e
T
J
e
25§C.
ADC08231,
ADC08234 and
ADC08238 with BIN,
Units
Symbol Parameter Conditions CIN, BIWM,
(Limits)
CIWM, or CIMF Suffixes
Typical Limits
(Note 8) (Note 9)
CONVERTER AND MULTIPLEXER CHARACTERISTICS
Linearity Error V
REF
ea
2.5 V
DC
BIN, BIWM
g
(/2 LSB (max)
CIN, CIMF, CIWM
g
1 LSB (max)
Gain Error V
REF
ea
2.5 V
DC
BIN, BIWM
g
1 LSB (max)
CIN, CIMF, CIWM
g
1 LSB (max)
Zero Error V
REF
ea
2.5 V
DC
BIN, BIWM
g
1 LSB (max)
CIN, CIMF, CIWM
g
1 LSB (max)
Total Unadjusted Error V
REF
ea
5V
DC
BIN, BIWM (Note 10)
g
1 LSB (max)
CIN, CIMF, CIWM
g
1 LSB (max)
Differential Linearity V
REF
ea
2.5 V
DC
8 Bits (min)
R
REF
Reference Input Resistance (Note 11) 3.5 kX
1.3 kX (min)
6.0 kX (max)
V
IN
Analog Input Voltage (Note 12) (V
CC
a
0.05) V (max)
(GND
b
0.05) V (min)
3
Electrical Characteristics (Continued)
The following specifications apply for V
CC
ea
5VDC,V
REF
ea
2.5 VDCand f
CLK
e
4 MHz, R
source
e
50X unless otherwise
specified. Boldface limits apply for T
A
e
T
J
e
T
MIN
to T
MAX
; all other limits T
A
e
T
J
e
25§C.
ADC08231,
ADC08234 and
ADC08238 with BIN,
Units
Symbol Parameter Conditions CIN, BIWM,
(Limits)
CIWM, or CIMF Suffixes
Typical Limits
(Note 8) (Note 9)
CONVERTER AND MULTIPLEXER CHARACTERISTICS (Continued)
DC Common-Mode Error V
REF
ea
2.5 V
DC
g
(/2 LSB (max)
Power Supply Sensitivity V
CC
ea
5Vg5%,
g
(/4 LSB (max)
V
REF
ea
2.5 V
DC
On Channel Leakage On Channele5V, 0.2
mA (max)
Current (Note 13) Off Channel
e
0V 1
On Channele0V,
b
0.2 mA (max)
Off Channele5V
b
1
Off Channel Leakage On Channele5V,
b
0.2 mA (max)
Current (Note 13) Off Channel
e
0V
b
1
On Channele0V, 0.2
mA (max)
Off Channel
e
5V 1
DYNAMIC CHARACTERISTICS (see Typical Converter Performance Characteristics)
S
NaD
Signal-to- V
REF
ea
5V
(Noise
a
Distortion) Sample Ratee286 kHz
Ratio V
IN
ea
5V
p-p
f
IN
e
10 kHz 48.35 dB
f
IN
e
50 kHz 48.00 dB
f
IN
e
100 kHz 47.40 dB
DIGITAL AND DC CHARACTERISTICS
V
IN(1)
Logical ‘‘1’’ Input Voltage V
CC
e
5.25V 2.0 V (min)
V
IN(0)
Logical ‘‘0’’ Input Voltage V
CC
e
4.75V 0.8 V (max)
I
IN(1)
Logical ‘‘1’’ Input Current V
IN
e
5.0V 1 mA (max)
I
IN(0)
Logical ‘‘0’’ Input Current V
IN
e
0V
b
1 mA (max)
V
OUT(1)
Logical ‘‘1’’ Output Voltage V
CC
e
4.75V:
I
OUT
eb
360 mA 2.4 V (min)
I
OUT
eb
10 mA 4.5 V (min)
V
OUT(0)
Logical ‘‘0’’ Output Voltage V
CC
e
4.75V 0.4 V (max)
I
OUT
e
1.6 mA
I
OUT
TRI-STATEÉOutput Current V
OUT
e
0V
b
3.0 mA (max)
V
OUT
e
5V 3.0 mA (max)
I
SOURCE
Output Source Current V
OUT
e
0V
b
6.5 mA (min)
I
SINK
Output Sink Current V
OUT
e
V
CC
8.0 mA (min)
I
CC
Supply Current CSeHIGH
ADC08234, ADC08238 3.0 mA (max) ADC08231 (Note 16) 6.0 mA (max)
4
Electrical Characteristics (Continued)
The following specifications apply for V
CC
ea
5VDCand f
CLK
e
4 MHz unless otherwise specified. Boldface limits apply for
T
A
e
T
J
e
T
MIN
to T
MAX
; all other limits T
A
e
T
J
e
25§C.
ADC08231,
ADC08234 and
ADC08238 with BIN,
Units
Symbol Parameter Conditions CIN, BIWM,
(Limits)
CIWM, or CIMF Suffixes
Typical Limits
(Note 8) (Note 9)
REFERENCE CHARACTERISTICS
V
REF
OUT Output Voltage BIN, BIJ, 2.5
2.5
g
1.5%
V
BIWM
g
2%
CIN, CIJ, 2.5
2.5
g
3.0%
CIWM, CMJ
g
3.5%
DV
REF
/DT Temperature Coefficient 40 ppm/§C
DV
REF
/DI
L
Load Regulation Sourcing
%/mA
(max)
(Note 17) (0sI
L
s
a
4 mA)
ADC08234,
0.003 0.1
ADC08238
Sourcing (0
s
I
L
s
a
2 mA)
ADC08231 0.003 0.1
Sinking (b1sI
L
s
0 mA)
ADC08234,
0.2 0.5
ADC08238
Sinking (
b
1sI
L
s
0 mA)
ADC08231 0.2 0.5
Line Regulation 4.75VsV
CC
s
5.25V
0.5 6
mV
(max)
I
SC
Short Circuit Current V
REF
e
0V
(max)
mA
ADC08234,
8 25
ADC08238
V
REF
e
0V
ADC08231 8 25
T
SU
Start-Up Time VCC:0Vx5V
20 ms
C
L
e
100 mF
DV
REF
/Dt Long Term Stability 200 ppm/1 kHr
5
Electrical Characteristics (Continued)
The following specifications apply for V
CC
ea
5VDC,V
REF
ea
2.5 VDCand t
r
e
t
f
e
20 ns unless otherwise specified.
Boldface limits apply for T
A
e
T
J
e
T
MIN
to T
MAX
; all other limits T
A
e
T
J
e
25§C.
Symbol Parameter Conditions
Typical Limits Units (Note 8) (Note 9) (Limits)
f
CLK
Clock Frequency 10 kHz (min)
4 MHz (max)
Clock Duty Cycle 40 % (min) (Note 14) 60 % (max)
T
C
Conversion Time (Not Including f
CLK
e
4 MHz 8 1/f
CLK
(max)
MUX Addressing Time) 2 ms (max)
t
CA
Acquisition Time 1(/2 1/f
CLK
(max)
t
SELECT
CLK High while CS is High 50 ns
t
SET-UP
CS Falling Edge or Data Input
25 ns (min)
Valid to CLK Rising Edge
t
HOLD
Data Input Valid after CLK
20 ns (min)
Rising Edge
t
pd1,tpd0
CLK Falling Edge to Output C
L
e
100 pF:
Data Valid (Note 15) Data MSB First 250 ns (max)
Data LSB First 200 ns (max)
t1H,t
0H
TRI-STATE Delay from Rising Edge C
L
e
10 pF, R
L
e
10 kX
50 ns
of CS
to Data Output and SARS Hi-Z (see TRI-STATE Test Circuits)
C
L
e
100 pF, R
L
e
2kX 180 ns (max)
C
IN
Capacitance of Logic Inputs 5 pF
C
OUT
Capacitance of Logic Outputs 5 pF
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Note 2: Operating Ratings indicate conditions for which the device is functional. These ratings do not guarantee specific performance limits. For guaranteed
specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. Note 3: All voltages are measured with respect to AGND
e
DGNDe0VDC, unless otherwise specified.
Note 4: When the input voltage (V
IN
) at any pin exceeds the power supplies (V
IN
k
(AGND or DGND) or V
IN
l
AVCC,) the current at that pin should be limited to 5 mA. The 20 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 5 mA to four pins. Note 5: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
J
MAX
, iJAand the ambient temperature, TA. The maximum
allowable power dissipation at any temperature is P
D
e
(T
J
MAX
b
TA)/iJAor the number given in the Absolute Maximum Ratings, whichever is lower. For devices
with suffixes BIN, CIN, BIJ, CIJ, BIWM, and CIWM T
J
MAX
e
125§C. For devices with suffix CMJ, T
J
MAX
e
150§C. The typical thermal resistances (iJA) of these
parts when board mounted follow: ADC08231 with BIN and CIN suffixes 120
§
C/W, ADC08234 with BIN and CIN suffixes 95§C/W, ADC08234 with CIMF suffix
167
§
C/W, ADC08238 with BIN and CIN suffixes 80§C/W. ADC08231 with BIWM and CIWM suffixes 140§C/W, ADC08234 with BIWM and CIWM suffixes 140§C/W,
ADC08238 with BIWM and CIWM suffixes 91
§
C/W,
Note 6: Human body model, 100 pF capacitor discharged through a 1.5 kX resistor. Note 7: See AN450 ‘‘Surface Mounting Methods and Their Effect on Product Reliability’’ or
Linear Data Book
section ‘‘Surface Mount’’ for other methods of soldering surface mount devices. Note 8: Typicals are at T
J
e
25§C and represent the most likely parametric norm.
Note 9: Guaranteed to National’s AOQL (Average Outgoing Quality Level). Note 10: Total unadjusted error includes zero, full-scale, linearity, and multiplexer error. Total unadjusted error with V
REF
ea
5V only applies to the ADC08234
and ADC08238. See Note 16.
Note 11: Cannot be tested for the ADC08231. Note 12: For V
IN(b)
t
V
IN(a)
the digital code will be 0000 0000. Two on-chip diodes are tied to each analog input (see Block Diagram) which will forward-conduct
for analog input voltages one diode drop below ground or one diode drop greater than V
CC
supply. During testing at low VCClevels (e.g., 4.5V), high level analog inputs (e.g., 5V) can cause an input diode to conduct, especially at elevated temperatures. This will cause errors for analog inputs near full-scale. The specification allows 50 mV forward bias of either diode; this means that as long as the analog V
IN
does not exceed the supply voltage by more than 50 mV, the output code will
be correct. Exceeding this range on an unselected channel will corrupt the reading of a selected channel. Achievement of an absolute 0 V
DC
to5VDCinput voltage
range will therefore require a minimum supply voltage of 4.950 V
DC
over temperature variations, initial tolerance and loading. Note 13: Channel leakage current is measured after a single-ended channel is selected and the clock is turned off. For off channel leakage current the following two cases are considered: one, with the selected channel tied high (5 V
DC
) and the remaining off channels tied low (0 VDC), total current flow through the off channels is measured; two, with the selected channel tied low and the off channels tied high, total current flow through the off channels is again measured. The two cases considered for determining on channel leakage current are the same except total current flow through the selected channel is measured. Note 14: A 40% to 60% duty cycle range insures proper operation at all clock frequencies. In the case that an available clock has a duty cycle outside of these limits the minimum time the clock is high or low must be at least 120 ns. The maximum time the clock can be high or low is 100 m s. Note 15: Since data, MSB first, is the output of the comparator used in the successive approximation loop, an additional delay is built in (see Block Diagram) to allow for comparator response time. Note 16: For the ADC08231 V
REF
IN is internally tied to the on chip 2.5V band-gap reference output; therefore, the supply current is larger because it includes the reference current (700 mA typical, 2 mA maximum). Note 17: Load regulation test conditions and specifications for the ADC08231 differ from those of the ADC08234 and ADC08238 because the ADC08231 has the on-board reference as a permanent load.
6
Typical Performance Characteristics
Reference Voltage
Linearity Error vs
Temperature
Linearity Error vs
Clock Frequency
Linearity Error vs
ADC08234)
Temperature (ADC08238,
Power Supply Current vs
Temperature
Output Current vs
vs Clock Frequency
Power Supply Current
Note: For ADC08231 add I
REF
(Note 16) TL/H/11015– 5
10 kHz Sine Wave Input
Spectral Response with
50 kHz Sine Wave Input
Spectral Response with
100 kHz Sine Wave Input
Spectral Response with
Ratio vs Input Frequency
Signal-to-Noise
a
Distortion
TL/H/11015– 6
7
Typical Reference Performance Characteristics
Load Regulation (3 Typical Parts)
Line Regulation
(3 Typical Parts)
vs Temperature
Output Drift
vs Supply Voltage
Output Current
Available
TL/H/11015– 7
8
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