NOVATEK NT7605-BDW01, NT7605H-BDT01, NT7605H-BDB01 Datasheet
NT7605
Single-chip 20C X 2L Dot-Matrix LCD Controller / Driver
1 V2.1
Features
! Internal LCD drivers
16 common signal drivers
100 segment signal drivers
! Maximum display dimensions
20 characters * 2 lines or
40 characters * 1 line
! Interfaces with 4-bit or 8-bit MPU
! Versatile display functions provided on chip:
Display Clear, Cursor Home, Display ON/OFF,
Cursor ON/OFF, Character Blinking, Cursor
Shift, and Display Shift
! Three duty factors, selected by PROGRAM:
1/8, 1/11, and 1/16
! Displays Data RAM (DD RAM): 80 X 8 bits
(Displays up to 80 characters)
! Character Generator RAM (CG RAM):
64 X 8 bits for general data,
8 5 X 8 programmable dot patterns, or
4 5 X 10 programmable dot patterns
! Low voltage reset
! ITO option for A-type and B-type LCD waveform
! 2 kinds of LCD pads sequence
! Character Generator ROM (CG ROM):
2 kinds of CG ROM sizes:
192 characters:
160 5 X 8 dot patterns
32 5 X 10 dot patterns
240 characters:
192 5 X 8 dot patterns
48 5 X 10 dot patterns
Custom CG ROM is also available
! Built-in power-on reset function
! Logic power supply: 2.8V ~ 5.5V
! LCD driver power supply: V1 ~ V5
divided by Built-in LCD power division resister.
! Two oscillator operations
(Freq. = 500KHz - 540KHz):
• Built-in RC oscillation
• External clock
! CMOS Process
! Available in COG FORM
General Description
The NT7605 is a dot matrix LCD controller and driver LSI that
can operate with either a 4-bit or an 8-bit microprocessor
(MPU). NT7605 receives control character codes from the
MPU, stores them in an internal RAM (up to 80 characters),
transforms each character code into a 5 X 7, 5 X 8, or 5 X 10
dot matrix character pattern, and then displays the codes on
the LCD panel. The built-in Character Generator ROM
consists of 256 different character patterns.
The NT7605 also contains Character Generator RAM where
the user can store 8 different character patterns at run time.
These memory features make the character display flexible.
NT7605 also provides many display instructions to achieve
versatile LCD display functions. The NT7605 is fabricated on
a single LSI chip using the CMOS process, resulting in very
low power requirements.
NT7605
2
Pad Configuration
121
163
64
65
NT7605
11 13 14 26 27 29 30 38 45
82
83
162
180
5600µm
1230µm
39 44
Size
Item Pad No.
X Y
Unit
Chip size - 1230 5600
Pad pitch 1 - 180 65
µm
NT7605
3
Block Diagram
I/O
BUFFER
V
1
V
2
V
3
V
4
V
5
RS
R/W
E
DB7 ~ DB4
DB3 ~ DB0
4
4
INSTRUCTION
REGISTER
(IR)
8
INSTRUCTION
DECODE
8
ADDRESS
COUNTER
V
DD
GND
OSC1
OSC2
TIMING
GENERATOR
DATA
REGISTER
(DR)
BUSY
FLAG
(BF)
8
7
7
CHARACTER
GENERATOR
RAM
(CG RAM)
64 X 8 BITS
CURSOR
ADDRESS
COUNTER
DISPLAY
DATA
RAM
(DD RAM)
80 X 8 BITS
16-BIT
SHIFT
REGISTER
COMMON
SIGNAL
DRIVER
7
CURSOR
/BLINK
CONTROLLER
7
7
7
LCD DRIVER
VOLTAGE
GENERATOR
16
8
8
CHARACTER
GENERATOR
ROM (CG ROM)
8
16
COM1
I
COM16
100-BIT
LATCH
CIRCUIT
SEGMENT
SIGNAL
DRIVER
100
100
SEG1
I
SEG100
PARALLER - TO - SERIAL
CONVERTER
5
5
TESTM
7
OPT_UD
OPT_R0
OPT_R1
OPT_LCD
TEST
TESTD
NT7605
4
Pad Description (
Total 180 pads for COG type)
Pad No. Designation I/O
External
Connection
Description
1 TEST I Test pin
Test pin internally pull-down. (No connect for user)
2 TESTM O Test output
LCD driver clock output. (No connect for user)
3 - 11 GND P Power supply
GND: 0V
12 OSC1 I
For external clock operation, clock inputs to OSC1
13 OSC2 O
Clock output
14, 15 V1 P Power supply
Power supply for LCD driver. V
DD
≥ V1 ≥ V2 ≥ V3 ≥ V4 ≥ V5 ≥ GND
16, 17 V2 P Power supply
Power supply for LCD driver
18, 19 V3 P Power supply
Power supply for LCD driver
20, 21 V4 P Power supply
Power supply for LCD driver
22 - 26 V5 P Power supply
Power supply for LCD driver
27, 29
OPT_R0,
OPT_R1
I ITO Option
The built-in bias resister select:
OPT_R1, OPT_R0: No ITO = 1. ITO on = 0
1, 1: 2.2KΩ; 1, 0: 4KΩ;
0, 1: 6.8KΩ; 0, 0: No built-in bias resister:
30 - 38 VDD P Power supply
V
DD
: +5V
30, 40 RS I MPU
Register select signal
0: Instruction register (write), Busy flag, address counter (read)
1: Data register (write, read)
41, 42 R/W I MPU
Read/Write control signal
0: Write 1: Read
43, 44 E I MPU
Read/Write start signal (Schmitt trigger input)
45, 46 DB0
47, 48 DB1
49, 50 DB2
51, 52 DB3
I/O MPU
Lower 4 tri-state bi-directional data bus for transmitting data
between MPU and NT7605. Not used during 4-bit operation
53, 54 DB4
55, 56 DB5
57, 58 DB6
59, 60 DB7
I/O MPU
Higher 4 tri-state bi-directional data bus for transmitting data between
MPU and NT7605. DB7 is also used as busy flag
61 OPT_LCD I ITO Option
No ITO. (Option = 1): B-Type waveform
ITO On. (Option = 0): A-Type waveform
63 OPT_UD I ITO Option
No ITO. (Option = 1): COM1→COM8→COM9→COM16;
SEG1→SEG100
ITO On. (Option = 0): COM9→COM16→COM1→ COM8;
SEG100→SEG1
64 TESTD O Test output
Test data output. (No connect for user)
180 - 173 COM1 - 8 O LCD panel
65 - 72 COM9 - 16 O LCD panel
Common signal output pins, for place on the upper glass
(OPT_UD=1)
65 - 72 COM1 - 8 O LCD panel
180 - 173 COM9 - 16 O LCD panel
Common signal output pins, for place on the lower glass
(OPT_UD=0)
172 - 73 SEG1 - 100 O LCD panel
Segment signal output pins (OPT_UD = 1)
73 - 172 SEG1 - 100 O LCD panel
Segment signal output pins (OPT_UD = 0)
28, 62 GND_OUT P
GND output pin, use for pull-down ITO option
NT7605
5
Functional Description
The NT7605 is a dot-matrix LCD controller and driver LSI. It
operates with either a 4-bit or an 8-bit microprocessor (MPU).
The NT7605 receives both instructions and data from the
MPU. Some instructions set operation modes, such as the
function mode, data entry mode, and display mode; as well
as some control LCD display functions, such as clear display,
restore display, shift display as well as controlling the cursor.
Other instructions include reading and writing both data and
addresses. All the instructions allow users convenient and
powerful functions to control the LCD dot-matrix displays.
Data is written into and read from the Data Display RAM (DD
RAM) or the Character Generator RAM (CG RAM). As
display character codes, the data stored in the DD RAM
decodes a set of dot-matrix character patterns that are built
into the Character Generator ROM (CG ROM). The CG
ROM, with many character patterns (up to 256 patterns),
defines the character pattern fonts. The NT7605 regularly
scans the character patterns through the segment drivers.
The CG RAM stores character pattern fonts at run time if
users intend to show character patterns that are not defined
in the CG ROM. This feature makes character display
flexible. Other unused bytes can be used as general-purpose
data storage.
The LCD driver circuit consists of 16 common signal drivers
and 100 segment signal drivers allowing a variety of
application configurations to be implemented.
Character Generator ROM (CG ROM)
The character generator ROM generates LCD dot character
patterns from the 8-bit character pattern codes. The NT7605
provides 2 CG ROM configurations:
1. 192 Characters:
The CG ROM contains 160 5 X 8 dot character patterns and
32 5 X 10 dot character patterns. The relation between the
character codes and character patterns is shown in Table 1.
The character codes from 00H to 0FH are used to get
character patterns from the CG RAM. The character codes
10H to 1FH, 80H to 9FH and 20H all map to null character
patterns. The character codes from E0H to FFH are
assigned to generate 5 X 10 dot character patterns, and
other codes are used to generate 5x8 dot character patterns.
2. 240 Characters:
The CG ROM contains 192 5 X 8 dot character patterns and
48 5 X 10 dot character patterns. The relation between the
character codes and character patterns is shown in Table 2.
The character codes from 00H to 0FH are used to get
character patterns from the CG RAM. The character codes
from 10H to 1FH and from E0H to FFH are assigned to
generate 5 X 10 dot character patterns, and other codes to
generate 5 X 8 dot character patterns. Only one null
character pattern exists in this type. Note that the underlined
cursor, displayed on the 8th duty may be obscure if the 8th
row of a dot character pattern is coded. We recommend that
users display the cursor in the blinking mode if coding 5 X 8
dot character patterns is their custom CG ROM.
Custom character patterns are available by
mask-programming the ROM. For convenience of character
pattern development, NOVATEK has developed a
user-friendly editor program for the NT7605 to help
determine the character patterns users prefer. By executing
the program on the computer, users can easily create and
modify their character patterns. By transferring the resulting
files generated by the program through a modem or some
other communication method, the user and NOVATEK can
establish a reliable, fast link for programming the CG ROM.
NT7605
6
Absolute Maximum Ratings*
Power Supply Voltage (VDD) . . . . . . . . . . -0.3V to +7.0V
Power Supply Voltage (V
1
to V5) . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND to V
DD
+ 0.3V
Input Voltage (V
I
) . . . . . . . . . . . . . . .-0.3V to VDD + 0.3V
Operating Temperature (T
OPR
) . . . . . . .-20°C to +70°C
Storage Temperature (T
STG
) . . . . . . . .-55°C to +125°C
*Comments
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to this device.
These are stress ratings only. Functional operation of this
device at these or any other conditions above those indicated
in the operational sections of this specification is not implied
or intended. Exposure to the absolute maximum rating
conditions for extended periods may affect device reliability.
! All voltage values are referenced to GND = 0V
! V
1
to V5, must maintain VDD ≥ V1 ≥ V2 ≥ V3 ≥ V4 ≥ V
5
≥ GND
DC Electrical Characteristics
(VDD = 4.5V~5.5V, GND = 0V, TA = 25°C)
Symbol Parameter Min. Typ. Max. Unit Conditions
Applicable
Pin
VDD Operating Voltage 4.5 5.0 5.5 V
V
IH1
"H" Level Input Voltage 0.8 VDD - VDD V
V
IL1
"L" Level Input Voltage -0.3 - 0.2 VDD V
DB0 - DB7,
RS, R/W,
E, OSC1
V
OH1
"H" Level Output Voltage VDD - 0.6 - - V IOH = -1.2mA
V
OL1
"L" Level Output Voltage - - GND + 0.6 V IOL = 1.2mA
DB0 - DB7
(CMOS)
V
COMD
Driver Voltage Descending (COM) - - 0.3 V
ID = 5µA
COM1 - 16
V
SEGD
Driver Voltage Descending (SEG) - - 0.3 V
ID = 5µA
SEG1 - 100
IIL Input Leakage Current -1 - 1
µA
VIN = 0 to VDD
-IP Pull-up MOS Current 50 125 250
µA
VDD = 5V
RS, R/W,
DB0 - DB7
IOP Power Supply Current - 1 1.5 mA
Rf oscillation,
from external
clock V
DD
= 5V,
f
OSC
= fCP =
540KHz,
include LCD bias
current
V
DD
External Clock Operation
fCP
External Clock Operating
Frequency
380 540 750 KHz
t
DUTY
External Clock Duty Cycle 45 50 55 %
t
RCP
External Clock Rise Time 0.1 - 0.5
µs
t
FCP
External Clock Fall Time 0.1 - 0.5
µs
Internal Clock Operation (Built-in RC Oscillator)
f
OSC
Oscillator Frequency 380 540 750 KHz
Rf = 50KΩ (reference only)
V
DD
= 2 .8V ~ 5.5V
V
LCD
LCD Driving Voltage 3.0 - VDD V VDD - V5
NT7605
7
DC Electrical Characteristics (continued)
(VDD = 2.8V~4.5V, GND = 0V, TA = 25°C)
Symbol Parameter Min. Typ. Max. Unit Conditions
Applicable
Pin
VDD Operating Voltage 2.8 3.0 4.5 V
V
IH1
"H" Level Input Voltage 0.8 VDD - VDD V
V
IL1
"L" Level Input Voltage -0.3 - 0.2 VDD V
DB0 - DB7,
RS, R/W,
E, OSC1
V
OH1
"H" Level Output Voltage V
DD
- 0.4 - - V IOH = -0.8mA
V
OL1
"L" Level Output Voltage - - GND + 0.4 V IOL = 0.8mA
DB0 - DB7
(CMOS)
V
COMD
Driver Voltage Descending (COM) - - 0.3 V
ID = 5µA
COM1 - 16
V
SEGD
Driver Voltage Descending (SEG) - - 0.3 V
ID = 5µA
SEG1 - 100
IIL Input Leakage Current -1 - 1
µA
VIN = 0 to VDD
-IP Pull-up MOS Current 30 75 150
µA
VDD = 3V
RS, R/W,
DB0 - DB7
IOP
Supply Current Power Supply
Current
- 1 1.5 mA
Rf oscillation,
from external
clock V
DD
= 3V,
f
OSC
= fCP =
540KHz,
include LCD
bias current
V
DD
External Clock Operation
fCP
External Clock Operating
Frequency
380 540 750 KHz
t
DUTY
External Clock Duty Cycle 45 50 55 %
t
RCP
External Clock Rise Time 0.1 - 0.5
µs
t
FCP
External Clock Fall Time 0.1 - 0.5
µs
Internal Clock Operation (Built-in RC Oscillator)
f
OSC
Oscillator Frequency 380 540 750 KHz
Rf = 50KΩ (reference only)
V
DD
= 2 .8V ~ 5.5V
V
LCD
LCD Driving Voltage 2.5 - VDD V VDD - V5
NT7605
8
AC Characteristics
Read Cycle (VDD = 4.5V~5.5V, GND = 0V, T
A
= 25°C)
Symbol Parameter Min. Typ. Max. Unit Conditions
t
CYCE
Enable Cycle Time 500 - - ns Figure 1
t
WHE
Enable "H" Level Pulse Width 300 - - ns Figure 1
tRE, tFE Enable Rise/Fall Time - - 25 ns Figure 1
601 - -
tAS RS, R/W Setup Time
1002
ns Figure 1
tAH RS, R/W Address Hold Time 10 - - ns Figure 1
tRD Read Data Output Delay - - 190 ns Figure 1
t
DHR
Read Data Hold Time 20 - - ns Figure 1
Write Cycle (VDD = 4.5V~5.5V, GND = 0V, TA = 25°C)
Symbol Parameter Min. Typ. Max. Unit Conditions
t
CYCE
Enable Cycle Time 500 - - ns Figure 2
t
WHE
Enable "H" Level Pulse Width 300 - - ns Figure 2
tRE, tFE Enable Rise/Fall Time - - 25 ns Figure 2
601 - - ns Figure 2
tAS RS, R/W Setup Time
1002
tAH RS, R/W Address Hold Time 10 - - ns Figure 2
tDS Data Output Delay 100 - - ns Figure 2
t
DHW
Data Hold Time 10 - - ns Figure 2
Notes: 1: 8-bit operation mode
2: 4-bit operation mode
Power Supply Conditions Using Internal Reset Circuit
(VDD = 4.5V~5.5V, GND = 0V, TA = 25°C)
Symbol Parameter Min. Typ. Max. Unit Conditions
t
RON
Power Supply Rise Time 0.1 - 10 ms Figure 3
t
OFF
Power Supply OFF Time 1 - - ms Figure 3
NT7605
9
AC Characteristics (continued)
Read Cycle (VDD = 2.8V~4.5V, GND = 0V, T
A
= 25°C)
Symbol Parameter Min. Typ. Max. Unit Conditions
t
CYCE
Enable Cycle Time 500 - - ns Figure 1
t
WHE
Enable "H" Level Pulse Width 300 - - ns Figure 1
tRE, tFE Enable Rise/Fall Time - - 25 ns Figure 1
601 - - ns Figure 1
tAS RS, R/W Setup Time
100
2
tAH RS, R/W Address Hold Time 10 - - ns Figure 1
tRD Read Data Output Delay - - 190 ns Figure 1
t
DHR
Read Data Hold Time 20 - - ns Figure 1
Write Cycle (VDD = 2.8V~4.5V, GND = 0V, TA = 25°C)
Symbol Parameter Min. Typ. Max. Unit Conditions
t
CYCE
Enable Cycle Time 500 - - ns Figure 2
t
WHE
Enable "H" Level Pulse Width 300 - - ns Figure 2
tRE, tFE Enable Rise/Fall Time - - 25 ns Figure 2
601 - - ns Figure 2
tAS RS, R/W Setup Time
100
2
tAH RS, R/W Address Hold Time 10 - - ns Figure 2
tDS Data Output Delay 150 - - ns Figure 2
t
DHW
Data Hold Time 10 - - ns Figure 2
Notes: 1: 8-bit operation mode
2: 4-bit operation mode
Power Supply Conditions Using Internal Reset Circuit
(VDD = 2.8V~4.5V, GND = 0V, TA = 25°C)
Symbol Parameter Min. Typ. Max. Unit Conditions
t
RON
Power Supply Rise Time 0.1 - 10 ms Figure 3
t
OFF
Power Supply OFF Time 1 - - ms Figure 3
NT7605
10
Timing Waveforms
Read Operation
RS
R/W
E
DB0 ~ DB7
V
IH1
V
IL1
t
RE
t
RD
V
OH1
V
OL1
VAILD DATA
V
IH1
V
IL1
t
AS
V
IH1
V
IL1
t
AH
t
WHE
t
FE
V
IL1
t
DHR
V
OH1
V
OL1
t
CYCE
V
IL1
Figure 1. Bus Read Operation Sequence
(Reading out data from NT7605 to MPU)
Write Operation
RS
R/W
E
DB0 ~ DB7
V
IH1
V
IL1
t
RE
t
DS
V
IH1
V
IL1
VAILD DATA
V
IH1
V
IL1
t
AS
V
IH1
V
IL1
t
AH
t
WHE
t
FE
V
IL1
t
DHW
V
IH1
V
IL1
t
CYCE
V
IL1
V
IL1
Figure 2. Bus Write Operation Sequence
(Writing data from MPU to NT7605)
Interface Signals with Segment Driver LSI
V
DD
0.2V
t
RON
4.5V
0.1ms >
t
RON
> 10ms
t
OFF
0.2V
0.2V
t
OFF
> 1ms
Figure 3. t
OFF
stipulates the time of power off for instantaneous
Power supply to or when power supply repeats ON and OFF.
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