Nokia 9110 Service Manual 03rf

PAMS Technical Documentation

RAE–2 Series transceiver

Chapter 3

–Transceiver BS8 –

BS8_RF Block

RAE–2

PAMS

BS8_RF

Amendment Number

Technical Documentation

AMENDMENT RECORD SHEET

Date Inserted By Comments

02/99 Original

Page 3 – 2

Original 02/99

PAMS

RAE–2

Technical Documentation

CONTENTS – RF

Introduction 3 – 5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Technical summary 3 – 5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

RF Characteristics 3 – 5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Transmitter Characteristics 3 – 6. . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output power 3 – 6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Receiver characteristics 3 – 7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DC characteristics 3 – 8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Regulators 3 – 8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Power distribution diagram 3 – 8. . . . . . . . . . . . . . . . . . . . . . . . . .

Functional descriptions 3 – 10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Normal and extreme voltages 3 – 10. . . . . . . . . . . . . . . . . . . . . . . . . .

RF block diagram 3 – 10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Frequency synthesizers 3 – 12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Receiver 3 – 13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Transmitter 3 – 14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

AGC strategy 3 – 16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

AFC function 3 – 17. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

RF block requirements 3 – 18. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Duplex filter 3 – 18. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Receiver blocks 3 – 18. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

LNA in CRFU_1a 3 – 18. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

RX interstage filter 3 – 19. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1st mixer in CRFU_1a 3 – 19. . . . . . . . . . . . . . . . . . . . . . . . . . . .

1st IF–filter 3 – 20. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

AGC–stage and 2nd mixer in SUMMA 3 – 20. . . . . . . . . . . . . .

2nd IF Filter 3 – 21. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Buffer in SUMMA for 2nd IF 3 – 21. . . . . . . . . . . . . . . . . . . . . . .

Transmitter blocks 3 – 21. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

IQ–modulator and TX–AGC in SUMMA 3 – 21. . . . . . . . . . . . .

116 MHz LC TX IF–filter 3 – 22. . . . . . . . . . . . . . . . . . . . . . . . . .

Upconversion mixer and in CRFU_1a 3 – 23. . . . . . . . . . . . . .

TX interstage filter 3 – 23. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Power amplifier MMIC 3 – 24. . . . . . . . . . . . . . . . . . . . . . . . . . . .

Directional coupler 3 – 25. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Power detector 3 – 25. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Power control section in SUMMA 3 – 26. . . . . . . . . . . . . . . . . .

Synthesizers blocks 3 – 27. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

VCTCXO, reference oscillator 3 – 27. . . . . . . . . . . . . . . . . . . . .

VHF PLL in SUMMA 3 – 28. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

VHF VCO and low pass filter 3 – 28. . . . . . . . . . . . . . . . . . . . . .

BS8_RF

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BS8_RF

UHF PLL 3 – 29. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

UHF VCO module 3 – 30. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

UHF local signal input in CRFU_1a 3 – 31. . . . . . . . . . . . . . . . . . .

RF/BB/DSP Interface 3 – 31. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Interface Signal Characteristics 3 – 31. . . . . . . . . . . . . . . . . . . . . . . . .

Data Interface and Timing 3 – 32. . . . . . . . . . . . . . . . . . . . . . . . . . .

Transmit Power Timing 3 – 34. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

SUMMA and Synthesizer Control 3 – 35. . . . . . . . . . . . . . . . . . . . . . .

Registers 3 – 35. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

PLL Control Word Format 3 – 35. . . . . . . . . . . . . . . . . . . . . . . . . . .

Control Register 3 – 35. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Synthesizer clocking 3 – 36. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

GSM Division ratios 3 – 36. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Clocking scheme 3 – 36. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

SUMMA and Synthesizer Control 3 – 35. . . . . . . . . . . . . . . . . . . . . . .

List of abbreviations 3 – 36. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Technical Documentation

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Technical Documentation

Introduction

This document defines the RF–module of the RAE–2 GSM–”engine”.

This section contains electrical specifications, functional descriptions,

block diagrams etc.

Technical summary

The RF in the RAE–2 GSM is based on the architecture used in DCT 3.

The RAE–2 RF Engine (figure below) is a single side design, on the

A–side, with all components located under the PDA unit. Shielding com-

prises three shielding cans with removable lids. The maximum building

height for the RF Engine is 2 mm.

BS8_RF

ANT

CRFU

DUPLEX

Detect

RF Characteristics

SAW

Match Match

116MHz

232MHz

VCO

Loop Filter

13MHz

VCTCXO

71MHz

SAW

SUMMA

stripline ustripline

13MHz

CER

Loop Filter

UHF VCO

Table 1. Main RF characteristics

Item Values

Receive frequency range 935 ... 960 MHz Transmit frequency range 890 ... 915 MHz Duplex spacing 45 MHz Channel spacing 200 kHz

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PAMS

BS8_RF

Table 1. Main RF characteristics (continued)

Number of RF channels 124 Power class 4 Number of power levels 15

Technical Documentation

ValuesItem

Note 1 : Standard of primary GSM 900 Band, P – GSM

890 – 915 MHz : Mobile transmit, Downlink

935 – 960 MHz : Mobile receive, Uplink

Transmitter Characteristics

Item Values

Type Upconversion, nonlinear, FDMA/TDMA Intermediate frequency ( phase modulated ) 116 MHz LO frequency range 1006 ... 1031 MHz Output power 2 W peak ( 33 dBm ) Power control range min. 5 ... 33 dBm Maximum phase error ( RMS/peak ) max 5 deg./20 deg. peak

Output power

Parameter Min. Typ. Max. Unit / Notes

Max. output power 33.0 dBm Max. output power tolerance

(power level 5) Output power tolerance /

power levels 6...15 Output power tolerance /

power levels 16...19 Output power control step

size

0.5 2.0 3.5 dB

Note 1 : Output power refers to the measure of power when averaged over the useful part of the burst. Power levels are measured at the antenna connector.

+/– 2.0 +/– 2.5

+/– 3.0 +/– 4.0

+/– 5.0 +/– 6.0

dB, normal cond. dB, extreme cond.

Note 2 : Interval between power steps shall be 2 +/–1.5 dB

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RAE–2

Technical Documentation

Receiver characteristics

Item Values

Type Linear, FDMA/TDMA IF frequencies 1st 71 MHz, 2nd 13 MHz LO frequencies 1st LO 1006 ... 1031 MHz, 2nd LO 58 MHz Typical 1 dB bandwidth +/– 90 kHz Sensitivity min. – 102 dBm , S/N >8 dB Total typical receiver voltage gain ( from anten-

na to RX ADC )

Receiver output level ( RF level –95 dBm ) 50 mVpp ( typical balanced signal level of 13

Typical AGC range (dynamic range –93dB) –17 ... +40 dB

73 dB

MHz IF in RF BB interface = input level to RX ADCs )

BS8_RF

Accurate AGC control range 57 dB Typical AGC step in LNA –15 dB Usable input dynamic range –102 ... –10 dBm RSSI dynamic range –110 ... –48 dBm AGC relative accuracy on channel ( accurate

range ) Compensated gain variation in receiving band +/– 1.0 dB

+/– 0.8 dB

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RAE–2

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BS8_RF

DC characteristics

Regulators

Transceiver has got a multi function power management IC, which con-

tains among other functions, also 7 pcs of 2.8 V regulators. All regulators

can be controlled individually with 2.8 V logic directly or through control

regulators are used to enable RF–functions.

Use of the regulators can be seen in the power distribution diagram.

CCONT also provides 1.5 V reference voltage for SUMMA and CRFU1a

( and for DACs and ADCs in COBBA too ).

All control signals are coming from MAD and they are 2.8 V logic signals..

Technical Documentation

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3.6 V

Power distribution diagram

PAMS

Technical Documentation

Page 3 – 9

C–CONT

VR 1

2.3 mA

VCTCXO

BUFFER

VXO

VR 2

51 mA

CRFU, SUMMA

VRX

BATTERY

VR 3

18 mA

PLLs

VSYN_2

VR 4

19.5 mA

VCOs

BUFFERS

VSYN_1

VR 5

84 mA

CRFU, SUMMA

VTX

VR 6

COBBA ANAL.

1.6 A

VR 7

VREF V5V

0.1 mA

SUMMA CRFU

VREF_1 VREF_2

1 mA

CHARGE PUMPs

VCP

VBATT

TXP

VXOENA

SYNPWR

RXPWR TXPWR

BS8_RF

RAE–2

PAMS

BS8_RF

Functional descriptions

RF block diagram

The RF block comprises a conventional dual conversion receiver and the

transmitter features an up–conversion mixer for the final TX–frequency.

The architecture contains three ICs. Most of the functions are horizontally

and vertically integrated. UHF functions except power amplifier and VCO

are integrated into CRFU_1a, which is a BiCMOS–circuit suitable for

LNA– and mixer–function. Most of the functions are in SUMMA, which

also is a BiCMOS–circuit. SUMMA is a IF–circuit including IQ–modulator

and PLLs for VHF– and UHF–synthesizers.

Power amplifier is also an ASIC, it is a so called MMIC ( monolithic mi-

crowave integrated circuit ). It has got three amplifier stages including in-

put and interstage matchings. Output matching network is external. Also

TX gain control is integrated into this chip.

Technical Documentation

See block diagram next page

Page 3 – 10

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RAE–2

Technical Documentation

SUMMA

TQFP–48

BS8_RF

Original 02/99

antenna

Figure 1.

ext.ant.conn.

Power amplifier

two way switch

Page 3 – 11

RAE–2

PAMS

BS8_RF

Frequency synthesizers

Both VCOs are locked with PLLs into stable frequency source, which is a

VCTCXO–module ( voltage controlled temperature compensated crystal

oscillator ). The VCTCXO is running at 13 MHz. Temperature effect is

controlled with AFC ( automatic frequency control ) voltage, the VCTCXO

is locked into the frequency of the base station. AFC is generated by

baseband with a 11 bit conventional DAC in COBBA.

The UHF PLL is located in the SUMMA. There is 64/65 (P/P+1) prescal-

er, N– and A–divider, reference divider, phase detector and charge pump

for the external loop filter.

The UHF local signal is generated by a VCO–module ( VCO = voltage

controlled oscillator ) and sample of frequency of VCO is fed to prescaler.

The prescaler is a dual modulus divider. The output of the prescaler is

fed to the N– and A–dividers, which produce the input to phase detector.

The phase detector compares this signal to reference signal, which is di-

vided with reference divider from VCTCXO output. Output of the phase

detector is connected into charge pump, which charges or discharges in-

tegrator capacitor in the loop filter depending on the phase of the mea-

sured frequency compared to reference frequency.

Technical Documentation

The loop filter filters out the pulses and generates the DC to control the

frequency of UHF–VCO. The loop filter defines step response of the PLL

( settling time ) and effects to stability of the loop, that’s why integrator ca-

pacitor has got a resistor for phase compensation.

The other filter components are for sideband rejection. Dividers are con-

trolled via serial bus. SDATA is for data, SCLK is serial clock for the bus

and SENA1 is a latch enable, which stores new data into dividers. The

UHF–synthesizer is the channel synthesizer, so the channel spacing is

200 kHz. 200 kHz is the reference frequency for the phase detector.

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