Power Supply .............................................................................................................30
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Abbreviations
Abbr.Description
ACIAccessory Control Interface
ADCAnalog Digital Connector
ARMAdvanced RISC Machines
ASIC Application Specific Integrated Circuit
ATRAnswer To Reset
BB Baseband
BL-5CBattery type.
BSIBattery Size Indicator
CbusControl bus (internal phone interface between UPP-UEM)
CCSCustomer Care Service
CPHCopenhagen, Denmark
CTICover Type Indicator
CTSIClock Timing Sleep and Interr up t
DbusDSP controlled bus (Internal phone interface between UPP-UEM)
DCDirect Current
DCT4.0Digital Core Technology, generation 4.0
DSP Digital Signal Processor
DUT Device under test
EADExternal Accessory Detection
EMC Electro Magnetic Compatibility
ESD Electro Static Discharge
FbusFast Bus, asynchronous message bus connected to DSP (communications bus)
FCIFunctional cover interface
FPCFlexible printed circuit
FR Full Rate
GENIOGeneral Purpose Input/Output
GSMGlobal System Mobile
HW Hardware
IF Interface
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IHF Integrated Hands Free
IMEI International Mobile Equipment Identity
JannetteDCT3.x accessory program
LCD Liquid Crystal Display
LDOLow Drop Out
LED Light Emitting Diode
Li-IonLithium Ion battery
LionBattery program
LN Lotus Notes
LPRF Low Power Radio Frequency
LynxBattery type, Lion program, Salo – Finland
MALTMedium And Loud Transducer
MaxwellGSM phone program
MbusAsynchronous message bus connected to MCU (phone control interface). Slow
message bus for control data.
MCUMicro Controller Unit
NO_SUPPLYUEM state where UEM has no supply what so ever
NRTNokia Ringing Tones
NTCNegative temperature Coefficient, temperature sensitive resistor used as a tem-
perature sensor.
PAPower Amplifier (RF)
PDAPersonal Digital Assistant
PDMPulse Density Modulation
PDRAMProgram/Data RAM
Phoenix SW tool of DCT4.x
PippiHdb12, Phone program (3510)
PLLPhase locked loop
PnPHFPlug and Play Handsfree
PUPGeneral Purpose IO (PIO), USARTS and Pulse Width Modulators
PWB Printed Wired Board
PWR_OFFUEM state where phone is off
PWRONXSignal from power on key.
R&DResearch and development
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RESETUEM state where regulators are enabled
RTCUEM internal Real Time Clock
SARAMSingle Access RAM
SIM Subscriber Identification Module
SLEEPUEM power saving state controlled by UPP
SPRStandard Product Requirements
SRAMStatic RAM
STISerial Trace Interface
SW Software
TBSFThrough the Board Side Firing
TDBTo Be Defined
TITexas Instruments
UEMUniversal Energy Management
UI User Interface
UPPUniversal Phone Processor
VBATMain battery voltage
VCHARCharger input voltage
VCHARDETCharger detection threshold level
VMSTR+,
VMSTR
Master Reset threshold level
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Electronics of Nokia 1100
Environmental Specifications
Table 1: Environmental specifications
ParameterAmbient temperatureRemarks
Normal operation-25 ° C … +55 °CSpecifications fulfilled
Reduced performance-40 °C ..-25 °C
and +55 °C … +85 °C
No operation and/or storage
HumidityRelative humidity
< -40 °C or > +85 °C No storage or operation. An attempt to operate may
5...95%.
Baseband HW Introduction
This document specifies the baseband module for the Nokia 1100. The baseband module
includes the baseband engine chipset, the UI components and the acoustical parts for
the transceiver.
Nokia 1100 is a hand-portable dualband 900/1800MHz or 850/1900MHz phone, featuring the DCT4 generation baseband (UEM/UPP) and RF (MJOELNER) circuitry.
Technical Summary
The baseband module contains 2 main ASICs named the UEM and UPP. The baseband
module furthermore contains a Flash IC of 16Mbit. The baseband is based on the DCT4
damage the phone permanently
The module is not protected against water. Con-
densed or splashed water might cause malfunction.
Any submerge of the phone will cause permanent
damage. Long-term high humidity, with condensation, will cause permanent damage because of corrosion.
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engine program.
PA Supply
RF Supplies
RF RX/TX
SIM
Flashlight
EAR
MIC
speaker
Buzzer
UI
Battery
Baseband
UEM
External Audio
Charger connection
DLIGHT
SLEEPCLK
32kHz
CBUS/
DBUS
BB
Supplies
Mjoelner
26MHz
UPP
RFBUS
FLASH
MEMADDA
M
VIBRA
DCT4 Janette connector
MBus/FBus
Figure 1: Baseband block diagram
The UEM supplies both the baseband module as well as the RF module with a series of
voltage regulators. Both the RF and Baseband modules are supplied with regulated voltages of 2.78 V and 1.8V. UEM includes 6 linear LDO (low drop-out) regulators for baseband and 7 regulators for RF. The UEM is furthermore supplying the baseband SIM
interface with a programmable voltage of either 1.8 V or 3.0 V. The core of the UPP is
supplied with a programmable voltage of 1.0 V, 1.3 V, 1.5 V or 1.8 V.
UPP operates from a 26MHz clock, coming from the RF ASIC MJOELNER, the 26 MHz
clock is internally divided by two, to the nominal system clock of 13MHz. DSP and MCU
contain phase locked loop (PLL) clock multipliers, which can multiply the system.
The UEM contains a real-time clock, sliced down from the 32768 Hz crystal oscillator.
The 32768 Hz clock is fed to the UPP as a sleep clock.
The communication between the UEM and the UPP is done via the bi-directional serial
busses CBUS and DBUS. The CBUS is controlled by the MCU and operates at a speed of 1
MHz set by SW. The DBUS is controlled by the DSP and operates at a speed of 13 MHz.
Both processors are located in the UPP.
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The UEM ASIC mainly handles the interface between the baseband and the RF section.
UEM provides A/D and D/A conversion of the in-phase and quadrature receive and transmit signal paths and also A/D and D/A conversions of received and transmitted audio signals to and from the user interface. The UEM supplies the analog signals to RF section
according to the UPP DSP digital control.
RF ASIC MJOELNER is controlled through UPP RFBUS serial interface. There are also separate signals for PDM coded audio. Digital speech processing is handled by the DSP
inside UPP ASIC. UEM is a dual voltage circuit, the digital parts are running from the
baseband supply 1.8V and the analog parts are running from the analog supply 2.78V,
also VBAT is directly used by some blocks.
The baseband supports both internal and external microphone inputs and speaker outputs. Input and output signal source selection and gain control is done by the UEM
according to control messages from the UPP.
The transceiver module is implemented on 6 layer selective OSP/Gold coated PWB.
Modes of Operation
baseband has six different operating modes (in normal mode):
•No_Supply
•Power_off
•Acting_Dead
•Active
•Sleep
•Charging
Additionally two modes exist for product verification: 'testmode' and 'local mode'.
No supply
In No_Supply mode, the phone has no supply voltage. This mode is due to disconnection
of main battery or low battery voltage level.
Phone is exiting from No_Supply mode when sufficient battery voltage level is detected.
Battery voltage can rise either by connecting a new battery with VBAT > V
connecting charger and charging the battery above V
mstr+
.
mstr+
or by
Power_off
In this state the phone is powered off, but supplied. VRTC regulator is active (enabled)
having supply voltage from main battery. Note, the RTC status in PWR_OFF mode
depends on whether RTC was enabled or not when entering PWR_OFF. From Power_off
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mode UEM enters RESET mode (after 20ms delay), if any of following statements is true
(logical OR –function):
– Power_on button detected (PWROFFX)
– charger connection detected (VCHARDET)
– RTC_ALARM detected
The Phone enters POWER_OFF mode from all the other modes except NO_SUPPLY if
internal watchdog elapses.
Acting Dead
If the phone is off when the charger is connected, the phone is powered on but enters a
state called”Acting Dead”, in this mode no RF parts are powered. To the user, the phone
acts as if it was switched off. A battery-charging alert is given and/or a battery charging
indication on the display is shown to acknowledge the user that the battery is being
charged.
Active
In the active mode the phone is in normal operation, scanning for channels, listening to
a base station, transmitting and processing information. There are several sub-states in
the active mode depending on if the phone is in burst reception, burst transmission, if
DSP is working etc.
In active mode the RF regulators are controlled by SW writing into UEM’s registers
wanted settings: VR1A/B must be kept disabled. VR2 can be enabled or forced into low
quiescent current mode. VR3 is always enabled in active mode. VR4 -VR7 can be enabled,
disabled or forced into low quiescent current mode.
Table 2: Regulator controls
RegulatorNOTE
VFLASH1Enabled; Low Iq mode during sleep
VFLASH2Disabled
VANAEnabled; Disabled in sleep mode
VIOEnabled; Low Iq mode during sleep
VCOREEnabled; Low Iq mode during sleep
VSIMControlled by register writing.
VR1A Enabled; Disabled in sleep mode
VR1B Disabled
VR2Controlled by register writing; Enabled in sleep mode
VR3Enabled; Disabled in sleep mode
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Table 2: Regulator controls
VR4Enabled; Disabled in sleep mode
VR5Enabled; Disabled in sleep mode
VR6Enabled; Disabled in sleep mode
VR7Enabled; Disabled in sleep mode
IPA1-2Disabled
Sleep mode
Sleep mode is entered when both MCU and DSP are in stand-by mode. Sleep is controlled
by both processors. When SLEEPX low signal is detected UEM enters SLEEP mode. VCORE,
VIO and VFLASH1 regulators are put into low quiescent current mode. All RF regulators,
except VR2, are disabled in SLEEP . When SLEEPX=1 is detected UEM enters ACTIVE mode
and all functions are activated.
The sleep mode is exited either by the expiration of a sleep clock counter in the UEM or
by some external interrupt, generated by a charger connection, key press, headset connection etc.
In sleep mode the main oscillator (26MHz) is shut down and the 32 kHz sleep clock oscillator is used as reference clock for the baseband.
Charging
Charging can be performed in parallel with any other operating mode. A BSI resistor
inside the battery pack indicates the battery type/size. The resistor value corresponds to
a specific battery capacity and technology.
The battery voltage, temperature, size and current are measured by the UEM controlled
by the charging software running in the UPP.
The charging control circuitry (CHACON) inside the UEM controls the charging current
delivered from the charger to the battery. The battery voltage rise is limited by turning
the UEM switch off when the battery voltage has reached VBATLim (programmable
charging cut-off limits 3.6V / 5.0V / 5.25V). Charging current is monitored by measuring
the voltage drop across a 220 mOhm resistor.
Following voltages are the normal and extreme voltages for the battery:
SignalMin.NomMaxNote
VBAT3.21V3.80V4.39V 1
Vcoff+3.0V3.13.2HW off to on
Vcoff-2.7V2.8V2.9VHW on to off
Vmstr+2.0V2.1V2.2VUEM off to on
Vmstr-1.8V1.9V2.0VUEM on to off
Sw shutdown-3.1V-In Call
Sw shutdown-3.2V-In Idle
Table 4: Battery voltage range
1
According to the GSM specifications, a GSM-device must work correctly if it is powered
by his nominal voltage +/-15%. The UEM hardware shut down is from 3.10V and below.
The Energy Managment of the phone is shutting down the phone at 3.20V in order to
perform a correct shutdown of the phone. Above 3.20V + tolerances, at 3.21V, the phone
is still fullfilling all the GSM requirements. The Nominal voltage is therefore set at 3.80V.
During fast charging of an empty battery voltages between 4.20 and 4.60 might appear
for a short while.
HeadInt0V-2.86V (V flash1)Accessory detection, connected to
UEM AD-converter
Table 10: Headset detection
Battery connector
Battery temperature is estimated by measurement in Transceiver PWB with a separate
NTC resistor. Thus the Battery Interface has only 3 contacts.
Table 11: Battery connector
NameDescriptionTest usage
VBATBattery voltage terminal.Battery calibration.
GNDBattery ground terminal.
BSIBattery size identification.Flash and local mode forcing.
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Baseband – RF interface
The interface between the baseband and the RF can be divided into three categories:
- The digital interface from the UPP to the RF ASIC (Mjoelner). The serial digital interface
is used to control the operation of the different blocks in the RF ASICs.
- The analogue interface between UEM and the RF . The analogue interface consists of RX
and TX converter signals. The power amplifier control signal TXC and the AFC signal
comes as well from the UEM.
- Reference clock interface between Mjoelner and UPP which supplies the 26Mhz system
clock for the UPP .
Internal Signals and Connections
The tables below describe internal signals. The signal names can be found on the schematic for the PWB.
Audio
SignalMin.NomMaxConditionNote
MIC1P (Differential input P)-5mV-G=0dB1kΩ to MIC1B
(RC filtered by 220R/4.7uF)
MIC1N (Differential input N)-5mV-G=0dB1kΩ to GND
MICB1 (Microphone Bias)2.0 V2.1 V2.25 VDC
External loading of MICB1--600uADC
Table 12: Internal microphone
SignalMin.NomMaxUnitsNote
Output voltage swing4.0--VppDifferential output
Load Resistance (EARP to EARN)2632-W
Load Capacitance (EARP to EARN)--50NF
Nokia 1100 is designed to support fully differential external audio accessory connection.
A headset and PnPHF can be directly connected to system connector.
The earpiece selected is a 13-mm dynamic earpiece with a nominal impedance of 32 Ω (.
The earpiece is placed within the mechanic parts, e.g. C-cover and Light guide. The holes
of the A-cover and the choice of dust shield are made in a way to have the best transmission of the sound, without having much impact on the sound waves and sound qualities.
The acoustic design involves a sandwich of five parts: Earmat, A-cover, C-cover, lightguide- and D-cover.
On top of the lightguide there will be a metal frame (C-cover) that protects the earpiece.
The C-cover includes 5 acoustical holes and a double-sided gasket for sealing in the area
over the earpiece.
The front cover consists of two parts, an A-cover and an earmat with six acoustical holes,
2 direct front holes, and 4 leak holes.
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Two dust shields will be used: one in the gap between earmat and A-cover and one on
the C-cover.
The earpiece circuit includes only a few components:
two 10 ohm in order to have a stable output
an EMC filter
Placed in top of
PWB, near
earpiece
EARP
EARN
UEM
EARP
EARN
Placed near UEM
10
ohm
10
ohm
Microphone
An omni directional microphone is used. The microphone is placed in the system connector sealed in its rubber gasket. The sound port is provided in the system connector.
The microphone connection comprises a differential bias circuit, driven directly from the
MICB1 bias output with external RC-filters.
Figure 4: Earpiece interface
Figure 5: Bottom connector including the microphone
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The RC filter (220 Ω, 4.7µF) is scaled to provide damping at 217 Hz.
Normal75Used for calculating the Capacity (BL5-C = 850mA)
Service3.23.33.4Pull-down resistor in battery. Used for fast power-up in pro-
duction (LOCAL mode), R/D purposes or in after sales, 1% tolerance resistors shall be used.
Table 16: BSI levels BL-5C Battery
The battery includes an over-temperature and an over-voltage protection circuit.
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Keyboard
The keyboard PWB layout consists of a grounded outer ring and an inner pad.
Power key is integrated in keypad. For the schematic diagram of the keyboard kindly refer
All lines are configured as input, when there is no key pressed.
When a key is pressed, the specific line where the key is placed is pulled low. This gener-
ates an interrupt to the MCU and the MCU now starts its scanning procedure.
When the key has been detected all the keypad-register inside the UPP is reset and it's
ready receiving new interrupt.
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Display & Keyboard Backlight
LCD Backlight (RH-18 only)
LCD Backlight consists of 2 sidefirering super yellow-green dual pack LED's which are
placed on the display FPC besides the LCD area. They lit into the light guide where the
light is distributed to generate sufficient backlight for the LCD & keyboard area.
Keyboard light
There is no dedicated keyboard light implemented. Keyboard light is provided by the LCD
backlight.
Display
The LCD is a black and white 96x65 full dot matrix display. The LCD has a standard DCT4
interface. The LCD cell is part of the complete LCD module, which includes C-cover, gasket, light guide, spring connector, transflector, LEDs and earpiece. The following figure
illustrates the complete overview of the LCD module.
Figure 10: LCD module exploded diagram
Figure 11: LCD module
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Memory Module
The baseband memory module consists of external burst flash memory 2Mbyte (16Mbit)
(optional: 4Mbyte (32Mbit) or 8MByte (64Mbit)). The UPP contains internal SRAM with 2
Mbit (optional: 4Mbit or 8Mbit). The UPP will not be covered here.
SIM Interface
The whole SIM interface is located in the two ASICs, UPP and UEM.
The SIM interface in the UEM contains power up/down, port gating, card detect, data
receiving, ATR-counter, registers and level shifting buffers logic. The SIM interface is the
electrical interface between the Subscriber Identity Module Card (SIM Card) and mobile
phone (via UEM device). .
From Battery Type
contact
Vibra
SIM
C5 C6 C7
C1C2C3
C8
C4
BSI
SIMDATA
SIMCLK
SIMRST
VSIM
UEM
SIMIF
register
SIMClk
Data
UEM
digital
logic
Figure 12: SIM interface
The vibra is placed in the bottom of the phone.
UEM
GND
SIMIO
GND
SIMIO
SIMClk
Data
UPP
UIF Block
UEMInt
CBusDa
CBusEnX
CBusClk
Vbat
VBATDriv
VIBRA
Buzz0
VSADriv2
1u
M
10n
0
35%
5kohm
+/-
Vibraclk
Figure 13: Vibra driver circuit
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Test Interfaces
The test pattern is placed on engine PWB, for service and production purposes, same test
pattern is used for after sales purposes as well.
Through MBUS or FBUS connections, the phone HW can be tested by PC software (Phoenix) and production equipment (FLALI/FINUI/LABEL).
The test points are listed in the schematic diagrams
Connections to Baseband
The flash programming box, FPS8, is connected to the baseband using a galvanic connector or test pads for galvanic connection.
The flash programming interface connects the flash prommer to the UPP via the UEM
and the connections correspond to a logic level of 2.7 V. The flash prommer is connected
to the UEM via the MBUS (bi-directional line), FBUS_TX, and FBUS_RX. The programming
interface connections between the UEM and the UPP constitute the MBUS_TX,
MBUS_RX, FBUS_TX, and FBUS_RX lines. The interface also uses the BSI
(Battery_Size_Indicator).
FBUS Interface
FBUS is an asynchronous data bus having separate TX and RX signals. Default bit rate of
the bus is 115.2 kbit/s. FBUS is mainly used for controlling phone when flashing.
MBUS Interface
MBUS interface is used for controlling the phone in service. It is bi-directional serial bus
between the phone and PC. The default transmission speed is 9.6 kbit/s.
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General description of the RF circuits
In the following general descriptions different colours are used in the block diagram. The
GSM 850 signal route is shown in red, the GSM1900 route in green and the common signal lines are shown in blue. Signal lines which is common for both
Receiver signal path
The signal from the antenna pad is routed to the RX/TX switch (Z700). If no control voltage is present at VANT2 and VANT1 the switch works as a diplexer and the GSM850 signal is passed through the RX/TX switch to GSM-RX and the GSM1900 signal is passed to
DCS-RX.
Figure 14: Receiver signal path
From the RX/TX switch the GSM850 signal is routed to the SAW filter (Z602). The purpose of the SAW filter is to provide out-of band blocking immunity and to provide the
LNA in Mjoelner (N600) with a balanced signal. The front end of Mjoelner is divided into
a LNA and Pre-Gain amplifier before the mixers.
The output from the mixer is feed to Baseband part of Mjoelner where the signals amplified in the BBAMP and low pass filtered in LPF1 before the DC compensation circuits in
DCN1. The DCN1 output is followed by a controlled attenuator and a second lowpass filter LPF2. The output from LPF2 is DC centered in DCN2 before being feed to the BB for
demodulation.
The GSM1900 signal chain is similar to GSM850, the SAW filter numbered Z601.
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Transmitter signal path
The I/Q signal from the BB is routed to the modulators for both 850 and 1900 MHz. The
output of the modulators is either terminated in a SAW filter (Z603) for GSM 850 or a
balun for GSM1900. Both signals are amplified in buffers.
The amplitude limited signal is then amplified in the PA (N700) where the gain control
takes place. The TX signal from the couplers is fed to the RX/TX switch, used to select
which signal to route to the antenna.
Figure 15: Transmitter signal path
PLL
The PLL supplies Local Oscillator (LO) signals for the RX and TX-mixers. In order to be able
to generate LO-frequencies for the required EGSM and PCN channels a regular synthesizer-circuit is used. All blocks for the PLL except for the VCO, reference X-tal and loop
filter is located in the Mjoelner IC.
The reference frequency is generated by a 26MHz Voltage Controlled X-tal Oscillator
(VCXO) which is located in the Mjoelner IC. Only the X-tal is external. 26MHz is supplied
to BB where a divide-by-2 circuit (located in the UPP IC) generates the BB-clock at
13MHz. The reference frequency is supplied to the reference divider (RDIV) where the
frequency is divided by 65. The output of RDIV (400kHz) is used as reference clock for the
Phase Detector (ϕ).
The PLL is a feedback control system controlling the phase and frequency of the LO-sig-
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nal. Building blocks for the PLL include: Phase detector, Charge Pump, Voltage Controlled
Oscillator (VCO), N-Divider and loop filter. As mentioned earlier only the VCO and loop
filter is external to the Mjoelner IC.
The VCO (G600) is the component that actually generates the LO-frequency. Based on
the control voltage input the VCO generates a single-ended RF output. The signal is then
differentiated through a balun. This signal is fed to the Prescaler and N-divider in Mjoelner, these 2 blocks will together divide the frequency by a ratio based on the selected
channel.
The divider output is supplied to the phase detector which compares the frequency and
phase to the 400kHz reference clock. Based on this comparison the phase detector controls the charge pump to either charge or discharge the capacitors in the loop filter. By
charging/discharging the loop filter the control voltage to the VCO changes and the LOfrequency will change. Therefore the PLL keeps the LO-frequency locked to the 26MHz
VCXO frequency.
The loop filter consists of the following components: C639-C641 and R618-R619.
The PLL is operating at twice the channel center frequency when transmitting or receiv-
ing in the PCN band. For the EGSM band the PLL is operating at 4-times the channel frequency . Therefore divide-by-2 and divide-by-4 circuits are inserted between the PLL
output and LO-inputs to the PCN and EGSM mixers.
Table 18: Frequency plan
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Power Supply
All power supplies for the RF Unit are generated in the UEM IC (D200). All power outputs
from this IC has a decoupling capacitor at which the supply voltage can be checked.
The power supply configuration is described in the block diagram below:
Figure 16: Power supply configuration
The names in bold are signal names used on the RF schematic pages. Names in the boxes
within the Mjoelner and the VCO refers to pin names on the respective ICs (N600, G600).