National Semiconductor MM54HC521, MM74HC521 Service Manual

MM54HC521/MM74HC521
8-Bit Magnitude Comparator (Equality Detector)

General Description

This equality detector utilizes advanced silicon-gate CMOS
technology to compare bit for bit two 8-bit words and indi­cates whether or not they are equal. The P
cates equality when it is low. A single active low enable is
provided to facilitate cascading of several packages and en­able comparison of words greater than 8 bits.

This device is useful in memory block decoding applica­tions, where memory block enable signals must be generat­ed from computer address information.

The comparator’s output can drive 10 low power Schottky
equivalent loads. This comparator is functionally and pin

e

Q output indi-

Connection and Logic Diagrams

Dual-In-Line Package

compatible to the 54LS688/74LS688 and the 54HC688/
74HC688. All inputs are protected from damage due to stat­ic discharge by diodes to V

and ground.

CC

Features

Y

Typical propagation delay: 20 ns

Y

Wide power supply range: 2–6V

Y

Low quiescent current: 80 mA (74 Series)

Y

Large output current: 4 mA (74 Series)

Y

Identical to ’HC688

MM54HC521/MM74HC521 8-Bit Magnitude Comparator (Equality Detector)

January 1988

Top View

Order Number MM54HC521 or MM74HC521

TL/F/6128– 1

Truth Table

Inputs

Data

P,Q G PeQ

PeQL L

l

P

k

P

XHH

C

1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.

Enable

TL/F/6128– 2

QL H
QL H

TL/F/6128

Absolute Maximum Ratings (Notes 1 and 2)

Operating Conditions

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.

Supply Voltage (V

CC

)

DC Input Voltage (VIN)

DC Output Voltage (V

OUT

)

Clamp Diode Current (IIK,IOK)

DC Output Current, per pin (I

OUT

)

DC VCCor GND Current, per pin (ICC)

Storage Temperature Range (T

STG

b

b

)

b

0.5 toa7.0V

1.5 to V

CC

0.5 to V

CC

g

g

b

g

65§Ctoa150§C

a

1.5V

a

0.5V

20 mA

25 mA

50 mA

Supply Voltage (V

)26V

CC

DC Input or Output Voltage 0 V

(V

IN,VOUT

)

Operating Temp. Range (TA)

MM74HC
MM54HC

Input Rise or Fall Times

e

V

2.0V(tr,tf) 1000 ns

CC

e

V

4.5V 500 ns

CC

e

V

6.0V 400 ns

CC

Power Dissipation (PD)

(Note 3) 600 mW
S.O. Package only 500 mW

Lead Temperature (T

(Soldering 10 seconds) 260

)

L

C

§

DC Electrical Characteristics (Note 4)

Symbol Parameter Conditions V

CC

A

e

T

25§C

Typ Guaranteed Limits

V

IH

Minimum High Level 2.0V 1.5 1.5 1.5 V
Input Voltage 4.5V 3.15 3.15 3.15 V

6.0V 4.2 4.2 4.2 V

V

IL

Maximum Low Level 2.0V 0.5 0.5 0.5 V
Input Voltage** 4.5V 1.35 1.35 1.35 V

6.0V 1.8 1.8 1.8 V

V

OH

Minimum High Level V
Output Voltage

e

VIHor V

l

I

IN

OUT

IL

s

20 mA 2.0V 2.0 1.9 1.9 1.9 V

l

4.5V 4.5 4.4 4.4 4.4 V

6.0V 6.0 5.9 5.9 5.9 V

e

V

VIHor V

IN

I

l

OUT

I

l

OUT

l

I

IN

OUT

e

V

OL

Maximum Low Level V
Output Voltage

IL

s

4.0 mA 4.5V 4.2 3.98 3.84 3.7 V

l

s

5.2 mA 6.0V 5.7 5.48 5.34 5.2 V

l

VIHor V

IL

s

20 mA 2.0V 0 0.1 0.1 0.1 V

l

4.5V 0 0.1 0.1 0.1 V

6.0V 0 0.1 0.1 0.1 V

e

V

VIHor V

IN

I

l

OUT

I

l

OUT

I

IN

I

CC

Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur.

Note 2: Unless otherwise specified all voltages are referenced to ground.

Note 3: Power Dissipation temperature derating Ð plastic ‘‘N’’ package:

Note 4: For a power supply of 5V

designing with this supply. Worst case V
I

**V

Maximum Input V
Current

Maximum Quiescent V
Supply Current I

, and IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used.

CC

limits are currently tested at 20% of VCC. The above VILspecification (30% of VCC) will be implemented no later than Q1, CY’89.

IL

e

IN

e

IN

OUT

g

10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when

and VILoccur at V

IH

IL

s

4.0 mA 4.5V 0.2 0.26 0.33 0.4 V

l

s

5.2 mA 6.0V 0.2 0.26 0.33 0.4 V

l

VCCor GND 6.0V

g

0.1

VCCor GND 6.0V 8.0 80 160 mA

e

0 mA

b

12 mW/§C from 65§Cto85§C; ceramic ‘‘J’’ package:b12 mW/§C from 100§Cto125§C.

e

5.5V and 4.5V respectively. (The VIHvalue at 5.5V is 3.85V.) The worst case leakage current (IIN,

CC

74HC 54HC

eb

T

40 to 85§CT

A

g

1.0

Min Max Units

V

§

§

Units

b
b

40
55

A

eb

55 to 125§C

g

CC

a

85

a

125

1.0 mA

C
C

2