5
4
3
2
1
MSI
D D
CPU:
AMD AM3
Title Page
Cover Sheet 1
GPIO Configuration
2 Block Diagram
3
Clock Distribution 4
System Chipset:
AMD/ATI 740G/760G
AMD/ATI RS710
On Board Chipset:
FINTEK Super I/O -- F71889 F
Power Deliver Chart
INTSIL6323A
Clock-Gen RTM-880N-793
AMD AM3 941
DDR DIMM
LAN -- AR8132M/AR8131M
HD Codec -- ALC888S/889
BIOS -- SPI ROM 16M
C C
AMD/ATI 740G/760G
AMD/ATI SB700/SB710
5
6
7
8, 9,10
11
12 DDR DIMM
13, 14,15,16,17
18, 19,20,21,22
Main Memory:
DDR III X 2 (Max 8GB)
Expansion Slots:
PCI-E X1 X2
PCI-E X16 X1
PCI EXPRESS X16 & X 1 SLOT
PCI Slot 1,2
USB connectors
VGA CONN
PCI 2.2 Slot X1
LAN -- AR8132M/AR8131M
Clock Generator:
Controller--RTM-880N-793
B B
PWM:
INTSIL6323A
Azalia Codec-VT1708S
1394 Controller - VIA VT6315N CE
LPC-F71882 / FDD / COM / LPT
IDE Conn / FAN
VCC_DDR&VCC1_1 NB
ACPI by UPI
ATX/Front Panel/KB/EMI
BOM - Option Parts
POWER OK MAP
RESET MAP
History
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
CFG_7623_4M3E: 740G + SB710, 10/100LAN , 3ᄨaudio jack ˈACC, all EL CAP
CFG_7623_4M3H: 740G + SB710, 10/100LAN , 3
A A
CFG_7623_4G6H: 740G + SB710, Gb LAN , 6
CFG_7623_6G6H: 760G + SB710, Gb LAN , 6
CFG_7623_6G6S: 760G + SB710, Gb LAN , 6ᄨaudio jack , APSˈOC-switchˈACC,
CFG_7623_ABCD
⊼˖
A: (4) 740G˗(6) 760G
B: (M) Mega Lan; (G) GIGA lAN
C: (3) Audio 3Hole; (6) Audio 6Hole
D: (E) EL Cap; (H) Half Solid Cap; (S) Colid Cap
ˈ䗭䞠
5
ABCD
ߚ߹ҷ㸼˖
ᄨ
audio jack ˈACC,
ᄨ
audio jack ˈAPSˈOC-switch , ACC, CAP
ᄨ
audio jack , APSˈOC-switchˈACC,
CAP
䳏ᆍ
ܼ
4
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
3
2
http://www.msi.com.tw
Cover Sheet
Cover Sheet
Cover Sheet
1
MS_7623
MS_7623
MS_7623
Last Revision Date:
Last Revision Date:
Last Revision Date:
Monday, September 28, 2009
Monday, September 28, 2009
Monday, September 28, 2009
Sheet
Sheet
Sheet
Rev
Rev
Rev
1.0
1.0
1.0
13 7
13 7
13 7
of
of
of
5
4
3
2
1
Project RS-740/760 BLOCK DIAGRAM
DDRIII 800, 1066, 1333
D D
AMD
128bit
UNBUFFERED
DDRIII DIMM1
10
AM3
AM3 SOCKET
OUT
7,8,9
16x16 2.6GHZ(HT3) HyperTransport LINK
IN
DDRIII 800, 1066, 1333
128bit
ATI NB - RS760/740
HyperTransport LINK0 CPU I/F
1 16X PCIE VIDEO I/F
USB 2.0
1 4X PCIE I/F WITH SB
2 1X PCIE I/F
A-LINK
4X PCIE
ATI SB - SB710
USB2.0 (12)
SATA2 (4 PORTS)
AC97 2.3
HD AUDIO 1.0
ACPI 1.1
SPI I/F
PCI/PCI BRIDGE
17,18,19,20,21
Fintek SIO 71889
13,14,15,16
AZALIA
SERIAL ATA 2.0
SPI Bus
LPC BUS
29
TPM Pin Header
29
VIA VT1708S
SATA#0~5
SPI ROM 16M
PCIE GFX x16
C C
4X1 PCIE INTERFACE
ATHEROS
AR8132M/AR8131M
27
USB-4 USB-5
25
FRONT FRONT
B B
USB-8 USB-9
USB-7
FRONT FRONT
25 25
25 25 25
USB-6 USB-1
25 25 25 25
PCIE x16
31
PCIE x1 SLOT X2
USB-2 USB-3
REAR REAR REAR REAR
USB-0
FRONT FRONT
23,24
PCI BUS
ACPI CONTROLLER
uPI
CPU CORE POWER
NB CORE POWER
Intersil ISL6323
Intersil ISL6612A
6
PCI SLOT 1
24
32
CPU VLDT Power
RS760 CORE POWER
PCIE & SB POWER
A A
DDR3 DRAM POWER
31,32
31
UNBUFFERED
DDRIII DIMM2
DDRII FIRST LOGICAL DIMM
28
19
19
10
ATX CON & DUAL POWER
33
FLOPPY
LPT
29
5
4
KBD
MOUSE
29
3
SERIAL
PORT
34 29
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
BLOCK Diagram
BLOCK Diagram
BLOCK Diagram
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS_7623 1.0
MS_7623 1.0
MS_7623 1.0
23 7 Monday, September 28, 2009
23 7 Monday, September 28, 2009
23 7 Monday, September 28, 2009
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SB700/750 GPIO Config
GPIO Name Type Function description Pin Page
PCICLK5/GPIO41
INTE#/GPIO33 PCI_INTA#
INTF#/GPIO33
INTG#/GPIO33
D D
INTH#/GPIO33
LDRQ1#/GNT5#/GPIO68
BMREQ#/REQ5#/GPIO68
RI#/EXTEVNT0#
SLP_S2/GPM9#
KBRST#/GEVENT1#
LPC_PME#/GEVENT3#
LPC_SMI#/EXTEVNT1#
S3_STATE/GEVENT5#
SYS_RESET#/GPM7#
WAKE#/GEVENT8#
BLINK/GPM6# Unused
SATA_ISO#/GPIO10 SB_GPIO10
SMARTVOLT/SATA_IS2/GPIO4 SB_GPIO4
CLK_REQ1#/SATA_IS4#/GPIO3 SB_GPIO39
CLK_REQ2#/SATA_IS5#/GPIO40
SPKR/GPIO2
C C
SDA0/GPOC1# SDATA
SCL1/GPOC2# SCLK1
SDA1/GPOC3# SDATA1
DDC1_SCL/GPIO9
DDC1_SDA/GPIO8 SPI_WP#
LLB3/GPIO66 LC_SENSE
SHUTDOWN#/GPIO5 SB_GPIO5
DDR3_RST#/GEVENT7#
SB_OC6#/IR_TX1/GEVENT6#
USB_OC4#IO_RX0/GPM4# OC4#
USB_OC2#/GPM2#
USB_OC1#/GPM1#
USB_OC0#/GPM0#
AZ_SDIN0/GPIO42
AZ_SDIN1/GPIO43
AZ_SDIN2/GPIO44
AZ_SDIN3/GPIO46
3.3V PCI_CLK5
PREQ#3 REQ3#/GPIO70
PREQ#4 REQ4#/GPIO71
Unused GNT3#/GPIO72
PCI_INTB#
PCI_INTC#
PCI_INTD#
Unused
PREQ#5
RI#
Unused
A20GATE GA20IN/GEVENT0#
KBRST#
LPC_PME#
LPC_SMI3
Unused
FP_RST#
WAKE#
SMBALERT# MBALERT#THRMTRIP#/GEVENT2#
SB_GPIO6 CLK_REQ3#/SATA_IS1#/GPIO6
SB_GPIO0 CLK_REQ0#SATA_IS3#/GPIO0
SB_GPIO40
SPKR
SCLK SCL0/GPOC0#
Unused
Unused
OC6#
OC5# USB_OC5#IR_TX0/GPM5#
OC3# USB_OC3#/IR_RX1/GPM3#
OC2#
OC1#
OC0#
SDATA_IN_R
Unused
Unused
Unused
AE18
AD18
AA19
T3
AE6
AB6
AC6
AD3
AC4
AE2
AE3
AB8
AD7
E2
H7
Y15
W15
K4
K24
F1
J2
H6
F2
J6
W18
V17
W20
W21
AA18
W18
K1
K2
AA20
Y18
C1
Y19
G5
B9
B8
A8
A9
E5
F8
E4
J7
J8
L8
M3
4
SB700/750 GPIO Config
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
21
21
21
21
21
21
21
21
21
21
21
21
21
GPIO Name Type Function description Pin Page
AZ_DOCK_RST#/GPM8#
PS2_DAT/EC_GPIO0
PS2_CLK/EC_GPIO1
SPI_CS2#/EC_GPIO2
IDE_RST#/F_RST#/EC_GPO3 F25
PS2KB_DAT/EC_GPIO4
PS2KB_CLK/EC_GPIO5
PS2M_DAT/EC_GPIO6
PS2M_CLK/EC_GPIO7
USBCLK/14M_25M_48M_OSC
KSO_16/EC_GPIO8
KSO_17/EC_GPIO9
EC_PWM0/EC_GPIO10
SCL2/EC_GPIO11
SDA2/EC_GPIO12
SCL3_LV/EC_GPIO13
SDA3_LV/EC_GPIO14
EC_PWM1/EC_GPIO15
EC_PWM2/EC_GPIO16
EC_PWM3/EC_GPIO17
KSI_0/EC_GPIO18
KSI_1/EC_GPIO19
KSI_2/EC_GPIO20
KSI_3/EC_GPIO21
KSI_4/EC_GPIO22
KSI_5/EC_GPIO23
KSI_6/EC_GPIO24
KSI_7/EC_GPIO25
KSO_0/EC_GPIO26
KSO_1/EC_GPIO27
KSO_2/EC_GPIO28
KSO_3/EC_GPIO29
KSO_4/EC_GPIO30
KSO_5/EC_GPIO31
KSO_6/EC_GPIO32
KSO_7/EC_GPIO33
KSO_8/EC_GPIO34
KSO_9/EC_GPIO35
KSO_10/EC_GPIO36
KSO_11/EC_GPIO37
KSO_12/EC_GPIO38
KSO_13/EC_GPIO39
KSO_14/EC_GPIO40
KSO_15/EC_GPIO41
SATA_ACT#/GPIO67
IDE_D0/GPIO15
IDE_D1/GPIO16
IDE_D2/GPIO17
IDE_D3/GPIO18
3
2
SB700/750 GPIO Config
GPIO Name Type Function description Pin Page
IDE_D4/GPIO19 AD21
IDE_D5/GPIO20
IDE_D6/GPIO21
IDE_D7/GPIO22
IDE_D8/GPIO23
IDE_D9/GPIO24
IDE_D10/GPIO25
IDE_D11/GPIO26
IDE_D12/GPIO27
IDE_D13/GPIO28
IDE_D14/GPIO29
IDE_D15/GPIO30
SPI_DI/GPIO12
SPI_DO/GPIO11
SPI_CLK/GPIO47
SPI_HOLD#/GPIO31
SPI_CS#/GPIO32
LAN_RST#/GPIO14
ROM_RST#/GPIO14
FANOUT0/GPIO3
FANOUT1/GPIO48
FANOUT2/GPIO49
FANIN0/GPIO50
FANIN1/GPIO51
FANIN2/GPIO52
TEMPIN0/GPIO61
TEMPIN1/GPIO62
TEMPIN2/GPIO63
TEMPIN3/TALERT#/GPIO64
VIN0/GPIO53
VIN1/GPIO54
VIN2/GPIO55
VIN3/GPIO56
VIN4/GPIO57
VIN5/GPIO58
VIN6/GPIO59
VIN7/GPIO60
3.3V
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
SPI_DATAIN
SPI_DATAOUT
SPI_CLK
SPI_HOLD_L
SPI_CS#
CPU_PRESENT#
Unused
Unused
COM_GPIO
Unused
Unused
Unused
Unused
Unused
Unused
Unused
TALERT3
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
3.3V L5
Unused 20
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
USB_48M_CLK
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
SB_GP16
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
SATA_LED#
Unused
Unused
Unused
Unused
H19
H20
H21
D22
E24
E25
D23
C8
A18
B18
F21
D21
F19
E20
E21
E19
D19
E18
G20
G21
D25
D24
C25
C24
B25
C23
B24
B23
A23
C22
A22
B22
B21
A21
D20
C20
A20
B20
B19
A19
D18
C18
W11
AD24
AD23
AE22
AC22
21
21
21
21
21 Unused GNT4#/GPIO73 AE5
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
1
AE20
AB20
AD19
AE19
AC20
AD20
AE21
AB22
AD22
AE23
AC23
G6
D2
D1
F4
F3
U15
J1
M8
M5
M7
P5
P8
E8
B6
A6
A5
B5
A4
B4
C4
D4
D5
D6
A7
B7
F71882 GPIO Config
GPIO Name Type Function description Pin Page
B B
VIDO5/GP27 AD21
VIDO4/GP26
VIDO1/GP21/VGP0
PME#/GP54
KRST#/GP62
GA20/JP7
KDAT/GP61
KCLK/GP60
MDAT/GP57
MCLK/GP56
SUSC#/GP53
PSON#/GP42
PANSWH#/GP43
PWRON#/GP44
PCIRST3#/GP11
PCIRST2#/GP12
FAN_CTL3/GP36
FAN_TAC3/GP36
FAN_CTL2/GP51
FAN_TAC2/GP52
FAN_CTL1
FAN_TAC1
VID2/GP32
A A
VID3/GP33
VID3/GP33
VID4/GP34
VID5/GP35
3.3V
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
SPI_DATAIN
SPI_DATAOUT
SPI_CLK
SPI_HOLD_L
SPI_CS#
CPU_PRESENT#
Unused
Unused
COM_GPIO
Unused
Unused
Unused
Unused
Unused
Unused
AE20
AB20
AD19
AE19
AC20
AD20
AE21
AB22
AD22
AE23
AC23
G6
D2
D1
F4
F3
U15
20
J1
M8
M5
M7
P5
P8
E8
B6
A6
PCI Config.
DEVICE MCP1 INT Pin REQ#/GNT#
PCI Slot 1
PCI Slot 2
PCI_INTE#
PCI_INTF#
PCI_INTG#
PCI_INTH#
PCI_INTF#
PCI_INTG#
PCI_INTH#
PCI_INTE#
PREQ#0
PGNT#0
PREQ#1
PGNT#1
IDSEL
AD21
AD22
CLOCK
PCICLK0
PCICLK1
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
GPIO Configuration
GPIO Configuration
GPIO Configuration
MS_7623 1.0
MS_7623 1.0
MS_7623 1.0
33 7 Monday, September 28, 2009
33 7 Monday, September 28, 2009
33 7 Monday, September 28, 2009
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DIMM3 DIMM4
D D
DIMM1 DIMM2
3 PAIR MEM CLK
3 PAIR MEM CLK
3 PAIR MEM CLK
3 PAIR MEM CLK
AM2/AM2g2 CPU
AM2 SOCKET
C C
B B
1 PAIR CPU CLK
200MHZ
HT REFCLK
100MHz DIFF RS780
EXTERNAL
CLK GEN.
NB-OSCIN
14.318MHZ
NB ALINK PCIE CLK
100MHZ
SB ALINK PCIE CLK
100MHZ
NB GFX PCIE CLK
100MHZ
NB GPP PCIE CLK
100MHZ
PCIE GFX CLK
100MHZ
PCIE GPP CLK
100MHZ
PCIE GPP CLK
100MHZ
PCIE GPP CLK
100MHZ
USB CLK
48MHZ
(RX780)
AMD/ATI NB
RS780
PCIE GFX SLOT 1 - 16 LANES
PCIE GPP SLOT 1 - 1 LANE
PCIE GPP SLOT 2 - 4 LANES
PCIE GBE
25MHZ
OSC
INPUT
25MHz
LAN
CPU_HT_CLK
NB_HT_CLK
25M_48M_66M_OSC
AMD/ATI SB
SB700
NB_DISP_CLK
GPP_CLK3
PCIE_RCLK/
NB_LNK_CLK
SLT_GFX_CLK
GPP_CLK0
GPP_CLK1
GPP_CLK2
USB_CLK
PCI CLK0
33MHZ
PCI CLK1
33MHZ
PCI CLK2
33MHZ
PCI CLK3
33MHZ
PCI CLK4
33MHZ
PCI CLK5
33MHZ
LPC_CLK0
33MHZ
LPC CLK1
33MHZ
SB_BITCLK
48MHZ
PCI SLOT 0 33MHz
PCI SLOT 1 33MHz
IEEE1394 33MHz
SUPER IO IT8718F
33MHz
TPM 33MHz
LEO CHIP 33MHz
HD AUDIO
ALC 662/883
25MHz
SIO CLK
48MHZ
25MHz SATA
32.768KHz
14.31818MHz
A A
5
External clock mode
Internal clock mode
4
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Clock Distribution
Clock Distribution
Clock Distribution
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS_7623
MS_7623
MS_7623
43 7 Monday, September 28, 2009
43 7 Monday, September 28, 2009
43 7 Monday, September 28, 2009
1
1.0
1.0
1.0
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Power Deliver Chart
4
3
2
1
2.5V Shunt
Regulator
VRM SW
REGUALTOR
D D
ATX P/S WITH 1A STBY CURRENT
5V
5VSB
+/-5%
+/-5%
3.3V
+/-5%
12V
+/-5%
-12V
+/-5%
CPU
PW
12V
+/-5%
5VDIMM Linear
REGULATOR
1.8V VDD SW
REGULATOR
1.8V VCC Linear
REGULATOR
VDDA25 (S0, S1)
VCCP (S0, S1) / VCC_NB (S0, S1)
0.9V VTT_DDR
REGULATOR
1.1V VCC Linear
REGULATOR
1.2V VCC Linear
REGULATOR
VCC_DDR (S0, S1, S3)
VTT_DDR (S0, S1, S3)
DDRII DIMMX4
VDD MEM
12A
VTT_DDR
2A
NB_VCC1P1 (S0, S1)
VCC_1V2 (S0, S1)
+1.8V_S0 (S0, S1)
C C
AMD AM2r2 CPU
VDDA 2.5V 0.2A
VDDCORE
0.8-1.55V
DDR2 MEM I/F
VDD MEM 1.8V
VTT MEM 0.9V
VLDT 1.2V
NB RS780
VDDHT/RX 1.1V
VDDHTTX 1.2V
VDDPCIE 1.1V
NB CORE VDDC
1.1V
VDDA18PCIE 1.8V
PLLs 1.8V
VDD18/VDD18_MEM
1.8V
VDD_MEM 1.8V/1.5V
AVDD 3.3V
110A
10A
2A
0.5A
1.2A
0.5A
2A
7A
0.9A
0.1A
0.01A
0.5A
0.135A
SB700
VCC3_SB Linear
REGULATOR
VCC3_SB (S0, S1, S3, S5)
1.2V_SB Linear
REGULATOR
+1.2VSB (S0, S1)
VCC3_SB (S0, S1, S3, S5)
VCC3 (S0, S1)
+5VA Linear
B B
5VDUAL Linear
REGULATOR
REGULATOR
+5VA (S0, S1)
VCC3_SB (S0, S1, S3, S5)
X4 PCI-E
ATA I/O
ATA PLL
PCI-E PVDD
SB CORE
CLOCK
1.2V S5 PW
3.3V S5 PW
USB CORE I/O
3.3V I/O
AUDIO CODEC
3.3V CORE
5V ANALOG
+3.3VDUAL (S3)
+3.3V (S0, S1)
+5V (S0, S1)
0.8A
0.5A
0.01A
80mA
0.6A
0.22A
0.01A
0.2A
0.45A
0.1A
0.1A
SUPER I/O
0.01A
0.01A
0.1A
PCI Slot (per slot)
A A
5
5V
3.3V
12V
3.3VDual
-12V
0.375A
5.0A
7.6A
0.5A
0.1A
X1 PCIE per
3.3V
12V
3.3Vaux
3.0A
0.5A
0.1A
4
X16 PCIE per
3.0A
3.3V
5.5A
12V
0.1A
3.3VDual
USB X6 FR
VDD
5VDual
3.0A
USB X6 RL 2XPS/2
VDD
5VDual
3.0A
3
5VDual
0.5A
ENTHENET
3.3V (S3)
3.3V (S0, S1)
0.1A
0.5A
IEEE-1394 x1
3.3V (S0, S1)
12V (S0, S1) 1.1A
0.1A
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
Power Deliver Chart
Power Deliver Chart
Power Deliver Chart
MS_7623 1.0
MS_7623 1.0
MS_7623 1.0
1
53 7 Monday, September 28, 2009
53 7 Monday, September 28, 2009
53 7 Monday, September 28, 2009
of
of
of
5
4
3
2
1
VIN
C96
C96
C95
C95
C10u16Y1206
C10u16Y1206
C1u16X5
Q25
Q25
Q23
Q23
Q29
Q29
Q27
Q27
VIN
D S
G
Q32
Q32
D S
Q31
Q31
G
06030B
06030B
C147
C147
C1u16X5
C1u16X5
D S
Q16
Q16
N-P0903BDG_TO252-3-RH
N-P0903BDG_TO252-3-RH
D S
Q12
Q12
06030B
06030B
R18
R18
X_47KR0402
X_47KR0402
R1
X_16KR0402R1X_16KR0402
C1u16X5
R151
R151
2.2R1%0805
2.2R1%0805
C97
C97
C1000p50X0402
C1000p50X0402
IPHASE1
ISEN1
C124
C124
C1u16X5
C1u16X5
R163
R163
2.2R1%0805
2.2R1%0805
C123
C123
C1000p50X0402
C1000p50X0402
IPHASE2
ISEN2
C50
C1u16X5
C1u16X5
R90
R90
2.2R1%0805
2.2R1%0805
C49
C49
C1000p50X0402
C1000p50X0402
PHASE_NB_A
ISEN_NB_A
2.2R1%0805
2.2R1%0805
X_C1u10X
X_C1u10X
CHOKE3 CH-0.5u40A-RH-1 CHOKE3 CH-0.5u40A-RH-1
1 2
CP37
CP37
X_COPPER
X_COPPER
C122
C122
C10u16Y1206
C10u16Y1206
CHOKE5 CH-0.5U40A-RH-1 CHOKE5 CH-0.5U40A-RH-1
1 2
CP40
CP40
X_COPPER
X_COPPER
C51
C51
C10u16Y1206
C10u16Y1206
CHOKE6 CH-0.5U40A-RH-1 CHOKE6 CH-0.5U40A-RH-1
1 2
R179
R179
CP42
CP42
X_COPPER
X_COPPER
C148
C148
C1000p50X0402
C1000p50X0402
IPHASE3
ISEN3
C151
C151
C10u16Y1206
C10u16Y1206
CHOKE1 CH-0.5U40A-RH-1 CHOKE1 CH-0.5U40A-RH-1
1 2
CP34
CP34
X_COPPER
X_COPPER
VCC5
R21
R21
X_4.7KR0402
X_4.7KR0402
APS_SEL_GPIO
C12
C12
C3
X_C1u10XC3X_C1u10X
CP38
CP38
X_COPPER
X_COPPER
CP41
CP41
X_COPPER
X_COPPER
G2S2D2
G1
S1
X_NN-2N7002DW_SOT363-RH
X_NN-2N7002DW_SOT363-RH
N-P0903BDG_TO252-3-RH
N-P0903BDG_TO252-3-RH
+12VIN
VCORE_EN# 32
+12VIN
R99
R99
C200
C200
C201
C201
VCC5_SB
10KR0402
10KR0402
R111
R111
VCORE_VLD 29,32
PWROK_PWM 8
CPUVID1 8
VCCP_NB
R60
R60
100R0402
100R0402
R27
R27
100R0402
100R0402
6262_VCCP
49.9R1%0402
49.9R1%0402
R87
R87
100R0402
100R0402
3
4
CHOKE7
CHOKE7
1 2
CH-1.1u27A2.5m-RH
CH-1.1u27A2.5m-RH
EC3
EC3
CD1000u16EL20
CD1000u16EL20
R142
R142
X_4.7KR0402
X_4.7KR0402
X_N-MMBT3904_NL_SOT23
X_N-MMBT3904_NL_SOT23
R96 1KR1%0402 R96 1KR1%0402
VCORE_EN#
R118 10KR0402 R118 10KR0402
CPUVID5 8
CPUVID4 8
CPUVID3 8
CPUVID2 8
CPUVID0 8
R7
R7
X_470R1%0402
X_470R1%0402
UPI6262_NB
C19
C19
X_C0.1u16Y0402
X_C0.1u16Y0402
VCCP
R112 X_100R0402 R112 X_100R0402
R101
R101
X_470R1%0402
X_470R1%0402
R84
R84
C33
C33
C0.1u16X0402
C0.1u16X0402
C39
C39
X_C0.1u16X0402
X_C0.1u16X0402
5
GND GND
GND GND
12V
12V
1
12V
12V
2
JPWR2
JPWR2
PWRCONN4P_CREAM-RH-1
PWRCONN4P_CREAM-RH-1
+
+
1 2
+
+
1 2
EC18
EC18
X_CD1000u16EL20
X_CD1000u16EL20
VCC_DDR
R141 X_300R0402 R141 X_300R0402
3VDUAL
R136
R136
X_4.7KR0402
X_4.7KR0402
C E
Q22
Q22
B
R143 300R0402 R143 300R0402
VCC5
D D
COREFB_L 8
NB_GND 8
100R0402
100R0402
VCCP
R110
R110
R2 0R0402 R2 0R0402
R41 0R0402 R41 0R0402
COREFB_H
R100
R100
0R0402
0R0402
+12VIN
CPU_CORE_TYPE 8
X_C0.01u25X0402
X_C0.01u25X0402
C0.01u25X0402
C0.01u25X0402
NB_VSEN 8
C C
COREFB_H 8
B B
A A
R91
R91
10.7KR1%0402
10.7KR1%0402
C E
Q15
Q15
B
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
R20
R20
10KR0402
10KR0402
C1
C1
R11
R11
C2 C0.01u25X0402 C2 C0.01u25X0402
1.2KR1%0402
1.2KR1%0402
C11
X_C680p50X0402-RH
X_C680p50X0402-RH
R16
R16
360R1%0402
360R1%0402
ISEN_NB_A
R32
R32
X_0R0402
X_0R0402
C67 X_C1000p50X0402 C67 X_C1000p50X0402 C50
560R1%0402-RH
560R1%0402-RH
C34
C34
X_C0.1u16X0402
X_C0.1u16X0402
VCC5_VRM
12KR1%0402-RH-1
12KR1%0402-RH-1
+
+
1 2
EC12
EC12
CD1000u16EL20
CD1000u16EL20
CD1000u16EL20
CD1000u16EL20
R138
R138
X_27R0402
X_27R0402
D S
Q21
Q21
G
X_N-2N7002_SOT23
X_N-2N7002_SOT23
C11
C14 X_C0.1u16X0402 C14 X_C0.1u16X0402
R24 0R0402 R24 0R0402
R47 49.9R1%0402 R47 49.9R1%0402
C21
C21
X_C0.1u16X0402
X_C0.1u16X0402
R106 3KR1%0402R106 3KR1%0402
C53
C53
C33p50N0402
C33p50N0402
R104
R104
1.1KR1%0402
1.1KR1%0402
C47 C0.01u25X0402 C47 C0.01u25X0402
R107
R107
4.99KR1%0402
4.99KR1%0402
R93 56KR1%0402 R93 56KR1%0402
C48 X_C0.1u16X0402 C48 X_C0.1u16X0402
R102 X_69.8KR1%0402-RH R102 X_69.8KR1%0402-RH
VCC5_VRM
R89
R89
+
+
1 2
+
+
1 2
EC8
EC8
EC17
EC17
CD1000u16EL20
CD1000u16EL20
CPUVID1
R137
R137
X_27R0402
X_27R0402
D S
Q20
Q20
VCORE_EN#
G
X_N-2N7002_SOT23
X_N-2N7002_SOT23
C10p50N0402-RH
C10p50N0402-RH
6262_VCCNB
C63 C0.01u25X0402 C63 C0.01u25X0402
R70
R70
X_10KR1%0402
X_10KR1%0402
91KR1%0402
91KR1%0402
LOW FOR SVID
6262_VCCNB
UPI6262_NB
ISL6323CR CKT for Hybride
C44
C44
C0.1u16X0402
C0.1u16X0402
7X7 QFN
U4 ISL6323CR U4 ISL6323CR
24
EN
37
VDDPWRGD
34
PWROK
9
VID5
8
VID4
7
VID3/SVC
6
VID2/SVD
5
VID1/SEL
4
VID0/VFIXEN
48
COMP_NB
1
FB_NB
2
VSEN_NB
3
RGND_NB
18
COMP
17
FB
15
RCOMP
13
VSEN
12
RGND
C54
C54
C0.1u16X0402
C0.1u16X0402
19
APA
16
RESET
14
OFS
11
FS
R66
R66
BOTTOM PAD
CONNECT TO GND
Through 8 VIAs
input CAP
C185
C185
C0.1u16X0402
C0.1u16X0402
R127 0R0402 R127 0R0402
R126 X_0R0402 R126 X_0R0402
VCC5_SB
VCC5
R50
R50
R51
R51
X_2.2R1%0805
X_2.2R1%0805
2.2R1%0805
2.2R1%0805
10
VCC
GND
49
VIN
VCC5
SDA0 7,11,12,20,32
VCC5_VRM
C27
C27
C4.7u16X0805
C4.7u16X0805
PVCC1_2
BOOT1
UGATE1
PHASE1
LGATE1
ISEN1+
ISEN1-
BOOT2
UGATE2
PHASE2
LGATE2
ISEN2+
ISEN2-
PWM3
ISEN3+
ISEN3-
PWM4
ISEN4+
ISEN4-
PVCC_NB
BOOT_NB
UGATE_NB
PHASE_NB
LGATE_NB
ISEN_NB
PHASE_NB_A
R123 2.2R/0603 R123 2.2R/0603
C0.1u16Y0402
C0.1u16Y0402
6262_VCCNB_R
+12VIN
29
R43 2.2R1%0805 R43 2.2R1%0805
31
32
33
30
ISEN1+
20
ISEN1-
21
IPHASE1
R75 2.2R1%0805 R75 2.2R1%0805
27
26
25
28
ISEN2+
22
ISEN2-
23
IPHASE2
PWM3
35
ISEN3+
44
ISEN3-
43
IPHASE3
R14 X_0R0805 R14 X_0R0805
36
46
R23 0R0805 R23 0R0805
45
42
R15 2.2R1%0805 R15 2.2R1%0805
40
39
38
41
47
R6
R6
8.66KR1%0402-RH
8.66KR1%0402-RH
C71
C71
U6
U6
3
GND
4
SDA
8
OUT1
R121
R121
X_1KR0402
X_1KR0402
R59
R59
2.2R1%0805
2.2R1%0805
C28
C28
C1u25X0805-RH
C1u25X0805-RH
U_G1
PHASE1
L_G1
R94 432R1%0402-RH R94 432R1%0402-RH
R108
R108
8.66KR1%0402-RH
8.66KR1%0402-RH
U_G2
PHASE2
L_G2
R95 130R1%0402-RH R95 130R1%0402-RH
R109
R109
8.66KR1%0402-RH
8.66KR1%0402-RH
R25 255R1%0402-RH R25 255R1%0402-RH
R8 8.66KR1%0402-RHR8 8.66KR1%0402-RH
VCC5
VCC5
R13 2.2R1%0805 R13 2.2R1%0805
C9 C1u25X0805-RH C9 C1u25X0805-RH
UGATE_NB
PHASE_NB
LGATE_NB
1
OUT2
VCC
OUT3
SCL
BUS_SEL
2
R122
R122
10KR0402
10KR0402
C26 C0.1u25X C26 C0.1u25X
C40 C0.1u25X C40 C0.1u25X
C8 C0.1u25X C8 C0.1u25X
R31 X_6.2KR1%0402 R31 X_6.2KR1%0402
C17 C0.1u16X0402 C17 C0.1u16X0402
6262_VCCP_R
7
6
5
UP6262M8_SOT23-8-RH
UP6262M8_SOT23-8-RH
ISEN1
C55
C55
C0.1u16X0402
C0.1u16X0402
ISEN2
C56
C56
C0.1u16X0402
C0.1u16X0402
ISEN3
C15
C15
C0.1u16X0402
C0.1u16X0402
+12VIN
ISEN_NB_A
C4
C4
C0.1u16X0402
C0.1u16X0402
R117 0R0402 R117 0R0402
SCL0 7,11,12,20,32
BUS_SEL=100%VCC
I2C address:0X60
VCC5
R643=10K;R644=OPEN
C64
C64
C0.1u16X0402
C0.1u16X0402
C65
C65
C0.1u16X0402
C0.1u16X0402
C5
C5
C0.1u16X0402
C0.1u16X0402
+12VIN
C175 C1u16X5 C175 C1u16X5
PWM3
6262_VCCP
R204
R204
2.2R1%0805
2.2R1%0805
U_G1
PHASE1
L_G1
U_G2
PHASE2
L_G2
U10
U10
6
VCC
UGATE
7
BOOT
PVCC
PHASE
4
GND
3
PWM
LGATE
ISL6612ACBZT_SOIC8-RH
ISL6612ACBZT_SOIC8-RH
UGATE_NB
PHASE_NB
LGATE_NB
VRM
˖
H-MOS
L-MOS
R156 2.2R0805 R156 2.2R0805
R132 0R0805 R132 0R0805
R172 2.2R0805 R172 2.2R0805
R159 0R0805 R159 0R0805
U_G3
R191 2.2R0805 R191 2.2R0805
1
2
R192
R192
C0.1u25X
C0.1u25X
2.2R1%0805
2.2R1%0805
8
PHASE3
L_G3
5
R128 2.2R0805 R128 2.2R0805
R49 0R0805 R49 0R0805
Џ᭭˖
D03-0903B4B-N03ǃAVL˖D03-0480900-O05,D03-008030B-N03
Џ᭭˖
D03-0603B2B-N03ǃAVL˖D03-0480600-O05,D03-004030B-N03
R154
R154
10KR0402
10KR0402
06030B
06030B
N-P0903BDG_TO252-3-RH
N-P0903BDG_TO252-3-RH
R168
R168
10KR0402
10KR0402
06030B
06030B
C167
C167
R177 0R0805 R177 0R0805
R116 10KR0402 R116 10KR0402
D S
G
D S
G
VIN
D S
G
D S
G
N-P0903BDG_TO252-3-RH
N-P0903BDG_TO252-3-RH
R184
R184
10KR0402
10KR0402
VIN
G
G
L_G2
VCCP
output CAP
VCCP
NB-output CAP
CP43
CP43
X_COPPER
X_COPPER
X_COPPER
X_COPPER
Q1
Q1
VCCP
EC19
EC19
+
+
1 2
CD1800u6.3EL20-RH-2
CD1800u6.3EL20-RH-2
EC22
EC22
+
+
1 2
X_CD1800u6.3EL20-RH-2
X_CD1800u6.3EL20-RH-2
EC10
EC10
+
+
1 2
CD1800u6.3EL20-RH-2
CD1800u6.3EL20-RH-2
EC13
EC13
+
+
1 2
CD1800u6.3EL20-RH-2
CD1800u6.3EL20-RH-2
EC9
EC9
+
+
1 2
CD1800u6.3EL20-RH-2
CD1800u6.3EL20-RH-2
EC14
EC14
+
+
1 2
CD1800u6.3EL20-RH-2
CD1800u6.3EL20-RH-2
EC20
EC20
+
+
1 2
CD1800u6.3EL20-RH-2
CD1800u6.3EL20-RH-2
VCCP_NB
EC5
EC5
+
+
1 2
CD1800u6.3EL20-RH-2
CD1800u6.3EL20-RH-2
EC4
EC4
+
+
1 2
CD1800u6.3EL20-RH-2
CD1800u6.3EL20-RH-2
VCCP
VCCP_NB
CP35
CP35
VCC5
R4
1K/0603R41K/0603
A C
LED1
LED1
X_LED-B_1608
X_LED-B_1608
D1
APS_SEL_GPIO 29
5
4
3
APS_SEL_GPIO
2
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
MICRO-START INT'L CO.,LTD.
INTERSIL 6323A
INTERSIL 6323A
INTERSIL 6323A
MS_7623 1.0
MS_7623 1.0
MS_7623 1.0
1
63 7 Tuesday, September 29, 2009
63 7 Tuesday, September 29, 2009
63 7 Tuesday, September 29, 2009
of
of
of
VCC3
X_Copper
X_Copper
5
CP29
CP29
CLK_VDD
4
3
2
1
R426
R426
4.7KR0402
4.7KR0402
R415
R415
4.7KR0402
4.7KR0402
C0.1u16X
C0.1u16X
CLK_VDD
3VDUAL
Q56
Q56
2
5
C442
C442
NN-CMKT3904_SOT363-6-RH
NN-CMKT3904_SOT363-6-RH
R472
R472
10KR0402
10KR0402
USBCLK_EXT_R
Title
Title
Title
Clock-Ge RTM880N-793
Clock-Ge RTM880N-793
Clock-Ge RTM880N-793
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
6
1
3
4
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
PD#
C454
C454
X_C0.1u16X
X_C0.1u16X
MS_7623
MS_7623
MS_7623
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
1
Rev
Rev
Rev
1.0
1.0
1.0
Monday, September 28, 2009
Monday, September 28, 2009
Monday, September 28, 2009
of
of
of
73 7
73 7
73 7
L23 X_30L3A-15_0805-RHL23 X_30L3A-15_0805-RH
D D
CLK_VDD
C C
CLK_VDD
FP_RST# 20,32,33
SCL0 6,11,12,20,32
SDA0 6,11,12,20,32
CLK_VDD
B B
NB_OSC_14M 15
RS740
RX780
RS780
R442
R442
X_75R1%0402
X_75R1%0402
NB_OSC_14M NB
3.3V 33R serial
1.8V 75R/100R
1.1V 150R/75R
C10u10Y0805
C10u10Y0805
VCC3
VCC3
C501
C501
CP16X_Copper CP16X_Copper
L17
L17
X_30L3A-15_0805-RH
X_30L3A-15_0805-RH
CP28 X_Copper CP28 X_Copper
L24
L24
X_30L3A-15_0805-RH
X_30L3A-15_0805-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C478
C478
C22p50N
C22p50N
C509
C509
C22p50N
C22p50N
X_10KR0402
X_10KR0402
R447 33R0402 R447 33R0402
C458
C458
X_C10p50N0402
X_C10p50N0402
Reserved for EMI 0906
REF0/SEL_HTT66 HTT CLOCK
0
A A
1
100.00 DIFFERENTIAL
66.66 SINGLE END
5
C475
C475
C0.1u16X0402-2
C0.1u16X0402-2
1- PLACE ALL THE SERIES TERMINATION
RESISTORS AS CLOSE AS U41 AS POSSIBLE
C503
C503
X_C0.1u16X0402-2
X_C0.1u16X0402-2
C514
C514
C0.1u16X0402-2
C0.1u16X0402-2
2- ROUTE ALL CPUCLK/#, NBSRCCLK/#, GPPCLK/# AS DIFFERENT PAIR RULE
3- PUT DECOUPLING CAPS CLOSE TO U41
POWER PIN
CLK_VDDA
C450
C450
C444
C444
C0.1u16X0402-2
X_C10u10Y0805
X_C10u10Y0805
C502
C502
14.318MHZ16P_D-RH
14.318MHZ16P_D-RH
Y3
Y3
1 2
R438 X_4.7KR0402 R438 X_4.7KR0402
R437 R437
R483 R483
R474 R474
R430 1KR0402 R430 1KR0402
CLK_VDD
R454
R454
R461
R461
10KR0402
10KR0402
R462
R462
X_10KR0402
X_10KR0402
VDD48
R463
R463
X_1MR
X_1MR
C0.1u16X0402-2
R458
R458
X_10KR0402
X_10KR0402
SEL_HTT66
SEL_SATA
SEL_OC_MODE
R459
R459
10KR0402
10KR0402
R11-0151T12-W08
TXC1
TXC2
RST#_CLK
PD#
44
43
60
61
39
42
64
3
48
47
56
53
34
11
16
25
33
28
10
17
24
62
63
52
4
5
51
59
58
57
R455 33R0402 R455 33R0402
4
C446
C446
X_C0.1u16X0402-2
X_C0.1u16X0402-2
U24
U24
VDDA
GNDA
VDDREF
GNDREF
VDDSATA
GNDSATA
VDD48
GND48
VDDCPU
GNDCPU
VDDHTT
GNDHTT
VDDATIG
VDDSRC
VDDSRC
VDDSB
GNDATIG
GNDATIG
GNDSRC
GNDSRC
GNDSB
X1
X2
*RESTORE#
SMBCLK
SMBDAT
*PD#
**SEL_HTT66/REF0
*SEL_SATA/REF1
REF2
RTM880N-793-VB-GR_QFN64-RH
RTM880N-793-VB-GR_QFN64-RH
REF2
REF2
OPT
OPT
X_150R1%0402
X_150R1%0402
25M_48M_66M_OSC SEL_SATA
C473
C473
X_10p/50v/N/4
X_10p/50v/N/4
C451
C451
X_C0.1u16X0402-2
X_C0.1u16X0402-2
CPUK8_0T
CPUK8_0C
CPUK8_1T
CPUK8_1C
ATIG0T
ATIG0C
ATIG1T
ATIG1C
ATIG2T
ATIG2C
ATIG3T
ATIG3C
SB_SRC0T
SB_SRC0C
SB_SRC1T
SB_SRC1C
SRC0T
SRC0C
SRC1T
SRC1C
SRC2T
SRC2C
SRC3T
SRC3C
SRC4T
SRC4C
**DOC_1/SRC5T
**DOC_0/SRC5C
SRC6T/SATAT
SRC6C/SATAC
HTT0T/66M
HTT0C/66M
48Mz_0
*SEL_DOC/48Mz_1
TGND
25M_48M_66M_OSC 18
C449
C449
X_C0.1u16X0402-2
X_C0.1u16X0402-2
CPU_CLK
50
CPU_CLK#
49
46
45
NBGFX_SRCCLK
38
NBGFX_SRCCLK#
37
GFX_CLKP
36
GFX_CLKN
35
32
31
30
29
27
26
23
22
21
20
GPPCLK0
19
GPPCLK0#
18
GPPCLK1
15
GPPCLK1#
14
CK_PE_100M_LAN
13
CK_PE_100M_LAN#
12
NBLINKCLK
9
NBLINKCLK#
8
DOC1#
7
DOC0#
6
SBSRCCLK
41
SBSRCCLK#
40
HTREFCLKC
55
HTREFCLKC#
54
SIO_CLK_R
2
USBCLK_EXT_R
1
65
3
C474
C474
X_C0.1u16X0402-2
X_C0.1u16X0402-2
R448 0R0402R448 0R0402
R444 X_0R0402R444 X_0R0402
R473 0R0402R473 0R0402
R476 0R0402R476 0R0402
C522
C522
C10p50N0402
C10p50N0402
VCC3 VCC3
R482
R482
X_10KR0402
X_10KR0402
R467
R467
X_0R0402
X_0R0402
HTREFCLK
HTREFCLK#
EMI suggest
ON
ON
1
1A
3
1B
OFF OFF
OFF OFF
X_SW-DIPP2-RH
X_SW-DIPP2-RH
CPU_CLK 8
CPU_CLK# 8
NBGFX_SRCCLK 15
NBGFX_SRCCLK# 15
GFX_CLKP 23
GFX_CLKN 23
GPPCLK0 23
GPPCLK0# 23
GPPCLK1 24
GPPCLK1# 24
CK_PE_100M_LAN 27
CK_PE_100M_LAN# 27
NBLINKCLK 15
NBLINKCLK# 15
SBSRCCLK 18
SBSRCCLK# 18
HTREFCLK 15
HTREFCLK# 15
SIO_CLK 29
USBCLK_EXT 20
C528
C528
C10p50N0402
C10p50N0402
OC_SW1
OC_SW1
ON
ON
DOC1# DOC0#
2
2A
4
2B
VCCA_1V2
R475
R475
X_10KR0402
X_10KR0402
R466
R466
X_0R0402
X_0R0402
2
DOC
5
HT_CADIN_H[15..0] 13
D D
49.9R1%0402
49.9R1%0402
HT_CLKIN_H1 13
HT_CLKIN_L1 13
HT_CLKIN_H0 13
HT_CLKIN_L0 13
HT_CTLIN_H1 13
HT_CTLIN_L1 13
HT_CTLIN_H0 13
HT_CTLIN_L0 13
HT_CADIN_H15
HT_CADIN_L15
HT_CADIN_H14
C C
B B
A A
HT_CADIN_L14
HT_CADIN_H13
HT_CADIN_L13
HT_CADIN_H12
HT_CADIN_L12
HT_CADIN_H11
HT_CADIN_L11
HT_CADIN_H10
HT_CADIN_L10
HT_CADIN_H9
HT_CADIN_L9
HT_CADIN_H8
HT_CADIN_L8
HT_CADIN_H7
HT_CADIN_H6
HT_CADIN_L6
HT_CADIN_H5
HT_CADIN_L5
HT_CADIN_H4
HT_CADIN_L4
HT_CADIN_H3
HT_CADIN_L3
HT_CADIN_H2
HT_CADIN_L2
HT_CADIN_H1
HT_CADIN_L1
HT_CADIN_H0
HT_CADIN_L0
IMC_TDI
IMC_TDI 20
IMC_DBRDY 20
IMC_DBRDY
NN-CMKT3904_SOT363-6-RH
NN-CMKT3904_SOT363-6-RH
NN-CMKT3904_SOT363-6-RH
NN-CMKT3904_SOT363-6-RH
IMC_TDO 20
IMC_TCK
IMC_TCK 20
HT_CADIN_L[15..0] 13
HT_CADOUT_H[15..0] 13
HT_CADOUT_L[15..0] 13
VCCA_1V2
R555
R555
R554
R554
49.9R1%0402
49.9R1%0402
N6
P6
N3
N2
V4
V5
U1
V1
U6
V6
T4
T5
R6
T6
P4
P5
M4
M5
L6
M6
K4
K5
J6
K6
U3
U2
R1
T1
R3
R2
N1
P1
L1
M1
L3
L2
J1
K1
J3
J2
ZIF-SOCKET941-RH
ZIF-SOCKET941-RH
CPU output pin:TDO,DBRDY ;OTHERS :INPUT
6
Q38
Q38
2
5
Q37
Q37
4
1
3
5
HT_CADIN_H[15..0]
HT_CADIN_L[15..0]
HT_CADOUT_H[15..0]
HT_CADOUT_L[15..0]
CPU1A
CPU1A
L0_CLKIN_H1
L0_CLKIN_L1
L0_CLKIN_H0
L0_CLKIN_L0
L0_CTLIN_H1
L0_CTLIN_L1
L0_CTLIN_H0
L0_CTLIN_L0
L0_CADIN_H15
L0_CADIN_L15
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H0
L0_CADIN_L0
4
1
3
5
1
3
5
7
2
6
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
HT LINK
HT LINK
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
112233445566778
8
CPU_TDO
CPU_DBRDY
RN7
RN7
2
4
6
8
8P4R-10KR0402
8P4R-10KR0402
CPU_TDI IMC_TDO
CPU_TCK IMC_TMS
AD5
AD4
AD1
AC1
Y6
W6
W2
W3
Y5
Y4
AB6
AA6
AB5
AB4
AD6
AC6
AF6
AE6
AF5
AF4
AH6
AG6
AH5
AH4
Y1
W1
AA2
AA3
AB1
AA1
AC2
AC3
AE2
AE3
AF1
AE1
AG2
AG3
AH1
AG1
IMC_DBREQ_L 20
IMC_TMS 20
HT_CADOUT_H15
HT_CADOUT_L15
HT_CADOUT_H14
HT_CADOUT_L14
HT_CADOUT_H13
HT_CADOUT_L13
HT_CADOUT_H12
HT_CADOUT_L12
HT_CADOUT_H11
HT_CADOUT_L11
HT_CADOUT_H10
HT_CADOUT_L10
HT_CADOUT_H9
HT_CADOUT_L9
HT_CADOUT_H8
HT_CADOUT_L8
HT_CADOUT_H7
HT_CADOUT_L7 HT_CADIN_L7
HT_CADOUT_H6
HT_CADOUT_L6
HT_CADOUT_H5
HT_CADOUT_L5
HT_CADOUT_H4
HT_CADOUT_L4
HT_CADOUT_H3
HT_CADOUT_L3
HT_CADOUT_H2
HT_CADOUT_L2
HT_CADOUT_H1
HT_CADOUT_L1
HT_CADOUT_H0
HT_CADOUT_L0
LDT_RST#
NN-CMKT3904_SOT363-6-RH
NN-CMKT3904_SOT363-6-RH
NN-CMKT3904_SOT363-6-RH
NN-CMKT3904_SOT363-6-RH
IMC_DBREQ_L
L1
80/2A/B8L180/2A/B8
HT_CLKOUT_H1 13
HT_CLKOUT_L1 13
HT_CLKOUT_H0 13
HT_CLKOUT_L0 13
HT_CTLOUT_H1 13
HT_CTLOUT_L1 13
HT_CTLOUT_H0 13
HT_CTLOUT_L0 13
Q36
Q36
Q34
Q34
4
C4.7u16Y1206
C4.7u16Y1206
R149
R149
169R1%
169R1%
LDT_PWRGD 18
R205
R205
39.2R1%
39.2R1%
CPU_STRAP_HI_E11
CPU_STRAP_LO_F11
R206
R206
39.2R1%
39.2R1%
RN5
RN5
THERM_SIC_R
THERM_SID_R
CPUCLKIN
CPUCLKIN#
LDT_STOP# 15,18
LDT_RST# 15,18
X_C1000p50X
X_C1000p50X
THERM_SIC
THERM_SID
VCC_DDR
COREFB_H 6
COREFB_L 6
R145 300R0402 R145 300R0402
R146 300R0402 R146 300R0402
135
7
246
8
THERM_SIC
R193R193
THERM_SID
C89
C89
C3900p50X
C3900p50X
C88
C88
C3900p50X
C3900p50X
VCC_DDR
VCC_DDR
IMC_CRST_L 20
IMC_TRST_L 20
R194R194
R186 1KR0402 R186 1KR0402
R187 1KR0402 R187 1KR0402
X_8P4R-1KR0402
X_8P4R-1KR0402
CPU_TMS
CPU_TRST_L
CPU_TDI
CPU_TCK
CPU_DBREQ_L
VDDA25 VDDA_25
CPU_CLK 7
CPU_CLK# 7
IMC_CRST_L
IMC_TRST_L CPU_TRST_L
4
6
1
3
5
2
5
2
4
6
1
3
4
RN6
RN6
1
3
5
7
8P4R-10KR0402
8P4R-10KR0402
CPU_DBREQ_L
CPU_TMS
+1.8V_S0 +1.8V_S0
2
4
6
8
C90
C90
C83
C83
R197 X_1KR0402R197 X_1KR0402
TP13TP13
TP11TP11
VCC_DDR
R134
R134
300
300
3
THERM_SIC_R 29
THERM_SID_R 29
C76
C76
C0.22u16X
C0.22u16X
LDT_PWRGD
LDT_STOP#
LDT_RST#
TP20TP20
R185R185
CPU_TDI
CPU_TRST_L
CPU_TCK
CPU_TMS
CPU_DBREQ_L
COREFB_H
COREFB_L
M_VDDIO_PWRGD
CPU_VDDR_SENSE
CPU_TEST25_H
CPU_TEST25_L
TP10TP10
TP12TP12
TP15TP15
TP8TP8
TP16TP16
TP9TP9
3
C80
C80
X_C3300p50X0402
X_C3300p50X0402
CPU_PRESENT_L
CPU_M_VREF
CPU_TEST19
CPU_TEST18
CPU_TEST17
CPU_TEST16
CPU_TEST15
CPU_TEST14
CPU_TEST12
CPU_RSVD3
VDDA25
CPU_SA0
ALERT_L
2
CPUVID5 6
CPUVID4 6
CPUVID3 6
CPUVID2 6
CPUVID1 6
CPUVID0 6
CPU_HOT
CPU_HOT 18
CPU1D
CPU1D
C10
VDDA_1
D10
VDDA_2
MISC.
A8
B8
C9
D8
C7
AL3
AL6
AK6
AK4
AL4
AL10
AJ10
AH10
AL9
A5
G2
G1
F3
E12
F12
AH11
AJ11
A10
B10
F10
E9
AJ7
F6
D6
E7
F8
C5
AH9
E5
AJ5
AH7
AJ6
C18
C20
F2
G24
G25
H25
L25
L26
LDT_PWRGD 18
MISC.
CLKIN_H
CLKIN_L
PWROK
LDTSTOP_L
RESET_L
CPU_PRESENT_L
SIC
SID
SA0
ALERT_L
TDI
TRST_L
TCK
TMS
DBREQ_L
VDD_FB_H
VDD_FB_L
M_VDDIO_PWRGD
VDDR_SENSE
M_VREF
M_ZN
M_ZP
TEST25_H
TEST25_L
TEST19
TEST18
TEST13
TEST9
TEST17
TEST16
TEST15
TEST14
TEST12
TEST7
TEST6
TEST3
TEST2
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
INT. MISC.
INT. MISC.
RSVD6
RSVD7
RSVD8
ZIF-SOCKET941-RH
ZIF-SOCKET941-RH
R68
R68
4.7KR0402
4.7KR0402
VCC_DDR
B
Q60
Q60
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
C E
CORE_TYPE
SVC/VID3
SVD/VID2
PVIEN/VID1
THERMDC
THERMDA
THERMTRIP_L
PROCHOT_L
DBRDY
VDDIO_FB_H
VDDIO_FB_L
VDDNB_FB_H
VDDNB_FB_L
PSI_L
HTREF1
HTREF0
TEST29_H
TEST29_L
TEST24
TEST23
TEST22
TEST21
TEST20
TEST28_H
TEST28_L
TEST27
TEST26
TEST10
TEST8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
G5
D2
VID5
D1
VID4
C1
E3
E2
E1
VID0
AG9
AG8
AK7
AL7
AK10
TDO
B6
AK11
AL11
G4
G3
F1
V8
V7
C11
D11
AK8
AH8
AJ9
AL8
AJ8
J10
H9
AK9
AK5
G7
D4
L30
L31
AD25
AE24
AE25
AJ18
AJ20
AK3
CPU_CORE_TYPE
CPUVID5
CPUVID4
CPUVID3
CPUVID2
CPUVID1
CPUVID0
THERMDC_CPU
THERMDA_CPU
CPU_HOT
CPU_TDO
CPU_DBRDY
CPU_PSI_L
HTREF1
HTREF0
CPU_TEST29_H
CPU_TEST29_L
CPU_TEST24
CPU_TEST23
CPU_TEST22
CPU_TEST21
CPU_TEST20
CPU_TEST27
CPU_TEST26
VCC3
R69
R69
4.7KR0402
4.7KR0402
2
VCC_DDR
NB_VSEN 6
NB_GND 6
TP19TP19
TP17TP17
TP18TP18
R207 X_300R0402 R207 X_300R0402
R198 300R0402 R198 300R0402
R144
R144
R155
R155
1KR0402
1KR0402
300R0402
300R0402
CPU_CORE_TYPE 6
THERMDA_CPU 29
DDRPWRFB
80.6R1%
80.6R1%
VCC_DDR
CPU_DBREQ_L
CPU_PRESENT_L
CPU_TEST25_H
CPU_TEST25_L
M_VDDIO_PWRGD
C32
C32
X_C100p50N0402
X_C100p50N0402
VCC_DDR
R153
R153
300R0402
300R0402
TP1TP1
R150
R150
R195
R195
R188
R188
300R0402
300R0402
300R0402
300R0402
C86
C86
X_C0.1u25Y
X_C0.1u25Y
PWROK_PWM 6
CPU_THRIP_L#
VCC_DDR
C165
C165
C1000p50X0402
C1000p50X0402
R196 10KR0402 R196 10KR0402
R148 510R0402 R148 510R0402
R147 510R0402 R147 510R0402
R139 1KR0402 R139 1KR0402
Title
Title
Title
Document Number
Document Number
Document Number
R201
R201
300R0402
300R0402
R199 44.2R1% R199 44.2R1%
R200 44.2R1% R200 44.2R1%
VCC_DDR
VCC_DDR
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
1
VCC_DDR
R202
R202
R210
R210
X_4.7KR0402
X_4.7KR0402
300R0402
300R0402
B
Q35
Q35
X_N-MMBT3904_NL_SOT23
X_N-MMBT3904_NL_SOT23
C E
R209R209
VCC_DDR
B
C166
C166
C1000p50X0402
C1000p50X0402
VCC_DDR
R129
R129
15R1%
15R1%
R135
R135
15R1%
15R1%
VCC_DDR
1
3
5
7
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
AM3 HT I/F,CTRL&DEBUG
AM3 HT I/F,CTRL&DEBUG
AM3 HT I/F,CTRL&DEBUG
CPU_THRIP# 20 THERMDC_CPU 29
R208
R208
4.7KR0402
4.7KR0402
Q33
Q33
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
C E
TALERT# 19,29
VCCA_1V2
CPU_M_VREF
C85
C85
C0.1u25Y0402-RH
C0.1u25Y0402-RH
RN2
RN2
2
LDT_RST#
4
LDT_STOP#
6
LDT_PWRGD
8
8P4R-300R-RH
8P4R-300R-RH
MS_7623
MS_7623
MS_7623
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
1
Monday, September 28, 2009
Monday, September 28, 2009
Monday, September 28, 2009
TP14TP14
C79
C79
C1000p50X
C1000p50X
Rev
Rev
Rev
1.0
1.0
1.0
83 7
83 7
83 7
of
of
of
5
4
3
2
1
MEM_MA_DQS_L[7..0] 11 MEM_MB_DQS_L[7..0] 12
MEM_MA_DQS_H[7..0] 11
MEM_MA_DM[7..0] 11
MEM_MA_ADD[15..0] 11
D D
MEM_MA0_CLK_H0 11
MEM_MA0_CLK_L0 11
MEM_MA0_CLK_H1 11
MEM_MA0_CLK_L1 11
MEM_MA0_CS_L1 11
MEM_MA0_CS_L0 11
MEM_MA0_ODT1 11
C C
B B
A A
MEM_MA0_ODT0 11
MEM_MA_RESET# 11
MEM_MA_CAS_L 11
MEM_MA_WE_L 11
MEM_MA_RAS_L 11
MEM_MA_BANK2 11
MEM_MA_BANK1 11
MEM_MA_BANK0 11
MEM_MA_CKE1 11
MEM_MA_CKE0 11
MEM_MA_DATA[63..0] 11
MEM_MA0_CLK_H0
MEM_MA0_CLK_L0
MEM_MA0_CLK_H1
MEM_MA0_CLK_L1
MEM_MA0_CS_L1
MEM_MA0_CS_L0
MEM_MA0_ODT1
MEM_MA0_ODT0
MEM_MA_CAS_L
MEM_MA_WE_L
MEM_MA_RAS_L
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
MEM_MA_CKE1
MEM_MA_CKE0
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H0
MEM_MA_DQS_L0
MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0
5
MEM_MA_DQS_L[7..0] MEM_MB_DQS_L[7..0]
MEM_MA_DQS_H[7..0]
MEM_MA_DM[7..0]
MEM_MA_ADD[15..0]
MEM_MA_DATA[63..0]
CPU1B
CPU1B
AG21
MA_CLK_H7
AG20
MA_CLK_L7
AE20
MA_CLK_H6
AE19
MA_CLK_L6
U27
MA_CLK_H5
U26
MA_CLK_L5
V27
MA_CLK_H4
W27
MA_CLK_L4
W26
MA_CLK_H3
W25
MA_CLK_L3
U24
MA_CLK_H2
V24
MA_CLK_L2
G19
MA_CLK_H1
H19
MA_CLK_L1
G20
MA_CLK_H0
G21
MA_CLK_L0
AC25
MA0_CS_L1
AA24
MA0_CS_L0
AE28
MA0_ODT1
AC28
MA0_ODT0
AD27
MA1_CS_L1
AA25
MA1_CS_L0
AE27
MA1_ODT1
AC27
MA1_ODT0
E20
MA_RESET_L
AB25
MA_CAS_L
AB27
MA_WE_L
AA26
MA_RAS_L
N25
MA_BANK2
Y27
MA_BANK1
AA27
MA_BANK0
L27
MA_CKE1
M25
MA_CKE0
M27
MA_ADD15
N24
MA_ADD14
AC26
MA_ADD13
N26
MA_ADD12
P25
MA_ADD11
Y25
MA_ADD10
N27
MA_ADD9
R24
MA_ADD8
P27
MA_ADD7
R25
MA_ADD6
R26
MA_ADD5
R27
MA_ADD4
T25
MA_ADD3
U25
MA_ADD2
T27
MA_ADD1
W24
MA_ADD0
AD15
MA_DQS_H7
AE15
MA_DQS_L7
AG18
MA_DQS_H6
AG19
MA_DQS_L6
AG24
MA_DQS_H5
AG25
MA_DQS_L5
AG27
MA_DQS_H4
AG28
MA_DQS_L4
D29
MA_DQS_H3
C29
MA_DQS_L3
C25
MA_DQS_H2
D25
MA_DQS_L2
E19
MA_DQS_H1
F19
MA_DQS_L1
F15
MA_DQS_H0
G15
MA_DQS_L0
AF15
MA_DM7
AF19
MA_DM6
AJ25
MA_DM5
AH29
MA_DM4
B29
MA_DM3
E24
MA_DM2
E18
MA_DM1
H15
MA_DM0
ZIF-SOCKET941-RH
ZIF-SOCKET941-RH
MA_DATA63
MA_DATA62
MA_DATA61
MA_DATA60
MA_DATA59
MA_DATA58
MA_DATA57
MA_DATA56
MA_DATA55
MA_DATA54
MA_DATA53
MA_DATA52
MA_DATA51
MA_DATA50
MA_DATA49
MA_DATA48
MA_DATA47
MA_DATA46
MA_DATA45
MA_DATA44
MA_DATA43
MA_DATA42
MA_DATA41
MA_DATA40
MA_DATA39
MA_DATA38
MA_DATA37
MA_DATA36
MA_DATA35
MA_DATA34
MA_DATA33
MA_DATA32
MA_DATA31
MA_DATA30
MA_DATA29
MA_DATA28
MA_DATA27
MA_DATA26
MA_DATA25
MA_DATA24
MA_DATA23
MA_DATA22
MA_DATA21
MA_DATA20
MA_DATA19
MA_DATA18
MA_DATA17
MA_DATA16
MA_DATA15
MA_DATA14
MA_DATA13
MA_DATA12
MEM CHA
MEM CHA
MA_DATA11
MA_DATA10
MA_DATA9
MA_DATA8
MA_DATA7
MA_DATA6
MA_DATA5
MA_DATA4
MA_DATA3
MA_DATA2
MA_DATA1
MA_DATA0
MA_DQS_H8
MA_DQS_L8
MA_DM8
MA_CHECK7
MA_CHECK6
MA_CHECK5
MA_CHECK4
MA_CHECK3
MA_CHECK2
MA_CHECK1
MA_CHECK0
MA_EVENT_L
4
AE14
AG14
AG16
AD17
AD13
AE13
AG15
AE16
AG17
AE18
AD21
AG22
AE17
AF17
AF21
AE21
AF23
AE23
AJ26
AG26
AE22
AG23
AH25
AF25
AJ28
AJ29
AF29
AE26
AJ27
AH27
AG29
AF27
E29
E28
D27
C27
G26
F27
C28
E27
F25
E25
E23
D23
E26
C26
G23
F23
E22
E21
F17
G17
G22
F21
G18
E17
G16
E15
G13
H13
H17
E16
E14
G14
J28
J27
J25
K25
J26
G28
G27
L24
K27
H29
H27
W30
MEM_MA_DATA63
MEM_MA_DATA62
MEM_MA_DATA61
MEM_MA_DATA60
MEM_MA_DATA59
MEM_MA_DATA58
MEM_MA_DATA57
MEM_MA_DATA56
MEM_MA_DATA55
MEM_MA_DATA54
MEM_MA_DATA53
MEM_MA_DATA52
MEM_MA_DATA51
MEM_MA_DATA50
MEM_MA_DATA49
MEM_MA_DATA48
MEM_MA_DATA47
MEM_MA_DATA46
MEM_MA_DATA45
MEM_MA_DATA44
MEM_MA_DATA43
MEM_MA_DATA42
MEM_MA_DATA41
MEM_MA_DATA40
MEM_MA_DATA39
MEM_MA_DATA38
MEM_MA_DATA37
MEM_MA_DATA36
MEM_MA_DATA35
MEM_MA_DATA34
MEM_MA_DATA33
MEM_MA_DATA32
MEM_MA_DATA31
MEM_MA_DATA30
MEM_MA_DATA29
MEM_MA_DATA28
MEM_MA_DATA27
MEM_MA_DATA26
MEM_MA_DATA25
MEM_MA_DATA24
MEM_MA_DATA23
MEM_MA_DATA22
MEM_MA_DATA21
MEM_MA_DATA20
MEM_MA_DATA19
MEM_MA_DATA18
MEM_MA_DATA17
MEM_MA_DATA16
MEM_MA_DATA15
MEM_MA_DATA14
MEM_MA_DATA13
MEM_MA_DATA12
MEM_MA_DATA11
MEM_MA_DATA10
MEM_MA_DATA9
MEM_MA_DATA8
MEM_MA_DATA7
MEM_MA_DATA6
MEM_MA_DATA5
MEM_MA_DATA4
MEM_MA_DATA3
MEM_MA_DATA2
MEM_MA_DATA1
MEM_MA_DATA0
1KR0402
1KR0402
MEM_MA_EVENT_L
R189
R189
MEM_MA_EVENT_L 11
MEM_MB_DQS_H[7..0] 12
MEM_MB_DM[7..0] 12
MEM_MB_ADD[15..0] 12
MEM_MB_DATA[63..0] 12
MEM_MB0_CLK_H0 12
MEM_MB0_CLK_L0 12
MEM_MB0_CLK_H1 12
MEM_MB0_CLK_L1 12
MEM_MB0_CS_L1 12
MEM_MB0_CS_L0 12
MEM_MB0_ODT1 12
MEM_MB0_ODT0 12
MEM_MB_RESET# 12
MEM_MB_CAS_L 12
MEM_MB_WE_L 12
MEM_MB_RAS_L 12
MEM_MB_BANK2 12
MEM_MB_BANK1 12
MEM_MB_BANK0 12
MEM_MB_CKE1 12
MEM_MB_CKE0 12
3
MEM_MB_DQS_H[7..0]
MEM_MB_DM[7..0]
MEM_MB_ADD[15..0]
MEM_MB_DATA[63..0]
MEM_MB0_CLK_H0
MEM_MB0_CLK_L0
MEM_MB0_CLK_H1
MEM_MB0_CLK_L1
MEM_MB0_CS_L1
MEM_MB0_CS_L0
MEM_MB0_ODT1
MEM_MB0_ODT0
MEM_MB_RESET# MEM_MA_RESET#
MEM_MB_CAS_L
MEM_MB_WE_L
MEM_MB_RAS_L
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
MEM_MB_CKE1
MEM_MB_CKE0
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H0
MEM_MB_DQS_L0
MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
AJ19
AK19
AL19
AL18
W29
W28
W31
AE30
AC31
AF31
AD29
AE29
AB31
AG31
AD31
AC29
AC30
AB29
AA31
AA28
M31
M29
AE31
AA29
AA30
AK13
AJ13
AK17
AJ17
AK23
AL23
AL28
AL29
AJ14
AH17
AJ23
AK29
U31
U30
Y31
Y30
V31
A18
A19
C19
D19
B19
N31
N28
N29
N30
P29
P31
R29
R28
R31
R30
T31
T29
U29
U28
D31
C31
C24
C23
D17
C17
C14
C13
C30
A23
B17
B13
CPU1C
CPU1C
MB_CLK_H7
MB_CLK_L7
MB_CLK_H6
MB_CLK_L6
MB_CLK_H5
MB_CLK_L5
MB_CLK_H4
MB_CLK_L4
MB_CLK_H3
MB_CLK_L3
MB_CLK_H2
MB_CLK_L2
MB_CLK_H1
MB_CLK_L1
MB_CLK_H0
MB_CLK_L0
MB0_CS_L1
MB0_CS_L0
MB0_ODT1
MB0_ODT0
MB1_CS_L1
MB1_CS_L0
MB1_ODT1
MB1_ODT0
MB_RESET_L
MB_CAS_L
MB_WE_L
MB_RAS_L
MB_BANK2
MB_BANK1
MB_BANK0
MB_CKE1
MB_CKE0
MB_ADD15
MB_ADD14
MB_ADD13
MB_ADD12
MB_ADD11
MB_ADD10
MB_ADD9
MB_ADD8
MB_ADD7
MB_ADD6
MB_ADD5
MB_ADD4
MB_ADD3
MB_ADD2
MB_ADD1
MB_ADD0
MB_DQS_H7
MB_DQS_L7
MB_DQS_H6
MB_DQS_L6
MB_DQS_H5
MB_DQS_L5
MB_DQS_H4
MB_DQS_L4
MB_DQS_H3
MB_DQS_L3
MB_DQS_H2
MB_DQS_L2
MB_DQS_H1
MB_DQS_L1
MB_DQS_H0
MB_DQS_L0
MB_DM7
MB_DM6
MB_DM5
MB_DM4
MB_DM3
MB_DM2
MB_DM1
MB_DM0
ZIF-SOCKET941-RH
ZIF-SOCKET941-RH
MEM CHB
MEM CHB
2
MB_DATA63
MB_DATA62
MB_DATA61
MB_DATA60
MB_DATA59
MB_DATA58
MB_DATA57
MB_DATA56
MB_DATA55
MB_DATA54
MB_DATA53
MB_DATA52
MB_DATA51
MB_DATA50
MB_DATA49
MB_DATA48
MB_DATA47
MB_DATA46
MB_DATA45
MB_DATA44
MB_DATA43
MB_DATA42
MB_DATA41
MB_DATA40
MB_DATA39
MB_DATA38
MB_DATA37
MB_DATA36
MB_DATA35
MB_DATA34
MB_DATA33
MB_DATA32
MB_DATA31
MB_DATA30
MB_DATA29
MB_DATA28
MB_DATA27
MB_DATA26
MB_DATA25
MB_DATA24
MB_DATA23
MB_DATA22
MB_DATA21
MB_DATA20
MB_DATA19
MB_DATA18
MB_DATA17
MB_DATA16
MB_DATA15
MB_DATA14
MB_DATA13
MB_DATA12
MB_DATA11
MB_DATA10
MB_DATA9
MB_DATA8
MB_DATA7
MB_DATA6
MB_DATA5
MB_DATA4
MB_DATA3
MB_DATA2
MB_DATA1
MB_DATA0
MB_DQS_H8
MB_DQS_L8
MB_DM8
MB_CHECK7
MB_CHECK6
MB_CHECK5
MB_CHECK4
MB_CHECK3
MB_CHECK2
MB_CHECK1
MB_CHECK0
MB_EVENT_L
AH13
AL13
AL15
AJ15
AF13
AG13
AL14
AK15
AL16
AL17
AK21
AL21
AH15
AJ16
AH19
AL20
AJ22
AL22
AL24
AK25
AJ21
AH21
AH23
AJ24
AL27
AK27
AH31
AG30
AL25
AL26
AJ30
AJ31
E31
E30
B27
A27
F29
F31
A29
A28
A25
A24
C22
D21
A26
B25
B23
A22
B21
A20
C16
D15
C21
A21
A17
A16
B15
A14
E13
F13
C15
A15
A13
D13
J31
J30
J29
K29
K31
G30
G29
L29
L28
H31
G31
V29
MEM_MB_DATA63
MEM_MB_DATA62
MEM_MB_DATA61
MEM_MB_DATA60
MEM_MB_DATA59
MEM_MB_DATA58
MEM_MB_DATA57
MEM_MB_DATA56
MEM_MB_DATA55
MEM_MB_DATA54
MEM_MB_DATA53
MEM_MB_DATA52
MEM_MB_DATA51
MEM_MB_DATA50
MEM_MB_DATA49
MEM_MB_DATA48
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40
MEM_MB_DATA39
MEM_MB_DATA38
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23
MEM_MB_DATA22
MEM_MB_DATA21
MEM_MB_DATA20
MEM_MB_DATA19
MEM_MB_DATA18
MEM_MB_DATA17
MEM_MB_DATA16
MEM_MB_DATA15
MEM_MB_DATA14
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11
MEM_MB_DATA10
MEM_MB_DATA9
MEM_MB_DATA8
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA5
MEM_MB_DATA4
MEM_MB_DATA3
MEM_MB_DATA2
MEM_MB_DATA1
MEM_MB_DATA0
MEM_MB_EVENT_L
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
VCC_DDR VCC_DDR
R190
R190
1KR0402
1KR0402
MEM_MB_EVENT_L 12
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
AM3 DDR MEMORY I/F
AM3 DDR MEMORY I/F
AM3 DDR MEMORY I/F
MS_7623
MS_7623
MS_7623
Last Revision Date:
Last Revision Date:
Last Revision Date:
Monday, September 28, 2009
Monday, September 28, 2009
Monday, September 28, 2009
Sheet
Sheet
Sheet
1
Rev
Rev
Rev
1.0
1.0
1.0
of
of
of
93 7
93 7
93 7
VCCP
D D
C C
B B
B3
C2
C4
D3
D5
E4
E6
F5
F7
G6
G8
H7
H11
H23
J8
J12
J14
J16
J18
J20
J22
J24
K7
K9
K11
K13
K15
K17
K19
K21
K23
L4
L5
L8
L10
L12
L14
L16
L18
L20
L22
M2
M3
M7
M9
M11
M13
M15
M17
M19
M21
M23
N8
N10
N12
N14
N16
N18
N20
N22
P7
P9
P11
P13
P15
P17
P19
P21
P23
R4
R5
R8
R10
R12
R14
R16
R18
R20
R22
T2
T3
T7
T9
T11
T13
CPU1E
CPU1E
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12
VDD_13
VDD_14
VDD_15
VDD_16
VDD_17
VDD_18
VDD_19
VDD_20
VDD_21
VDD_22
VDD_23
VDD_24
VDD_25
VDD_26
VDD_27
VDD_28
VDD_29
VDD_30
VDD_31
VDD_32
VDD_33
VDD_34
VDD_35
VDD_36
VDD_37
VDD_38
VDD_39
VDD_40
VDD_41
VDD_42
VDD_43
VDD_44
VDD_45
VDD_46
VDD_47
VDD_48
VDD_49
VDD_50
VDD_51
VDD_52
VDD_53
VDD_54
VDD_55
VDD_56
VDD_57
VDD_58
VDD_59
VDD_60
VDD_61
VDD_62
VDD_63
VDD_64
VDD_65
VDD_66
VDD_67
VDD_68
VDD_69
VDD_70
VDD_71
VDD_72
VDD_73
VDD_74
VDD_75
VDD_76
VDD_77
VDD_78
VDD_79
VDD_80
VDD_81
VDD_82
VDD_83
VDD_84
VDD_85
ZIF-SOCKET941-RH
ZIF-SOCKET941-RH
5
A3
VSS_1
A7
VSS_2
A9
VSS_3
A11
VSS_4
B4
VSS_5
B9
VSS_6
B11
VSS_7
B14
VSS_8
B16
VSS_9
B18
VSS_10
B20
VSS_11
B22
VSS_12
B24
VSS_13
B26
VSS_14
B28
VSS_15
B30
VSS_16
C3
VSS_17
D14
VSS_18
D16
VSS_19
D18
VSS_20
D20
VSS_21
D22
VSS_22
D24
VSS_23
D26
VSS_24
D28
VSS_25
D30
VSS_26
E11
VSS_27
F4
VSS_28
F14
VSS_29
F16
VSS_30
F18
VSS_31
F20
VSS_32
F22
VSS_33
F24
VSS_34
F26
VSS_35
F28
VSS_36
F30
VSS_37
G9
VSS_38
G11
VSS_39
H8
VSS_40
H10
VSS_41
H12
VSS_42
H14
VSS_43
H16
VSS_44
H18
VSS_45
H24
VSS_46
H26
VSS_47
H28
VSS_48
H30
VSS_49
J4
VSS_50
J5
VSS_51
POWER/GND1
POWER/GND1
J7
VSS_52
J9
VSS_53
J11
VSS_54
J13
VSS_55
J15
VSS_56
J17
VSS_57
J19
VSS_58
J21
VSS_59
J23
VSS_60
K2
VSS_61
K3
VSS_62
K8
VSS_63
K10
VSS_64
K12
VSS_65
K14
VSS_66
K16
VSS_67
K18
VSS_68
K20
VSS_69
K22
VSS_70
K24
VSS_71
K26
VSS_72
K28
VSS_73
K30
VSS_74
L7
VSS_75
L9
VSS_76
L11
VSS_77
L13
VSS_78
L15
VSS_79
L17
VSS_80
L19
VSS_81
L21
VSS_82
L23
VSS_83
M8
VSS_84
M10
VSS_85
VCCP
T15
T17
T19
T21
T23
U8
U10
U12
U14
U16
U18
U20
U22
V9
V11
V13
V15
V17
V19
V21
V23
W4
W5
W8
W10
W12
W14
W16
W18
W20
W22
Y2
Y3
Y7
Y9
Y11
Y13
Y15
Y17
Y19
Y21
Y23
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AC4
AC5
AC8
AC10
AC12
AC14
AC16
AC18
AC20
AC22
AD2
AD3
AD7
AD9
AD11
AD23
AE10
AE12
AF7
AF9
AF11
AG4
AG5
AG7
AH2
AH3
CPU1F
CPU1F
VDD_86
VDD_87
VDD_88
VDD_89
VDD_90
VDD_91
VDD_92
VDD_93
VDD_94
VDD_95
VDD_96
VDD_97
VDD_98
VDD_99
VDD_100
VDD_101
VDD_102
VDD_103
VDD_104
VDD_105
VDD_106
VDD_107
VDD_108
VDD_109
VDD_110
VDD_111
VDD_112
VDD_113
VDD_114
VDD_115
VDD_116
VDD_117
VDD_118
VDD_119
VDD_120
VDD_121
VDD_122
VDD_123
VDD_124
VDD_125
VDD_126
VDD_127
VDD_128
VDD_129
VDD_130
VDD_131
VDD_132
VDD_133
VDD_134
VDD_135
VDD_136
VDD_137
VDD_138
VDD_139
VDD_140
VDD_141
VDD_142
VDD_143
VDD_144
VDD_145
VDD_146
VDD_147
VDD_148
VDD_149
VDD_150
VDD_151
VDD_152
VDD_153
VDD_154
VDD_155
VDD_156
VDD_157
VDD_158
VDD_159
VDD_160
VDD_161
VDD_162
VDD_163
VDD_164
VDD_165
VDD_166
VDD_167
VDD_168
VDD_169
VDD_170
ZIF-SOCKET941-RH
ZIF-SOCKET941-RH
4
M12
VSS_86
M14
VSS_87
M16
VSS_88
M18
VSS_89
M20
VSS_90
M22
VSS_91
N4
VSS_92
N5
VSS_93
N7
VSS_94
N9
VSS_95
N11
VSS_96
N13
VSS_97
N15
VSS_98
N17
VSS_99
N19
VSS_100
N21
VSS_101
N23
VSS_102
P2
VSS_103
P3
VSS_104
P8
VSS_105
P10
VSS_106
P12
VSS_107
P14
VSS_108
P16
VSS_109
P18
VSS_110
P20
VSS_111
P22
VSS_112
R7
VSS_113
R9
VSS_114
R11
VSS_115
R13
VSS_116
R15
VSS_117
R17
VSS_118
R19
VSS_119
R21
VSS_120
R23
VSS_121
T8
VSS_122
T10
VSS_123
T12
VSS_124
T14
VSS_125
T16
VSS_126
T18
VSS_127
T20
VSS_128
T22
VSS_129
U4
VSS_130
U5
VSS_131
U7
VSS_132
U9
VSS_133
U11
VSS_134
U13
VSS_135
POWER/GND2
POWER/GND2
U15
VSS_136
U17
VSS_137
U19
VSS_138
U21
VSS_139
U23
VSS_140
V2
VSS_141
V3
VSS_142
V10
VSS_143
V12
VSS_144
V14
VSS_145
V16
VSS_146
V18
VSS_147
V20
VSS_148
V22
VSS_149
W7
VSS_150
W9
VSS_151
W11
VSS_152
W13
VSS_153
W15
VSS_154
W17
VSS_155
W19
VSS_156
W21
VSS_157
W23
VSS_158
Y8
VSS_159
Y10
VSS_160
Y12
VSS_161
Y14
VSS_162
Y16
VSS_163
Y18
VSS_164
Y20
VSS_165
Y22
VSS_166
AA4
VSS_167
AA5
VSS_168
AA7
VSS_169
AA9
VSS_170
VCCP_NB
CPU1G
CPU1G
A4
VDDNB_1
A6
VDDNB_2
B5
VDDNB_3
B7
VDDNB_4
C6
VDDNB_5
C8
VDDNB_6
D7
VDDNB_7
D9
VDDNB_8
E8
VDDNB_9
E10
VDDNB_10
F9
VDDNB_11
F11
VDDNB_12
G10
VDDNB_13
G12
VDDNB_14
B2
NP/RSVD
H20
NP/VSS1
AE7
NP/VSS2
ZIF-SOCKET941-RH
ZIF-SOCKET941-RH
VCC_DDR VCCP VCCP VCCP_NB
X_C2.2u6.3X5
X_C2.2u6.3X5
VCC_DDR
C130
C130
X_C0.1u25Y0402-RH
X_C0.1u25Y0402-RH
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
POWER/GND3
POWER/GND3
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
BOTTOM
C648
C648
X_C2.2u6.3X5
X_C2.2u6.3X5
C129
C129
C131
C131
C161
C161
X_C0.1u25Y0402-RH
X_C0.1u25Y0402-RH
X_C0.1u25Y0402-RH
X_C0.1u25Y0402-RH
X_C0.1u25Y0402-RH
X_C0.1u25Y0402-RH
3
CPU1H
AJ1
AJ2
AJ3
AJ4
A12
B12
C12
D12
M24
M26
M28
M30
P24
P26
P28
P30
T24
T26
T28
T30
V25
V26
V28
V30
Y24
Y26
Y28
Y29
AB24
AB26
AB28
AB30
AC24
AD26
AD28
AD30
AF30
VCCP_NB CAP FOR EMI
VCCP_NB
C101 C0.22u16X C101 C0.22u16X
C103 C0.22u16X C103 C0.22u16X
VCCP_NB
C92 C4.7u10Y0805 C92 C4.7u10Y0805
VCCP_NB
C100 X_C10u6.3X50805C100 X_C10u6.3X50805
VCCP_NB
C615 C22u6.3X1206 C615 C22u6.3X1206
C99 X_C22u6.3X1206 C99 X_C22u6.3X1206
CPU1H
VLDT_A_1
VLDT_A_2
VLDT_A_3
VLDT_A_4
VDDR_1
VDDR_2
VDDR_3
VDDR_4
VDDIO_1
VDDIO_2
VDDIO_3
VDDIO_4
VDDIO_5
VDDIO_6
VDDIO_7
VDDIO_8
VDDIO_9
VDDIO_10
VDDIO_11
VDDIO_12
VDDIO_13
VDDIO_14
VDDIO_15
VDDIO_16
VDDIO_17
VDDIO_18
VDDIO_19
VDDIO_20
VDDIO_21
VDDIO_22
VDDIO_23
VDDIO_24
VDDIO_25
VDDIO_26
VDDIO_27
VDDIO_28
VDDIO_29
ZIF-SOCKET941-RH
ZIF-SOCKET941-RH
VCC_DDR
C177
C177
X_C2200p10X0402
X_C2200p10X0402
C188
C188
X_C2200p10X0402
X_C2200p10X0402
C616
C616
X_C0.01u50X
X_C0.01u50X
VCCA_1V2
CPU_VDDR_B
VCC_DDR
AA11
AA13
AA15
AA17
AA19
AA21
AA23
AB2
AB3
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC7
AC9
AC11
AC13
AC15
AC17
AC19
AC21
AC23
AD8
AD10
AD12
AD14
AD16
AD20
AD22
AD24
AE4
AE5
AE11
AF2
AF3
AF8
AF10
AF12
AF14
AF16
C186
C186
C192
C192
X_C2200p10X0402
X_C2200p10X0402
X_C2200p10X0402
C102
C646
C646
C102
X_C2.2u6.3X5
X_C2.2u6.3X5
C119
C119
C202
C202
C152
C152
C470p50X0402
C470p50X0402
X_C180p50N0402
X_C180p50N0402
C470p50X0402
C470p50X0402
X_C2200p10X0402
VCC_DDR
C126
C126
C128
C128
C157
C157
C470p50X0402
C470p50X0402
X_C2200p10X0402
X_C2200p10X0402
C470p50X0402
C470p50X0402
bottom
2
VLDT_B_1
VLDT_B_2
VLDT_B_3
VLDT_B_4
VDDR_5
VDDR_6
VDDR_7
VDDR_8
VDDR_9
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
POWER/GND4
POWER/GND4
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VCCP_NB
C98 C180p50N0402C98 C180p50N0402
VCCP_NB
C614 C0.01u50X C614 C0.01u50X
C104 C0.01u50X C104 C0.01u50X
C105 X_C0.01u50X C105 X_C0.01u50X
1
VLDT_RUN_B
H1
H2
H5
H6
CPU_VDDR
AG12
AH12
AJ12
AK12
AL12
AF18
AF20
AF22
AF24
AF26
AF28
AG10
AG11
AH14
AH16
AH18
AH20
AH22
AH24
AH26
AH28
AH30
AK2
AK14
AK16
AK18
AK20
AK22
AK24
AK26
AK28
AK30
AL5
bottom
C111
C111
C10u6.3X50805
C10u6.3X50805
far VDDR 4pin
CPU_VDDR_B
C109
C109
C0.01u50Y5
C0.01u50Y5
C93 C0.01u50X C93 C0.01u50X
C87 X_C0.01u50X C87 X_C0.01u50X
C91 C0.22u16X C91 C0.22u16X
C82 C4.7u10Y0805 C82 C4.7u10Y0805
C77 C4.7u10Y0805 C77 C4.7u10Y0805
C75 X_C4.7u10Y0805 C75 X_C4.7u10Y0805 C81 C10u6.3X50805C81 C10u6.3X50805
C78 X_C4.7u10Y0805 C78 X_C4.7u10Y0805
CPU_VDDR CAP
C108
C108
C110
C110
X_C0.01u50Y5
X_C0.01u50Y5
X_C0.01u50Y5
X_C0.01u50Y5
R252 0R0402R252 0R0402
R243 X_0R0805 R243 X_0R0805
CPU_VDDR_A CPU_VDDR_B
R125 0R0402R125 0R0402
R130 X_0R0805 R130 X_0R0805
CPU_VDDR CPU_VDDR_A
near VDDR 5pin
CPU_VDDR
C190 C0.01u50X C190 C0.01u50X
C195 C0.22u16X C195 C0.22u16X
C211 X_C0.22u16X C211 X_C0.22u16X
C169 C0.22u16X C169 C0.22u16X
C210 X_C0.22u16X C210 X_C0.22u16X
C179 C4.7u10Y0805 C179 C4.7u10Y0805
C208 X_C4.7u10Y0805 C208 X_C4.7u10Y0805
C207 X_C4.7u10Y0805 C207 X_C4.7u10Y0805
C173 C4.7u10Y0805 C173 C4.7u10Y0805
C206 X_C10u6.3X50805C206 X_C10u6.3X50805
C213 C22u6.3X1206 C213 C22u6.3X1206
bottom
VCCA_1V2
VCCA_1V2
A A
5
VCCA_1V2 CAP
C164 C4.7u10Y0805 C164 C4.7u10Y0805
C178 X_C4.7u10Y0805 C178 X_C4.7u10Y0805
C168 C10u6.3X50805C168 C10u6.3X50805
C174 C10u6.3X50805C174 C10u6.3X50805
C219 X_C10u6.3X50805C219 X_C10u6.3X50805
VCCA_1V2
4
C182 X_C180p50N0402 C182 X_C180p50N0402
C181 C180p50N0402C181 C180p50N0402
VCC_DDR
C617 X_C10u6.3X50805C617 X_C10u6.3X50805
VCC_DDR
C626 X_C22u6.3X1206 C626 X_C22u6.3X1206
C622 C22u6.3X1206 C622 C22u6.3X1206
C638 C22u6.3X1206 C638 C22u6.3X1206
C635 X_C22u6.3X1206 C635 X_C22u6.3X1206
bottom
VCC_DDR
C355 C0.22u16X C355 C0.22u16X
C629 C0.22u16X C629 C0.22u16X
VCC_DDR
C172 X_C4.7u10Y0805 C172 X_C4.7u10Y0805
C647 X_C4.7u10Y0805 C647 X_C4.7u10Y0805
C145 X_C4.7u10Y0805 C145 X_C4.7u10Y0805
C642 C4.7u10Y0805 C642 C4.7u10Y0805
3
VCC_DDR CAP
VCC_DDR
C180 X_C180p50N0402C180 X_C180p50N0402
C170 X_C180p50N0402C170 X_C180p50N0402
VCC_DDR
C643 C0.01u50X C643 C0.01u50X
C632 C0.01u50X C632 C0.01u50X
bottom
VCCP
C645 X_C22u6.3X1206 C645 X_C22u6.3X1206
C636 C22u6.3X1206 C636 C22u6.3X1206
C619 X_C22u6.3X1206 C619 X_C22u6.3X1206
C625 X_C22u6.3X1206 C625 X_C22u6.3X1206
C634 C22u6.3X1206 C634 C22u6.3X1206
C633 X_C22u6.3X1206 C633 X_C22u6.3X1206
C624 C22u6.3X1206 C624 C22u6.3X1206
C637 X_C22u6.3X1206 C637 X_C22u6.3X1206
C620 C22u6.3X1206 C620 C22u6.3X1206
C639 X_C22u6.3X1206 C639 X_C22u6.3X1206
C641 C22u6.3X1206 C641 C22u6.3X1206
2
VCCP CAP
VCCP
C613 X_C10u6.3X50805C613 X_C10u6.3X50805
C612 X_C10u6.3X50805C612 X_C10u6.3X50805
C120 C10u6.3X50805C120 C10u6.3X50805
C113 C10u6.3X50805C113 C10u6.3X50805
C114 X_C10u6.3X50805C114 X_C10u6.3X50805
C631 X_C10u6.3X50805C631 X_C10u6.3X50805
C640 X_C10u6.3X50805C640 X_C10u6.3X50805
VCCP
C628 C180p50N0402C628 C180p50N0402
VCCP
C618 C0.01u50X C618 C0.01u50X
C644 C0.01u50X C644 C0.01u50X
VCCP
C623 C0.22u16X C623 C0.22u16X
C627 C0.22u16X C627 C0.22u16X
VCCP
C121 X_C4.7u10Y0805 C121 X_C4.7u10Y0805
C621 X_C4.7u10Y0805 C621 X_C4.7u10Y0805
C630 C4.7u10Y0805 C630 C4.7u10Y0805
bottom
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
AM3 PWR & GND
AM3 PWR & GND
AM3 PWR & GND
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
1
MS_7623
MS_7623
MS_7623
Last Revision Date:
Last Revision Date:
Last Revision Date:
Tuesday, September 29, 2009
Tuesday, September 29, 2009
Tuesday, September 29, 2009
Sheet
Sheet
Sheet
10 37
10 37
10 37
Rev
Rev
Rev
1.0
1.0
1.0
of
of
of
5
MEM_MA_DQS_H[7..0] 9
MEM_MA_DQS_L[7..0] 9
MEM_MA_DM[7..0] 9
MEM_MA_ADD[15..0] 9
MEM_MA_DATA[63..0] 9
D D
DIMM1
MEM_MA_DATA0 MEM_MA_ADD0
MEM_MA_DATA1
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA4
MEM_MA_DATA5
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DATA8
MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA11
MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
C C
B B
A A
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DATA32
MEM_MA_DATA33
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
MEM_MA_DATA40
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DATA48
MEM_MA_DATA49
MEM_MA_DATA50
MEM_MA_DATA51
MEM_MA_DATA52
MEM_MA_DATA53
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
MEM_MA_DATA59
MEM_MA_DATA60
MEM_MA_DATA61
MEM_MA_DATA62
MEM_MA_DATA63
DIMM1
3
DQ0
4
DQ1
9
DQ2
10
DQ3
122
DQ4
123
DQ5
128
DQ6
129
DQ7
12
DQ8
13
DQ9
18
DQ10
19
DQ11
131
DQ12
132
DQ13
137
DQ14
138
DQ15
21
DQ16
22
DQ17
27
DQ18
28
DQ19
140
DQ20
141
DQ21
146
DQ22
147
DQ23
30
DQ24
31
DQ25
36
DQ26
37
DQ27
149
DQ28
150
DQ29
155
DQ30
156
DQ31
81
DQ32
82
DQ33
87
DQ34
88
DQ35
200
DQ36
201
DQ37
206
DQ38
207
DQ39
90
DQ40
91
DQ41
96
DQ42
97
DQ43
209
DQ44
210
DQ45
215
DQ46
216
DQ47
99
DQ48
100
DQ49
105
DQ50
106
DQ51
218
DQ52
219
DQ53
224
DQ54
225
DQ55
108
DQ56
109
DQ57
114
DQ58
115
DQ59
227
DQ60
228
DQ61
233
DQ62
234
DQ63
2
VSS
5
VSS
8
VSS
11
VSS
14
VSS
17
VSS
20
VSS
23
VSS
26
VSS
29
VSS
32
VSS
35
VSS
38
VSS
41
VSS
44
VSS
47
VSS
80
VSS
83
VSS
86
VSS
89
VSS
92
VSS
95
VSS
98
VSS
101
VSS
104
VSS
MEM_MA_DQS_H[7..0]
MEM_MA_DQS_L[7..0]
MEM_MA_DM[7..0]
MEM_MA_ADD[15..0]
MEM_MA_DATA[63..0]
54
VDD51VDD
VDD57VDD60VDD62VDD65VDD66VDD69VDD72VDD75VDD78VDD
VSS
VSS
VSS
VSS
VSS
VSS
107
110
113
116
119
121
ADDRESS A0
5
4
VCC3
C241
C241
C0.1u16Y0402
VSS
C0.1u16Y0402
68
53
167
120
240
79
48
VTT
VTT
RSVD
FREE1
NC/TEST4
NC/PAR_IN
NC/ERR_OUT
DM1/DQS10
DM2/DQS11
DM3/DQS12
DM4/DQS13
DM5/DQS14
DM6/DQS15
DM7/DQS16
DM8/DQS17
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
214
217
220
223
226
229
232
235
VTT_DDR VCC_DDR
170
173
176
179
182
183
186
189
191
194
197
236
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDSPD
DDR3
DDR3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
199
202
205
208
211
4
MEM_MA_EVENT_L
187
198
A0
FREE249FREE3
FREE4
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
DM0/DQS9
NC/DQS9#
NC/DQS10#
NC/DQS11#
NC/DQS12#
NC/DQS13#
NC/DQS14#
NC/DQS15#
NC/DQS16#
NC/DQS17#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
BA0
BA1
BA2
WE#
RAS#
CAS#
RESET#
CK0
CK0#
CK1(NU)
CK1#(NU)
VREFDQ
VREFCA
SCL
SDA
SA1
SA0
VSS
MEC1
MEC2
MEC3
239
MEC1
MEC2
MEC3
3
188
MEM_MA_ADD1
181
MEM_MA_ADD2
61
MEM_MA_ADD3
180
MEM_MA_ADD4
59
MEM_MA_ADD5
58
MEM_MA_ADD6
178
MEM_MA_ADD7
56
MEM_MA_ADD8
177
MEM_MA_ADD9
175
MEM_MA_ADD10
70
MEM_MA_ADD11
55
MEM_MA_ADD12
174
MEM_MA_ADD13
196
MEM_MA_ADD14
172
MEM_MA_ADD15
171
39
40
45
46
158
159
164
165
MEM_MA_DQS_H0
7
MEM_MA_DQS_L0
6
MEM_MA_DQS_H1
16
MEM_MA_DQS_L1
15
MEM_MA_DQS_H2
25
MEM_MA_DQS_L2
24
MEM_MA_DQS_H3
34
MEM_MA_DQS_L3
33
MEM_MA_DQS_H4
85
MEM_MA_DQS_L4
84
MEM_MA_DQS_H5
94
MEM_MA_DQS_L5
93
MEM_MA_DQS_H6
103
MEM_MA_DQS_L6
102
MEM_MA_DQS_H7
112
MEM_MA_DQS_L7
111
43
42
125
126
134
135
143
144
152
153
203
204
212
213
221
222
230
231
161
162
MEM_MA0_ODT0
195
MEM_MA0_ODT1
77
MEM_MA_CKE0
50
MEM_MA_CKE1
169
MEM_MA0_CS_L0
193
MEM_MA0_CS_L1
76
MEM_MA_BANK0
71
MEM_MA_BANK1
190
MEM_MA_BANK2
52
MEM_MA_WE_L
73
MEM_MA_RAS_L
192
MEM_MA_CAS_L
74
MEM_MA_RESET#
168
MEM_MA0_CLK_H0
184
MEM_MA0_CLK_L0
185
MEM_MA0_CLK_H1
63
MEM_MA0_CLK_L1
64
1
67
SCL0
118
SDA0
238
237
117
DDRIII-240P_BLUE-RH
DDRIII-240P_BLUE-RH
3
MEM_MA_EVENT_L 9
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
VDDR_VREF_DQ
VDDR_VREF_CA
MEM_MA0_ODT0 9
MEM_MA0_ODT1 9
MEM_MA_CKE0 9
MEM_MA_CKE1 9
MEM_MA0_CS_L0 9
MEM_MA0_CS_L1 9
MEM_MA_BANK0 9
MEM_MA_BANK1 9
MEM_MA_BANK2 9
MEM_MA_WE_L 9
MEM_MA_RAS_L 9
MEM_MA_CAS_L 9
MEM_MA_RESET# 9
MEM_MA0_CLK_H0 9
MEM_MA0_CLK_L0 9
MEM_MA0_CLK_H1 9
MEM_MA0_CLK_L1 9
VDDR_VREF_DQ
VDDR_VREF_CA
SCL0 6,7,12,20,32
SDA0 6,7,12,20,32
2
VTT_DDR
VTT_DDR
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
DDRIII DIMMI
DDRIII DIMMI
DDRIII DIMMI
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
2
http://www.msi.com.tw
C284 X_C4.7u6.3X5 C284 X_C4.7u6.3X5
C344 X_C4.7u6.3X5 C344 X_C4.7u6.3X5
C269 C0.1u16Y0402 C269 C0.1u16Y0402
C268 X_C0.1u16Y0402 C268 X_C0.1u16Y0402
C266 C0.1u16Y0402 C266 C0.1u16Y0402
MS_7623
MS_7623
MS_7623
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
1
Rev
Rev
Rev
Monday, September 28, 2009
Monday, September 28, 2009
Monday, September 28, 2009
of
of
of
11 37
11 37
11 37
1
1.0
1.0
1.0
5
4
3
2
1
VCC_DDR
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
MEM_MB_DQS_H[7..0]
MEM_MB_DQS_L[7..0]
MEM_MB_DM[7..0]
MEM_MB_ADD[15..0]
MEM_MB_DATA[63..0]
54
VDD51VDD
VDD57VDD60VDD62VDD65VDD66VDD69VDD72VDD75VDD78VDD
VSS
VSS
VSS
VSS
VSS
107
110
113
116
119
VCC3
C353
C353
C0.1u16Y0402
VTT_DDR
170
173
176
179
182
183
VDD
VDD
VDD
VDD
DDR3
DDR3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
121
124
127
130
133
136
139
142
145
148
151
154
157
236
186
189
191
194
197
VDD
VDD
VDD
VDD
VDD
VDD
VDDSPD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
160
163
166
199
202
205
208
211
C0.1u16Y0402
MEM_MB_EVENT_L
48
187
68
120
240
VTT
VTT
VSS
VSS
VSS
214
217
220
223
3
198
53
167
79
188
A0
FREE1
FREE249FREE3
A10/AP
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#
DQS8#
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
RESET#
CK1(NU)
CK1#(NU)
VREFDQ
VREFCA
VSS
VSS
MEC1
235
239
MEC1
181
FREE4
A1
61
A2
180
A3
59
A4
58
A5
178
A6
56
A7
177
A8
175
A9
70
55
A11
174
A12
196
A13
172
A14
171
A15
39
CB0
40
CB1
45
CB2
46
CB3
158
CB4
159
CB5
164
CB6
165
CB7
7
DQS0
6
16
DQS1
15
25
DQS2
24
34
DQS3
33
85
DQS4
84
94
DQS5
93
103
DQS6
102
112
DQS7
111
43
DQS8
42
125
126
134
135
143
144
152
153
203
204
212
213
221
222
230
231
161
162
195
ODT0
77
ODT1
50
CKE0
169
CKE1
193
CS0#
76
CS1#
71
BA0
190
BA1
52
BA2
73
WE#
192
RAS#
74
CAS#
168
184
CK0
185
CK0#
63
64
1
67
118
SCL
238
SDA
237
SA1
117
SA0
MEC2
MEC3
DDRIII-240P_BLUE-RH
DDRIII-240P_BLUE-RH
MEC2
MEC3
RSVD
NC/TEST4
NC/PAR_IN
NC/ERR_OUT
VSS
VSS
VSS
VSS
226
229
232
MEM_MB_EVENT_L 9
MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15
MEM_MB_DQS_H0
MEM_MB_DQS_L0
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7
MEM_MB0_ODT0
MEM_MB0_ODT1
MEM_MB_CKE0
MEM_MB_CKE1
MEM_MB0_CS_L0
MEM_MB0_CS_L1
MEM_MB_BANK0
MEM_MB_BANK1
MEM_MB_BANK2
MEM_MB_WE_L
MEM_MB_RAS_L
MEM_MB_CAS_L
MEM_MB_RESET#
MEM_MB0_CLK_H0
MEM_MB0_CLK_L0
MEM_MB0_CLK_H1
MEM_MB0_CLK_L1
VDDR_VREF_DQ
VDDR_VREF_CA
SCL0
SDA0
MEM_MB0_ODT0 9
MEM_MB0_ODT1 9
MEM_MB_CKE0 9
MEM_MB_CKE1 9
MEM_MB0_CS_L0 9
MEM_MB0_CS_L1 9
MEM_MB_BANK0 9
MEM_MB_BANK1 9
MEM_MB_BANK2 9
MEM_MB_WE_L 9
MEM_MB_RAS_L 9
MEM_MB_CAS_L 9
MEM_MB_RESET# 9
MEM_MB0_CLK_H0 9
MEM_MB0_CLK_L0 9
MEM_MB0_CLK_H1 9
MEM_MB0_CLK_L1 9
SCL0 6,7,11,20,32
SDA0 6,7,11,20,32
VCC3
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
DDRIII DIMMII
DDRIII DIMMII
DDRIII DIMMII
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
2
http://www.msi.com.tw
MS_7623
MS_7623
MS_7623
1
Last Revision Date:
Last Revision Date:
Last Revision Date:
Monday, September 28, 2009
Monday, September 28, 2009
Monday, September 28, 2009
Sheet
Sheet
Sheet
12 37
12 37
12 37
Rev
Rev
Rev
1.0
1.0
1.0
of
of
of
MEM_MB_DQS_H[7..0] 9
MEM_MB_DQS_L[7..0] 9
MEM_MB_DM[7..0] 9
MEM_MB_ADD[15..0] 9
MEM_MB_DATA[63..0] 9
D D
DIMM2
MEM_MB_DATA0
MEM_MB_DATA1
MEM_MB_DATA2
MEM_MB_DATA3
MEM_MB_DATA4
MEM_MB_DATA5
MEM_MB_DATA6
MEM_MB_DATA7
MEM_MB_DATA8
MEM_MB_DATA9
MEM_MB_DATA10
MEM_MB_DATA11
MEM_MB_DATA12
VCC3
Y
D21
D21
X_1PS226_SOT23
SCL0
C C
SDA0
VCC_DDR
R119
R119
15R1%
15R1%
R113
B B
A A
R113
15R1%
15R1%
R181
R181
15R1%
15R1%
R183
R183
15R1%
15R1%
VCC_DDR
VDDR_VREF_DQ
C66
C66
X_C0.1u16Y0402
X_C0.1u16Y0402
VDDR_VREF_DQ
C58
C58
C0.1u25Y0402-RH
C0.1u25Y0402-RH
VDDR_VREF_CA
Z
X
VCC3
Y
Z
X
VDDR_VREF_DQ
C62
C62
X_C0.1u25Y0402-RH
X_C0.1u25Y0402-RH
VDDR_VREF_CA
C154
C154
X_C0.1u25Y0402-RH
X_C0.1u25Y0402-RH
C160
C160
C0.1u25Y0402-RH
C0.1u25Y0402-RH
VDDR_VREF_CA
C162
C162
C0.1u16Y0402
C0.1u16Y0402
X_1PS226_SOT23
D19
D19
X_1PS226_SOT23
X_1PS226_SOT23
C69
C69
X_C1000p16X0402
X_C1000p16X0402
C171
C171
C1000p16X0402
C1000p16X0402
MEM_MB_DATA13
MEM_MB_DATA14
MEM_MB_DATA15
MEM_MB_DATA16
MEM_MB_DATA17
MEM_MB_DATA18
MEM_MB_DATA19
MEM_MB_DATA20
MEM_MB_DATA21
MEM_MB_DATA22
MEM_MB_DATA23
MEM_MB_DATA24
MEM_MB_DATA25
MEM_MB_DATA26
MEM_MB_DATA27
MEM_MB_DATA28
MEM_MB_DATA29
MEM_MB_DATA30
MEM_MB_DATA31
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA34
MEM_MB_DATA35
MEM_MB_DATA36
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DATA40
MEM_MB_DATA41
MEM_MB_DATA42
MEM_MB_DATA43
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
MEM_MB_DATA47
MEM_MB_DATA48
MEM_MB_DATA49
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA52
MEM_MB_DATA53
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DATA56
MEM_MB_DATA57
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA60
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MB_DATA63
DIMM2
3
4
9
10
122
123
128
129
12
13
18
19
131
132
137
138
21
22
27
28
140
141
146
147
30
31
36
37
149
150
155
156
81
82
87
88
200
201
206
207
90
91
96
97
209
210
215
216
99
100
105
106
218
219
224
225
108
109
114
115
227
228
233
234
2
5
8
11
14
17
20
23
26
29
32
35
38
41
44
47
80
83
86
89
92
95
98
101
104
ADDRESS A2
5
4