MSI MS-7505V1.0 7505V1.0
CONTENT SHEET
1
Cover Sheet, Block diagram
Intel LGA775 CPU
DDR2 DIMM 1 , 2
DDR2 Terminations
NVIDIA MCP73
D-Sub
HDMI/DVI
PCI-Express Slot
PCI Slot 1 & 2
PCI Slot 3 & 4
LPC-Super I/O F71882FG
ATX/Front Panel/FAN
A A
USB CONNECTORS
LAN-RTL8211BL
Azalia Codec - ALC888
1394 Controller - JMB381
ACPI Controller UPI
uP6103/VTT/REGULATOR
VRD11-ST6703
1-2
3-5
6-8NVIDIA MCP73
9
10
11-17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
MS-7505
CPU:
System Chipset:
On Board Device:
Main Memory:
Expansion Slots:
Intersil PWM
Intel Pentium 4 Cedar Mill / Prescott , Pentium D Smithfield / Presler
and Conroe / Kentsfield family processors in LGA775 Package.
NVIDIA MCP73
BIOS -- SPI Flash 8M
Azalia Codec -- ALC888
LPC Super I/O -- FINTEK F71882FG
LAN -- Realtek RTL8211BL-GR
CLOCK Gen -- Integated in MCP73
1394 Controller -- JMB381
SINGLE-channel DDR-II * 4 (Max 4GB)
PCI EXPRESS X16 SLOT *1
PCI EXPRESS X1 SLOT * 1
PCI SLOT * 4
ATX
Version: 0A
MANUAL PARTS
32
OPT
MCP73PV(HDMI+DVI)/F71882FG/ALC888/RTL8211BL/JMB381
PV
Function
1
Orcad Configure
cfg-7505-PV 601-7505-A10
BOM
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Date:
Date:
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7366
MS-7366
MS-7366
COVER SHEET
COVER SHEET
Monday, October 15, 2007
Monday, October 15, 2007
Monday, October 15, 2007
COVER SHEET
Sheet of
Sheet of
Sheet of
0A
0A
0A
137
137
137
Block Diagram
1
VRD 11
3-Phase PWM
Intel LGA775 Processor
FSB 533/800/1066/1333
FSB
DDR2 533/667/800
4 DDR II
DIMM
Modules
PCI_E X1
Connector
J1
J1394_1
PCI_E X16/X8
Connector
PCI EXPRESS X16
NVIDIA
MCP73
DDRII
PCI EXPRESS X1
1394
JMB 381
A A
HT LINK
PCI Slot 2
PCI Slot 3
IDE1
SATA-II 1~4
ATA66/100/133
SATA2
PCI Slot 1
PCI
MCP73
USB Port 0~9
HD Audio Codec
SPI
Flash ROM
USB2.0
HD Audio Link
SPI
Debug Port
LPC
RGMII
LPC
LAN
RTL8211B(GIGA PHY)
LPC SIO
VINTEK
F71882FG
LPC
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7505
MS-7505
Keyboard
Mouse
Floopy
SerialParallel
1
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Monday, October 15, 2007
Date:
Monday, October 15, 2007
Date:
Monday, October 15, 2007
MS-7505
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
Sheet of
Sheet of
Sheet of
237
237
237
0A
0A
0A
8
H_A#[3..35]6
D D
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
R127 X_0R0402R127 X_0R0402
H_PWRGD4,6
H_CPURST#4,6
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
CPU_GTLREF2
THERMDA
THERMDC
H_TESTHI13
C9_RESERVED
CPU_GTLREF3
H_DBI#[0..3]6
H_IERR#4
H_FERR#4,6
H_STPCLK#6
H_INIT#6
H_DBSY#6
H_DRDY#6
H_TRDY#6
H_ADS#6
H_LOCK#6
H_BNR#6
H_HIT#6
C C
H_TESTHI13 is not as H_SLP#.
MCP73 has no CPU_SLP# pin.
B B
H_D#[0..63]6
A A
H_HITM#6
H_BPRI#6
H_DEFER#6
THERMDA21
THERMDC21
TRMTRIP#4,6
H_PROCHOT#4,6
H_IGNNE#6
H_SMI#6
H_A20M#6
CPU_BSEL021
CPU_BSEL121
CPU_BSEL221
8
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
G11
D19
C20
AB2
AB3
AD3
AD1
AF1
AC1
AG1
AE1
AL1
AK1
AE8
AL2
AH2
AE6
G10
D16
A20
AA2
G29
H30
G30
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
A8
F2
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
M2
N2
P2
K3
L2
N5
C9
Y1
V2
N1
FP_RST#14,22
U3A
U3A
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13
RSVD#AH2
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
H_D#53
VTT_OUT_LEFT
VTT_OUT_LEFT
VTT_OUT_LEFT
D53#
B15
7
D52#
C14
C15
H_D#52
H_D#51
7
D51#
D50#
A14
H_D#50
CPU SIGNAL BLOCK
H_A#31
H_A#29
H_A#30
H_A#32
H_A#35
H_A#33
H_A#34
AJ6
AJ5
AH5
AH4
AG5
AG4
AG6
A35#
A34#
A33#
A32#
A31#
A30#
A29#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
F21
E22
D20
G22
H_D#48
H_D#47
D22
H_D#45
H_D#46
H_BPM#1
H_BPM#2
H_BPM#3
G21
H_D#44
H_D#43
E21
H_D#42
D17
H_D#49
R124 X_0R0402R124 X_0R0402
H_A#28
H_A#27
H_A#24
H_A#25
H_A#26
AF4
AF5
AB4
AC5
AB5
A28#
A27#
A26#
A25#
D41#
D40#
D39#
D38#
F20
F18
F17
E19
E18
H_D#41
H_D#40
H_D#39
H_D#38
H_D#37
R102 X_0R0402R102 X_0R0402
R113 51R0402R113 51R0402
R175 X_0R0402R175 X_0R0402
R174 51R0402R174 51R0402
R172 X_0R0402R172 X_0R0402
R173 51R0402R173 51R0402
H_A#23
AA5
A24#
A23#
D37#
D36#
G17
H_D#36
H_A#22
H_A#21
AD6
AA4
A22#
D35#
E16
G18
H_D#34
H_D#35
H_A#20
H_A#19
A21#
A20#Y4A19#Y6A18#W6A17#
D34#
D33#
D32#
E15
G16
H_D#32
H_D#33
6
H_A#18
H_A#17
H_A#16
H_A#15
AB6
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
D31#
D30#
D29#
F15
F14
G15
G14
H_D#28
H_D#29
H_D#30
H_D#31
6
H_A#14
D28#
D27#
G13
H_D#27
H_A#11
H_A#12
H_A#13
D26#
D25#
F12
E13
D13
H_D#24
H_D#25
H_D#26
C9_RESERVED
H_TESTHI9
H_TESTHI8
H_A#8
H_A#10
H_A#7
H_A#9
U6
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
D24#
D23#
D22#
D21#
F11
E10
D10
H_D#20
H_D#21
H_D#22
H_D#23
H_A#5
H_A#6
H_A#3
H_A#4
L5
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
D11
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
AC2
DBR#
D14#
C12
B12
H_D#13
AN4
AN3
VSS_SENSE
VCC_SENSE
D13#
D12#D8D11#
C11
H_D#10
H_D#11
H_D#12
5
VID5
VID7
VID6
AM7
AN5
VCC_MB_REGULATION
D10#
B10
AM5
AJ3
AK3
AN6
VID6#
ITP_CLK1
ITP_CLK0
RSVD#AM7
VSS_MB_REGULATION
D9#
D8#
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
A11
A10
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
5
4
VCC_VRM_SENSE
VSS_VRM_SENSE
VID[0..7] 28
VID2
VID3
VID1
VID4
VID0
AL4
AK4
AL6
AM3
AL5
AM2
VID5#
VID4#
VID3#
VID2#
VID1#
VID0#
VID_SELECT
GTLREF_SEL
H_D#1
AN7
H1
GTLREF0
H2
GTLREF1
H29
E24
GTLREF2
AG3
BPM5#
AF2
BPM4#
AG2
BPM3#
AD2
BPM2#
AJ1
BPM1#
AJ2
BPM0#
G5
PCREQ#
J6
REQ4#
K6
REQ3#
M6
REQ2#
J5
REQ1#
K4
REQ0#
W2
TESTHI12
P1
TESTHI11
H5
TESTHI10
G4
TESTHI9
G3
TESTHI8
F24
TESTHI7
G24
TESTHI6
G26
TESTHI5
G27
TESTHI4
G25
TESTHI3
F25
TESTHI2
W3
TESTHI1
F26
TESTHI0
AK6
FORCEPH
G6
RSVD#G6
G28
BCLK1#
F28
BCLK0#
A3
RS2#
F5
RS1#
B3
RS0#
U3
AP1#
U2
AP0#
F3
BR0#
T2
COMP5
J2
COMP4
R1
COMP3
G2
COMP2
T1
COMP1
A13
COMP0
J17
DP3#
H16
DP2#
H15
DP1#
J16
DP0#
AD5
ADSTB1#
R6
ADSTB0#
C17
DSTBP3#
G19
DSTBP2#
E12
DSTBP1#
B9
DSTBP0#
A16
DSTBN3#
G20
DSTBN2#
G12
DSTBN1#
C8
DSTBN0#
L1
LINT1/NMI
K1
LINT0/INTR
ZIF-SOCKET775-RH-1,ZIF-SOCKET775_BLACK_TH-1
ZIF-SOCKET775-RH-1,ZIF-SOCKET775_BLACK_TH-1
B4
H_D#0
R82
R82
X_51R0402
X_51R0402
CPU_GTLREF0
CPU_GTLREF1
GTLREF_SEL
P_GTLREF
H_BPM#5
H_BPM#4
H_BPM#3
H_BPM#2
H_BPM#1
H_BPM#0
H_REQ#4
H_REQ#3
H_REQ#2
H_REQ#1
H_REQ#0
H_TESTHI12
H_TESTHI11
H_TESTHI10
H_TESTHI9
H_TESTHI8
H_TESTHI2_7
H_TESTHI1
H_TESTHI0
FORCEPH
RSVD_G6
H_RS#2
H_RS#1
H_RS#0
TEST-U3
TEST-U2
H_COMP5
H_COMP4
H_COMP3
H_COMP2
H_COMP1
H_COMP0
TEST-J17
TEST-H16
TEST-H15
TEST-J16
VTT_OUT_RIGHT
4
VCC_VRM_SENSE 28
VSS_VRM_SENSE 28
R85
R85
680R0402-RH
680R0402-RH
VRD_VIDSEL 4,28
CPU_GTLREF0 4
CPU_GTLREF1 4
T6T6
H_BPM#0 5
H_REQ#[0..4] 6
H_TESTHI12 5
R190 51R0402R190 51R0402
R195 51R0402R195 51R0402
R108 X_130R1%0402R108 X_130R1%0402
R155 X_51R0402R155 X_51R0402
CK_H_CPU# 6
CK_H_CPU 6
H_RS#[0..2] 6
T2T2
T3T3
R160 49.9R1%0402R160 49.9R1%0402
R178 49.9R1%0402R178 49.9R1%0402
R199 49.9R1%0402R199 49.9R1%0402
T5T5
T7T7
T8T8
T4T4
H_ADSTB#1 6
H_ADSTB#0 6
H_DSTBP#3 6
H_DSTBP#2 6
H_DSTBP#1 6
H_DSTBP#0 6
H_DSTBN#3 6
H_DSTBN#2 6
H_DSTBN#1 6
H_DSTBN#0 6
H_NMI 4,6
H_INTR 4,6
3
IO_PECI
Choose one for PECI function
V_FSB_VTT
VTT_OUT_RIGHT
VTT_OUT_LEFT
H_BR#0 4,6
C58
C58
C0.1u25Y0402-RH
C0.1u25Y0402-RH
Does it not need to connect to chip?
Does MCP73 no need GTLREF?
There is no CPU_GTL_VREF pin on MCP73.
VTT_OUT_LEFT
CPU_GTLREF2
CPU_GTLREF3
3
IO_PECI 21
P_GTLREF
C44
C44
C220p50N0402
C220p50N0402
H_COMP65
C87
C87
C220p50N0402
C220p50N0402
C85
C85
C220p50N0402
C220p50N0402
C48
C48
C0.1u25Y0402-RH
C0.1u25Y0402-RH
H_COMP6
H_COMP5
H_COMP1
H_COMP3
R186 10R0402R186 10R0402
R181 10R0402R181 10R0402
MSI
MSI
MSI
2
VTT_OUT_RIGHT
RN3
RN3
8P4R-680R
8P4R-680R
VID2
1
3
5
7
1
3
5
7
RN2
RN2
8P4R-680R
8P4R-680R
VTT_OUT_RIGHT
1
3
5
7
1
3
5
7
1
3
5
7
RN7
RN7
8P4R-51R0402
8P4R-51R0402
1
3
5
7
R154 51R0402R154 51R0402
R134 51R0402R134 51R0402
88.7R1%
88.7R1%
R6935.7R1% R6935.7R1%
C1u6.3Y0402-RH
C1u6.3Y0402-RH
2
4
6
8
LGA775 - SIGNALS
LGA775 - SIGNALS
LGA775 - SIGNALS
2
4
C0.1u25Y0402-RH
C0.1u25Y0402-RH
6
8
2
4
6
8
2
RN4
RN4
4
8P4R-51R0402
8P4R-51R0402
6
8
2
RN5
RN5
4
8P4R-51R0402
8P4R-51R0402
6
8
2
RN6
RN6
4
8P4R-51R0402
8P4R-51R0402
6
8
2
4
6
8
R80
R80
C41
C41
VTT_OUT_RIGHT
VTT_OUT_LEFT
R182 124R1%0402R182 124R1%0402
R185
R185
210R1%0402
210R1%0402
R97 124R1%0402R97 124R1%0402
R104
R104
210R1%0402
210R1%0402
MS-7505
MS-7505
MS-7505
VID5
VID0
VID4
VID7
VID3
VID6
VID1
H_BPM#0
H_BPM#1
H_BPM#5
H_BPM#3
H_TRST#
H_BPM#4
H_TDO
H_TCK
H_TDI
H_BPM#2
H_TMS
H_TESTHI1
H_TESTHI11
H_TESTHI10
H_TESTHI13
H_TESTHI12
RN48
RN48
1
3
5
7
8P4R-49.9RST0603
8P4R-49.9RST0603
C86
C86
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C61
C61
C1u6.3Y0402-RH
C1u6.3Y0402-RH
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Monday, October 15, 2007
Date:
Monday, October 15, 2007
Date:
Monday, October 15, 2007
2
C60
C0.1u25Y0402-RH
C60
C0.1u25Y0402-RH
C62
C62
C56
C56
C0.1u25Y0402-RH
C0.1u25Y0402-RH
VTT_OUT_RIGHTVTT_OUT_LEFT
Sheet of
Sheet of
Sheet of
1
VTT_OUT_LEFT
R79
R79
100R1%0402
100R1%0402
R73
R73
82.5R1%0402
82.5R1%0402
VTT_OUT_RIGHT
VTT_OUT_RIGHT
337
337
337
1
0A
0A
0A
8
VCCP
AF19
AF18
AF15
D D
C C
AF14
AF12
AF11
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AE9
AD8
AC8
AB8
AA8
VCCP
U3B
U3B
VCC#AF19
VCC#AF18
VCC#AF15
VCC#AF14
VCC#AF12
VCC#AF11
VCC#AE9
VCC#AE23
VCC#AE22
VCC#AE21
VCC#AE19
VCC#AE18
VCC#AE15
VCC#AE14
VCC#AE12
VCC#AE11
VCC#AD8
VCC#AD30
VCC#AD29
VCC#AD28
VCC#AD27
VCC#AD26
VCC#AD25
VCC#AD24
VCC#AD23
VCC#AC8
VCC#AC30
VCC#AC29
VCC#AC28
VCC#AC27
VCC#AC26
VCC#AC25
VCC#AC24
VCC#AC23
VCC#AB8
VCC#AA8
VCCP
AF8
AF22
AF21
VCC#AF22
VCC#AF21
VCC#Y30
VCC#Y8
Y8
Y29
Y30
AF9
AG11
VCC#AF9
VCC#AF8
VCC#AG11
VCC#Y27
VCC#Y28
VCC#Y29
Y27
Y28
AG14
AG12
VCC#AG14
VCC#AG12
VCC#Y25
VCC#Y26
Y25
Y26
AG19
AG18
AG15
VCC#AG19
VCC#AG18
VCC#AG15
VCC#W8W8VCC#Y23
VCC#Y24
Y23
Y24
AG25
AG22
AG21
VCC#AG25
VCC#AG22
VCC#AG21
VCC#W28
VCC#W29
VCC#W30
W28
W29
W30
7
AG28
AG27
AG26
VCC#AG28
VCC#AG27
VCC#AG26
VCC#W25
VCC#W26
VCC#W27
W25
W26
W27
AG30
AG29
AG8
VCC#AG8
VCC#AG30
VCC#AG29
VCC#V8
VCC#W23
VCC#W24
V8
W23
W24
AH12
AH11
AG9
VCC#AG9
VCC#AH11
VCC#U30
VCC#U8
U8
U29
U30
AH18
AH15
AH14
VCC#AH15
VCC#AH14
VCC#AH12
VCC#U27
VCC#U28
VCC#U29
U26
U27
U28
AH22
AH21
AH19
VCC#AH21
VCC#AH19
VCC#AH18
VCC#U24
VCC#U25
VCC#U26
U23
U24
U25
AH27
AH26
AH25
VCC#AH26
VCC#AH25
VCC#AH22
VCC#T30
VCC#T8
VCC#U23
T8
T29
T30
AH28
AH29
AH30
VCC#AH27
VCC#AH28
VCC#AH29
VCC#T27
VCC#T28
VCC#T29
T26
T27
T28
6
AH8
AH9
AJ11
VCC#AH8
VCC#AH9
VCC#AH30
VCC#T24
VCC#T25
VCC#T26
T23
T24
T25
AJ12
AJ14
VCC#AJ11
VCC#AJ12
VCC#AJ14
VCC#P8
VCC#R8
VCC#T23
P8
R8
AJ15
AJ18
VCC#AJ15
VCC#N8
N8
N30
AJ19
AJ21
VCC#AJ18
VCC#AJ19
VCC#AJ21
VCC#N28
VCC#N29
VCC#N30
N28
N29
AJ22
AJ25
VCC#AJ22
VCC#AJ25
VCC#N26
VCC#N27
N26
N27
AJ8
AJ26
VCC#AJ8
VCC#AJ26
VCC#N24
VCC#N25
N24
N25
AJ9
AK11
VCC#AJ9
VCC#AK11
VCC#M8
VCC#N23
M8
N23
AK12
AK14
AK15
VCC#AK12
VCC#AK14
VCC#M29
VCC#M30
M28
M29
M30
AK18
AK19
AK21
VCC#AK15
VCC#AK18
VCC#AK19
VCC#M26
VCC#M27
VCC#M28
M25
M26
M27
AK22
AK25
AK26
VCC#AK21
VCC#AK22
VCC#AK25
VCC#M23
VCC#M24
VCC#M25
L8
M23
M24
5
AL11
AK8
AK9
VCC#AK8
VCC#AK9
VCC#AK26
VCC#K30
VCC#K8
VCC#L8
K8
K29
K30
AL12
AL14
AL15
VCC#AL11
VCC#AL12
VCC#AL14
VCC#K27
VCC#K28
VCC#K29
K26
K27
K28
AL18
AL19
AL21
VCC#AL15
VCC#AL18
VCC#AL19
VCC#K24
VCC#K25
VCC#K26
K23
K24
K25
AL22
AL25
AL26
VCC#AL21
VCC#AL22
VCC#AL25
VCC#J8
VCC#J9
VCC#K23
J8
J9
J30
AL29
AL30
AL8
VCC#AL26
VCC#AL29
VCC#AL30
VCC#J28
VCC#J29
VCC#J30
J27
J28
J29
AL9
AM11
VCC#AL8
VCC#AL9
VCC#AM11
VCC#J25
VCC#J26
VCC#J27
J25
J26
AM12
AM14
AM15
VCC#AM12
VCC#AM14
VCC#AM15
VCC#J22
VCC#J23
VCC#J24
J22
J23
J24
4
AM18
AM19
AM21
VCC#AM18
VCC#AM19
VCC#AM21
VCC#J19
VCC#J20
VCC#J21
J19
J20
J21
AM22
AM25
AM26
VCC#AM22
VCC#AM25
VCC#AM26
VCC#J14
VCC#J15
VCC#J18
J14
J15
J18
AM8
AM29
AM30
VCC#AM8
VCC#AM29
VCC#AM30
VCC#J11
VCC#J12
VCC#J13
J11
J12
J13
AM9
AN11
AN12
VCC#AM9
VCC#AN11
VCC#AN9
VCC#J10
J10
AN8
AN9
3
AN14
AN15
AN18
AN19
AN21
AN22
H_VCCA
A23
VCCA
VCC#AN12
VCC#AN14
VCC#AN30
VCC#AN8
AN30
VSSA
VCC#AN15
VCC#AN18
VCC#AN19
VCC#AN21
VCC#AN22
VCCPLL
VCC-IOPLL
VTT#A25
VTT#A26
VTT#A27
VTT#A28
VTT#A29
VTT#A30
VTT#B25
VTT#B26
VTT#B27
VTT#B28
VTT#B29
VTT#B30
VTT#C25
VTT#C26
VTT#C27
VTT#C28
VTT#C29
VTT#C30
VTT#D25
VTT#D26
VTT#D27
VTT#D28
VTT#D29
VTT#D30
VTTPWRGD
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_SEL
RSVD#F29
VCC#AN25
VCC#AN26
VCC#AN29
1122334
AN25
AN26
AN29
ZIF-SOCKET775-RH-1,ZIF-SOCKET775_BLACK_TH-1
ZIF-SOCKET775-RH-1,ZIF-SOCKET775_BLACK_TH-1
H_VSSA
B23
H_VCCPLL
D23
H_VCCA
C23
A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30
VTT_PWG
AM6
AA1
J1
VTT_SEL
F27
F29
4
V_FSB_VTT
C106
C106
C118
C118
C10u6.3X50805
C10u6.3X50805
X_C10u6.3X50805
X_C10u6.3X50805
CAPS FOR FSB GENERIC
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_SEL 26
C10u6.3X50805
C10u6.3X50805
C101
C101
2
V_FSB_VTT
1
CPU_GTLREF1_SEL11
R166 124R1%0402R166 124R1%0402
210R1%0402
R159 124R1%0402R159 124R1%0402
210R1%0402
1.69KR1%0402
1.69KR1%0402
G
R169
R169
R156
R156
DS
VTT_OUT_RIGHT
VTT_OUT_RIGHT
B B
PLACE AT CPU END OF ROUTE
VTT_OUT_RIGHT
V_FSB_VTT
VTT_OUT_LEFT
PLACE AT C55 END OF ROUTE
VTT_OUT_RIGHT
A A
8
R171 10R0402R171 10R0402
C77
C77
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C74
C74
C1u6.3Y0402-RH
C1u6.3Y0402-RH
Q22
Q22
N-2N7002_SOT23
N-2N7002_SOT23
R103 X_130R1%0402R103 X_130R1%0402
R128 62R0402R128 62R0402
R209 200R0402R209 200R0402
R152 200R0402R152 200R0402
R187 62R0402R187 62R0402
R153 62R0402R153 62R0402
R145 62R0402R145 62R0402
R158 X_150R1%0402R158 X_150R1%0402
R157 X_150R1%0402R157 X_150R1%0402
7
CPU_GTLREF0 3
C79
C79
C220p50N0402
C220p50N0402
R164
240R1%0402
R164
240R1%0402
*GTLREF VOLTAGE SHOULD BE
0.63*VTT = 0.756V
R170 10R0402R170 10R0402
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C71
C71
C220p50N0402
C220p50N0402
CPU_GTLREF1 3
C78
C78
CPU CPU_GTLREF1_SEL GTL VOLTAGE
KENTSFIELD FSB
OVERCLOCKING
ALL OTHER CPUS
H_PROCHOT#
H_IERR#
H_CPURST#
H_PWRGD
H_BR#0
0 0.66 VTT
1 0.63 VTT
H_PROCHOT# 3,6
H_IERR# 3
H_CPURST# 3,6
H_PWRGD 3,6
H_BR#0 3,6
TRMTRIP# 3,6
H_FERR# 3,6
H_INTR 3,6
H_NMI 3,6
6
*PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
*TRACE WIDTH TO CAPS MUST BE NO SMALLER THAN 12MILS
V_FSB_VTT VCC1_5
VTT_PWRGOOD
VID_SELECT
0 (VRM10)
1 (VRM11)
5
L2
L2
X_10u100mA_0805-RH
X_10u100mA_0805-RH
21
CP2CP2
VRD_VIDSEL3,28
VTT_PWG
VID_GD
VR_READY
4
C116
C116
C1u6.3Y0402-RH
C1u6.3Y0402-RH
R62
R62
X_1KR0402
X_1KR0402
C107
C107
C10u6.3X50805
C10u6.3X50805
VCC5_SB
B
power on sequence
VTT_PWG beforce VCCP
VCCP beforce VTT_PWG
H_VCCA
C100
C100
X_C10u6.3X50805
X_C10u6.3X50805
H_VSSA
VCC5_SB
R3
R3
X_4.7KR0402
X_4.7KR0402
CE
Q11
Q11
X_N-MMBT3904_NL_SOT23
X_N-MMBT3904_NL_SOT23
G
R4
R4
X_4.7KR0402
X_4.7KR0402
DS
Q8
Q8
X_N-2N7002_SOT23
X_N-2N7002_SOT23
3
DS
G
DS
G
CP3CP3
VR_READY
Q3
Q3
X_N-2N7002_SOT23
X_N-2N7002_SOT23
VTT_PWG
VID_GD
Q10
Q10
X_N-2N7002_SOT23
X_N-2N7002_SOT23
VTT_PWG
H_VCCPLL
C137
C137
X_C1u6.3Y0402-RH
X_C1u6.3Y0402-RH
C132
C132
C0.01u16X0402
C0.01u16X0402
VR_READY 14
C128
C128
C10u6.3X50805
C10u6.3X50805
VTT_PWG SPEC :
High > 0.9V
Low < 0.3V
Trise < 150ns
1.25V VTT_PWRGOOD
VID_GD 26
R408 0R0402R408 0R0402
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7505
MS-7505
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Tuesday, October 16, 2007
Date:
Tuesday, October 16, 2007
Date:
Tuesday, October 16, 2007
2
MS-7505
LGA775 - POWER
LGA775 - POWER
LGA775 - POWER
Sheet of
Sheet of
Sheet of
437
437
437
1
0A
0A
0A
8
7
6
5
4
3
2
1
0 OHM?
V26
V25
VSS#V26
VSS#V25
VSS#AH6
VSS#AH7
AH6
AH7
V24
V23
VSS#V24
VSS#V23
VSS#AJ10
VSS#AJ13
AJ10
AJ13
AJ16
VSS#U7U7VSS#U1
VSS#AJ16
R143 X_0R0402R143 X_0R0402
R147 X_0R0402R147 X_0R0402
T3
U1
VSS#T7T7VSS#T6T6VSS#T3
VSS#AJ17
VSS#AJ20
VSS#AJ23
VSS#AJ24
AJ17
AJ20
AJ23
AJ24
R162
R162
R207
R207
51R0402
51R0402
24.9R1%0402
F23
E7
RSVD#E5E5RSVD#E6E6RSVD#E7
RSVD#F23
VSS#AF20
VSS#AF23
VSS#AF24
VSS#AF25
AF20
AF23
AF24
AF25
24.9R1%0402
H_COMP8
B13
F6
IMPSEL#
RSVD#B13
VSS#AF26
VSS#AF27
AF26
AF27
AF28
R139
R139
51R0402
51R0402
J3
N4
RSVD#J3
VSS#AF28
VSS#AF29
VSS#AF3
AF3
AF29
AF30
P5
RSVD#P5
RSVD#N4
VSS#AF30
VSS#AF6
VSS#AF7
AF6
AF7
AG10
R133
R133
51R0402
51R0402
W1
AC4
MSID[1]V1MSID[0]
RSVD#AC4
VSS#AG10
VSS#AG13
VSS#AG16
AG13
AG16
AG17
VSS#Y7Y7VSS#Y5Y5VSS#Y2
VSS#AG17
VSS#AG20
VSS#AG23
AG20
AG23
AG24
W4
Y2
VSS#W7W7VSS#W4
VSS#AG24
VSS#AG7
VSS#AH1
AH1
AG7
AH10
V30
V6
VSS#V7V7VSS#V6
VSS#AH10
VSS#AH13
VSS#AH16
AH13
AH16
AH17
V29
V28
V3
VSS#V3
VSS#V30
VSS#V29
VSS#AH17
VSS#AH20
VSS#AH23
AH20
AH23
AH24
V27
VSS#V28
VSS#V27
VSS#AH24
VSS#AH3
AH3
VTT_OUT_RIGHT
AA23
AA24
AA25
AA26
AA27
AA28
AA29
AA30
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AC3
AC6
AC7
AD4
AD7
AE10
AE13
AE16
AE17
AE2
AE20
AE24
AE25
AE26
AE27
AE28
A12
A15
A18
A21
A24
AA3
AA6
AA7
AB1
AB7
A2
A6
A9
H_COMP7
H_COMP6
U3C
U3C
VSS#A12
VSS#A15
VSS#A18
VSS#A2
VSS#A21
VSS#A24
VSS#A6
VSS#A9
VSS#AA23
VSS#AA24
VSS#AA25
VSS#AA26
VSS#AA27
VSS#AA28
VSS#AA29
VSS#AA3
VSS#AA30
VSS#AA6
VSS#AA7
VSS#AB1
VSS#AB23
VSS#AB24
VSS#AB25
VSS#AB26
VSS#AB27
VSS#AB28
VSS#AB29
VSS#AB30
VSS#AB7
VSS#AC3
VSS#AC6
VSS#AC7
VSS#AD4
VSS#AD7
VSS#AE10
VSS#AE13
VSS#AE16
VSS#AE17
VSS#AE2
VSS#AE20
VSS#AE24
VSS#AE25
VSS#AE26
VSS#AE27
VSS#AE28
AE3
COMP6Y3COMP7
VSS#AE29
VSS#AE30
AE5
AE29
AE30
D1
AE4
RSVD#D1
RSVD#AE4
VSS#AE5
VSS#AE7
VSS#AF10
AE7
AF10
E23
D14
RSVD#E23
RSVD#D14
VSS#AF13
VSS#AF16
VSS#AF17
AF13
AF16
AF17
R118
R118
49.9R1%0402
D D
C C
B B
49.9R1%0402
H_COMP63
R197 X_1KR0402R197 X_1KR0402
R30
R5
VSS#R7R7VSS#R5
VSS#AJ27
VSS#AJ28
AJ27
AJ28
AJ29
R29
R28
R27
VSS#R30
VSS#R29
VSS#R28
VSS#AJ29
VSS#AJ30
VSS#AJ4
AJ4
AJ7
AJ30
H_TESTHI12 3
R26
R25
R24
R23
R2
VSS#R27
VSS#R26
VSS#R25
VSS#R24
VSS#R23
VSS#AJ7
VSS#AK10
VSS#AK13
VSS#AK16
VSS#AK17
AK2
AK10
AK13
AK16
AK17
P4
VSS#P7P7VSS#P4
VSS#R2
VSS#AK2
VSS#AK20
VSS#AK23
AK20
AK23
P30
P29
P28
VSS#P30
VSS#P29
VSS#AK24
VSS#AK27
AK24
AK27
AK28
P27
P26
P25
VSS#P28
VSS#P27
VSS#P26
VSS#AK28
VSS#AK29
VSS#AK30
AK5
AK29
AK30
P24
P23
VSS#P25
VSS#P24
VSS#P23
VSS#AK5
VSS#AK7
VSS#AL10
AK7
AL10
N3
VSS#N7N7VSS#N6N6VSS#N3
VSS#AL13
VSS#AL16
VSS#AL17
AL13
AL16
AL17
AL20
M1
L6
VSS#L7L7VSS#L6
VSS#M7M7VSS#M1
VSS#AL20
VSS#AL23
VSS#AL24
AL23
AL24
AL27
L30
L29
L28
L3
VSS#L3
VSS#L30
VSS#L29
VSS#AL27
VSS#AL28
VSS#AL3
VSS#AL7
AL3
AL7
AM1
AL28
R99 X_0R0402R99 X_0R0402
L27
L26
VSS#L28
VSS#L27
VSS#L26
VSS#AM1
VSS#AM10
VSS#AM13
AM10
AM13
L25
L24
L23
VSS#L25
VSS#L24
VSS#L23
VSS#AM16
VSS#AM17
VSS#AM20
AM16
AM17
AM20
K2
K5
VSS#K2
VSS#K7K7VSS#K5
VSS#AM23
VSS#AM24
VSS#AM27
AM23
AM24
AM27
J7
H9
VSS#J4J4VSS#J7
VSS#H9
VSS#AM28
VSS#AM4
AM4
AM28
H7
H8
VSS#H7
VSS#H8
VSS#AN1
VSS#AN10
AN1
AN10
H3
H6
VSS#H3
VSS#H6
VSS#AN13
VSS#AN16
AN13
AN16
AN17
H26
H27
H28
VSS#H27
VSS#H28
VSS#AN17
VSS#AN2
VSS#AN20
AN2
AN20
AN23
H23
H24
H25
VSS#H24
VSS#H25
VSS#H26
VSS#AN23
VSS#AN24
VSS#AN27
AN24
AN27
AN28
H17
H18
H19
H20
H21
H22
H14
VSS#H14
H13
VSS#H13
VSS#H17
VSS#H18
VSS#H19
VSS#H20
VSS#H21
VSS#H22
VSS#H23
VSS#AN28
VSS#B1B1VSS#B11
B11
B14
H12
VSS#H12
H11
VSS#H11
H10
VSS#H10
G1
VSS#G1
F7
VSS#F7
F4
VSS#F4
F22
VSS#F22
F19
VSS#F19
F16
VSS#F16
F13
VSS#F13
F10
VSS#F10
E8
VSS#E8
E29
VSS#E29
E28
VSS#E28
E27
VSS#E27
E26
VSS#E26
E25
VSS#E25
E20
VSS#E20
E2
VSS#E2
E17
VSS#E17
E14
VSS#E14
E11
VSS#E11
D9
VSS#D9
D6
VSS#D6
D5
VSS#D5
D3
VSS#D3
D24
VSS#D24
D21
VSS#D21
D18
VSS#D18
D15
VSS#D15
D12
VSS#D12
C7
VSS#C7
C4
VSS#C4
C24
VSS#C24
C22
VSS#C22
C19
VSS#C19
C16
VSS#C16
C13
VSS#C13
C10
VSS#C10
B8
VSS#B8
B5
VSS#B5
B24
VSS#B24
B20
VSS#B20
B17
VSS#B17
VSS#B14
ZIF-SOCKET775-RH-1,ZIF-SOCKET775_BLACK_TH-1
ZIF-SOCKET775-RH-1,ZIF-SOCKET775_BLACK_TH-1
R176 51R0402R176 51R0402
R179 X_0R0402R179 X_0R0402
R177 X_0R0402R177 X_0R0402
R196 X_1KR0402R196 X_1KR0402
VTT_OUT_LEFT
H_BPM#0 3
CPU DECOUPLING CAPACITORS
VCCP VCCP
EC22
EC22
C10u10Y1206
C10u10Y1206
EC24
EC24
X_C10u10Y1206
X_C10u10Y1206
EC15
EC15
X_C10u10Y1206
X_C10u10Y1206
VCCP
EC23
EC23
C10u10Y1206
C10u10Y1206
EC27
EC27
C10u10Y1206
C10u10Y1206
EC14
EC14
X_C10u10Y1206
X_C10u10Y1206
EC26
EC26
C10u10Y1206
C10u10Y1206
EC12
EC12
C10u10Y1206
C10u10Y1206
EC16
EC16
C10u10Y1206
C10u10Y1206
VCCP
EC25
EC25
X_C10u10Y1206
X_C10u10Y1206
EC13
EC13
C10u10Y1206
C10u10Y1206
EC17
EC17
C10u10Y1206
C10u10Y1206
Place these caps within socket cavity
A A
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7505
MS-7505
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Monday, October 15, 2007
Date:
Monday, October 15, 2007
Date:
8
7
6
5
4
3
Monday, October 15, 2007
2
MS-7505
LGA775 - GND
LGA775 - GND
LGA775 - GND
Sheet of
Sheet of
Sheet of
537
537
537
1
0A
0A
0A
8
D D
C C
B B
VTT_OUT_RIGHT
7
H_DBI#[0..3]3
H_DSTBP#03
H_DSTBN#03
H_DSTBP#13
H_DSTBN#13
H_DSTBP#23
H_DSTBN#23
H_DSTBP#33
H_DSTBN#33
H_A#[3..35]3
H_ADSTB#03
H_ADSTB#13
H_REQ#[0..4]3
H_DBSY#3
H_DEFER#3
H_DRDY#3
H_HIT#3
H_HITM#3
H_LOCK#3
H_TRDY#3
H_RS#[0..2]3
H_FERR#3,4
H_A20M#3
H_IGNNE#3
H_INIT#3
H_SMI#3
H_INTR3,4
H_NMI3,4
H_STPCLK#3
H_PWRGD3,4
R228 49.9R1%0402R228 49.9R1%0402
R231 49.9R1%0402R231 49.9R1%0402
H_DBI#[0..3]
H_ADS#3
H_BNR#3
H_BR#03,4
H_BPRI#3
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
H_FERR#
H_A20M#
H_IGNNE#
H_INIT#
H_SMI#
H_INTR
H_NMI
H_STPCLK#
AA34
AA32
AA31
AB30
AA30
AC35
AC34
AC33
AC32
AC31
AE30
AC30
AE34
AE33
AE31
AG33
AE32
AG35
AG34
AF30
AG31
AG30
AJ32
AJ34
AJ33
AJ30
AJ31
AL35
AK30
AA33
AG32
AF37
AF36
AH37
AC36
AE35
AC37
AG36
AD38
AG37
AE36
AG38
AD36
AD37
AD35
AL38
AH38
AK36
AL36
AL37
AH36
AH35
AJ36
AK37
AM38
AM37
W36
W37
G33
G35
M38
W34
W31
W33
W32
W30
W35
V36
N31
P30
R34
H31
N36
J35
V30
U31
U30
6
U8A
U8A
?
?
CPU_DSTBP0#
CPU_DSTBN0#
CPU_DBI0#
CPU_DSTBP1#
CPU_DSTBN1#
CPU_DBI1#
CPU_DSTBP2#
CPU_DSTBN2#
CPU_DBI2#
CPU_DSTBP3#
CPU_DSTBN3#
CPU_DBI3#
CPU_A3#
CPU_A4#
CPU_A5#
CPU_A6#
CPU_A7#
CPU_A8#
CPU_A9#
CPU_A10#
CPU_A11#
CPU_A12#
CPU_A13#
CPU_A14#
CPU_A15#
CPU_A16#
CPU_A17#
CPU_A18#
CPU_A19#
CPU_A20#
CPU_A21#
CPU_A22#
CPU_A23#
CPU_A24#
CPU_A25#
CPU_A26#
CPU_A27#
CPU_A28#
CPU_A29#
CPU_A30#
CPU_A31#
CPU_A32#
CPU_A33#
CPU_A34#
CPU_A35#
CPU_ADSTB0#
CPU_ADSTB1#
CPU_REQ0#
CPU_REQ1#
CPU_REQ2#
CPU_REQ3#
CPU_REQ4#
CPU_ADS#
CPU_BNR#
CPU_BR0#
CPU_BPRI#
CPU_DBSY#
CPU_DEFER#
CPU_DRDY#
CPU_HIT#
CPU_HITM#
CPU_LOCK#
CPU_TRDY#
CPU_RS0#
CPU_RS1#
CPU_RS2#
FERR#
A20M#
IGNNE#
INIT#
SMI#
LINT0_INTR
LINT1_NMI
STPCLK#
CPU_PWRGD
CPU_COMP_VCC
CPU_COMP_GND
?
?
SEC 1 OF 10
SEC 1 OF 10
MCP73
MCP73
CPU_D0#
CPU_D1#
CPU_D2#
CPU_D3#
CPU_D4#
CPU_D5#
CPU_D6#
CPU_D7#
CPU_D8#
CPU_D9#
CPU_D10#
CPU_D11#
CPU_D12#
CPU_D13#
CPU_D14#
CPU_D15#
CPU_D16#
CPU_D17#
CPU_D18#
CPU_D19#
CPU_D20#
CPU_D21#
CPU_D22#
CPU_D23#
CPU_D24#
CPU_D25#
CPU_D26#
CPU_D27#
CPU_D28#
CPU_D29#
CPU_D30#
CPU_D31#
CPU_D32#
CPU_D33#
CPU_D34#
CPU_D35#
CPU_D36#
CPU_D37#
CPU_D38#
CPU_D39#
CPU_D40#
CPU_D41#
CPU_D42#
CPU_D43#
CPU_D44#
CPU_D45#
CPU_D46#
CPU_D47#
CPU_D48#
CPU_D49#
CPU_D50#
CPU_D51#
CPU_D52#
CPU_D53#
CPU_D54#
CPU_D55#
CPU_D56#
CPU_D57#
CPU_D58#
CPU_D59#
CPU_D60#
CPU_D61#
CPU_D62#
CPU_D63#
CPU_RESET#
BCLK_OUT_CPU_P
BCLK_OUT_CPU_N
BCLK_OUT_ITP_P
BCLK_OUT_ITP_N
BCLK_OUT_MCP_P
BCLK_OUT_MCP_N
BCLK_IN_N
BCLK_IN_P
BSEL0
BSEL1
BSEL2
PECI
PROCHOT#
THERMTRIP#
BCLK_COMP
5
H_D#0
AB36
H_D#1
AA36
H_D#2
AB37
H_D#3
Y36
H_D#4
AA35
H_D#5
Y35
H_D#6
Y37
H_D#7
Y38
H_D#8
U35
H_D#9
T35
H_D#10
U36
H_D#11
T36
H_D#12
V37
H_D#13
T37
H_D#14
R37
H_D#15
T38
H_D#16
R31
H_D#17
U33
H_D#18
U34
H_D#19
R30
H_D#20
U32
H_D#21
R32
H_D#22
R33
H_D#23
R35
H_D#24
N30
H_D#25
N32
H_D#26
N33
H_D#27
N34
H_D#28
L30
H_D#29
L31
H_D#30
L33
H_D#31
L32
H_D#32
L35
H_D#33
L34
H_D#34
K30
H_D#35
J34
H_D#36
J31
H_D#37
J30
H_D#38
J33
H_D#39
J32
H_D#40
G31
H_D#41
G34
H_D#42
G36
H_D#43
F33
H_D#44
E33
H_D#45
E35
H_D#46
D35
H_D#47
D36
H_D#48
J36
H_D#49
M37
H_D#50
R36
H_D#51
N35
H_D#52
P37
H_D#53
P36
H_D#54
L36
H_D#55
M35
H_D#56
M36
H_D#57
L37
H_D#58
H36
H_D#59
H35
H_D#60
K36
H_D#61
K37
H_D#62
H38
H_D#63
H37
C36
G38
G37
AN36
AM35
D37
D38
C37
C38
F36
E36
F37
B37
H_PROCHOT#_R
AM36
AJ35
B38
SIO_BSEL0
NB_BSE1
NB_BSE2
TRMTRIP#
H_CPURST# 3,4
R220 X_2.37KR1%0402R220 X_2.37KR1%0402
4
3
H_D#[0..63] 3
J1 Plug 1--2 J2 Plug 1--2 normal
J1 Plug 2--3 J2 Plug 1--2 400-->333
266-->333 J1 Plug 1--2 J2 unPlug
333-->266 J1 Plug 1--2 J2 Plug 2--3
400-->266 J1 Plug 2--3 J2 Plug 2--3
200-->266 J1 Plug 2--3 J2 Plug 1--2
V_FSB_VTT
RN16
RN16
7
8
6
4
2
8P4R-470R0402
8P4R-470R0402
FOR OC
C152
C152
X_C15p50N0402
X_C15p50N0402
5
3
1
SIO_BSEL121
SIO_BSEL221
CK_H_CPU 3
CK_H_CPU# 3
C148
C148
X_C15p50N0402
X_C15p50N0402
H_PROCHOT# 3,4
SIO_BSEL1
NB_BSE1
SIO_BSEL2
NB_BSE2
N31-1030151+N33-1020271-RH
N31-1030151+N33-1020271-RH
N31-1030151+N33-1020271-RH
N31-1030151+N33-1020271-RH
SIO_BSEL021
R219
R219
X_49.9R1%0402
X_49.9R1%0402
R223 X_49.9R1%0402R223 X_49.9R1%0402
R221 X_49.9R1%0402R221 X_49.9R1%0402
TRMTRIP# 3,4
NB_BSE1
SIO_BSEL0
NB_BSE2
R214
R214
X_49.9R1%0402
X_49.9R1%0402
VTT_OUT_RIGHT
R229
R229
X_130R1%0402
X_130R1%0402
R217 0R0402R217 0R0402
if CPU processor hot cause system shutdown, remove OR.
2
BSEL[2..0] FSB CLK (MHz)
000
010
100
TBD
J1
J1
1
2
G
G
3
J2
J2
1
2
G
G
3
266MHz
200MHz
333MHz
Reserved
1
A A
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7505
MS-7505
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Monday, October 15, 2007
Date:
Monday, October 15, 2007
Date:
8
7
6
5
4
3
Monday, October 15, 2007
2
MS-7505
MCP73-CPU
MCP73-CPU
MCP73-CPU
Sheet of
Sheet of
Sheet of
637
637
637
1
0A
0A
0A
8
D D
ATX_PWR_OK14,21,22
PE_RESET#18,29
C C
remove for D ver chip
VGA_BLUE17
VGA_GREEN17
VGA_RED17
B B
A A
VGA_GREEN
VGA_RED
VGA_BLUE
R254
R254
R261
R261
X_150R1%0402
X_150R1%0402
X_150R1%0402
X_150R1%0402
PLACE NEAR MCP73 within 600mil.
R258
R258
X_150R1%0402
X_150R1%0402
7
R334 X_0R0402R334 X_0R0402
3VDUAL
53
U15
U15
VCC
VCC
1
A
Y
Y
GND
GND
C135
C135
X_C10p50N0402
X_C10p50N0402
A
2
B
B
NC7SZ08M5X_SOT23-5
NC7SZ08M5X_SOT23-5
X_C10p50N0402
X_C10p50N0402
4
C134
C134
VCC3
PE1394_TXP29
PE1394_TXN29
PE1394_RXP29
PE1394_RXN29
C133
C133
X_C10p50N0402
X_C10p50N0402
R242
R242
X_10KR0402
X_10KR0402
6
PE1_TXP18
PE1_TXN18
PE1_RXP18
PE1_RXN18
PE1_CLK18
PE1_CLK#18
PE1_PRESENT*18
C366 C0.1u16Y0402C366 C0.1u16Y0402
C367 C0.1u16Y0402C367 C0.1u16Y0402
CK_PE_100M_1394P29
CK_PE_100M_1394N29
PE_WAKE*18
R246 X_1KR1%0402R246 X_1KR1%0402
VCC3
HSYNC#17
VSYNC#17
R265 X_124R1%0402R265 X_124R1%0402
C173 X_C0.01u16X0402C173 X_C0.01u16X0402
VCC3
DDC_DATA17
DDC_CLK17
VCC3
HDCP_ROM_SDATA
PE_RESET_GATE#
X_C0.1u25Y0402-RH
X_C0.1u25Y0402-RH
R580
R580
R579
R579
R575
R575
X_2.7KR0402
X_2.7KR0402
R576
R576
X_2.7KR0402
X_2.7KR0402
5
PE1_TXP
PE1_TXN
PE1_RXP
PE1_RXN
PE1_CLK
PE1_CLK#
PE1_PRESENT*
PE1394RXP
PE1394RXN
PE_WAKE*
R315 X_2.37KR1%0402R315 X_2.37KR1%0402
HDMI_RSET
E13
A35
A36
C35
B35
C34
B34
B36
A37
D34
60mA
C30
10mA
C322
C322
HSYNC#
VSYNC#
DAC_RSET
X_2.7KR0402
X_2.7KR0402
X_2.7KR0402
X_2.7KR0402
DDC_DATA
DDC_CLK
HOTPLUG_DET
R249
R249
X_10KR0402
X_10KR0402
B30
C287
C287
X_C4.7u6.3X5
X_C4.7u6.3X5
A27
B27
C27
B28
C28
C26
D28
D30
E29
F27
E27
G27
D29
C29
R250
R250
X_10KR0402
X_10KR0402
H9
H8
H7
H6
B1
C1
F6
F5
D2
D3
E2
E3
A2
B2
F7
E7
A3
U8B
U8B
?
?
PE1_TX0_P
PE1_TX0_N
PE1_RX0_P
PE1_RX0_N
PE1_REFCLK_P
PE1_REFCLK_N
PEA_PRSNT#
PEA_CLKREQ#
PE2_TX0_P
PE2_TX0_N
PE2_RX0_P
PE2_RX0_N
PE2_REFCLK_P
PE2_REFCLK_N
PEB_PRSNT#
PEX_RST0#
PE_WAKE#/GPIO_21
PEX_CLK_COMP
HDMI_TXD0_P
HDMI_TXD0_N
HDMI_TXD1_P
HDMI_TXD1_N
HDMI_TXD2_P
HDMI_TXD2_N
HDMI_TXC_P
HDMI_TXC_N
HDMI_RSET
V3P3_HDMI_IO
V3P3_HDMI_PLL
DAC_BLUE
DAC_GREEN
DAC_RED
DAC_HSYNC
DAC_VSYNC
DAC_RSET
DAC_VREF
DDC_DATA0
DDC_CLK0
DDC_DATA3
DDC_CLK3
HPLUG_DET3
HDCP_ROM_SCLK
HDCP_ROM_SDATA
?
?
SEC 3 OF 10
SEC 3 OF 10
PE0_PRSNTX4#/DDC_DATA1
4
MCP73
MCP73
PE0_TX15_P
PE0_TX14_P
PE0_TX13_P
PE0_TX12_P
PE0_TX11_P
PE0_TX10_P
PE0_TX9_P
PE0_TX8_P
PE0_TX7_P
PE0_TX6_P
PE0_TX5_P
PE0_TX4_P
PE0_TX3_P
PE0_TX2_P
PE0_TX1_P
PE0_TX0_P
PE0_TX15_N
PE0_TX14_N
PE0_TX13_N
PE0_TX12_N
PE0_TX11_N
PE0_TX10_N
PE0_TX9_N
PE0_TX8_N
PE0_TX7_N
PE0_TX6_N
PE0_TX5_N
PE0_TX4_N
PE0_TX3_N
PE0_TX2_N
PE0_TX1_N
PE0_TX0_N
PE0_RX15_P
PE0_RX14_P
PE0_RX13_P
PE0_RX12_P
PE0_RX11_P
PE0_RX10_P
PE0_RX9_P
PE0_RX8_P
PE0_RX7_P
PE0_RX6_P
PE0_RX5_P
PE0_RX4_P
PE0_RX3_P
PE0_RX2_P
PE0_RX1_P
PE0_RX0_P
PE0_RX15_N
PE0_RX14_N
PE0_RX13_N
PE0_RX12_N
PE0_RX11_N
PE0_RX10_N
PE0_RX9_N
PE0_RX8_N
PE0_RX7_N
PE0_RX6_N
PE0_RX5_N
PE0_RX4_N
PE0_RX3_N
PE0_RX2_N
PE0_RX1_N
PE0_RX0_N
PE0_REFCLK_P
PE0_REFCLK_N
PE0_PRSNTX1#/DDC_CLK1
PE0_PRSNTX8#/EXP_EN
PE0_PRSNTX16#
V1P2_PEX0_PLL
V1P2_PEX1_PLL
V1P2_PLL_XREF_XS0
V1P2_PLL_XREF_XS1
V3P3_PLL_XREF_XS0
V3P3_PLL_XREF_XS1
V3P3_PLL_COREPLL
V3P3_VPLL
V4
U2
T2
R1
R4
P4
N2
M2
L1
L4
K4
J2
H2
G1
G4
F4
V3
U3
T3
R2
R3
P3
N3
M3
L2
L3
K3
J3
H3
G2
G3
F3
V6
V8
U9
T5
T7
T9
P6
P8
N9
M5
M7
M9
K6
K8
J9
H5
V5
V7
V9
T4
T6
T8
P5
P7
P9
M4
M6
M8
K5
K7
K9
H4
C2
D1
B3
B4
A4
C4
M14
N14
M12
M13
L8
L9
H26
F26
PE_A_TXP15
PE_A_TXP14
PE_A_TXP13
PE_A_TXP12
PE_A_TXP11
PE_A_TXP10
PE_A_TXP9
PE_A_TXP8
PE_A_TXP7
PE_A_TXP6
PE_A_TXP5
PE_A_TXP4
PE_A_TXP3
PE_A_TXP2
PE_A_TXP1
PE_A_TXP0
PE_A_TXN15
PE_A_TXN14
PE_A_TXN13
PE_A_TXN12
PE_A_TXN11
PE_A_TXN10
PE_A_TXN9
PE_A_TXN8
PE_A_TXN7
PE_A_TXN6
PE_A_TXN5
PE_A_TXN4
PE_A_TXN3
PE_A_TXN2
PE_A_TXN1
PE_A_TXN0
PE_A_RXP15
PE_A_RXP14
PE_A_RXP13
PE_A_RXP12
PE_A_RXP11
PE_A_RXP10
PE_A_RXP9
PE_A_RXP8
PE_A_RXP7
PE_A_RXP6
PE_A_RXP5
PE_A_RXP4
PE_A_RXP3
PE_A_RXP2
PE_A_RXP1
PE_A_RXP0
PE_A_RXN15
PE_A_RXN14
PE_A_RXN13
PE_A_RXN12
PE_A_RXN11
PE_A_RXN10
PE_A_RXN9
PE_A_RXN8
PE_A_RXN7
PE_A_RXN6
PE_A_RXN5
PE_A_RXN4
PE_A_RXN3
PE_A_RXN2
PE_A_RXN1
PE_A_RXN0
PE_PRSNT1#
PE_PRSNT4#
PE_PRSNT8#
PE_PRSNT16#
170mA
21mA
5mA
5mA
+1.2V_PXE_PLL
45mA
+3.3V_PLL
+3.3V_PLL
3
PE_A_TXP[0..15] 18
PE_A_TXN[0..15] 18
PE_A_RXP[0..15] 18
PE_A_RXN[0..15] 18
PE_A_CLK 18
PE_A_CLK# 18
PE_PRSNT1# 18
PE_PRSNT4# 18
PE_PRSNT8# 18
PE_PRSNT16# 18
C274
X_C0.1u25Y0402-RH
C274
X_C0.1u25Y0402-RH
C232
X_C0.1u25Y0402-RH
C232
X_C0.1u25Y0402-RH
2
1
SDVO Muxing on X16 PCI Express
PE_PRSNT1#
PE_PRSNT4#
PE_A_TX3
PE_A_TX2
PE_A_TX1
PE_A_TX0
PE_A_RX1
PE_A_RX0
SDVO_SCL#
SDVO_SDA#
FB11
FB11
30L500mA-200-RH
30L500mA-200-RH
C268
C0.1u25Y0402-RH
C268
C0.1u25Y0402-RH
C276
C276
C4.7u6.3X5
C4.7u6.3X5
C236
C4.7u10Y0805
C236
C4.7u10Y0805
C230
C0.1u25Y0402-RH
C230
C0.1u25Y0402-RH
bottom
FB8
FB8
30L500mA-200-RH
30L500mA-200-RH
PE_A_TX12
PE_A_TX13
PE_A_TX14
PE_A_TX15
PE_A_RX14
PE_A_RX15
VCC1_3
VCC3
SDVO_SCL#
SDVO_SDA#
SDVO_CLK#
SDVO_BLUE
SDVO_GREEN
SDVO_RED
SDVO_INTR
SDVO_TVCLKIN
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7505
MS-7505
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Monday, October 15, 2007
Date:
Monday, October 15, 2007
Date:
8
7
6
5
4
3
Monday, October 15, 2007
2
MS-7505
MCP73-PCIE/DAC/HDMI
MCP73-PCIE/DAC/HDMI
MCP73-PCIE/DAC/HDMI
737
737
737
Sheet of
Sheet of
Sheet of
1
0A
0A
0A
8
7
6
5
4
3
2
1
DATA 0
DIMM 1
DIMM 2
ADDR 0A / CNTL 0A
ADDR 0B / CNTL 0B
DIMM 0A
U8C
U8C
?
D D
DQS_A[0..7]9
DQS_A#[0..7]9
DQM_A[0..7]9
C C
MEM_0A_ADD[0..15]9,10
MEM_0A_BA[0..2]9,10
MEM_0A_CS#[0..1]9,10
MEM_0A_CKE[0..1]9,10
B B
MEM_0A_ODT[0..1]9,10
MCLK_0A_09
MCLK_0A_0#9
MCLK_0A_19
MCLK_0A_1#9
MCLK_0A_29
MCLK_0A_2#9
MEM_0B_CS#[0..1]9,10
MEM_0B_CKE[0..1]9,10
MEM_0B_ODT[0..1]9,10
MCLK_0B_09
MCLK_0B_0#9
MCLK_0B_19
MCLK_0B_1#9
MCLK_0B_29
A A
MCLK_0B_2#9
DQS_A0
DQS_A#0
DQS_A1
DQS_A#1
DQS_A2
DQS_A#2
DQS_A3
DQS_A#3
DQS_A4
DQS_A#4
DQS_A5
DQS_A#5
DQS_A6
DQS_A#6
DQS_A7
DQS_A#7
DQM_A0
DQM_A1
DQM_A2
DQM_A3
DQM_A4
DQM_A5
DQM_A6
DQM_A7
MEM_0A_ADD0
MEM_0A_ADD1
MEM_0A_ADD2
MEM_0A_ADD3
MEM_0A_ADD4
MEM_0A_ADD5
MEM_0A_ADD6
MEM_0A_ADD7
MEM_0A_ADD8
MEM_0A_ADD9
MEM_0A_ADD10
MEM_0A_ADD11
MEM_0A_ADD12
MEM_0A_ADD13
MEM_0A_ADD14
MEM_0A_ADD15
MEM_0A_BA0
MEM_0A_BA1
MEM_0A_BA2
MEM_0A_CS#0
MEM_0A_CS#1
MEM_0A_CKE0
MEM_0A_CKE1
MEM_0A_ODT0
MEM_0A_ODT1
MEM_0B_CS#0
MEM_0B_CS#1
MEM_0B_CKE0
MEM_0B_CKE1
MEM_0B_ODT0
MEM_0B_ODT1
AU37
AU38
AN33
AN34
AU31
AV31
AP28
AR28
AK18
AL18
AU20
AT20
AL14
AM14
AT14
AR15
AT36
AN35
AT31
AJ29
AM18
AU21
AN14
AT15
AU29
AK21
AK22
AL22
AM22
AP22
AN22
AL24
AK24
AM24
AT28
AN24
AP24
AT24
AK25
AK26
AU27
AU28
AR24
AR27
AU24
AL26
AN26
AT25
AT23
AN20
AM20
AT35
AR35
AT18
AR18
AT26
AU23
AM26
AP26
AU25
AV23
AR20
AP20
AT34
AR34
AT17
AU17
?
MDQS0_0
MDQS0_0#
MDQS0_1
MDQS0_1#
MDQS0_2
MDQS0_2#
MDQS0_3
MDQS0_3#
MDQS0_4
MDQS0_4#
MDQS0_5
MDQS0_5#
MDQS0_6
MDQS0_6#
MDQS0_7
MDQS0_7#
MDQM0_0
MDQM0_1
MDQM0_2
MDQM0_3
MDQM0_4
MDQM0_5
MDQM0_6
MDQM0_7
MA0A_0
MA0A_1
MA0A_2
MA0A_3
MA0A_4
MA0A_5
MA0A_6
MA0A_7
MA0A_8
MA0A_9
MA0A_10
MA0A_11
MA0A_12
MA0A_13
MA0A_14
MA0A_15
MBA0A_0
MBA0A_1
MBA0A_2
MCS0A_0#
MCS0A_1#
MCKE0A_0
MCKE0A_1
MODT0A_0
MODT0A_1
MCLK0A_0
MCLK0A_0#
MCLK0A_1
MCLK0A_1#
MCLK0A_2
MCLK0A_2#
MCS0B_0#
MCS0B_1#
MCKE0B_0
MCKE0B_1
MODT0B_0
MODT0B_1
MCLK0B_0
MCLK0B_0#
MCLK0B_1
MCLK0B_1#
MCLK0B_2
MCLK0B_2#
?
?
SEC 2 OF 10
SEC 2 OF 10
MCP73
MCP73
MDQ0_0
MDQ0_1
MDQ0_2
MDQ0_3
MDQ0_4
MDQ0_5
MDQ0_6
MDQ0_7
MDQ0_8
MDQ0_9
MDQ0_10
MDQ0_11
MDQ0_12
MDQ0_13
MDQ0_14
MDQ0_15
MDQ0_16
MDQ0_17
MDQ0_18
MDQ0_19
MDQ0_20
MDQ0_21
MDQ0_22
MDQ0_23
MDQ0_24
MDQ0_25
MDQ0_26
MDQ0_27
MDQ0_28
MDQ0_29
MDQ0_30
MDQ0_31
MDQ0_32
MDQ0_33
MDQ0_34
MDQ0_35
MDQ0_36
MDQ0_37
MDQ0_38
MDQ0_39
MDQ0_40
MDQ0_41
MDQ0_42
MDQ0_43
MDQ0_44
MDQ0_45
MDQ0_46
MDQ0_47
MDQ0_48
MDQ0_49
MDQ0_50
MDQ0_51
MDQ0_52
MDQ0_53
MDQ0_54
MDQ0_55
MDQ0_56
MDQ0_57
MDQ0_58
MDQ0_59
MDQ0_60
MDQ0_61
MDQ0_62
MDQ0_63
MRAS0A#
MCAS0A#
MWE0A#
MEM_COMP_1P8V
MEM_COMP_GND
V1P2_PLL_MEM_CPU
V3P3_PLL
AT37
AT38
AU35
AV35
AR36
AR37
AV37
AU36
AL32
AL31
AR32
AP30
AL34
AL33
AN32
AP32
AT32
AU32
AR30
AT29
AT33
AU33
AR31
AT30
AL30
AK29
AL28
AK28
AN30
AM30
AN28
AM28
AP18
AN18
AP16
AN16
AL20
AK20
AK17
AR16
AR22
AT21
AT19
AR19
AR23
AT22
AU19
AV19
AK16
AP14
AR12
AP12
AM16
AL16
AK14
AT12
AU15
AV15
AU13
AU12
AT16
AU16
AR14
AT13
AV27
AR26
AT27
AP37
AP36
M26
D26
30mA
DATA_A0
DATA_A1
DATA_A2
DATA_A3
DATA_A4
DATA_A5
DATA_A6
DATA_A7
DATA_A8
DATA_A9
DATA_A10
DATA_A11
DATA_A12
DATA_A13
DATA_A14
DATA_A15
DATA_A16
DATA_A17
DATA_A18
DATA_A19
DATA_A20
DATA_A21
DATA_A22
DATA_A23
DATA_A24
DATA_A25
DATA_A26
DATA_A27
DATA_A28
DATA_A29
DATA_A30
DATA_A31
DATA_A32
DATA_A33
DATA_A34
DATA_A35
DATA_A36
DATA_A37
DATA_A38
DATA_A39
DATA_A40
DATA_A41
DATA_A42
DATA_A43
DATA_A44
DATA_A45
DATA_A46
DATA_A47
DATA_A48
DATA_A49
DATA_A50
DATA_A51
DATA_A52
DATA_A53
DATA_A54
DATA_A55
DATA_A56
DATA_A57
DATA_A58
DATA_A59
DATA_A60
DATA_A61
DATA_A62
DATA_A63
MEM_0A_RAS#
MEM_0A_CAS#
MEM_0A_WE#
M_DRV0_1P8V
M_DRV1_GND
60mA
+3.3V_PLL
DATA_A[0..63] 9
MEM_0A_RAS# 9,10
MEM_0A_CAS# 9,10
MEM_0A_WE# 9,10
R227 40.2R1%0402R227 40.2R1%0402
R230 40.2R1%0402R230 40.2R1%0402
C406
C0.1u25Y0402-RH
C406
C0.1u25Y0402-RH
VCC_DDR
VCC1_3
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7505
MS-7505
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Monday, October 15, 2007
Date:
Monday, October 15, 2007
Date:
8
7
6
5
4
3
Monday, October 15, 2007
2
MS-7505
MCP73-MEM
MCP73-MEM
MCP73-MEM
837
837
837
Sheet of
Sheet of
Sheet of
1
0A
0A
0A
68
NC
NC/TEST
VSS
VSS
VSS
112
115
118
DIMM2 / 0B
191
75
VDD051VDD156VDD262VDD372VDD478VDD5
VDD3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
121
124
127
130
133
136
170
197
172
187
184
189
67
178
238
161
162
167
194
181
175
VDD6
VDD7
VDD8
VDDQ0
VDDQ153VDDQ259VDDQ364VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ469VDDQ7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
139
142
145
148
151
154
157
160
163
166
VDDSPD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
169
198
201
204
207
210
213
216
219
168
CB042CB143CB248CB349CB4
CB5
CB6
CB7
DQS_A0
7
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
A10_AP
A16/BA2
CAS#
RAS#
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
VREF
VSS
VSS
VSS
VSS
VSS
VSS
VSS
222
225
228
231
234
237
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Date:
Date:
DQS_A#0
6
DQS_A1
16
DQS_A#1
15
DQS_A2
28
DQS_A#2
27
DQS_A3
37
DQS_A#3
36
DQS_A4
84
DQS_A#4
83
DQS_A5
93
DQS_A#5
92
DQS_A6
105
DQS_A#6
104
DQS_A7
114
DQS_A#7
113
46
45
X3
X3
MEM_0A_ADD0
188
A0
MEM_0A_ADD1
183
A1
MEM_0A_ADD2
63
A2
MEM_0A_ADD3
182
A3
MEM_0A_ADD4
61
A4
MEM_0A_ADD5
60
A5
MEM_0A_ADD6
180
A6
MEM_0A_ADD7
58
A7
MEM_0A_ADD8
179
A8
MEM_0A_ADD9
177
A9
MEM_0A_ADD10
70
MEM_0A_ADD11
57
A11
MEM_0A_ADD12
176
A12
MEM_0A_ADD13
196
A13
MEM_0A_ADD14
174
A14
MEM_0A_ADD15
173
A15
MEM_0A_BA2
54
MEM_0A_BA1
190
BA1
MEM_0A_BA0
71
BA0
MEM_0A_WE#
73
WE#
MEM_0A_CAS#
74
MEM_0A_RAS#
192
DQM_A0
125
126
DQM_A1
134
135
DQM_A2
146
147
DQM_A3
155
156
DQM_A4
202
203
DQM_A5
211
212
DQM_A6
223
224
DQM_A7
232
233
164
165
MEM_0B_ODT0
195
MEM_0B_ODT1
77
MEM_0B_CKE0
52
MEM_0B_CKE1
171
MEM_0B_CS#0
193
MEM_0B_CS#1
76
185
186
137
138
220
221
SMB_MEM_CLK
120
SCL
SMB_MEM_DATA
119
SDA
X1
X1
1
X2
X2
239
SA0
240
SA1
101
SA2
DDRII-240_GREEN-RH
DDRII-240_GREEN-RH
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
Monday, October 15, 2007
Monday, October 15, 2007
Monday, October 15, 2007
MCLK_0B_0 8
MCLK_0B_0# 8
MCLK_0B_1 8
MCLK_0B_1# 8
MCLK_0B_2 8
MCLK_0B_2# 8
C54
VCC3
DDR II - DIMM 1 & 2 Sockets
DDR II - DIMM 1 & 2 Sockets
DDR II - DIMM 1 & 2 Sockets
C54
C0.1u25Y0402-RH
C0.1u25Y0402-RH
MS-7505
MS-7505
MS-7505
MEM_0B_ODT[0..1] 8,10
MEM_0B_CKE[0..1] 8,10
MEM_0B_CS#[0..1] 8,10
MEM_0B_CKE0
MEM_0B_CKE1
X_90.9RST/4
X_90.9RST/4
NV Suggestion
Sheet of
Sheet of
Sheet of
937
937
937
R566
R566
R506
X_90.9RST/4
R506
X_90.9RST/4
0A
0A
0A
DIMM1 / 0A
VCC_DDR VCC_DDR
170
68
55
19
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SMB_MEM_CLKSMB_MEM_DATA
102
NC
RC118RC0
NC#19
NC/TEST
VSS
VSS
VSS
VSS
VSS
100
103
106
109
112
115
DATA_A[0..63]8
DATA_A0
DATA_A1
DATA_A2
DATA_A3
DATA_A4
DATA_A5
DATA_A6
DATA_A7
DATA_A8
DATA_A9
DATA_A10
DATA_A11
DATA_A12
DATA_A13
DATA_A14
DATA_A15
DATA_A16
DATA_A17
DATA_A18
DATA_A19
DATA_A20
DATA_A21
DATA_A22
DATA_A23
DATA_A24
DATA_A25
DATA_A26
DATA_A27
DATA_A28
DATA_A29
DATA_A30
DATA_A31
DATA_A32
DATA_A33
DATA_A34
DATA_A35
DATA_A36
DATA_A37
DATA_A38
DATA_A39
DATA_A40
DATA_A41
DATA_A42
DATA_A43
DATA_A44
DATA_A45
DATA_A46
DATA_A47
DATA_A48
DATA_A49
DATA_A50
DATA_A51
DATA_A52
DATA_A53
DATA_A54
DATA_A55
DATA_A56
DATA_A57
DATA_A58
DATA_A59
DATA_A60
DATA_A61
DATA_A62
DATA_A63
Y
D16
D16
Z
1PS226_SOT23
1PS226_SOT23
X
3VDUAL3VDUAL
DIMM1
DIMM1
3
4
9
10
122
123
128
129
12
13
21
22
131
132
140
141
24
25
30
31
143
144
149
150
33
34
39
40
152
153
158
159
80
81
86
87
199
200
205
206
89
90
95
96
208
209
214
215
98
99
107
108
217
218
226
227
110
111
116
117
229
230
235
236
2
5
8
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
Y
D18
Z
1PS226_SOT23
1PS226_SOT23
X
75
VDD051VDD156VDD262VDD372VDD478VDD5
VSS
VSS
VSS
VSS
VSS
118
121
124
127
130
191
194
VDD3
VSS
VSS
VSS
133
136
139
ADDRESS: 000
0xA0
197
181
175
VDD6
VDD7
VDD8
VDDQ0
VDDQ153VDDQ259VDDQ364VDDQ4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
142
145
148
151
154
157
160
163
VCC3 VCC3
DQS_A[0..7]8
172
187
184
VDDQ5
VDDQ6
VDDQ469VDDQ7
VSS
VSS
VSS
166
169
198
189
67
178
238
161
162
167
168
CB042CB143CB248CB349CB4
CB5
CB6
CB7
DQS_A0
7
VDDQ7
VDDQ8
VDDQ9
VDDSPD
VSS
VSS
VSS
VSS
VSS
VSS
201
204
207
210
213
216
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
A10_AP
A16/BA2
WE#
CAS#
RAS#
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
VREF
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
219
222
225
228
231
234
237
6
16
15
28
27
37
36
84
83
93
92
105
104
114
113
46
45
X3
X3
188
A0
183
A1
63
A2
182
A3
61
A4
60
A5
180
A6
58
A7
179
A8
177
A9
70
57
A11
176
A12
196
A13
174
A14
173
A15
54
190
BA1
71
BA0
73
74
192
125
126
134
135
146
147
155
156
202
203
211
212
223
224
232
233
164
165
195
77
52
171
193
76
185
186
137
138
220
221
120
SCL
119
SDA
X1
X1
1
X2
X2
239
SA0
240
SA1
101
SA2
DDRII-240_GREEN-RH
DDRII-240_GREEN-RH
DQS_A#0
DQS_A1
DQS_A#1
DQS_A2
DQS_A#2
DQS_A3
DQS_A#3
DQS_A4
DQS_A#4
DQS_A5
DQS_A#5
DQS_A6
DQS_A#6
DQS_A7
DQS_A#7
MEM_0A_ADD0
MEM_0A_ADD1
MEM_0A_ADD2
MEM_0A_ADD3
MEM_0A_ADD4
MEM_0A_ADD5
MEM_0A_ADD6
MEM_0A_ADD7
MEM_0A_ADD8
MEM_0A_ADD9
MEM_0A_ADD10
MEM_0A_ADD11
MEM_0A_ADD12
MEM_0A_ADD13
MEM_0A_ADD14
MEM_0A_ADD15
MEM_0A_BA2
MEM_0A_BA1
MEM_0A_BA0
MEM_0A_WE#
MEM_0A_CAS#
MEM_0A_RAS#
DQM_A0
DQM_A1
DQM_A2
DQM_A3
DQM_A4
DQM_A5
DQM_A6
DQM_A7
MEM_0A_ODT0
MEM_0A_ODT1
MEM_0A_CKE0
MEM_0A_CKE1
MEM_0A_CS#0
MEM_0A_CS#1
DQS_A#[0..7]8
DATA_A0
R570
X_90.9RST/4
R570
X_90.9RST/4
X_90.9RST/4
X_90.9RST/4
NV Suggestion
DATA_A1
DATA_A2
DATA_A3
DATA_A4
DATA_A5
DATA_A6
DATA_A7
DATA_A8
DATA_A9
DATA_A10
DATA_A11
DATA_A12
DATA_A13
DATA_A14
DATA_A15
DATA_A16
DATA_A17
DATA_A18
DATA_A19
DATA_A20
DATA_A21
DATA_A22
DATA_A23
DATA_A24
DATA_A25
DATA_A26
DATA_A27
DATA_A28
DATA_A29
DATA_A30
DATA_A31
DATA_A32
DATA_A33
DATA_A34
DATA_A35
DATA_A36
DATA_A37
DATA_A38
DATA_A39
DATA_A40
DATA_A41
DATA_A42
DATA_A43
DATA_A44
DATA_A45
DATA_A46
DATA_A47
DATA_A48
DATA_A49
DATA_A50
DATA_A51
DATA_A52
DATA_A53
DATA_A54
DATA_A55
DATA_A56
DATA_A57
DATA_A58
DATA_A59
DATA_A60
DATA_A61
DATA_A62
DATA_A63
R568
R568
DQS_A0 8
DQS_A#0 8
DQS_A1 8
DQS_A#1 8
DQS_A2 8
DQS_A#2 8
DQS_A3 8
DQS_A#3 8
DQS_A4 8
DQS_A#4 8
DQS_A5 8
DQS_A#5 8
DQS_A6 8
DQS_A#6 8
DQS_A7 8
DQS_A#7 8
MEM_0A_ADD[0..15] 8,10
MEM_0A_BA[0..2] 8,10
MEM_0A_WE# 8,10
MEM_0A_CAS# 8,10
MEM_0A_RAS# 8,10
DQM_A[0..7] 8
MEM_0A_ODT[0..1] 8,10
MEM_0A_CKE[0..1] 8,10
MEM_0A_CS#[0..1] 8,10
MCLK_0A_0 8
MCLK_0A_0# 8
MCLK_0A_1 8
MCLK_0A_1# 8
MCLK_0A_2 8
MCLK_0A_2# 8
SMB_MEM_CLK 14
SMB_MEM_DATA 14
DIMM_VREF_A DIMM_VREF_A
C50
C50
C0.1u25Y0402-RH
C0.1u25Y0402-RH
PLACE CLOSE TO DIMM PIN PLACE CLOSE TO DIMM PIN
MEM_0A_CKE0
MEM_0A_CKE1
55
19
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
102
RC118RC0
NC#19
VSS
VSS
VSS
100
103
106
109
DIMM2
DIMM2
3
4
9
10
122
123
128
129
12
13
21
22
131
132
140
141
24
25
30
31
143
144
149
150
33
34
39
40
152
153
158
159
80
81
86
87
199
200
205
206
89
90
95
96
208
209
214
215
98
99
107
108
217
218
226
227
110
111
116
117
229
230
235
236
2
5
8
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
Does DIMM_VREF_A need to connect to W83110?
VCC_DDR
R70 121R1%0402R70 121R1%0402D18
DIMM_VREF_A
R74
R74
121R1%0402
121R1%0402
ADDRESS: 001
0xA2
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