MSI MS-7505v0a 7505v0a_u_001

1

CONTENT SHEET

Cover Sheet, Block diagram
Intel LGA775 CPU

DDR2 DIMM 1 , 2
DDR2 Terminations
NVIDIA MCP73
D-Sub
HDMI/DVI
PCI-Express Slot
PCI Slot 1 & 2

PCI Slot 3 & 4
LPC-Super I/O F71882FG
ATX/Front Panel/FAN

A A

USB CONNECTORS
LAN-RTL8211BL
Azalia Codec - ALC888
1394 Controller - JMB381
ACPI Controller UPI
uP6103/VTT/REGULATOR
VRD11-ST6703
MANUAL PARTS

1-2
3-5
6-8NVIDIA MCP73

9

10

11-17

18
19
20
21

22
23
24
25
26
27
28
29
30
31
32

MS-7505

CPU:

System Chipset:

On Board Device:

Main Memory:

Expansion Slots:

Intersil PWM

Intel Pentium 4 Cedar Mill / Prescott , Pentium D Smithfield / Presler
and Conroe / Kentsfield family processors in LGA775 Package.

NVIDIA MCP73

BIOS -- SPI Flash 8M
Azalia Codec -- ALC888
LPC Super I/O -- FINTEK F71882FG
LAN -- Realtek RTL8211BL-GR
CLOCK Gen -- Integated in MCP73
1394 Controller -- JMB381

SINGLE-channel DDR-II * 4 (Max 4GB)

PCI EXPRESS X16 SLOT *1
PCI EXPRESS X1 SLOT * 1
PCI SLOT * 4

ATX

Version: 0A

OPT

MCP73PV(HDMI+DVI)/F71882FG/ALC888/RTL8211BL/JMB381

PV

Function

1

Orcad Configure

cfg-7505-PV 601-7505-A10

BOM

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev
Custom

Custom

Custom

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

Thursday, August 30, 2007

Thursday, August 30, 2007

Thursday, August 30, 2007

MS-7366

MS-7366

MS-7366

COVER SHEET

COVER SHEET

COVER SHEET

Sheet ofDate:

Sheet ofDate:

Sheet ofDate:

0A

0A

0A

137

137

137

Block Diagram

1

VRD 11

3-Phase PWM

PCI_E X16/X8

Connector

A A

IDE1

SATA-II 1~4

USB Port 0~9

HD Audio Codec

PCI EXPRESS X16

ATA66/100/133

SATA2

USB2.0

HD Audio Link

SPI

Intel LGA775 Processor

FSB

NVIDIA
MCP73

HT LINK

MCP73

LPC

LPC SIO
VINTEK

F71882FG

LPC

FSB 533/800/1066/1333

DDRII

PCI EXPRESS X1

PCI

RGMII

DDR2 533/667/800

4 DDR II
DIMM
Modules

PCI_E X1
Connector

1394

JMB 381

PCI Slot 1

PCI Slot 3

PCI Slot 2

RTL8211B(GIGA PHY)

LAN

J1

J1394_1

SPI

Flash ROM

LPC

Debug Port

Keyboard

Mouse

Floopy

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-7505

MS-7505

SerialParallel

1

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Friday, August 31, 2007

Friday, August 31, 2007

Friday, August 31, 2007

MS-7505

BLOCK DIAGRAM

BLOCK DIAGRAM

BLOCK DIAGRAM

Sheet ofDate:

237

Sheet ofDate:

237

Sheet ofDate:

237

0A

0A

0A

8

D D

H_FERR#4,6

H_DBSY#6
H_TRDY#6

H_LOCK#6

H_IERR#4

H_INIT#6

H_ADS#6

H_BNR#6

H_HIT#6
H_HITM#6
H_BPRI#6

H_SMI#6

H_A20M#6

8

CPU_BSEL06,23
CPU_BSEL16
CPU_BSEL26,23

H_PWRGD4,6

H_CPURST#4,6

H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3

CPU_GTLREF2

H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK

THERMDA
THERMDC

H_TESTHI13

C9_RESERVED
CPU_GTLREF3

R127 X_0R0402R127 X_0R0402

H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54

H_DBI#[0..3]6

H_STPCLK#6

H_DRDY#6

C C

B B

A A

H_DEFER#6

THERMDA23
THERMDC23

TRMTRIP#4,6

H_PROCHOT#4,6

H_IGNNE#6

H_TESTHI13 is not as H_SLP#.
MCP73 has no CPU_SLP# pin.

H_D#[0..63]6

H_A#[3..35]6

A8
G11
D19
C20

F2
AB2
AB3

R3

M3
AD3

P3

H4

B2

C1

E3

D2

C3

C2

D4

E4

G8

G7
AD1

AF1
AC1
AG1
AE1
AL1
AK1

M2
AE8
AL2

N2

P2

K3

L2
AH2

N5
AE6

C9
G10
D16
A20

Y1

V2
AA2

G29
H30
G30

N1
G23
B22

A22
A19
B19
B21
C21
B18
A17
B16
C18

FP_RST#15,24

U3A

U3A

DBI0#
DBI1#
DBI2#
DBI3#

EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#

DBSY#
DRDY#
TRDY#

ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#

TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13

RSVD#AH2
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5

BOOTSELECT
LL_ID0
LL_ID1

BSEL0
BSEL1
BSEL2

PWRGOOD
RESET#
D63#

D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#

VTT_OUT_LEFT

VTT_OUT_LEFT

VTT_OUT_LEFT

7

CPU SIGNAL BLOCK

R124 X_0R0402R124 X_0R0402

H_A#31

H_A#28

H_A#29

H_A#30

H_A#27

H_A#26

H_A#32

H_A#35

H_A#33

H_A#34

AJ6

AJ5

AH5

AH4

AG5

AG4

AG6

AF4

AF5

AB4

A35#

A34#

A33#

A32#

A31#

A30#

A29#

A28#

A27#

A26#

D53#

D52#

D51#

D50#

D49#

D48#

D47#

D46#

D45#

D44#

D43#

D42#

D41#

D40#

D39#

F21

B15

C14

C15

H_D#53

H_D#52

H_D#51

7

F20

A14

E22

E21

E19

D17

H_D#50

H_D#49

E18

D20

D22

G22

G21

H_D#45

H_D#44

H_D#43

H_D#42

H_D#41

H_D#40

H_D#39

H_D#48

H_D#47

H_D#46

H_BPM#1

H_BPM#2

H_BPM#3

H_A#24

H_A#25

H_A#22

H_A#21

H_A#23

H_A#20

H_A#19

AC5

AB5

AA5

AD6

AA4

A25#

A24#

A23#

A22#

A21#

A20#Y4A19#Y6A18#W6A17#

D38#

D37#

D36#

D35#

D34#

D33#

F18

F17

E16

E15

G17

G18

G16

H_D#38

H_D#37

H_D#32

H_D#33

H_D#34

H_D#35

H_D#36

R102 X_0R0402R102 X_0R0402
R113 51R0402R113 51R0402

R175 X_0R0402R175 X_0R0402
R174 51R0402R174 51R0402

R172 X_0R0402R172 X_0R0402
R173 51R0402R173 51R0402

6

H_A#18

H_A#17

H_A#16

AB6

D32#

D31#

D30#

F15

G15

G14

H_D#29

H_D#30

H_D#31

6

H_A#10

H_A#15

H_A#11

H_A#12

H_A#13

H_A#14

U6

A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#

D29#

D28#

D27#

D26#

D25#

D24#

F14

F12

F11

E13

D13

G13

H_D#23

H_D#24

H_D#25

H_D#26

H_D#27

H_D#28

C9_RESERVED

H_TESTHI9

H_TESTHI8

H_A#8

H_A#6

H_A#7

H_A#9

A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#

D23#

D22#

D21#

D20#D7D19#E9D18#F9D17#F8D16#G9D15#

E10

D10

H_D#19

H_D#20

H_D#21

H_D#22

5

VCC_VRM_SENSE
VSS_VRM_SENSE

VID2

VID3

VID1

VID4

VID0

VID5

VID7

AN5

AN4

AN6

VSS_SENSE

VCC_SENSE

VSS_MB_REGULATION

VCC_MB_REGULATION

D12#D8D11#

D10#

D9#

B10

A11

C11

H_D#9

H_D#10

H_D#11

VID6

AM5

AL4

AK4

AL6

AM3

AL5

AM2

AM7

AJ3

AK3

VID6#

VID5#

VID4#

VID3#

VID2#

VID1#

VID_SELECT

ITP_CLK1

ITP_CLK0

GTLREF0

RSVD#AM7

GTLREF1

GTLREF_SEL

GTLREF2

BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#

PCREQ#

REQ4#
REQ3#
REQ2#
REQ1#
REQ0#

TESTHI12
TESTHI11
TESTHI10

TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1

TESTHI0
FORCEPH
RSVD#G6

BCLK1#
BCLK0#

RS2#
RS1#
RS0#

AP1#
AP0#

BR0#
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0

DP3#

DP2#

DP1#

DP0#

ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#

LINT1/NMI

LINT0/INTR

D8#

D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#

ZIF-SOCKET775-RH-1,ZIF-SOCKET775_BLACK_TH-1

ZIF-SOCKET775-RH-1,ZIF-SOCKET775_BLACK_TH-1

B4

A10

H_D#0

H_D#1

H_D#2

H_D#3

H_D#4

H_D#5

H_D#6

H_D#7

H_D#8

5

VID0#

AN7
H1
H2
H29
E24
AG3
AF2
AG2
AD2
AJ1
AJ2

G5
J6
K6
M6
J5
K4

W2
P1
H5
G4
G3
F24
G24
G26
G27
G25
F25
W3
F26
AK6
G6

G28
F28

A3
F5
B3

U3
U2
F3
T2
J2
R1
G2
T1
A13

J17
H16
H15
J16

AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1

H_A#5

H_A#3

H_A#4

L5

AN3

AC2

DBR#

D14#

D13#

B12

D11

C12

H_D#12

H_D#13

H_D#14

H_D#15

H_D#16

H_D#17

H_D#18

VID[0..7] 30

VTT_OUT_RIGHT

R82

R82
X_51R0402

X_51R0402

CPU_GTLREF0

CPU_GTLREF1
GTLREF_SEL
P_GTLREF
H_BPM#5
H_BPM#4
H_BPM#3
H_BPM#2
H_BPM#1
H_BPM#0

CPU_PECI_O
H_REQ#4
H_REQ#3
H_REQ#2
H_REQ#1
H_REQ#0

H_TESTHI12
H_TESTHI11
H_TESTHI10
H_TESTHI9
H_TESTHI8

H_TESTHI2_7

H_TESTHI1

H_TESTHI0
FORCEPH
RSVD_G6

H_RS#2
H_RS#1
H_RS#0

TEST-U3
TEST-U2

H_COMP5
H_COMP4
H_COMP3
H_COMP2
H_COMP1
H_COMP0

TEST-J17
TEST-H16
TEST-H15
TEST-J16

4

VCC_VRM_SENSE 30
VSS_VRM_SENSE 30

R85

R85
680R0402-RH

680R0402-RH

T6T6

H_TESTHI12 5

R190 51R0402R190 51R0402

R195 51R0402R195 51R0402
R108 X_130R1%0402R108 X_130R1%0402
R155 51R0402R155 51R0402

CK_H_CPU# 6
CK_H_CPU 6

H_RS#[0..2] 6

T2T2
T3T3

R142 49.9R1%0402R142 49.9R1%0402
R160 49.9R1%0402R160 49.9R1%0402
R148 49.9R1%0402R148 49.9R1%0402
R178 49.9R1%0402R178 49.9R1%0402
R146 49.9R1%0402R146 49.9R1%0402
R199 49.9R1%0402R199 49.9R1%0402

T5T5
T7T7
T8T8
T4T4

H_ADSTB#1 6
H_ADSTB#0 6
H_DSTBP#3 6
H_DSTBP#2 6
H_DSTBP#1 6
H_DSTBP#0 6
H_DSTBN#3 6
H_DSTBN#2 6
H_DSTBN#1 6
H_DSTBN#0 6
H_NMI 4,6
H_INTR 4,6

4

VRD_VIDSEL 4,30
CPU_GTLREF0 4
CPU_GTLREF1 4

H_BPM#0 5

H_REQ#[0..4] 6

Choose one for PECI function

V_FSB_VTT

R167 20R0402R167 20R0402
R163 X_0R0402R163 X_0R0402

VTT_OUT_RIGHT
VTT_OUT_LEFT

H_BR#0 4,6

C58

C58
C0.1u25Y0402-RH

C0.1u25Y0402-RH

3

CPU_PECI_MCP
IO_PECI

VTT_OUT_LEFT

3

CPU_GTLREF2

CPU_GTLREF3

CPU_PECI_MCP 6
IO_PECI 23

Does it not need to connect to chip?
Does MCP73 no need GTLREF?
There is no CPU_GTL_VREF pin on MCP73.

P_GTLREF

C44

C44

C220p50N0402

C220p50N0402

R186 10R0402R186 10R0402

C87

C87
C220p50N0402

C220p50N0402

R181 10R0402R181 10R0402

C85

C85
C220p50N0402

C220p50N0402

MSI

MSI

MSI

2

RN3

RN3

8P4R-680R

8P4R-680R

VID2

1

VID5
VID0
VID4

VID7
VID3
VID6
VID1

H_BPM#0
H_BPM#1
H_BPM#5
H_BPM#3

H_TRST#
H_BPM#4
H_TDO
H_TCK

H_TDI
H_BPM#2
H_TMS

H_TESTHI1
H_TESTHI11

H_TESTHI10

H_TESTHI13
H_TESTHI12

C48

C48

C0.1u25Y0402-RH

C0.1u25Y0402-RH

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev
Custom

Custom

Custom

2

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

RN2

RN2

8P4R-680R

8P4R-680R

VTT_OUT_RIGHT

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

RN7

RN7
8P4R-51R0402

8P4R-51R0402

1

2

3

4

5

6

7

8

R154 51R0402R154 51R0402
R134 51R0402R134 51R0402

R80

R80

88.7R1%

88.7R1%

R6935.7R1% R6935.7R1%

C41

C41

C1u6.3Y0402-RH

C1u6.3Y0402-RH

R182 124R1%0402R182 124R1%0402

C86

C86
C1u6.3Y0402-RH

C1u6.3Y0402-RH

C61

C61
C1u6.3Y0402-RH

C1u6.3Y0402-RH

Thursday, August 30, 2007

Thursday, August 30, 2007

Thursday, August 30, 2007

R185

R185
210R1%0402

210R1%0402

R97 124R1%0402R97 124R1%0402

R104

R104
210R1%0402

210R1%0402

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-7505

MS-7505

MS-7505

LGA775 - SIGNALS

LGA775 - SIGNALS

LGA775 - SIGNALS

VTT_OUT_RIGHT

C62

C0.1u25Y0402-RH

C62

C0.1u25Y0402-RH

RN4

RN4
8P4R-51R0402

8P4R-51R0402

RN5

RN5
8P4R-51R0402

8P4R-51R0402

RN6

RN6
8P4R-51R0402

8P4R-51R0402

C56

C56
C0.1u25Y0402-RH

C0.1u25Y0402-RH

C60

C0.1u25Y0402-RH

C60

C0.1u25Y0402-RH

VTT_OUT_LEFT

VTT_OUT_RIGHTVTT_OUT_LEFT

Sheet ofDate:

Sheet ofDate:

Sheet ofDate:

1

1

100R1%0402

100R1%0402

82.5R1%0402

82.5R1%0402

VTT_OUT_RIGHT

VTT_OUT_RIGHT

337

337

337

R79

R79

R73

R73

0A

0A

0A

8

VCCP

D D

C C

VCCP

AG11

AF9

AF8

AF22

AF21

U3B

U3B

AF19

VCC#AF19

VCC#AF9

AF18
AF15
AF14
AF12
AF11

AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11

AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23

AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23

VCC#AF8

VCC#AF22

VCC#AF21

VCC#AG11

VCC#AF18
VCC#AF15
VCC#AF14
VCC#AF12
VCC#AF11

AE9

VCC#AE9
VCC#AE23
VCC#AE22
VCC#AE21
VCC#AE19
VCC#AE18
VCC#AE15
VCC#AE14
VCC#AE12
VCC#AE11

AD8

VCC#AD8
VCC#AD30
VCC#AD29
VCC#AD28
VCC#AD27
VCC#AD26
VCC#AD25
VCC#AD24
VCC#AD23

AC8

VCC#AC8
VCC#AC30
VCC#AC29
VCC#AC28
VCC#AC27
VCC#AC26
VCC#AC25
VCC#AC24
VCC#AC23

AB8

VCC#AB8

AA8

VCC#AA8

VCC#Y27

VCC#Y28

VCC#Y29

VCC#Y30

VCC#Y8

Y8

Y27

Y28

Y29

Y30

VCCP

7

AG30

AG29

AG28

AG27

AG26

AG25

AG22

AG21

AG19

AG18

AG15

AG14

AG12

VCC#AG29

VCC#AG28

VCC#AG27

VCC#AG26

VCC#AG25

VCC#AG22

VCC#AG21

VCC#AG19

VCC#AG18

VCC#AG15

VCC#AG14

VCC#AG12

VCC#W24

VCC#W25

VCC#W26

VCC#W27

VCC#W28

VCC#W29

VCC#W30

VCC#W8W8VCC#Y23

VCC#Y24

VCC#Y25

VCC#Y26

Y23

Y24

Y25

Y26

W24

W25

W26

W27

W28

W29

W30

AH21

AH19

AH18

AH15

AH14

AH12

AH11

AG9

AG8

VCC#AG9

VCC#AG8

VCC#AH21

VCC#AH19

VCC#AH18

VCC#AH15

VCC#AH14

VCC#AH12

VCC#AH11

VCC#AG30

VCC#U24

VCC#U25

VCC#U26

VCC#U27

VCC#U28

VCC#U29

VCC#U30

VCC#U8U8VCC#V8V8VCC#W23

U24

U25

U26

U27

U28

U29

U30

W23

6

AJ8

AJ11

AJ12

AJ14

AH27

AH26

AH25

AH22

AH28

AH29

AH30

AH8

AH9

VCC#AH8

VCC#AH9

VCC#AJ11

VCC#AJ12

VCC#AH27

VCC#AH26

VCC#AH25

VCC#AH22

VCC#AH28

VCC#AH29

VCC#AH30

VCC#T24

VCC#T25

VCC#T26

VCC#T27

VCC#T28

VCC#T29

VCC#T30

VCC#T8T8VCC#U23

T23

T24

T25

T26

T27

T28

T29

T30

U23

AJ9

AJ15

AJ18

AJ19

AJ21

AJ22

AJ25

AJ26

AK11

AK12

VCC#AJ8

VCC#AJ14

VCC#AJ9

VCC#AJ15

VCC#AJ18

VCC#AJ19

VCC#AJ21

VCC#AJ22

VCC#AJ25

VCC#AJ26

VCC#AK11

VCC#M8M8VCC#N23

VCC#N24

VCC#N25

VCC#N26

VCC#N27

VCC#N28

VCC#N29

VCC#N30

VCC#N8N8VCC#P8P8VCC#R8R8VCC#T23

N23

N24

N25

N26

N27

N28

N29

N30

M30

AK14

AK15

VCC#AK12

VCC#AK14

VCC#AK15

VCC#M28

VCC#M29

VCC#M30

M28

M29

AK18

AK19

VCC#AK18

VCC#AK19

VCC#M26

VCC#M27

M26

M27

AK21

AK22

VCC#AK21

VCC#AK22

VCC#M24

VCC#M25

M24

M25

AK25

AK26

VCC#AK25

VCC#AK26

M23

5

AK8

AK9

VCC#AK8

VCC#K8K8VCC#L8L8VCC#M23

K30

AL11

AL12

VCC#AK9

VCC#AL11

VCC#K29

VCC#K30

K28

K29

4

AM11

AM12

AM14

AM15

AM18

AM19

AM21

AM22

AM25

AM26

AM29

AL14

AL15

AL18

AL19

AL21

AL22

AL25

AL26

AL29

AL30

AL8

AL9

VCC#AL8

VCC#AL12

VCC#AL14

VCC#AL15

VCC#AL18

VCC#K25

VCC#K26

VCC#K27

VCC#K28

K25

K26

K27

VCC#AL9

VCC#AL19

VCC#AL21

VCC#AL22

VCC#AL25

VCC#AL26

VCC#AL29

VCC#AL30

VCC#AM11

VCC#AM12

VCC#J24

VCC#J25

VCC#J26

VCC#J27

VCC#J28

VCC#J29

VCC#J30

VCC#J8J8VCC#J9J9VCC#K23

VCC#K24

K23

K24

J23

J24

J25

J26

J27

J28

J29

J30

AM30

AM8

AM9

AN11

AN12

AN14

AN15

AN18

AN19

VCC#AM8

VCC#AM9

VCC#AN11

VCC#AN12

VCC#AN14

VCC#AN15

VCC#AN18

VCC#AM14

VCC#AM15

VCC#AM18

VCC#AM19

VCC#AM21

VCC#AM22

VCC#AM25

VCC#AM26

VCC#AM29

VCC#J13

VCC#J14

VCC#J15

VCC#J18

VCC#J19

VCC#J20

VCC#J21

VCC#J22

VCC#J23

J13

J14

J15

J18

J19

J20

J21

J22

VCC#AN19

VCC#AM30

VTT_OUT_RIGHT

VTT_OUT_LEFT

VCC#AN25

VCC#AN26

VCC#AN29

VCC#AN30

VCC#AN8

VCC#AN9

VCC#J10

VCC#J11

VCC#J12

J10

J11

J12

AN8

AN9

AN25

AN26

AN29

AN30

3

AN21

AN22

H_VCCA

A23

VCCA

H_VSSA

B23

VSSA

H_VCCPLL

D23

VCC#AN21

VCC#AN22

VCCPLL

H_VCCA

C23

VCC-IOPLL

A25

VTT#A25

A26

VTT#A26

A27

VTT#A27

A28

VTT#A28

A29

VTT#A29

A30

VTT#A30

B25

VTT#B25

B26

VTT#B26

B27

VTT#B27

B28

VTT#B28

B29

VTT#B29

B30

VTT#B30

C25

VTT#C25

C26

VTT#C26

C27

VTT#C27

C28

VTT#C28

C29

VTT#C29

C30

VTT#C30

D25

VTT#D25

D26

VTT#D26

D27

VTT#D27

D28

VTT#D28

D29

VTT#D29

D30

VTT#D30

VTT_PWG

AM6

VTTPWRGD

AA1
J1

VTT_SEL

F27

VTT_SEL

F29

RSVD#F29

1122334

4

ZIF-SOCKET775-RH-1,ZIF-SOCKET775_BLACK_TH-1

ZIF-SOCKET775-RH-1,ZIF-SOCKET775_BLACK_TH-1

VTT_OUT_RIGHT
VTT_OUT_LEFT

VTT_SEL 28

V_FSB_VTT

C101

C10u6.3X50805

C10u6.3X50805

C101

C118

C118

C10u6.3X50805

C10u6.3X50805

C106

C106

X_C10u6.3X50805

X_C10u6.3X50805

CAPS FOR FSB GENERIC

2

V_FSB_VTT

1

CPU_GTLREF1_SEL12

V_FSB_VTT

8

R166 124R1%0402R166 124R1%0402

210R1%0402

210R1%0402

R159 124R1%0402R159 124R1%0402

1.69KR1%0402

1.69KR1%0402

G

VTT_OUT_RIGHT

VTT_OUT_RIGHT

B B

VTT_OUT_RIGHT

VTT_OUT_LEFT

VTT_OUT_RIGHT

A A

R171 10R0402R171 10R0402

C77

C77

C79

R169

R169

R156

R156

DS

Q22

Q22
N-2N7002_SOT23

N-2N7002_SOT23

C79

C1u6.3Y0402-RH

C1u6.3Y0402-RH

C220p50N0402

C220p50N0402

R164

240R1%0402

R164

240R1%0402

C74

C74

CPU CPU_GTLREF1_SEL GTL VOLTAGE

C1u6.3Y0402-RH

C1u6.3Y0402-RH

KENTSFIELD FSB
OVERCLOCKING

ALL OTHER CPUS

PLACE AT CPU END OF ROUTE

R103 X_130R1%0402R103 X_130R1%0402
R128 62R0402R128 62R0402

R209 200R0402R209 200R0402
R152 X_150R1%0402R152 X_150R1%0402
R187 62R0402R187 62R0402

H_PROCHOT#
H_IERR#

H_CPURST#
H_PWRGD
H_BR#0

PLACE AT C55 END OF ROUTE

R153 62R0402R153 62R0402
R145 X_62R0402R145 X_62R0402
R158 X_150R1%0402R158 X_150R1%0402
R157 X_150R1%0402R157 X_150R1%0402

7

*GTLREF VOLTAGE SHOULD BE

0.63*VTT = 0.756V

R170 10R0402R170 10R0402

C1u6.3Y0402-RH

C1u6.3Y0402-RH

C71

C71

H_PROCHOT# 3,6
H_IERR# 3

H_CPURST# 3,6
H_PWRGD 3,6
H_BR#0 3,6

TRMTRIP# 3,6
H_FERR# 3,6
H_INTR 3,6
H_NMI 3,6

C220p50N0402

C220p50N0402

1 0.66 VTT

0 0.63 VTT

C78

C78

CPU_GTLREF0 3

CPU_GTLREF1 3

6

*PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
*TRACE WIDTH TO CAPS MUST BE NO SMALLER THAN 12MILS

V_FSB_VTT VCC1_5

L2

L2
X_10u100mA_0805-RH

X_10u100mA_0805-RH

21

CP2CP2

C116

C116

C1u6.3Y0402-RH

C1u6.3Y0402-RH

VTT_PWRGOOD

VCC5_SB

R62

R62
1KR0402

1KR0402

VRD_VIDSEL3,30

VID_SELECT

0 (VRM10)

1 (VRM11)

5

VTT_PWG

VID_GD

VR_READY

4

B

power on sequence

VTT_PWG beforce VCCP

VCCP beforce VTT_PWG

C107

C107
C10u6.3X50805

C10u6.3X50805

R3

4.7KR0402R34.7KR0402

CE

Q11

Q11
N-MMBT3904_NL_SOT23

N-MMBT3904_NL_SOT23

H_VCCA

C100

C100
X_C10u6.3X50805

X_C10u6.3X50805

H_VSSA

VCC5_SB

R4

4.7KR0402R44.7KR0402

DS

Q8

Q8

G

N-2N7002_SOT23

N-2N7002_SOT23

3

G

G

CP3CP3

VR_READY

DS

Q3

Q3
N-2N7002_SOT23

N-2N7002_SOT23

VTT_PWG

VID_GD

DS

Q10

Q10
N-2N7002_SOT23

N-2N7002_SOT23

VTT_PWG

H_VCCPLL

C137

C137
X_C1u6.3Y0402-RH

X_C1u6.3Y0402-RH

C132

C132
C0.01u16X0402

C0.01u16X0402

VR_READY 15

C128

C128
C10u6.3X50805

C10u6.3X50805

VTT_PWG SPEC :
High > 0.9V
Low < 0.3V
Trise < 150ns

1.25V VTT_PWRGOOD

VID_GD 28

R408 X_0R0402R408 X_0R0402

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-7505

MS-7505

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Friday, August 31, 2007

Friday, August 31, 2007

Friday, August 31, 2007

2

MS-7505

LGA775 - POWER

LGA775 - POWER

LGA775 - POWER

Sheet ofDate:

437

Sheet ofDate:

437

Sheet ofDate:

437

1

0A

0A

0A

8

7

6

5

4

3

2

1

0 OHM?

V28

V27

VSS#V29

VSS#V28

VSS#V27

VSS#AH23

VSS#AH24

VSS#AH3

AH3

AH24

V26

V25

VSS#V26

VSS#AH6

AH6

AH7

V24

V23

VSS#V25

VSS#V24

VSS#AH7

VSS#AJ10

AJ10

AJ13

R143 X_0R0402R143 X_0R0402
R147 X_0R0402R147 X_0R0402

U1

VSS#U7U7VSS#U1

VSS#V23

VSS#AJ13

VSS#AJ16

VSS#AJ17

AJ16

AJ17

AJ20

R162

R162

R207

R207

51R0402

51R0402

24.9R1%0402

D14

E23

RSVD#E23

RSVD#D14

VSS#AF13

VSS#AF16

AF13

AF16

RSVD#E5E5RSVD#E6E6RSVD#E7

VSS#AF17

VSS#AF20

AF17

AF20

AF23

F23

E7

RSVD#F23

VSS#AF23

VSS#AF24

VSS#AF25

AF24

AF25

H_COMP8

F6

B13

IMPSEL#

VSS#AF26

AF26

AF27

24.9R1%0402

R139

R139
51R0402

51R0402

J3

RSVD#B13

VSS#AF27

VSS#AF28

VSS#AF29

AF3

AF28

AF29

N4

P5

RSVD#J3

RSVD#N4

VSS#AF3

VSS#AF30

AF6

AF30

RSVD#P5

VSS#AF6

VSS#AF7

AF7

AG10

R133

R133

51R0402

51R0402

W1

AC4

MSID[1]V1MSID[0]

RSVD#AC4

VSS#AG10

VSS#AG13

VSS#AG16

AG13

AG16

VSS#AG17

VSS#AG20

AG17

AG20

Y2

VSS#Y7Y7VSS#Y5Y5VSS#Y2

VSS#AG23

VSS#AG24

VSS#AG7

AG7

AG23

AG24

W4

VSS#W7W7VSS#W4

VSS#AH1

AH1

AH10

V6

VSS#V7V7VSS#V6

VSS#AH10

VSS#AH13

VSS#AH16

AH13

AH16

V30

V3

VSS#V3

VSS#V30

VSS#AH17

VSS#AH20

AH17

AH20

V29

AH23

VTT_OUT_RIGHT

R118

R118

49.9R1%0402

D D

C C

B B

49.9R1%0402
R132

R132

49.9R1%0402

49.9R1%0402

R197 X_1KR0402R197 X_1KR0402

H_COMP7

H_COMP6

AE4

AE3

D1

U3C

U3C

COMP6Y3COMP7

A12

VSS#A12
VSS#A15
VSS#A18
VSS#A2
VSS#A21
VSS#A24
VSS#A6
VSS#A9
VSS#AA23
VSS#AA24
VSS#AA25
VSS#AA26
VSS#AA27
VSS#AA28
VSS#AA29
VSS#AA3
VSS#AA30
VSS#AA6
VSS#AA7
VSS#AB1
VSS#AB23
VSS#AB24
VSS#AB25
VSS#AB26
VSS#AB27
VSS#AB28
VSS#AB29
VSS#AB30
VSS#AB7
VSS#AC3
VSS#AC6
VSS#AC7
VSS#AD4
VSS#AD7
VSS#AE10
VSS#AE13
VSS#AE16
VSS#AE17
VSS#AE2
VSS#AE20
VSS#AE24
VSS#AE25
VSS#AE26
VSS#AE27
VSS#AE28

VSS#AE29

VSS#AE30

AE29

AE30

VSS#AE5

AE5

AE7

RSVD#D1

RSVD#AE4

VSS#AE7

VSS#AF10

AF10

A15
A18

A2
A21
A24

A6

A9

AA23
AA24
AA25
AA26
AA27
AA28
AA29

AA3

AA30

AA6
AA7
AB1

AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30

AB7
AC3
AC6
AC7
AD4
AD7

AE10
AE13
AE16
AE17

AE2

AE20
AE24
AE25
AE26
AE27
AE28

T3

VSS#T7T7VSS#T6T6VSS#T3

VSS#R7R7VSS#R5

VSS#AJ20

VSS#AJ23

VSS#AJ24

VSS#AJ27

AJ23

AJ24

AJ27

H_TESTHI12 3

P30

P29

P28

P27

P26

P25

P24

R5

AJ28

R30

VSS#AJ28

AJ29

R29

R28

VSS#R30

VSS#R29

VSS#AJ29

VSS#AJ30

AJ4

AJ30

R27

R26

VSS#R28

VSS#R27

VSS#AJ4

VSS#AJ7

AJ7

AK10

R25

R24

VSS#R26

VSS#R25

VSS#R24

VSS#AK10

VSS#AK13

VSS#AK16

AK13

AK16

R2

R23

VSS#R2

VSS#R23

VSS#AK17

VSS#AK2

AK2

AK17

AK20

P4

VSS#P7P7VSS#P4

VSS#P30

VSS#AK20

VSS#AK23

VSS#AK24

AK23

AK24

VSS#P29

VSS#AK27

AK27

AK28

VSS#P28

VSS#P27

VSS#P26

VSS#AK28

VSS#AK29

VSS#AK30

AK29

AK30

VSS#P25

VSS#AK5

AK5

P23

VSS#P24

VSS#AK7

AK7

AL10

VSS#N7N7VSS#N6N6VSS#N3

VSS#P23

VSS#AL10

VSS#AL13

VSS#AL16

AL13

AL16

N3

M1

VSS#M7M7VSS#M1

VSS#AL17

VSS#AL20

AL17

AL20

AL23

L6

VSS#L7L7VSS#L6

VSS#AL23

VSS#AL24

VSS#AL27

AL24

AL27

L30

L29

L28

L3

VSS#L3

VSS#L30

VSS#L29

VSS#L28

VSS#AL28

VSS#AL3

VSS#AL7

VSS#AM1

AL3

AL7

AM1

AL28

R99 X_0R0402R99 X_0R0402

L27

L26

VSS#L27

VSS#AM10

AM10

AM13

L25

L24

VSS#L26

VSS#L25

VSS#AM13

VSS#AM16

AM16

AM17

L23

VSS#L24

VSS#L23

VSS#AM17

VSS#AM20

AM20

K5

VSS#K7K7VSS#K5

VSS#AM23

VSS#AM24

AM23

AM24

K2

VSS#K2

VSS#AM27

AM27

H9

H26

H27

H28

J7

VSS#J4J4VSS#J7

VSS#H3H3VSS#H6H6VSS#H7H7VSS#H8H8VSS#H9

VSS#H27

VSS#H28

VSS#AM28

VSS#AM4

VSS#AN1

VSS#AN10

VSS#AN13

VSS#AN16

VSS#AN17

VSS#AN2

VSS#AN20

AN1

AN2

AM4

AN10

AN13

AN16

AN17

AN20

AM28

AN23

H17

H18

H19

H20

H21

H22

H23

H24

H25

VSS#H14
VSS#H13

VSS#H17

VSS#H18

VSS#H19

VSS#H20

VSS#H21

VSS#H22

VSS#H23

VSS#H24

VSS#H25

VSS#H26

VSS#H12
VSS#H11
VSS#H10

VSS#G1
VSS#F7

VSS#F4
VSS#F22
VSS#F19
VSS#F16
VSS#F13
VSS#F10

VSS#E8
VSS#E29
VSS#E28
VSS#E27
VSS#E26
VSS#E25
VSS#E20

VSS#E2
VSS#E17
VSS#E14
VSS#E11

VSS#D9

VSS#D6

VSS#D5

VSS#D3
VSS#D24
VSS#D21
VSS#D18
VSS#D15
VSS#D12

VSS#C7

VSS#C4
VSS#C24
VSS#C22
VSS#C19
VSS#C16
VSS#C13
VSS#C10

VSS#B8

VSS#B5
VSS#B24
VSS#B20
VSS#B17

VSS#AN23

VSS#AN24

VSS#AN27

VSS#AN28

VSS#B1B1VSS#B11

VSS#B14

ZIF-SOCKET775-RH-1,ZIF-SOCKET775_BLACK_TH-1

ZIF-SOCKET775-RH-1,ZIF-SOCKET775_BLACK_TH-1

B11

B14

AN24

AN27

AN28

H14
H13
H12
H11
H10
G1
F7
F4
F22
F19
F16
F13
F10
E8
E29
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C7
C4
C24
C22
C19
C16
C13
C10
B8
B5
B24
B20
B17

R176 51R0402R176 51R0402
R179 X_0R0402R179 X_0R0402
R177 X_0R0402R177 X_0R0402

R196 X_1KR0402R196 X_1KR0402

VTT_OUT_LEFT

H_BPM#0 3

CPU DECOUPLING CAPACITORS

VCCP VCCP

A A

8

7

EC22

EC22
C22u6.3X1206

C22u6.3X1206
EC24

EC24
C22u6.3X1206

C22u6.3X1206
EC15

EC15
C22u6.3X1206

C22u6.3X1206

VCCP

EC23

EC23
C22u6.3X1206

C22u6.3X1206
EC27

EC27
C22u6.3X1206

C22u6.3X1206
EC14

EC14
C22u6.3X1206

C22u6.3X1206

Place these caps within socket cavity

6

EC26

EC26
C22u6.3X1206

C22u6.3X1206
EC12

EC12
C22u6.3X1206

C22u6.3X1206
EC16

EC16
C22u6.3X1206

C22u6.3X1206

5

VCCP

EC25

EC25
C22u6.3X1206

C22u6.3X1206
EC13

EC13
C22u6.3X1206

C22u6.3X1206
EC17

EC17
C22u6.3X1206

C22u6.3X1206

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-7505

MS-7505

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Friday, August 31, 2007

Friday, August 31, 2007

4

3

Friday, August 31, 2007

2

MS-7505

LGA775 - GND

LGA775 - GND

LGA775 - GND

Sheet ofDate:

537

Sheet ofDate:

537

Sheet ofDate:

537

1

0A

0A

0A

8

D D

C C

B B

VTT_OUT_RIGHT

7

H_DBI#[0..3]3

H_DSTBP#03
H_DSTBN#03

H_DSTBP#13
H_DSTBN#13

H_DSTBP#23
H_DSTBN#23

H_DSTBP#33
H_DSTBN#33

H_A#[3..35]3

H_ADSTB#03
H_ADSTB#13

H_REQ#[0..4]3

H_DBSY#3
H_DEFER#3
H_DRDY#3
H_HIT#3
H_HITM#3
H_LOCK#3
H_TRDY#3

H_RS#[0..2]3

H_FERR#3,4

H_A20M#3

H_IGNNE#3

H_INIT#3
H_SMI#3
H_INTR3,4

H_NMI3,4

H_PWRGD3,4

R228 49.9R1%0402R228 49.9R1%0402
R231 49.9R1%0402R231 49.9R1%0402

H_ADS#3
H_BNR#3
H_BR#03,4
H_BPRI#3

H_DBI#[0..3]

H_DBI#0

H_DBI#1

H_DBI#2

H_DBI#3

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#0
H_RS#1
H_RS#2

H_FERR#

H_A20M#

H_IGNNE#

H_INIT#

H_SMI#

H_INTR

H_STPCLK#

H_NMI

6

U8A

U8A

?

?

V36
W36
W37

N31

P30

R34
G33

G35

H31
M38

N36

J35

W34

AA34

W31
W33
W32

AA32
AA31
AB30
AA30
AC35
AC34
AC33
AC32
AC31
AE30
AC30
AE34
AE33
AE31
AG33
AE32
AG35
AG34
AF30
AG31
AG30
AJ32
AJ34
AJ33
AJ30
AJ31
AL35
AK30

AA33
AG32

V30

U31
W30
W35

U30

AF37
AF36
AH37
AC36
AE35
AC37
AG36
AD38
AG37
AE36
AG38
AD36
AD37
AD35

AL38
AH38
AK36
AL36
AL37
AH36
AH35
AJ36
AK37

AM38
AM37

?

?

CPU_DSTBP0#
CPU_DSTBN0#
CPU_DBI0#

CPU_DSTBP1#
CPU_DSTBN1#
CPU_DBI1#

CPU_DSTBP2#
CPU_DSTBN2#
CPU_DBI2#

CPU_DSTBP3#
CPU_DSTBN3#
CPU_DBI3#

CPU_A3#
CPU_A4#
CPU_A5#
CPU_A6#
CPU_A7#
CPU_A8#
CPU_A9#
CPU_A10#
CPU_A11#
CPU_A12#
CPU_A13#
CPU_A14#
CPU_A15#
CPU_A16#
CPU_A17#
CPU_A18#
CPU_A19#
CPU_A20#
CPU_A21#
CPU_A22#
CPU_A23#
CPU_A24#
CPU_A25#
CPU_A26#
CPU_A27#
CPU_A28#
CPU_A29#
CPU_A30#
CPU_A31#
CPU_A32#
CPU_A33#
CPU_A34#
CPU_A35#

CPU_ADSTB0#
CPU_ADSTB1#

CPU_REQ0#
CPU_REQ1#
CPU_REQ2#
CPU_REQ3#
CPU_REQ4#

CPU_ADS#
CPU_BNR#
CPU_BR0#
CPU_BPRI#
CPU_DBSY#
CPU_DEFER#
CPU_DRDY#
CPU_HIT#
CPU_HITM#
CPU_LOCK#
CPU_TRDY#
CPU_RS0#
CPU_RS1#
CPU_RS2#

FERR#
A20M#
IGNNE#
INIT#
SMI#
LINT0_INTR
LINT1_NMI
STPCLK#
CPU_PWRGD

CPU_COMP_VCC

CPU_COMP_GND

SEC 1 OF 10

SEC 1 OF 10

MCP73

MCP73

CPU_D0#
CPU_D1#
CPU_D2#
CPU_D3#
CPU_D4#
CPU_D5#
CPU_D6#
CPU_D7#
CPU_D8#

CPU_D9#
CPU_D10#
CPU_D11#
CPU_D12#
CPU_D13#
CPU_D14#
CPU_D15#
CPU_D16#
CPU_D17#
CPU_D18#
CPU_D19#
CPU_D20#
CPU_D21#
CPU_D22#
CPU_D23#
CPU_D24#
CPU_D25#
CPU_D26#
CPU_D27#
CPU_D28#
CPU_D29#
CPU_D30#
CPU_D31#
CPU_D32#
CPU_D33#
CPU_D34#
CPU_D35#
CPU_D36#
CPU_D37#
CPU_D38#
CPU_D39#
CPU_D40#
CPU_D41#
CPU_D42#
CPU_D43#
CPU_D44#
CPU_D45#
CPU_D46#
CPU_D47#
CPU_D48#
CPU_D49#
CPU_D50#
CPU_D51#
CPU_D52#
CPU_D53#
CPU_D54#
CPU_D55#
CPU_D56#
CPU_D57#
CPU_D58#
CPU_D59#
CPU_D60#
CPU_D61#
CPU_D62#
CPU_D63#

CPU_RESET#

BCLK_OUT_CPU_P

BCLK_OUT_CPU_N

BCLK_OUT_ITP_P
BCLK_OUT_ITP_N

BCLK_OUT_MCP_P
BCLK_OUT_MCP_N

BCLK_IN_N
BCLK_IN_P

BSEL0
BSEL1
BSEL2

PROCHOT#

THERMTRIP#

BCLK_COMP

5

H_D#0

AB36

H_D#1

AA36

H_D#2

AB37

H_D#3

Y36

H_D#4

AA35

H_D#5

Y35

H_D#6

Y37

H_D#7

Y38

H_D#8

U35

H_D#9

T35

H_D#10

U36

H_D#11

T36

H_D#12

V37

H_D#13

T37

H_D#14

R37

H_D#15

T38

H_D#16

R31

H_D#17

U33

H_D#18

U34

H_D#19

R30

H_D#20

U32

H_D#21

R32

H_D#22

R33

H_D#23

R35

H_D#24

N30

H_D#25

N32

H_D#26

N33

H_D#27

N34

H_D#28

L30

H_D#29

L31

H_D#30

L33

H_D#31

L32

H_D#32

L35

H_D#33

L34

H_D#34

K30

H_D#35

J34

H_D#36

J31

H_D#37

J30

H_D#38

J33

H_D#39

J32

H_D#40

G31

H_D#41

G34

H_D#42

G36

H_D#43

F33

H_D#44

E33

H_D#45

E35

H_D#46

D35

H_D#47

D36

H_D#48

J36

H_D#49

M37

H_D#50

R36

H_D#51

N35

H_D#52

P37

H_D#53

P36

H_D#54

L36

H_D#55

M35

H_D#56

M36

H_D#57

L37

H_D#58

H36

H_D#59

H35

H_D#60

K36

H_D#61

K37

H_D#62

H38

H_D#63

H37
C36

CPUCLK

G38

CPUCLK#

G37
AN36

AM35

R222 X_0R0402R222 X_0R0402

D37

R224 X_0R0402R224 X_0R0402

D38
C37

C38

CPU_BSE0

F36

CPU_BSE1_R

E36

CPU_BSE2

F37

CPU_PECI_MCP

B37

PECI

H_PROCHOT#_R

AM36

TRMTRIP#

AJ35

R220 X_2.37KR1%0402R220 X_2.37KR1%0402

B38

H_D#[0..63] 3

H_CPURST# 3,4

R226 X_0R0402R226 X_0R0402
R225 X_0R0402R225 X_0R0402

R223 X_49.9R1%0402R223 X_49.9R1%0402
R221 X_49.9R1%0402R221 X_49.9R1%0402

CPU_PECI_MCP 3H_STPCLK#3
TRMTRIP# 3,4

4

R219

R219
X_49.9R1%0402

X_49.9R1%0402

CPU_BSEL13
CPU_BSEL03,23
CPU_BSEL23,23

R214

R214
X_49.9R1%0402

X_49.9R1%0402

CPU_BSEL2

CPU_BSEL1

C152

C152
X_C15p50N0402

X_C15p50N0402

3

R498

R498

X_0R0402

X_0R0402

R235

R235
X_4.7KR-1

X_4.7KR-1

RN16

RN16

8
6
4
2

8P4R-470R0402

8P4R-470R0402

B

V_FSB_VTT

7
5
3
1

CK_H_CPU 3
CK_H_CPU# 3

C148

C148
X_C15p50N0402

X_C15p50N0402

VTT_OUT_RIGHT

R229

R229
X_130R1%0402

X_130R1%0402
R217 0R0402R217 0R0402

H_PROCHOT# 3,4

if CPU processor hot cause system shutdown, remove OR.

2

CPU_BSEL1_R

CE

Q52

Q52
X_N-MMBT3904_NL_SOT23

X_N-MMBT3904_NL_SOT23

FSB
800M

1066M
1333M
1333M

FS_C

0 0 0
1 0 0
1 1 0

FS_A

CPUFS_B
200M0 1 0

266M
333M
400M

For 400MHz CPU Support

BSEL[2..0] FSB CLK (MHz)

SIO_BSE1

SIO_BSE2

266MHz

200MHz

333MHz

Reserved

SIO_BSE0 23
SIO_BSE1 23
SIO_BSE2 23

000

010

100

TBD

CPU_BSE0 SIO_BSE0

R406 X_0R0402R406 X_0R0402

CPU_BSE1_R

R260 X_0R0402R260 X_0R0402

CPU_BSE2

R412 X_0R0402R412 X_0R0402

FOR OC

RN62

RN62

1

2

CPU_BSEL1_RCPU_BSE1_R

3
5
7

8P4R-0R

8P4R-0R

4

CPU_BSEL0CPU_BSE0

6

CPU_BSEL2CPU_BSE2

8

CPU_BSEL1_R 23

1

A A

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Friday, August 31, 2007

Friday, August 31, 2007

8

7

6

5

4

3

Friday, August 31, 2007

2

MS-7505

MS-7505

MS-7505

MCP73-CPU

MCP73-CPU

MCP73-CPU

Sheet ofDate:

637

Sheet ofDate:

637

Sheet ofDate:

637

1

0A

0A

0A

8

D D

ATX_PWR_OK15,23,24
PE_RESET#20,31

C C

D03-0230519-V02
Change to
D03-PA50219-N03

ATX_PWR_OK15,23,24

VGA_BLUE18
VGA_GREEN18
VGA_RED18

B B

VGA_GREEN
VGA_RED

VGA_BLUE

R254

R254

150R1%0402

150R1%0402

PLACE NEAR MCP73 within 600mil.

A A

G

R261

R261

150R1%0402

150R1%0402

7

R250

R250
10KR0402

10KR0402

DS

Q38

Q38
N-2N7002_SOT23

N-2N7002_SOT23

R258

R258

150R1%0402

150R1%0402

U12

U12

1

NC1

2

NC2

3

NC3

4

GND

X_AT88SC0808C-SU-RH

X_AT88SC0808C-SU-RH

M33-8880823-A26

R334 X_0R0402R334 X_0R0402

3VDUAL

53

U15

U15

VCC

VCC

A

A

4

Y

Y

B

B

GND

GND

NC7SZ08M5X_SOT23-5

NC7SZ08M5X_SOT23-5

VCC3

DS

Q35

Q35

G

P-PA502FMG_SOT23-3-RH

P-PA502FMG_SOT23-3-RH

C135

C135

X_C10p50N0402

X_C10p50N0402

8

VCC

7

NC4

6

SCL

5

SDA

1
2

+3.3V_HDMI_IN

C167

C167
C0.1u25Y0402-RH

C0.1u25Y0402-RH

C134

C134

X_C10p50N0402

X_C10p50N0402

VCC3VCC3

R242

R242

X_10KR0402

X_10KR0402

R251

R251
X_10KR0402

X_10KR0402

PE1_PRESENT*20

PE1394_TXP31
PE1394_TXN31

PE1394_RXP31
PE1394_RXN31

CK_PE_100M_1394P31
CK_PE_100M_1394N31

C133

C133

X_C10p50N0402

X_C10p50N0402

6

PE1_TXP20
PE1_TXN20

PE1_RXP20
PE1_RXN20

PE1_CLK20
PE1_CLK#20

PE_WAKE*20

HDMI_TXD0+19
HDMI_TXD0-19
HDMI_TXD1+19
HDMI_TXD1-19
HDMI_TXD2+19
HDMI_TXD2-19

HDMI_TXC+19
HDMI_TXC-19

R246 X_1KR1%0402R246 X_1KR1%0402

VCC3

HSYNC#18
VSYNC#18

R265 124R1%0402R265 124R1%0402
C173 C0.01u16X0402C173 C0.01u16X0402

DDC_DATA18
DDC_CLK18

HDMI_DDC_DATA19
HDMI_DDC_CLK19

HOTPLUG_DET19

PE1_TXP
PE1_TXN

PE1_RXP
PE1_RXN

PE1_CLK
PE1_CLK#

PE1_PRESENT*

C366 C0.1u16Y0402C366 C0.1u16Y0402
C367 C0.1u16Y0402C367 C0.1u16Y0402

PE_RESET_GATE#

R315 X_2.37KR1%0402R315 X_2.37KR1%0402

HDMI_TXD0+
HDMI_TXD0­HDMI_TXD1+
HDMI_TXD1­HDMI_TXD2+
HDMI_TXD2-

HDMI_TXC+
HDMI_TXC-

C0.1u25Y0402-RH

C0.1u25Y0402-RH

R400 X_0R0402R400 X_0R0402
R401 X_0R0402R401 X_0R0402
R402 X_0R0402R402 X_0R0402

HSYNC#
VSYNC#

DDC_DATA
DDC_CLK

HDMI_DDC_DATA
HDMI_DDC_CLK

HDCP_ROM_SCLK
HDCP_ROM_SDATA

PE1394RXP
PE1394RXN

PE_WAKE*

HDMI_RSET

C322

C322

BLUE
GREEN

GREEN
RED

DAC_RSET

HOTPLUG_DET

60mA

10mA

5

H9
H8

H7
H6

B1
C1

F6
F5

D2
D3

E2
E3

A2
B2

F7

E7

E13

A3

A35
A36
C35
B35
C34
B34

B36
A37

D34

C30

B30

C287

C287

C4.7u6.3X5

C4.7u6.3X5
A27

B27
C27

B28
C28

C26
D28

D30
E29

F27
E27
G27

D29
C29

U8B

U8B

?

?

PE1_TX0_P
PE1_TX0_N

PE1_RX0_P
PE1_RX0_N

PE1_REFCLK_P
PE1_REFCLK_N

PEA_PRSNT#
PEA_CLKREQ#

PE2_TX0_P
PE2_TX0_N

PE2_RX0_P
PE2_RX0_N

PE2_REFCLK_P
PE2_REFCLK_N

PEB_PRSNT#

PEX_RST0#
PE_WAKE#/GPIO_21
PEX_CLK_COMP

HDMI_TXD0_P
HDMI_TXD0_N
HDMI_TXD1_P
HDMI_TXD1_N
HDMI_TXD2_P
HDMI_TXD2_N

HDMI_TXC_P
HDMI_TXC_N

HDMI_RSET

V3P3_HDMI_IO

V3P3_HDMI_PLL

DAC_BLUE
DAC_GREEN
DAC_RED

DAC_HSYNC
DAC_VSYNC

DAC_RSET
DAC_VREF

DDC_DATA0
DDC_CLK0

DDC_DATA3
DDC_CLK3
HPLUG_DET3

HDCP_ROM_SCLK
HDCP_ROM_SDATA

?

?

SEC 3 OF 10

SEC 3 OF 10

PE0_PRSNTX4#/DDC_DATA1

4

MCP73

MCP73

PE0_TX15_P
PE0_TX14_P
PE0_TX13_P
PE0_TX12_P
PE0_TX11_P
PE0_TX10_P

PE0_TX9_P
PE0_TX8_P
PE0_TX7_P
PE0_TX6_P
PE0_TX5_P
PE0_TX4_P
PE0_TX3_P
PE0_TX2_P
PE0_TX1_P

PE0_TX0_P
PE0_TX15_N
PE0_TX14_N
PE0_TX13_N
PE0_TX12_N
PE0_TX11_N
PE0_TX10_N

PE0_TX9_N
PE0_TX8_N
PE0_TX7_N
PE0_TX6_N
PE0_TX5_N
PE0_TX4_N
PE0_TX3_N
PE0_TX2_N
PE0_TX1_N
PE0_TX0_N

PE0_RX15_P
PE0_RX14_P
PE0_RX13_P
PE0_RX12_P
PE0_RX11_P
PE0_RX10_P

PE0_RX9_P
PE0_RX8_P
PE0_RX7_P
PE0_RX6_P
PE0_RX5_P
PE0_RX4_P
PE0_RX3_P
PE0_RX2_P
PE0_RX1_P

PE0_RX0_P
PE0_RX15_N
PE0_RX14_N
PE0_RX13_N
PE0_RX12_N
PE0_RX11_N
PE0_RX10_N

PE0_RX9_N

PE0_RX8_N

PE0_RX7_N

PE0_RX6_N

PE0_RX5_N

PE0_RX4_N

PE0_RX3_N

PE0_RX2_N

PE0_RX1_N

PE0_RX0_N

PE0_REFCLK_P
PE0_REFCLK_N

PE0_PRSNTX1#/DDC_CLK1

PE0_PRSNTX8#/EXP_EN

PE0_PRSNTX16#

V1P2_PEX0_PLL
V1P2_PEX1_PLL

V1P2_PLL_XREF_XS0
V1P2_PLL_XREF_XS1

V3P3_PLL_XREF_XS0
V3P3_PLL_XREF_XS1

V3P3_PLL_COREPLL

V3P3_VPLL

3

+3.3V_PLL

PE_A_TXP[0..15] 20

PE_A_TXN[0..15] 20

PE_A_RXP[0..15] 20

PE_A_RXN[0..15] 20

PE_A_CLK 20
PE_A_CLK# 20

PE_PRSNT1# 20
PE_PRSNT4# 20
PE_PRSNT8# 20
PE_PRSNT16# 20

C274

X_C0.1u25Y0402-RH

C274

X_C0.1u25Y0402-RH

C232

X_C0.1u25Y0402-RH

C232

X_C0.1u25Y0402-RH

SDVO_SCL#
SDVO_SDA#

C268

C0.1u25Y0402-RH

C268

C0.1u25Y0402-RH

C236

C4.7u10Y0805

C236

C4.7u10Y0805

C230

C0.1u25Y0402-RH

C230

C0.1u25Y0402-RH

C276

C276

C4.7u6.3X5

C4.7u6.3X5

PE_A_TXP15

V4

PE_A_TXP14

U2

PE_A_TXP13

T2

PE_A_TXP12

R1

PE_A_TXP11

R4

PE_A_TXP10

P4

PE_A_TXP9

N2

PE_A_TXP8

M2

PE_A_TXP7

L1

PE_A_TXP6

L4

PE_A_TXP5

K4

PE_A_TXP4

J2

PE_A_TXP3

H2

PE_A_TXP2

G1

PE_A_TXP1

G4

PE_A_TXP0

F4

PE_A_TXN15

V3

PE_A_TXN14

U3

PE_A_TXN13

T3

PE_A_TXN12

R2

PE_A_TXN11

R3

PE_A_TXN10

P3

PE_A_TXN9

N3

PE_A_TXN8

M3

PE_A_TXN7

L2

PE_A_TXN6

L3

PE_A_TXN5

K3

PE_A_TXN4

J3

PE_A_TXN3

H3

PE_A_TXN2

G2

PE_A_TXN1

G3

PE_A_TXN0

F3

PE_A_RXP15

V6

PE_A_RXP14

V8

PE_A_RXP13

U9

PE_A_RXP12

T5

PE_A_RXP11

T7

PE_A_RXP10

T9

PE_A_RXP9

P6

PE_A_RXP8

P8

PE_A_RXP7

N9

PE_A_RXP6

M5

PE_A_RXP5

M7

PE_A_RXP4

M9

PE_A_RXP3

K6

PE_A_RXP2

K8

PE_A_RXP1

J9

PE_A_RXP0

H5

PE_A_RXN15

V5

PE_A_RXN14

V7

PE_A_RXN13

V9

PE_A_RXN12

T4

PE_A_RXN11

T6

PE_A_RXN10

T8

PE_A_RXN9

P5

PE_A_RXN8

P7

PE_A_RXN7

P9

PE_A_RXN6

M4

PE_A_RXN5

M6

PE_A_RXN4

M8

PE_A_RXN3

K5

PE_A_RXN2

K7

PE_A_RXN1

K9

PE_A_RXN0

H4
C2

D1

PE_PRSNT1#

B3

PE_PRSNT4#

B4

PE_PRSNT8#

A4

PE_PRSNT16#

C4

170mA

+1.2V_PXE_PLL

M14
N14

M12

45mA

M13

21mA

+3.3V_PLL

L8
L9

5mA

H26
F26

5mA

2

SDVO Muxing on X16 PCI Express

PE_PRSNT1#

PE_A_TX3

PE_A_TX2

PE_A_TX1

PE_A_TX0

PE_A_RX1

PE_A_RX0

FB11

FB11
30L500mA-200-RH

30L500mA-200-RH

bottom

FB8

FB8
30L500mA-200-RH

30L500mA-200-RH

VCC1_3

VCC3

PE_PRSNT4#

PE_A_TX12

PE_A_TX13

PE_A_TX14

PE_A_TX15

PE_A_RX14

PE_A_RX15

1

SDVO_SCL#

SDVO_SDA#

SDVO_CLK#

SDVO_BLUE

SDVO_GREEN

SDVO_RED

SDVO_INTR

SDVO_TVCLKIN

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-7505

MS-7505

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Friday, August 31, 2007

Date:

Friday, August 31, 2007

Date:

8

7

6

5

4

3

Friday, August 31, 2007

2

MS-7505

MCP73-PCIE/DAC/HDMI

MCP73-PCIE/DAC/HDMI

MCP73-PCIE/DAC/HDMI

Sheet of

Sheet of

Sheet of

737

737

737

1

0A

0A

0A

8

7

DATA 0

6

ADDR 0A / CNTL 0A

DIMM 1

ADDR 0B / CNTL 0B

DIMM 2

5

4

3

2

1

DIMM 0A

U8C

U8C

?

D D

DQS_A[0..7]9,10

DQS_A#[0..7]9,10

DQM_A[0..7]9,10

C C

MEM_0A_ADD[0..15]9,10,11

MEM_0A_BA[0..2]9,10,11

MEM_0A_CS#[0..1]9,10,11

B B

A A

MEM_0A_CKE[0..1]9,10,11
MEM_0A_ODT[0..1]9,10,11

MCLK_0A_09,10

MCLK_0A_0#9,10

MCLK_0A_19,10

MCLK_0A_1#9,10

MCLK_0A_29,10

MCLK_0A_2#9,10

MEM_0B_CS#[0..1]9,10,11
MEM_0B_CKE[0..1]9,10,11
MEM_0B_ODT[0..1]9,10,11

MCLK_0B_09,10

MCLK_0B_0#9,10

MCLK_0B_19,10

MCLK_0B_1#9,10

MCLK_0B_29,10

MCLK_0B_2#9,10

DQS_A0
DQS_A#0
DQS_A1
DQS_A#1
DQS_A2
DQS_A#2
DQS_A3
DQS_A#3
DQS_A4
DQS_A#4
DQS_A5
DQS_A#5
DQS_A6
DQS_A#6
DQS_A7
DQS_A#7

DQM_A0
DQM_A1
DQM_A2
DQM_A3
DQM_A4
DQM_A5
DQM_A6
DQM_A7

MEM_0A_ADD0
MEM_0A_ADD1
MEM_0A_ADD2
MEM_0A_ADD3
MEM_0A_ADD4
MEM_0A_ADD5
MEM_0A_ADD6
MEM_0A_ADD7
MEM_0A_ADD8
MEM_0A_ADD9
MEM_0A_ADD10
MEM_0A_ADD11
MEM_0A_ADD12
MEM_0A_ADD13
MEM_0A_ADD14
MEM_0A_ADD15

MEM_0A_BA0
MEM_0A_BA1
MEM_0A_BA2

MEM_0A_CS#0
MEM_0A_CS#1
MEM_0A_CKE0
MEM_0A_CKE1
MEM_0A_ODT0
MEM_0A_ODT1

MEM_0B_CS#0
MEM_0B_CS#1
MEM_0B_CKE0
MEM_0B_CKE1
MEM_0B_ODT0
MEM_0B_ODT1

AU37
AU38
AN33
AN34
AU31
AV31
AP28
AR28
AK18

AU20
AT20

AM14
AT14
AR15

AT36
AN35
AT31

AM18
AU21
AN14
AT15

AU29
AK21
AK22

AM22
AP22
AN22

AK24
AM24
AT28
AN24
AP24
AT24
AK25
AK26

AU27
AU28
AR24

AR27
AU24

AN26
AT25
AT23

AN20
AM20
AT35
AR35
AT18
AR18

AT26
AU23
AM26
AP26
AU25
AV23

AR20
AP20
AT34
AR34
AT17
AU17

?

MDQS0_0
MDQS0_0#
MDQS0_1
MDQS0_1#
MDQS0_2
MDQS0_2#
MDQS0_3
MDQS0_3#
MDQS0_4

AL18

MDQS0_4#
MDQS0_5
MDQS0_5#

AL14

MDQS0_6
MDQS0_6#
MDQS0_7
MDQS0_7#

MDQM0_0
MDQM0_1
MDQM0_2

AJ29

MDQM0_3
MDQM0_4
MDQM0_5
MDQM0_6
MDQM0_7

MA0A_0
MA0A_1
MA0A_2

AL22

MA0A_3
MA0A_4
MA0A_5
MA0A_6

AL24

MA0A_7
MA0A_8
MA0A_9
MA0A_10
MA0A_11
MA0A_12
MA0A_13
MA0A_14
MA0A_15

MBA0A_0
MBA0A_1
MBA0A_2

MCS0A_0#
MCS0A_1#

AL26

MCKE0A_0
MCKE0A_1
MODT0A_0
MODT0A_1

MCLK0A_0
MCLK0A_0#
MCLK0A_1
MCLK0A_1#
MCLK0A_2
MCLK0A_2#

MCS0B_0#
MCS0B_1#
MCKE0B_0
MCKE0B_1
MODT0B_0
MODT0B_1

MCLK0B_0
MCLK0B_0#
MCLK0B_1
MCLK0B_1#
MCLK0B_2
MCLK0B_2#

?

?

SEC 2 OF 10

SEC 2 OF 10

MCP73

MCP73

MDQ0_0
MDQ0_1
MDQ0_2
MDQ0_3
MDQ0_4
MDQ0_5
MDQ0_6
MDQ0_7
MDQ0_8

MDQ0_9
MDQ0_10
MDQ0_11
MDQ0_12
MDQ0_13
MDQ0_14
MDQ0_15
MDQ0_16
MDQ0_17
MDQ0_18
MDQ0_19
MDQ0_20
MDQ0_21
MDQ0_22
MDQ0_23
MDQ0_24
MDQ0_25
MDQ0_26
MDQ0_27
MDQ0_28
MDQ0_29
MDQ0_30
MDQ0_31
MDQ0_32
MDQ0_33
MDQ0_34
MDQ0_35
MDQ0_36
MDQ0_37
MDQ0_38
MDQ0_39
MDQ0_40
MDQ0_41
MDQ0_42
MDQ0_43
MDQ0_44
MDQ0_45
MDQ0_46
MDQ0_47
MDQ0_48
MDQ0_49
MDQ0_50
MDQ0_51
MDQ0_52
MDQ0_53
MDQ0_54
MDQ0_55
MDQ0_56
MDQ0_57
MDQ0_58
MDQ0_59
MDQ0_60
MDQ0_61
MDQ0_62
MDQ0_63

MRAS0A#
MCAS0A#

MWE0A#

MEM_COMP_1P8V

MEM_COMP_GND

V1P2_PLL_MEM_CPU

V3P3_PLL

AT37
AT38
AU35
AV35
AR36
AR37
AV37
AU36
AL32
AL31
AR32
AP30
AL34
AL33
AN32
AP32
AT32
AU32
AR30
AT29
AT33
AU33
AR31
AT30
AL30
AK29
AL28
AK28
AN30
AM30
AN28
AM28
AP18
AN18
AP16
AN16
AL20
AK20
AK17
AR16
AR22
AT21
AT19
AR19
AR23
AT22
AU19
AV19
AK16
AP14
AR12
AP12
AM16
AL16
AK14
AT12
AU15
AV15
AU13
AU12
AT16
AU16
AR14
AT13

AV27
AR26
AT27

AP37
AP36

M26
D26

30mA

DATA_A0
DATA_A1
DATA_A2
DATA_A3
DATA_A4
DATA_A5
DATA_A6
DATA_A7
DATA_A8
DATA_A9
DATA_A10
DATA_A11
DATA_A12
DATA_A13
DATA_A14
DATA_A15
DATA_A16
DATA_A17
DATA_A18
DATA_A19
DATA_A20
DATA_A21
DATA_A22
DATA_A23
DATA_A24
DATA_A25
DATA_A26
DATA_A27
DATA_A28
DATA_A29
DATA_A30
DATA_A31
DATA_A32
DATA_A33
DATA_A34
DATA_A35
DATA_A36
DATA_A37
DATA_A38
DATA_A39
DATA_A40
DATA_A41
DATA_A42
DATA_A43
DATA_A44
DATA_A45
DATA_A46
DATA_A47
DATA_A48
DATA_A49
DATA_A50
DATA_A51
DATA_A52
DATA_A53
DATA_A54
DATA_A55
DATA_A56
DATA_A57
DATA_A58
DATA_A59
DATA_A60
DATA_A61
DATA_A62
DATA_A63

MEM_0A_RAS#
MEM_0A_CAS#

MEM_0A_WE#

M_DRV0_1P8V
M_DRV1_GND

60mA

+3.3V_PLL

DATA_A[0..63] 9,10

MEM_0A_RAS# 9,10,11
MEM_0A_CAS# 9,10,11
MEM_0A_WE# 9,10,11

R227 40.2R1%0402R227 40.2R1%0402
R230 40.2R1%0402R230 40.2R1%0402

C406

C0.1u25Y0402-RH

C406

C0.1u25Y0402-RH

VCC_DDR

VCC1_3

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-7505

MS-7505

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Thursday, August 30, 2007

Date:

Thursday, August 30, 2007

Date:

8

7

6

5

4

3

Thursday, August 30, 2007

2

MS-7505

MCP73-MEM

MCP73-MEM

MCP73-MEM

Sheet of

Sheet of

Sheet of

837

837

837

1

0A

0A

0A

VCC_DDR VCC_DDR

DATA_A[0..63]8,10

Z

Y

D16

D16

1PS226_SOT23

1PS226_SOT23

X

DATA_A0
DATA_A1
DATA_A2
DATA_A3
DATA_A4
DATA_A5
DATA_A6
DATA_A7
DATA_A8
DATA_A9
DATA_A10
DATA_A11
DATA_A12
DATA_A13
DATA_A14
DATA_A15
DATA_A16
DATA_A17
DATA_A18
DATA_A19
DATA_A20
DATA_A21
DATA_A22
DATA_A23
DATA_A24
DATA_A25
DATA_A26
DATA_A27
DATA_A28
DATA_A29
DATA_A30
DATA_A31
DATA_A32
DATA_A33
DATA_A34
DATA_A35
DATA_A36
DATA_A37
DATA_A38
DATA_A39
DATA_A40
DATA_A41
DATA_A42
DATA_A43
DATA_A44
DATA_A45
DATA_A46
DATA_A47
DATA_A48
DATA_A49
DATA_A50
DATA_A51
DATA_A52
DATA_A53
DATA_A54
DATA_A55
DATA_A56
DATA_A57
DATA_A58
DATA_A59
DATA_A60
DATA_A61
DATA_A62
DATA_A63

3VDUAL3VDUAL

Y

X

DIMM1

DIMM1

3

DQ0

4

DQ1

9

DQ2

10

DQ3

122

DQ4

123

DQ5

128

DQ6

129

DQ7

12

DQ8

13

DQ9

21

DQ10

22

DQ11

131

DQ12

132

DQ13

140

DQ14

141

DQ15

24

DQ16

25

DQ17

30

DQ18

31

DQ19

143

DQ20

144

DQ21

149

DQ22

150

DQ23

33

DQ24

34

DQ25

39

DQ26

40

DQ27

152

DQ28

153

DQ29

158

DQ30

159

DQ31

80

DQ32

81

DQ33

86

DQ34

87

DQ35

199

DQ36

200

DQ37

205

DQ38

206

DQ39

89

DQ40

90

DQ41

95

DQ42

96

DQ43

208

DQ44

209

DQ45

214

DQ46

215

DQ47

98

DQ48

99

DQ49

107

DQ50

108

DQ51

217

DQ52

218

DQ53

226

DQ54

227

DQ55

110

DQ56

111

DQ57

116

DQ58

117

DQ59

229

DQ60

230

DQ61

235

DQ62

236

DQ63

2

VSS

5

VSS

8

VSS

11

VSS

14

VSS

17

VSS

20

VSS

23

VSS

26

VSS

29

VSS

32

VSS

35

VSS

38

VSS

41

VSS

44

VSS

47

VSS

50

VSS

65

VSS

66

VSS

79

VSS

82

VSS

85

VSS

88

VSS

91

VSS

94

VSS

97

VSS

D18

D18

SMB_MEM_CLKSMB_MEM_DATA

Z

1PS226_SOT23

1PS226_SOT23

19

55

RC118RC0

NC#19

VSS

VSS

VSS

100

103

106

68

102

NC

NC/TEST

VSS

VSS

109

112

VDD051VDD156VDD262VDD372VDD478VDD5

VSS

VSS

VSS

VSS

115

118

121

124

191

194

181

175

75

VDD6

VDD7

VDD8

VDD3

VSS

VSS

VSS

VSS

VSS

VSS

VSS

127

130

133

136

139

142

145

ADDRESS: 000
0xA0

170

VDDQ0

VDDQ153VDDQ259VDDQ364VDDQ4

VSS

VSS

VSS

148

151

154

VCC3 VCC3

161

162

167

197

172

187

184

189

67

178

VDDQ5

VDDQ6

VDDQ7

VDDQ8

VDDQ9

VDDQ469VDDQ7

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

157

160

163

166

169

198

201

204

207

210

168

238

CB042CB143CB248CB349CB4

CB5

CB6

CB7

DQS_A0

7

DQS0

DQS_A#0

VDDSPD

VSS

VSS

VSS

213

216

219

6

DQS0#

DQS_A1

16

DQS1

DQS_A#1

15

DQS1#

DQS_A2

28

DQS2

DQS_A#2

27

DQS2#

DQS_A3

37

DQS3

DQS_A#3

36

DQS3#

DQS_A4

84

DQS4

DQS_A#4

83

DQS4#

DQS_A5

93

DQS5

DQS_A#5

92

DQS5#

DQS_A6

105

DQS6

DQS_A#6

104

DQS6#

DQS_A7

114

DQS7

DQS_A#7

113

DQS7#

46

DQS8

45

DQS8#

X3

X3

MEM_0A_ADD0

188

A0

MEM_0A_ADD1

183

A1

MEM_0A_ADD2

63

A2

MEM_0A_ADD3

182

A3

MEM_0A_ADD4

61

A4

MEM_0A_ADD5

60

A5

MEM_0A_ADD6

180

A6

MEM_0A_ADD7

58

A7

MEM_0A_ADD8

179

A8

MEM_0A_ADD9

177

A9

MEM_0A_ADD10

70

A10_AP

MEM_0A_ADD11

57

A11

MEM_0A_ADD12

176

A12

MEM_0A_ADD13

196

A13

MEM_0A_ADD14

174

A14

MEM_0A_ADD15

173

A15

MEM_0A_BA2

54

A16/BA2

MEM_0A_BA1

190

BA1

MEM_0A_BA0

71

BA0

MEM_0A_WE#

73

WE#

MEM_0A_CAS#

74

CAS#

MEM_0A_RAS#

192

RAS#

DQM_A0

125

DM0/DQS9

126

NC/DQS9#

DQM_A1

134

DM1/DQS10

135

NC/DQS10#

DM2/DQS11

NC/DQS11#

DM3/DQS12

NC/DQS12#

DM4/DQS13

NC/DQS13#

DM5/DQS14

NC/DQS14#

DM6/DQS15

NC/DQS15#

DM7/DQS16

NC/DQS16#

DM8/DQS17

NC/DQS17#

CK1#(CK0#)

VSS

VSS

VSS

VSS

222

225

228

CK0(DU)
CK0#(DU)
CK1(CK0)

CK2(DU)
CK2#(DU)

VSS

231

234

VSS

DQM_A2

146
147

DQM_A3

155
156

DQM_A4

202
203

DQM_A5

211
212

DQM_A6

223
224

DQM_A7

232
233
164
165

MEM_0A_ODT0

195

ODT0

MEM_0A_ODT1

77

ODT1

MEM_0A_CKE0

52

CKE0

MEM_0A_CKE1

171

CKE1

MEM_0A_CS#0

193

CS0#

MEM_0A_CS#1

76

CS1#

185
186
137
138
220
221

120

SCL

119

SDA

X1

X1

1

VREF

X2

X2

239

SA0

240

SA1

101

SA2
VSS

DDRII-240_GREEN-RH

DDRII-240_GREEN-RH

237

Does DIMM_VREF_A need to connect to W83110?

VCC_DDR

DQS_A[0..7]8,10
DQS_A#[0..7]8,10

DATA_A0

DQS_A0 8,10
DQS_A#0 8,10
DQS_A1 8,10
DQS_A#1 8,10
DQS_A2 8,10
DQS_A#2 8,10
DQS_A3 8,10
DQS_A#3 8,10
DQS_A4 8,10
DQS_A#4 8,10
DQS_A5 8,10
DQS_A#5 8,10
DQS_A6 8,10
DQS_A#6 8,10
DQS_A7 8,10
DQS_A#7 8,10

MEM_0A_ADD[0..15] 8,10,11

MEM_0A_BA[0..2] 8,10,11

MEM_0A_WE# 8,10,11
MEM_0A_CAS# 8,10,11
MEM_0A_RAS# 8,10,11

DQM_A[0..7] 8,10

MEM_0A_ODT[0..1] 8,10,11

MEM_0A_CKE[0..1] 8,10,11

MEM_0A_CS#[0..1] 8,10,11

MCLK_0A_0 8,10
MCLK_0A_0# 8,10
MCLK_0A_1 8,10
MCLK_0A_1# 8,10
MCLK_0A_2 8,10
MCLK_0A_2# 8,10

SMB_MEM_CLK 10,15
SMB_MEM_DATA 10,15

DIMM_VREF_A DIMM_VREF_A

C50

C50
C0.1u25Y0402-RH

C0.1u25Y0402-RH

PLACE CLOSE TO DIMM PIN PLACE CLOSE TO DIMM PIN

R70 121R1%0402R70 121R1%0402

DIMM_VREF_A

R74

R74
121R1%0402

121R1%0402

DATA_A1
DATA_A2
DATA_A3
DATA_A4
DATA_A5
DATA_A6
DATA_A7
DATA_A8
DATA_A9
DATA_A10
DATA_A11
DATA_A12
DATA_A13
DATA_A14
DATA_A15
DATA_A16
DATA_A17
DATA_A18
DATA_A19
DATA_A20
DATA_A21
DATA_A22
DATA_A23
DATA_A24
DATA_A25
DATA_A26
DATA_A27
DATA_A28
DATA_A29
DATA_A30
DATA_A31
DATA_A32
DATA_A33
DATA_A34
DATA_A35
DATA_A36
DATA_A37
DATA_A38
DATA_A39
DATA_A40
DATA_A41
DATA_A42
DATA_A43
DATA_A44
DATA_A45
DATA_A46
DATA_A47
DATA_A48
DATA_A49
DATA_A50
DATA_A51
DATA_A52
DATA_A53
DATA_A54
DATA_A55
DATA_A56
DATA_A57
DATA_A58
DATA_A59
DATA_A60
DATA_A61
DATA_A62
DATA_A63

55

DIMM2

DIMM2

3

DQ0

4

DQ1

9

DQ2

10

DQ3

122

DQ4

123

DQ5

128

DQ6

129

DQ7

12

DQ8

13

DQ9

21

DQ10

22

DQ11

131

DQ12

132

DQ13

140

DQ14

141

DQ15

24

DQ16

25

DQ17

30

DQ18

31

DQ19

143

DQ20

144

DQ21

149

DQ22

150

DQ23

33

DQ24

34

DQ25

39

DQ26

40

DQ27

152

DQ28

153

DQ29

158

DQ30

159

DQ31

80

DQ32

81

DQ33

86

DQ34

87

DQ35

199

DQ36

200

DQ37

205

DQ38

206

DQ39

89

DQ40

90

DQ41

95

DQ42

96

DQ43

208

DQ44

209

DQ45

214

DQ46

215

DQ47

98

DQ48

99

DQ49

107

DQ50

108

DQ51

217

DQ52

218

DQ53

226

DQ54

227

DQ55

110

DQ56

111

DQ57

116

DQ58

117

DQ59

229

DQ60

230

DQ61

235

DQ62

236

DQ63

2

VSS

5

VSS

8

VSS

11

VSS

14

VSS

17

VSS

20

VSS

23

VSS

26

VSS

29

VSS

32

VSS

35

VSS

38

VSS

41

VSS

44

VSS

47

VSS

50

VSS

65

VSS

66

VSS

79

VSS

82

VSS

85

VSS

88

VSS

91

VSS

94

VSS

97

VSS

VSS

100

ADDRESS: 001
0xA2

DIMM2 / 0BDIMM1 / 0A

191

194

181

175

75

19

68

102

NC

RC118RC0

VDD051VDD156VDD262VDD372VDD478VDD5

NC#19

NC/TEST

VSS

VSS

VSS

VSS

VSS

VSS

103

106

109

112

115

118

170

197

172

187

184

178

VDD6

VDD7

VDD8

VDD3

VDDQ0

VDDQ153VDDQ259VDDQ364VDDQ4

VDDQ5

VDDQ6

VDDQ7

VDDQ469VDDQ7

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

121

124

127

130

133

136

139

142

145

VSS

148

151

154

157

160

163

166

169

198

201

161

162

167

189

67

VDDQ8

VDDQ9

VSS

VSS

VSS

204

207

210

168

238

CB042CB143CB248CB349CB4

CB5

CB6

CB7

DQS_A0

7

DQS0

DQS_A#0

VDDSPD

VSS

VSS

213

216

219

6

DQS0#

DQS_A1

16

DQS1

DQS_A#1

15

DQS1#

DQS_A2

28

DQS2

DQS_A#2

27

DQS2#

DQS_A3

37

DQS3

DQS_A#3

36

DQS3#

DQS_A4

84

DQS4

DQS_A#4

83

DQS4#

DQS_A5

93

DQS5

DQS_A#5

92

DQS5#

DQS_A6

105

DQS6

DQS_A#6

104

DQS6#

DQS_A7

114

DQS7

DQS_A#7

113

DQS7#

46

DQS8

45

DQS8#

X3

X3

MEM_0A_ADD0

188

A0

MEM_0A_ADD1

183

A1

MEM_0A_ADD2

63

A2

MEM_0A_ADD3

182

A3

MEM_0A_ADD4

61

A4

MEM_0A_ADD5

60

A5

MEM_0A_ADD6

180

A6

MEM_0A_ADD7

58

A7

MEM_0A_ADD8

179

A8

MEM_0A_ADD9

177

A9

MEM_0A_ADD10

70

A10_AP

MEM_0A_ADD11

57

A11

MEM_0A_ADD12

176

A12

MEM_0A_ADD13

196

A13

MEM_0A_ADD14

174

A14

MEM_0A_ADD15

173

A15

MEM_0A_BA2

54

A16/BA2

MEM_0A_BA1

190

BA1

MEM_0A_BA0

71

BA0

MEM_0A_WE#

73

WE#

MEM_0A_CAS#

74

CAS#

MEM_0A_RAS#

192

RAS#

DQM_A0

125

DM0/DQS9

126

NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#

CK1#(CK0#)

VSS

VSS

VSS

VSS

222

225

228

MSI

MSI

MSI

DQM_A1

134
135

DQM_A2

146
147

DQM_A3

155
156

DQM_A4

202
203

DQM_A5

211
212

DQM_A6

223
224

DQM_A7

232
233
164
165

MEM_0B_ODT0

195

ODT0

MEM_0B_ODT1

77

ODT1

MEM_0B_CKE0

52

CKE0

MEM_0B_CKE1

171

CKE1

MEM_0B_CS#0

193

CS0#

MEM_0B_CS#1

76

CS1#

185

CK0(DU)

186

CK0#(DU)

137

CK1(CK0)

138
220

CK2(DU)

221

CK2#(DU)

SMB_MEM_CLK

120

SCL

SMB_MEM_DATA

119

SDA

X1

X1

1

VREF

X2

X2

239

VCC3

SA0

240

SA1

101

SA2

VSS

VSS

VSS

DDRII-240_GREEN-RH

DDRII-240_GREEN-RH

231

234

237

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-7505

MS-7505

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Date:

Date:

MS-7505

DDR II - DIMM 1 & 2 Sockets

DDR II - DIMM 1 & 2 Sockets

DDR II - DIMM 1 & 2 Sockets

Thursday, August 30, 2007

Thursday, August 30, 2007

Thursday, August 30, 2007

MEM_0B_ODT[0..1] 8,10,11

MEM_0B_CKE[0..1] 8,10,11

MEM_0B_CS#[0..1] 8,10,11

MCLK_0B_0 8,10
MCLK_0B_0# 8,10
MCLK_0B_1 8,10
MCLK_0B_1# 8,10
MCLK_0B_2 8,10
MCLK_0B_2# 8,10

C54

C54
C0.1u25Y0402-RH

C0.1u25Y0402-RH

Sheet of

Sheet of

Sheet of

0A

0A

0A

937

937

937

8

DATA_A[0..63]8,9

D D

C C

B B

A A

8

DATA_A0
DATA_A1
DATA_A2
DATA_A3
DATA_A4
DATA_A5
DATA_A6
DATA_A7
DATA_A8
DATA_A9
DATA_A10
DATA_A11
DATA_A12
DATA_A13
DATA_A14
DATA_A15
DATA_A16
DATA_A17
DATA_A18
DATA_A19
DATA_A20
DATA_A21
DATA_A22
DATA_A23
DATA_A24
DATA_A25
DATA_A26
DATA_A27
DATA_A28
DATA_A29
DATA_A30
DATA_A31
DATA_A32
DATA_A33
DATA_A34
DATA_A35
DATA_A36
DATA_A37
DATA_A38
DATA_A39
DATA_A40
DATA_A41
DATA_A42
DATA_A43
DATA_A44
DATA_A45
DATA_A46
DATA_A47
DATA_A48
DATA_A49
DATA_A50
DATA_A51
DATA_A52
DATA_A53
DATA_A54
DATA_A55
DATA_A56
DATA_A57
DATA_A58
DATA_A59
DATA_A60
DATA_A61
DATA_A62
DATA_A63

DIMM3

DIMM3

3
4
9

10
122
123
128
129

12

13

21

22
131
132
140
141

24

25

30

31
143
144
149
150

33

34

39

40
152
153
158
159

80

81

86

87
199
200
205
206

89

90

95

96
208
209
214
215

98

99
107
108
217
218
226
227
110
111
116
117
229
230
235
236

2
5

8
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97

7

DIMM3

VCC_DDR VCC_DDR

191

194

181

175

75

19

68

102

55

NC

RC118RC0

DQ0

NC#19

DQ1

NC/TEST

DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS

VSS

VSS

VSS

VSS

VSS

100

103

106

109

112

115

118

VDD051VDD156VDD262VDD372VDD478VDD5

VDD3

VSS

VSS

VSS

VSS

VSS

VSS

121

124

127

130

133

170

VDD6

VDD7

VDD8

VDDQ0

VDDQ153VDDQ259VDDQ364VDDQ4

VSS

VSS

VSS

VSS

VSS

VSS

VSS

136

139

142

145

148

151

154

157

ADDRESS: 010

7

6

VCC3 VCC3

161

162

167

168

238

CB042CB143CB248CB349CB4

CB5

CB6

CB7

7

DQS0

VDDSPD

VSS

VSS

VSS

213

216

219

6

6

DQS0#

16

DQS1

15

DQS1#

28

DQS2

27

DQS2#

37

DQS3

36

DQS3#

84

DQS4

83

DQS4#

93

DQS5

92

DQS5#

105

DQS6

104

DQS6#

114

DQS7

113

DQS7#

46

DQS8

45

DQS8#

X3

X3

188

A0

183

A1

63

A2

182

A3

61

A4

60

A5

180

A6

58

A7

179

A8

177

A9

70

A10_AP

57

A11

176

A12

196

A13

174

A14

173

A15

54

A16/BA2

190

BA1

71

BA0

73

WE#

74

CAS#

192

RAS#

125

DM0/DQS9

126

NC/DQS9#

134

DM1/DQS10

135

NC/DQS10#

146

DM2/DQS11

147

NC/DQS11#

155

DM3/DQS12

156

NC/DQS12#

202

DM4/DQS13

203

NC/DQS13#

211

DM5/DQS14

212

NC/DQS14#

223

DM6/DQS15

224

NC/DQS15#

232

DM7/DQS16

233

NC/DQS16#

164

DM8/DQS17

165

NC/DQS17#

195

ODT0

77

ODT1

52

CKE0

171

CKE1

193

CS0#

76

CS1#

185

CK0(DU)

186

CK0#(DU)

137

CK1(CK0)

138

CK1#(CK0#)

220

CK2(DU)

221

CK2#(DU)

120

SCL

119

SDA

X1

X1

1

VREF

X2

X2

239

SA0

240

SA1

101

SA2

VSS

VSS

VSS

VSS

VSS

VSS

VSS

DDRII-240_GREEN-RH

DDRII-240_GREEN-RH

222

225

228

231

234

237

VSS

197

VSS

160

172

VDDQ5

VDDQ469VDDQ7

VSS

VSS

163

166

187

184

189

67

178

VDDQ6

VDDQ7

VDDQ8

VDDQ9

VSS

VSS

VSS

VSS

VSS

169

198

201

204

207

210

5

DQS_A[0..7]8,9
DQS_A#[0..7]8,9

DQS_A0

DQS_A0 8,9

DQS_A#0

DQS_A#0 8,9

DQS_A1

DQS_A1 8,9

DQS_A#1

DQS_A#1 8,9

DQS_A2

DQS_A2 8,9

DQS_A#2

DQS_A#2 8,9

DQS_A3

DQS_A3 8,9

DQS_A#3

DQS_A#3 8,9

DQS_A4

DQS_A4 8,9

DQS_A#4

DQS_A#4 8,9

DQS_A5

DQS_A5 8,9

DQS_A#5

DQS_A#5 8,9

DQS_A6

DQS_A6 8,9

DQS_A#6

DQS_A#6 8,9

DQS_A7

DQS_A7 8,9

DQS_A#7

DQS_A#7 8,9

MEM_0A_ADD0
MEM_0A_ADD1
MEM_0A_ADD2
MEM_0A_ADD3
MEM_0A_ADD4
MEM_0A_ADD5
MEM_0A_ADD6
MEM_0A_ADD7
MEM_0A_ADD8
MEM_0A_ADD9
MEM_0A_ADD10
MEM_0A_ADD11
MEM_0A_ADD12
MEM_0A_ADD13
MEM_0A_ADD14
MEM_0A_ADD15

MEM_0A_BA2
MEM_0A_BA1
MEM_0A_BA0

MEM_0A_WE#
MEM_0A_CAS#
MEM_0A_RAS#

DQM_A0
DQM_A1
DQM_A2
DQM_A3
DQM_A4
DQM_A5
DQM_A6
DQM_A7

MEM_0A_ODT1
MEM_0A_ODT0

MEM_0A_CKE1
MEM_0A_CKE0

MEM_0A_CS#1
MEM_0A_CS#0

Does DIMM_VREF_A need to connect to W83110?

VCC_DDR

MCLK_0A_0 8,9
MCLK_0A_0# 8,9
MCLK_0A_1 8,9
MCLK_0A_1# 8,9
MCLK_0A_2 8,9
MCLK_0A_2# 8,9

SMB_MEM_CLK 9,15
SMB_MEM_DATA 9,15

C55

C55
C0.1u25Y0402-RH

C0.1u25Y0402-RH

VCC3

PLACE CLOSE TO DIMM PIN

R75 121R1%0402R75 121R1%0402

MEM_0A_ADD[0..15] 8,9,11

MEM_0A_BA[0..2] 8,9,11

MEM_0A_WE# 8,9,11
MEM_0A_CAS# 8,9,11
MEM_0A_RAS# 8,9,11

DQM_A[0..7] 8,9

DIMM_VREF_B

5

MEM_0A_ODT[0..1] 8,9,11

MEM_0A_CKE[0..1] 8,9,11

MEM_0A_CS#[0..1] 8,9,11

DIMM_VREF_B

R76

R76
121R1%0402

121R1%0402

4

DATA_A0
DATA_A1
DATA_A2
DATA_A3
DATA_A4
DATA_A5
DATA_A6
DATA_A7
DATA_A8
DATA_A9
DATA_A10
DATA_A11
DATA_A12
DATA_A13
DATA_A14
DATA_A15
DATA_A16
DATA_A17
DATA_A18
DATA_A19
DATA_A20
DATA_A21
DATA_A22
DATA_A23
DATA_A24
DATA_A25
DATA_A26
DATA_A27
DATA_A28
DATA_A29
DATA_A30
DATA_A31
DATA_A32
DATA_A33
DATA_A34
DATA_A35
DATA_A36
DATA_A37
DATA_A38
DATA_A39
DATA_A40
DATA_A41
DATA_A42
DATA_A43
DATA_A44
DATA_A45
DATA_A46
DATA_A47
DATA_A48
DATA_A49
DATA_A50
DATA_A51
DATA_A52
DATA_A53
DATA_A54
DATA_A55
DATA_A56
DATA_A57
DATA_A58
DATA_A59
DATA_A60
DATA_A61
DATA_A62
DATA_A63

4

55

DIMM4

DIMM4

3

DQ0

4

DQ1

9

DQ2

10

DQ3

122

DQ4

123

DQ5

128

DQ6

129

DQ7

12

DQ8

13

DQ9

21

DQ10

22

DQ11

131

DQ12

132

DQ13

140

DQ14

141

DQ15

24

DQ16

25

DQ17

30

DQ18

31

DQ19

143

DQ20

144

DQ21

149

DQ22

150

DQ23

33

DQ24

34

DQ25

39

DQ26

40

DQ27

152

DQ28

153

DQ29

158

DQ30

159

DQ31

80

DQ32

81

DQ33

86

DQ34

87

DQ35

199

DQ36

200

DQ37

205

DQ38

206

DQ39

89

DQ40

90

DQ41

95

DQ42

96

DQ43

208

DQ44

209

DQ45

214

DQ46

215

DQ47

98

DQ48

99

DQ49

107

DQ50

108

DQ51

217

DQ52

218

DQ53

226

DQ54

227

DQ55

110

DQ56

111

DQ57

116

DQ58

117

DQ59

229

DQ60

230

DQ61

235

DQ62

236

DQ63

2

VSS

5

VSS

8

VSS

11

VSS

14

VSS

17

VSS

20

VSS

23

VSS

26

VSS

29

VSS

32

VSS

35

VSS

38

VSS

41

VSS

44

VSS

47

VSS

50

VSS

65

VSS

66

VSS

79

VSS

82

VSS

85

VSS

88

VSS

91

VSS

94

VSS

97

VSS

VSS

100

ADDRESS: 011

3

2

1

DIMM4

191

194

181

175

75

19

68

102

NC

RC118RC0

VDD051VDD156VDD262VDD372VDD478VDD5

NC#19

NC/TEST

VSS

VSS

VSS

VSS

VSS

VSS

103

106

109

112

115

118

170

197

172

187

184

178

VDD6

VDD7

VDD8

VDD3

VDDQ0

VDDQ153VDDQ259VDDQ364VDDQ4

VDDQ5

VDDQ6

VDDQ7

VDDQ469VDDQ7

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

121

124

127

130

133

136

139

142

145

3

VSS

148

151

154

157

160

163

166

169

198

201

161

162

167

189

67

VDDQ8

VDDQ9

VSS

VSS

VSS

204

207

210

168

238

CB042CB143CB248CB349CB4

CB5

CB6

CB7

DQS_A0

7

DQS0

DQS_A#0

VDDSPD

VSS

VSS

213

216

219

6

DQS0#

DQS_A1

16

DQS1

DQS_A#1

15

DQS1#

DQS_A2

28

DQS2

DQS_A#2

27

DQS2#

DQS_A3

37

DQS3

DQS_A#3

36

DQS3#

DQS_A4

84

DQS4

DQS_A#4

83

DQS4#

DQS_A5

93

DQS5

DQS_A#5

92

DQS5#

DQS_A6

105

DQS6

DQS_A#6

104

DQS6#

DQS_A7

114

DQS7

DQS_A#7

113

DQS7#

46

DQS8

45

DQS8#

X3

X3

MEM_0A_ADD0

188

A0

MEM_0A_ADD1

183

A1

MEM_0A_ADD2

63

A2

MEM_0A_ADD3

182

A3

MEM_0A_ADD4

61

A4

MEM_0A_ADD5

60

A5

MEM_0A_ADD6

180

A6

MEM_0A_ADD7

58

A7

MEM_0A_ADD8

179

A8

MEM_0A_ADD9

177

A9

MEM_0A_ADD10

70

A10_AP

MEM_0A_ADD11

57

A11

MEM_0A_ADD12

176

A12

MEM_0A_ADD13

196

A13

MEM_0A_ADD14

174

A14

MEM_0A_ADD15

173

A15

MEM_0A_BA2

54

A16/BA2

MEM_0A_BA1

190

BA1

MEM_0A_BA0

71

BA0

MEM_0A_WE#

73

WE#

MEM_0A_CAS#

74

CAS#

MEM_0A_RAS#

192

RAS#

DQM_A0

125

DM0/DQS9

126

NC/DQS9#

DQM_A1

134

DM1/DQS10

135

NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#

CK1#(CK0#)

VSS

VSS

VSS

VSS

222

225

228

MSI

MSI

MSI

DQM_A2

146
147

DQM_A3

155
156

DQM_A4

202
203

DQM_A5

211
212

DQM_A6

223
224

DQM_A7

232
233
164
165

MEM_0B_ODT1

195

ODT0

MEM_0B_ODT0

77

ODT1

MEM_0B_CKE1

52

CKE0

MEM_0B_CKE0

171

CKE1

MEM_0B_CS#1

193

CS0#

MEM_0B_CS#0

76

CS1#

185

CK0(DU)

186

CK0#(DU)

137

CK1(CK0)

138
220

CK2(DU)

221

CK2#(DU)

SMB_MEM_CLK

120

SCL

SMB_MEM_DATA

119

SDA

X1

X1

1

VREF

X2

X2

239

VCC3

SA0

240

SA1

101

SA2

VSS

VSS

VSS

DDRII-240_GREEN-RH

DDRII-240_GREEN-RH

231

234

237

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-7505

MS-7505

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Date:

Date:

2

MS-7505

DDR II - DIMM 1 & 2 Sockets

DDR II - DIMM 1 & 2 Sockets

DDR II - DIMM 1 & 2 Sockets

Thursday, August 30, 2007

Thursday, August 30, 2007

Thursday, August 30, 2007

MEM_0B_ODT[0..1] 8,9,11

MEM_0B_CKE[0..1] 8,9,11

MEM_0B_CS#[0..1] 8,9,11

MCLK_0B_0 8,9
MCLK_0B_0# 8,9
MCLK_0B_1 8,9
MCLK_0B_1# 8,9
MCLK_0B_2 8,9
MCLK_0B_2# 8,9

DIMM_VREF_B

C64

C64
C0.1u25Y0402-RH

C0.1u25Y0402-RH

PLACE CLOSE TO DIMM PIN

Sheet of

Sheet of

Sheet of

1

10 37

10 37

10 37

0A

0A

0A