MSI MS-7502 Schematic 1
5
CONTENT SHEET
4
3
2
1
Cover Sheet, Block diagram
Intel LGA775 CPU - Signals/ Power/ GND
D D
Intel Bearlake - FSB, PCIE, DMI, VGA, MSIC
Intel Bearlake - Memory DDR2
Intel Bearlake - Power / GND
ICH9R - PCI, USB, DMI, TPM
ICH9R - Host, DMI, SATA, Audio, SPI, RTC, MISC
ICH9 - Power, GND
DDR2 Chanel-A / Chanel-B
Clock Gen ICS9LPR906
C C
Super I/O Fintek F71882
SATA / e-SATA / FAN Control
LAN Realtek RTL8111B / 8101E
Audio Codec ALC888S
PCIE Slot x16, x1 20
PCI Slot 1 & 2
Marvell 88SE6111 PCIE to IDE / SATA
USB Connectors
B B
IEEE1394 VT6308
System Power / ACPI Controller UPI
DDR2 / NB-Core Switching Power
1-2
3-5
6
7
8-9
10
11
12
13-14
15
16
17
18
19
21
22
23
24
25
26
MS-7502
CPU:
System Chipset:
On Board Device:
Main Memory:
Expansion Slots:
PWM:
Intel Pentium 4, Pentium D, Core2 Duo, Wolfdale, Kentsfield
and Yorkfield processors in LGA775 Package.
Intel Bearlake - P35 North Bridge
Intel ICH9R South Bridge
CLOCK Gen ICS 9LPRS906
LPC Super I/O -- Fintek F71882F
Realtek RTL8111B / 8101E
Audio Codec -- ALC888S
1394 Controller -- VT6308 (2-port)
PCIE to PATA Bridge -- Marvel 88SE6111
Dual-channel DDR-II * 4
PCI EXPRESS X16 SLOT *1
PCI EXPRESS X1 SLOT *1
PCI SLOT * 2
Intersil ISL6322 (4 Phases) w/ ISL6612 driver
uATX
Version: 0A
4
27
28
29
30
31
32-33
Configration and BOM match up
Option
Bearlake-P35/ICH9R
STD
3
Function
Orcad Configure
cfg-7502
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
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Custom
COVER SHEET
COVER SHEET
COVER SHEET
Date:
Thursday, July 05, 2007
Date:
Thursday, July 05, 2007
Date:
2
Thursday, July 05, 2007
BOM
MS-7502
MS-7502
MS-7502
1
Sheet of
Sheet of
Sheet of
133
133
133
0A
0A
0A
VRD 11 - ISL6322 (4 Phases)
ATX Power-Con. / F_Panel
Manual & Option Parts
Power Delivery
A A
Reset & PWROK map
GPIO Setting & PCI Routing / Revision History
5
5
4
3
2
1
Block Diagram
Board Stack-up
(1080 Prepreg Considerations)
D D
VRD 11
ISL6322
4-Phase PWM
Intel LGA775 Processor
FSB 800/1066/1333
FSB
DDR3 800/1066
Solder Mask
PREPREG 2.7mils
CORE 50mils
1.9mils Cu plus plating
1 oz. (1.2mils)
Cu Power
Plane
1 oz. (1.2mils)
Cu GND
Plane
PCI_E X16
Connector
PCI EXPRESS X16
Bearlake
P35
DDRII
4 DDR II
DIMM
Modules
Solder Mask
PREPREG 2.7mils
1.9mils Cu plus plating
(G)MCH
Single End 50ohm Top/Bottom : 4mils
C C
DMI
HD Audio Link
HD Audio Codec
ALC888S
LAN
USB2.0 - 90ohm : 15/4.5/7.5/4.5/15
SATA - 95ohm : 15/4/8/4/15
LAN - 100ohm : 15/4/8/4/15
PCIE - 95ohm : 15/4/8/4/15
IEEE1394 - 110ohm : 15/4/9/4/15
IDE : 15/4/8/4/15
RTL 8111B / 8101E
PCI_E x1
PCI_E x1
GLCI/LCI
ICH9R
J1394_1
SATA-II 0~6
B B
USB Port 0~11
PCI_E to PATA
Marvell
88SE6111
SATA2
USB2.0
LPC Bus
PCI_E x1
SPI
PCI
LPC SIO
Fintek
F71882
1394
VT6308
PCI Slot 1
IR
SATA-II
A A
IDE
Keyboard
SPI
Flash ROM
5
SPI
Debug Port
4
Mouse
Floopy
3
Serial
VFD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7502
MS-7502
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Thursday, July 05, 2007
Date:
Thursday, July 05, 2007
Date:
2
Thursday, July 05, 2007
MS-7502
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
1
Sheet of
Sheet of
Sheet of
233
233
233
0A
0A
0A
5
4
3
2
1
VCC_SENSE
CPU SIGNAL BLOCK
VSS_SENSE
VID1
VID0
AL5
AM2
VID1
VID0
VID_SELECT
GTLREF0
GTLREF1
GTLREF_SEL
GTLREF2
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
FORCEPH
RSVD#G6
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
B4
H_D#0
H_D#1
H_D#2
VID[0..7] 27
AN7
H1
H2
H29
E24
F2
G10
AG3
BPM5#
AF2
BPM4#
AG2
BPM3#
AD2
BPM2#
AJ1
BPM1#
AJ2
BPM0#
J6
REQ4#
K6
REQ3#
M6
REQ2#
J5
REQ1#
K4
REQ0#
W2
P1
H5
G4
G3
F24
G24
G26
G27
G25
F25
W3
F26
AK6
G6
G28
BCLK1#
F28
BCLK0#
A3
RS2#
F5
RS1#
B3
RS0#
U3
AP1#
U2
AP0#
F3
BR0#
T2
COMP5
J2
COMP4
R1
COMP3
G2
COMP2
T1
COMP1
A13
COMP0
J17
DP3#
H16
DP2#
H15
DP1#
J16
DP0#
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1
ZIF-SOCK775-GF
ZIF-SOCK775-GF
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
PECI
VTIN1
GNDHM
H_TRMTRIP#
H_PROCHOT#
H_IGNNE#
ICH_H_SMI#
H_A20M#
H_TESTHI13
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
H_A#[3..35]6
VID2
VID3
VID4
VID5
VID7
VID6
AJ3
AK3
AM7
AM5
D12#D8D11#
C11
H_D#11
H_D#12
ITP_CLK1
ITP_CLK0
D10#
D9#
B10
A11
H_D#8
H_D#9
H_D#10
A10
AL4
VID6
VID5
RSVD/VID7
D8#
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
H_D#5
H_D#6
H_D#7
AN6
VSS_MB_REGULATION
VCC_MB_REGULATION
D14#
D13#
B12
H_D#13
AK4
AL6
AM3
VID4
VID3
VID2
FC5/CPU_GTLREF2
RSVD/CPU_GTLREF3
H_D#3
H_D#4
G11
D19
C20
AB2
AB3
AD3
AD1
AF1
AC1
AG1
AE1
AL1
AK1
AE8
AL2
AH2
AE6
D16
A20
AA2
G29
H30
G30
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
A8
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
G5
M2
N2
P2
K3
L2
N5
C9
Y1
V2
N1
U7A
U7A
DBI0#
DBI1#
DBI2#
DBI3#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
PECI
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13
RSVD#AH2
RESERVED0
RESERVED1
RESERVED2
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
B15
H_D#53
H_A#35
AJ6
A35#
D53#
D52#
C14
H_D#52
H_A#33
H_A#34
AJ5
AH5
A34#
D51#
A14
C15
H_D#51
H_D#50
H_A#32
AH4
A33#
A32#
D50#
D49#
D17
H_D#49
H_A#31
H_A#30
AG5
AG4
A31#
D48#
D20
G22
H_D#48
H_D#47
H_A#29
AG6
A30#
A29#
D47#
D46#
D22
H_D#46
H_A#28
H_A#27
AF4
AF5
A28#
D45#
E22
G21
H_D#45
H_D#44
H_A#26
AB4
A27#
A26#
D44#
D43#
F21
H_D#43
H_A#24
H_A#25
AC5
AB5
A25#
D42#
F20
E21
H_D#42
H_D#41
H_A#23
AA5
A24#
A23#
D41#
D40#
E19
H_D#40
H_A#22
H_A#21
AD6
AA4
A22#
D39#
F18
E18
H_D#39
H_D#38
H_A#18
H_A#20
H_A#19
A21#
A20#Y4A19#Y6A18#W6A17#
D38#
D37#
D36#
F17
G17
H_D#37
H_D#35
H_D#36
H_A#17
H_A#16
H_A#15
H_A#14
AB6
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
D35#
D34#
D33#
D32#
E16
E15
G18
G16
H_D#31
H_D#32
H_D#33
H_D#34
D31#
G15
H_A#12
H_A#13
D30#
F15
G14
H_D#29
H_D#30
H_A#11
D29#
D28#
F14
H_D#28
H_A#10
H_A#9
U6
D27#
E13
G13
H_D#26
H_D#27
H_A#8
H_A#5
H_A#6
H_A#7
H_A#3
H_A#4
L5
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
D26#
D25#
D24#
D23#
D22#
D21#
F12
F11
E10
D13
D10
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
AC2
AN4
AN3
DBR#
VSS_SENSE
VCC_SENSE
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
D11
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
AN5
C12
D D
H_DBI#[0..3]6
H_IERR#4
H_FERR#11
H_STPCLK#11
H_INIT#11
H_DBSY#6
H_DRDY#6
H_TRDY#6
H_ADS#6
H_D#[0..63]6
H_LOCK#6
H_DEFER#6
H_TRMTRIP#11
H_PROCHOT#4
H_IGNNE#11
ICH_H_SMI#11
H_BPM#1
Kentsfield
CPU_BSEL015,16
CPU_BSEL115,16
CPU_BSEL215,16
H_PWRGD4,11
H_CPURST#4,6
H_BNR#6
H_HIT#6
H_HITM#6
H_BPRI#6
PECI11,16
VTIN116
GNDHM16
H_A20M#11
R111 0R/2R111 0R/2
C C
B B
A A
VCC_SENSE 27
VSS_SENSE 27
VTT_OUT_RIGHT
R86
R86
1KR1%/2
1KR1%/2
CPU_GTLREF0
CPU_GTLREF1
GTLREF_SEL
CPU_MCH_GTLREF
CPU_GTLREF2
CPU_GTLREF3
H_BPM#5
H_BPM#4
H_BPM#3
H_BPM#2
H_BPM#1
H_BPM#0
H_REQ#4
H_REQ#3
H_REQ#2
H_REQ#1
H_REQ#0
H_TESTHI12
H_TESTHI11
H_TESTHI10
H_TESTHI9
H_TESTHI8
H_TESTHI2_7
H_TESTHI1
H_TESTHI0
FORCEPH
RSVD_G6
CK_H_CPU_DN
CK_H_CPU_DP
H_RS#2
H_RS#1
H_RS#0
TEST-U3
TEST-U2
H_COMP5
H_COMP4
H_COMP3
H_COMP2
H_COMP1
H_COMP0
TEST-J17
TEST-H16
TEST-H15
TEST-J16
PULL HIGHT PULL DOWN
RN5 8P4R-680RRN5 8P4R-680R
VID2
VID0
VID5
VID4
VID7
VID3
VID6
THRM#15,16
VID1
H_BPM#0
H_BPM#1
H_BPM#5
H_BPM#3
H_TRST#
H_BPM#4
H_TDO
H_TCK
H_TDI
H_BPM#2
H_TMS
H_TESTHI12
H_TESTHI11
H_TESTHI9
H_TESTHI10
H_TESTHI8
H_TESTHI1
H_TESTHI13
FORCEPH
H_PROCHOT#
VRD_VIDSEL 27
CPU_GTLREF0 4
CPU_GTLREF1 4
X_TP
X_TP
T12
T12
CPU_MCH_GTLREF 6
CPU_GTLREF2 4
CPU_GTLREF3 4
H_BPM#0 5
H_REQ#[0..4] 6
H_TESTHI12 5
Kentsfield
R126 0R/2R126 0R/2
R162 0R/2R162 0R/2
R177 51R/2R177 51R/2 C81
R178 51R/2R178 51R/2
R104 X_130R/2R104 X_130R/2
R151 X_51R/2R151 X_51R/2
X_TPT7X_TP
T7
T6 X_TPT6 X_TP
R139 49.9R1%/2R139 49.9R1%/2
R153 49.9R1%/2R153 49.9R1%/2
R145 49.9R1%/2R145 49.9R1%/2
R168 49.9R1%/2R168 49.9R1%/2
R142 49.9R1%/2R142 49.9R1%/2
R184 49.9R1%/2R184 49.9R1%/2
T8 X_TPT8 X_TP
X_TP
X_TP
T10
T10
X_TP
X_TP
T11
T11
X_TPT9X_TP
T9
H_ADSTB#1 6
H_ADSTB#0 6
H_DSTBP#3 6
H_DSTBP#2 6
H_DSTBP#1 6
H_DSTBP#0 6
H_DSTBN#3 6
H_DSTBN#2 6
H_DSTBN#1 6
H_DSTBN#0 6
H_NMI 11
H_INTR 11
H_BPM#2
H_BPM#3
V_FSB_VTT
VTT_OUT_RIGHT
VTT_OUT_LEFT
CK_H_CPU_DN 15
CK_H_CPU_DP 15
H_RS#[0..2] 6
V_FSB_VTT
VTT_OUT_RIGHT 4,5
H_BR#0 4,6
C79
C79
C0.1U16Y2
C0.1U16Y2
VTT_OUT_LEFT 4
1
3
5
7
1
3
5
7
RN4 8P4R-680RRN4 8P4R-680R
1
3
5
7
RN7 8P4R-51R/2RN7 8P4R-51R/2
1
3
5
7
RN8 8P4R-51R/2RN8 8P4R-51R/2
1
3
5
7
RN9 8P4R-51R/2RN9 8P4R-51R/2
RN10 8P4R-51R/2RN10 8P4R-51R/2
1
3
5
7
R161 51R/2R161 51R/2
R144 51R/2R144 51R/2
R152 51R/2R152 51R/2
VTT_OUT_RIGHT
R112 X_0R/2R112 X_0R/2
R106 X_0R/2R106 X_0R/2
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
Thermal TRIP
R130 0R/2R130 0R/2
VTT_OUT_RIGHT
C0.1U16Y2
C0.1U16Y2
VTT_OUT_RIGHT
VTT_OUT_LEFT
R103
R103
X_10KR/2
X_10KR/2
B
Q20
Q20
X_2N3904
X_2N3904
CE
C64
C64
VCC3
C78
C78
C0.1U16Y2
C0.1U16Y2
C81
C0.1U16Y2
C0.1U16Y2
R129
R129
10KR/2
10KR/2
ICH_THERM# 11
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7502
MS-7502
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Thursday, July 05, 2007
Date:
Thursday, July 05, 2007
Date:
5
4
3
2
Thursday, July 05, 2007
MS-7502
LGA775 - Signal
LGA775 - Signal
LGA775 - Signal
1
Sheet of
Sheet of
Sheet of
333
333
333
0A
0A
0A
5
VCCP
AF9
AF8
AF22
AF21
U7B
AF19
AF18
AF15
AF14
AF12
AF11
AE9
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AB8
AA8
U7B
VCCP
VCC#AF19
VCC#AF18
VCC#AF15
VCC#AF14
VCC#AF12
VCC#AF11
VCC#AE9
VCC#AE23
VCC#AE22
VCC#AE21
VCC#AE19
VCC#AE18
VCC#AE15
VCC#AE14
VCC#AE12
VCC#AE11
VCC#AD8
VCC#AD30
VCC#AD29
VCC#AD28
VCC#AD27
VCC#AD26
VCC#AD25
VCC#AD24
VCC#AD23
VCC#AC8
VCC#AC30
VCC#AC29
VCC#AC28
VCC#AC27
VCC#AC26
VCC#AC25
VCC#AC24
VCC#AC23
VCC#AB8
VCC#AA8
VCC#AF22
VCC#AF21
VCC#Y30
VCC#Y8
Y8
Y29
Y30
VCC#AF9
VCC#AF8
VCC#Y28
VCC#Y29
Y28
D D
C C
VCCP
AG14
AG12
AG11
VCC#AG12
VCC#AG11
VCC#Y26
VCC#Y27
Y25
Y26
Y27
AG19
AG18
AG15
VCC#AG18
VCC#AG15
VCC#AG14
VCC#Y24
VCC#Y25
Y23
Y24
AG21
VCC#AG21
VCC#AG19
VCC#W30
VCC#W8W8VCC#Y23
W30
AG26
AG25
AG22
VCC#AG26
VCC#AG25
VCC#AG22
VCC#W27
VCC#W28
VCC#W29
W27
W28
W29
AG29
AG28
AG27
VCC#AG29
VCC#AG28
VCC#AG27
VCC#W24
VCC#W25
VCC#W26
W24
W25
W26
AG30
AG9
AG8
VCC#AG9
VCC#AG8
VCC#AG30
VCC#U8
VCC#V8
VCC#W23
V8
U8
W23
AH11
VCC#AH11
VCC#U30
U30
AH15
AH14
AH12
VCC#AH15
VCC#AH14
VCC#AH12
VCC#U27
VCC#U28
VCC#U29
U27
U28
U29
AH21
AH19
AH18
VCC#AH21
VCC#AH19
VCC#AH18
VCC#U24
VCC#U25
VCC#U26
U24
U25
U26
4
AH26
AH25
AH22
VCC#AH26
VCC#AH25
VCC#AH22
VCC#T30
VCC#T8
VCC#U23
T8
T30
U23
AH27
AH28
AH29
VCC#AH27
VCC#AH28
VCC#AH29
VCC#T27
VCC#T28
VCC#T29
T27
T28
T29
AH8
AH9
AH30
VCC#AH8
VCC#AH9
VCC#AH30
VCC#T24
VCC#T25
VCC#T26
T24
T25
T26
AJ11
AJ12
VCC#AJ11
VCC#AJ12
VCC#R8
VCC#T23
R8
T23
AJ14
AJ15
VCC#AJ14
VCC#P8
P8
N8
AJ18
AJ19
VCC#AJ15
VCC#AJ18
VCC#N30
VCC#N8
N29
N30
AJ21
AJ22
VCC#AJ19
VCC#AJ21
VCC#AJ22
VCC#N27
VCC#N28
VCC#N29
N27
N28
AJ25
AJ26
VCC#AJ25
VCC#AJ26
VCC#N25
VCC#N26
N25
N26
AJ8
AJ9
VCC#AJ8
VCC#AJ9
VCC#N23
VCC#N24
N23
N24
AK11
AK12
AK14
VCC#AK11
VCC#AK12
VCC#AK14
VCC#M29
VCC#M30
VCC#M8
M8
M29
M30
AK15
AK18
AK19
VCC#AK15
VCC#AK18
VCC#AK19
VCC#M26
VCC#M27
VCC#M28
M26
M27
M28
AK21
AK22
AK25
VCC#AK21
VCC#AK22
VCC#AK25
VCC#M23
VCC#M24
VCC#M25
M23
M24
M25
AK26
AK8
AK9
VCC#AK8
VCC#AK9
VCC#AK26
VCC#K30
VCC#K8
VCC#L8
L8
K8
K30
AL11
AL12
AL14
VCC#AL11
VCC#AL12
VCC#K28
VCC#K29
K27
K28
K29
3
AL15
AL18
AL19
VCC#AL14
VCC#AL15
VCC#AL18
VCC#K25
VCC#K26
VCC#K27
K24
K25
K26
AL21
AL22
AL25
VCC#AL19
VCC#AL21
VCC#AL22
VCC#J9
VCC#K23
VCC#K24
J8
J9
K23
AL26
AL29
AL30
VCC#AL25
VCC#AL26
VCC#AL29
VCC#J29
VCC#J30
VCC#J8
J28
J29
J30
AL8
AL9
AM11
VCC#AL8
VCC#AL9
VCC#AL30
VCC#J26
VCC#J27
VCC#J28
J25
J26
J27
AM12
AM14
AM15
VCC#AM11
VCC#AM12
VCC#AM14
VCC#AM15
VCC#J22
VCC#J23
VCC#J24
VCC#J25
J22
J23
J24
AM18
AM19
AM21
VCC#AM18
VCC#AM19
VCC#AM21
VCC#J19
VCC#J20
VCC#J21
J19
J20
J21
AM22
AM25
AM26
VCC#AM22
VCC#AM25
VCC#AM26
VCC#J14
VCC#J15
VCC#J18
J14
J15
J18
AM8
AM29
AM30
VCC#AM8
VCC#AM29
VCC#AM30
VCC#J11
VCC#J12
VCC#J13
J11
J12
J13
AM9
AN11
AN12
VCC#AM9
VCC#AN11
VCC#AN9
VCC#J10
J10
AN8
AN9
AN14
AN15
AN18
VCC#AN12
VCC#AN14
VCC#AN15
VCC#AN18
VTT_OUT_RIGHT
VCC#AN26
VCC#AN29
VCC#AN30
VCC#AN8
AN26
AN29
AN30
AN19
AN21
AN22
VCCA
VSSA
VCC#AN19
VCC#AN21
VCC#AN22
VCCPLL
VCC-IOPLL
VTT#A25
VTT#A26
VTT#A27
VTT#A28
VTT#A29
VTT#A30
VTT#B25
VTT#B26
VTT#B27
VTT#B28
VTT#B29
VTT#B30
VTT#C25
VTT#C26
VTT#C27
VTT#C28
VTT#C29
VTT#C30
VTT#D25
VTT#D26
VTT#D27
VTT#D28
VTT#D29
VTT#D30
VTTPWRGD
VTT_OUT_LEFT
VTT_SEL
RSVD#F29
VCC#AN25
1122334
AN25
2
4
H_VCCA
A23
H_VSSA
B23
H_VCCPLL
D23
H_VCCA
C23
A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30
VTT_PWG
AM6
VTT_OUT_RIGHT
AA1
VTT_OUT_LEFT
J1
VTT_SEL
F27
F29
ZIF-SOCK775-GF
ZIF-SOCK775-GF
V_FSB_VTT
C157
C157
C153
C10U10Y5
C10U10Y5
C153
C10U10Y5
C10U10Y5
CAPS FOR FSB GENERIC
VTT_SEL 25
V_FSB_VTT
C183
C183
C10U16X6
C10U16X6
1
*GTLREF VOLTAGE SHOULD BE
0.67 * VTT = 0.8V (At VTT=1.2V)
VTT_OUT_RIGHT
B B
VTT_OUT_RIGHT
R148 115R1%/2R148 115R1%/2
C80
C80
X_C10U16X6
X_C10U16X6
R138 115R1%/2R138 115R1%/2
R150 10R/2R150 10R/2 R163 10R/2R163 10R/2
R154
R154
C89
C89
200R1%/2
200R1%/2
C1U16Y3
C1U16Y3
R146 10R/2R146 10R/2
R141
R141
C84
C84
C1U16Y3
C1U16Y3
200R1%/2
200R1%/2
C94
C94
C220P50N2
C220P50N2
C85
C85
C220P50N2
C220P50N2
CPU_GTLREF0 3
CPU_GTLREF1 3
VTT_OUT_LEFT
V_FSB_VTT
R160 115R1%/2R160 115R1%/2
R120 115R1%/2R120 115R1%/2
R159
R159
200R1%/2
200R1%/2
R125
R125
200R1%/2
200R1%/2
C97
C97
C1U16Y3
C1U16Y3
R167 10R/2R167 10R/2
C74
C74
C1U16Y3
C1U16Y3
C104
C104
C220P50N2
C220P50N2
C112
C112
C220P50N2
C220P50N2
CPU_GTLREF2 3
CPU_GTLREF3 3
VTT_PWRGOOD
PLACE AT CPU END OF ROUTE
A A
VTT_OUT_RIGHT3,5
VTT_OUT_LEFT3
VTT_OUT_RIGHT
VTT_OUT_LEFT
5
R102 130R1%/2R102 130R1%/2
R132 62R/2R132 62R/2
R80 62R/2R80 62R/2
R149 X_100R/2R149 X_100R/2
R164 62R/2R164 62R/2
H_PROCHOT#
H_IERR#
H_CPURST#
H_PWRGD
H_BR#0
H_PROCHOT# 3
H_IERR# 3
H_CPURST# 3,6
H_PWRGD 3,11
H_BR#0 3,6
4
VID_GD#25,27
3
3VSB
R87
R87
X_1KR1%/2
X_1KR1%/2
R105
R105
1KR1%/2
1KR1%/2
VTT_OUT_RIGHT
*PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
*TRACE WIDTH TO CAPS MUST BE NO SMALLER THAN 12MILS
V_FSB_VTT
L1 X_L10U_100mA_0805L1 X_L10U_100mA_0805
C160
C160
C156
C156
C1U16Y3
C1U16Y3
C10U10Y5
CP3
CP3
X_COPPER
X_COPPER
R119
R119
680R/2
680R/2
CE
Q18
Q18
B
2N3904
2N3904
1.2V VTT_PWRGOOD
VTT_PWG
2
C10U10Y5
VTT_PWG SPEC :
High > 0.9V
Low < 0.3V
Trise < 150ns
V_1P5_ICH
CP10
H_VCCA
C152
C152
X_C10U10Y5
X_C10U10Y5
H_VSSA
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Date:
Date:
CP10
H_VCCPLL
X_COPPER
X_COPPER
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
LGA775 - Power
LGA775 - Power
LGA775 - Power
Thursday, July 05, 2007
Thursday, July 05, 2007
Thursday, July 05, 2007
C167
C167
X_C1U16Y3
X_C1U16Y3
MS-7502
MS-7502
MS-7502
1
C173
C173
C10000P25X2
C10000P25X2
Sheet of
Sheet of
Sheet of
433
433
433
C177
C177
C10U10Y5
C10U10Y5
0A
0A
0A
U7C
U7C
5
Y2
V6
V3
V30
V29
V28
V27
V26
V25
V24
W4
V23
R30
R29
R28
R27
R26
T3
U7
R25
R5
4
P4
R24
R23
P30
P29
P28
P27
P26
P25
P24
R2
P23
L30
L29
L28
N3
M1
L27
L6
L3
K2
K5
L26
J7
L25
L24
L23
H8
H9
3
H10
H11
H12
H13
H14
H17
H18
H19
H20
H21
H22
H23
H24
H25
H26
H27
H28
H3
H6
H7
F7
2
1
D D
C C
B B
AA23
AA24
AA25
AA26
AA27
AA28
AA29
AA30
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AC3
AC6
AC7
AD4
AD7
AE10
AE13
AE16
AE17
AE20
AE24
AE25
AE26
AE27
AE28
AE29
AE30
AF10
AF13
AF16
AF17
AF20
AF23
AF24
AF25
AF26
AF27
AF28
AF29
AF30
A12
A15
A18
A2
A21
A6
A9
AA3
AA6
AA7
AB1
AB7
AE2
AE5
AE7
AF3
AF6
AF7
VSS#A12
VSS#A15
VSS#A18
VSS#A2
VSS#A21
VSS#A6
VSS#A9
VSS#AA23
VSS#AA24
VSS#AA25
VSS#AA26
VSS#AA27
VSS#AA28
VSS#AA29
VSS#AA3
VSS#AA30
VSS#AA6
VSS#AA7
VSS#AB1
VSS#AB23
VSS#AB24
VSS#AB25
VSS#AB26
VSS#AB27
VSS#AB28
VSS#AB29
VSS#AB30
VSS#AB7
VSS#AC3
VSS#AC6
VSS#AC7
VSS#AD4
VSS#AD7
VSS#AE10
VSS#AE13
VSS#AE16
VSS#AE17
VSS#AE2
VSS#AE20
VSS#AE24
VSS#AE25
VSS#AE26
VSS#AE27
VSS#AE28
VSS#AE29
VSS#AE30
VSS#AE5
VSS#AE7
VSS#AF10
VSS#AF13
VSS#AF16
VSS#AF17
VSS#AF20
VSS#AF23
VSS#AF24
VSS#AF25
VSS#AF26
VSS#AF27
VSS#AF28
VSS#AF29
VSS#AF3
VSS#AF30
VSS#AF6
VSS#AF7
VSS#Y7Y7VSS#Y5Y5VSS#Y2
VSS#W7W7VSS#W4
VSS#AG10
VSS#AG13
VSS#AG16
AG10
AG13
AG16
AG17
VSS#V7V7VSS#V6
VSS#AG17
VSS#AG20
VSS#AG23
AG20
AG23
AG24
VSS#V3
VSS#V30
VSS#V29
VSS#AG24
VSS#AG7
VSS#AH1
AH1
AG7
AH10
VSS#V28
VSS#AH10
VSS#V27
VSS#V26
VSS#AH13
VSS#AH16
AH13
AH16
AH17
VSS#V25
VSS#V24
VSS#V23
VSS#AH17
VSS#AH20
VSS#AH23
AH20
AH23
AH24
VSS#T7T7VSS#T6T6VSS#T3
VSS#U7
VSS#AH24
VSS#AH3
VSS#AH6
AH3
AH6
AH7
VSS#R7R7VSS#R5
VSS#AH7
VSS#AJ10
VSS#AJ13
AJ10
AJ13
VSS#R30
VSS#R29
VSS#AJ16
VSS#AJ17
AJ16
AJ17
AJ20
VSS#R28
VSS#R27
VSS#R26
VSS#AJ20
VSS#AJ23
VSS#AJ24
AJ23
AJ24
AJ27
VSS#R25
VSS#R24
VSS#R23
VSS#AJ27
VSS#AJ28
VSS#AJ29
AJ28
AJ29
AJ30
VSS#P7P7VSS#P4
VSS#R2
VSS#AJ30
VSS#AJ4
VSS#AJ7
AJ4
AJ7
AK10
VSS#P30
VSS#P29
VSS#P28
VSS#AK10
VSS#AK13
VSS#AK16
AK13
AK16
AK17
VSS#P27
VSS#P26
VSS#P25
VSS#AK17
VSS#AK2
VSS#AK20
AK2
AK20
AK23
VSS#P24
VSS#AK23
VSS#N7N7VSS#N6N6VSS#N3
VSS#P23
VSS#AK24
VSS#AK27
AK24
AK27
AK28
VSS#M7M7VSS#M1
VSS#AK28
VSS#AK29
VSS#AK30
AK5
AK29
AK30
VSS#L7L7VSS#L6
VSS#AK5
VSS#AK7
VSS#AL10
AK7
AL10
VSS#L3
VSS#L30
VSS#AL13
VSS#AL16
AL13
AL16
AL17
VSS#L29
VSS#L28
VSS#L27
VSS#AL17
VSS#AL20
VSS#AL23
AL20
AL23
AL24
VSS#L26
VSS#L25
VSS#AL24
VSS#AL27
AL27
VSS#L24
VSS#L23
VSS#AL28
VSS#AL7
AL7
AM1
AL28
VSS#K2
VSS#K7K7VSS#K5
VSS#AM1
VSS#AM10
VSS#AM13
AM10
AM13
AM16
VSS#J4J4VSS#J7
VSS#H9
VSS#AM16
VSS#AM17
VSS#AM20
AM17
AM20
AM23
VSS#H6
VSS#H7
VSS#H8
VSS#AM23
VSS#AM24
VSS#AM27
AM24
AM27
AM28
VSS#H3
VSS#H27
VSS#H28
VSS#AM28
VSS#AM4
VSS#AN1
AN1
AM4
AN10
VSS#H24
VSS#H25
VSS#H26
VSS#AN10
VSS#AN13
VSS#AN16
AN13
AN16
AN17
VSS#H21
VSS#H22
VSS#H23
VSS#AN17
VSS#AN2
VSS#AN20
AN2
AN20
AN23
VSS#H18
VSS#H19
VSS#H20
VSS#AN23
VSS#AN24
VSS#AN27
AN24
AN27
AN28
VSS#H13
VSS#H14
VSS#H17
VSS#AN28
VSS#B1B1VSS#B11
B11
B14
VSS#F7
VSS#H10
VSS#H11
VSS#H12
RSVD/COMP8
RSVD#AE4
RSVD#D1
RSVD#D14
RSVD#E5
RSVD#E6
RSVD#E7
RSVD#E23
RSVD#F23
RSVD#J3
RSVD#N4
RSVD#P5
RSVD#AC4
IMPSEL#
VSS#F22
VSS#F19
VSS#F16
VSS#F13
VSS#F10
VSS#E28
VSS#E27
VSS#E26
VSS#E25
VSS#E20
VSS#E17
VSS#E14
VSS#E11
VSS#D24
VSS#D21
VSS#D18
VSS#D15
VSS#D12
VSS#C24
VSS#C22
VSS#C19
VSS#C16
VSS#C13
VSS#C10
VSS#B14
VSS#B17
VSS#B20
VSS#B24
B17
B20
B24
COMP6
COMP7
RSVD
MSID1
MSID0
FC28
FC27
FC26
FC23
VSS#F4
VSS#E8
VSS#E2
VSS#D9
VSS#D6
VSS#D5
VSS#D3
VSS#C7
VSS#C4
VSS#B8
VSS#B5
ZIF-SOCK775-GF
ZIF-SOCK775-GF
Y3
AE3
B13
AE4
D1
D14
E5
E6
E7
E23
F23
AL3
J3
N4
P5
AC4
F6
V1
W1
U1
G1
E29
A24
F4
F22
F19
F16
F13
F10
E8
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C7
C4
C24
C22
C19
C16
C13
C10
B8
B5
H_COMP6
H_COMP7
H_COMP8
X_TP
X_TP
T14
T14
X_TP
X_TP
T16
T16
X_TP
X_TP
T13
T13
X_TPT5X_TP
T5
R156 51R/2R156 51R/2
R140 51R/2R140 51R/2
R137 51R/2R137 51R/2
R166 0R/2R166 0R/2
R165 0R/2R165 0R/2
X_TP
X_TP
T15
T15
R182 X_1KR/2R182 X_1KR/2
R135 49.9R1%/2R135 49.9R1%/2
R124 49.9R1%/2R124 49.9R1%/2
R186 24.9R1%/2R186 24.9R1%/2
H_TESTHI12
H_BPM#0
VTT_OUT_RIGHT 3,4
H_TESTHI12 3
H_BPM#0 3
Kentsfield
A A
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7502
MS-7502
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Thursday, July 05, 2007
Date:
Thursday, July 05, 2007
Date:
5
4
3
2
Thursday, July 05, 2007
MS-7502
LGA775 - GND
LGA775 - GND
LGA775 - GND
1
Sheet of
Sheet of
Sheet of
533
533
533
0A
0A
0A
5
U1MCH
U1MCH
U12B
U12B
J42
FSB_AB_3
L39
FSB_AB_4
J40
FSB_AB_5
L37
FSB_AB_6
L36
FSB_AB_7
K42
FSB_AB_8
N32
FSB_AB_9
N34
FSB_AB_10
M38
FSB_AB_11
N37
FSB_AB_12
M36
FSB_AB_13
R34
FSB_AB_14
N35
FSB_AB_15
N38
FSB_AB_16
U37
FSB_AB_17
N39
FSB_AB_18
R37
FSB_AB_19
P42
FSB_AB_20
R39
FSB_AB_21
V36
FSB_AB_22
R38
FSB_AB_23
U36
FSB_AB_24
U33
FSB_AB_25
R35
FSB_AB_26
V33
FSB_AB_27
V35
FSB_AB_28
Y34
FSB_AB_29
V42
FSB_AB_30
V38
FSB_AB_31
Y36
FSB_AB_32
Y38
FSB_AB_33
Y39
FSB_AB_34
AA37
FSB_AB_35
F40
FSB_REQB_0
L35
FSB_REQB_1
L38
FSB_REQB_2
G43
FSB_REQB_3
J37
FSB_REQB_4
M34
FSB_ADSTBB_0
U34
FSB_ADSTBB_1
M42
FSB_DSTBPB_0
M43
FSB_DSTBNB_0
G35
FSB_DSTBPB_1
H33
FSB_DSTBNB_1
G27
FSB_DSTBPB_2
H27
FSB_DSTBNB_2
B38
FSB_DSTBPB_3
C38
FSB_DSTBNB_3
M40
FSB_DINVB_0
J33
FSB_DINVB_1
G29
FSB_DINVB_2
E33
FSB_DINVB_3
W40
FSB_ADSB
Y40
FSB_TRDYB
W41
FSB_DRDYB
T43
FSB_DEFERB
Y43
FSB_HITMB
U42
FSB_HITB
V41
FSB_LOCKB
AA42
FSB_BREQ0B
W42
FSB_BNRB
G39
FSB_BPRIB
U40
FSB_DBSYB
U41
FSB_RSB_0
AA41
FSB_RSB_1
U39
FSB_RSB_2
C31
FSB_CPURSTB
1 OF 7
1 OF 7
P35
P35
*GTLREF VOLTAGE SHOULD BE
0.67*VTT=0.8V (At VTT=1.2V)
V_FSB_VTT
R215
R215
100R1%/2
100R1%/2
R222
R222
200R1%/2
200R1%/2
FSB_DB_0
FSB_DB_1
FSB_DB_2
FSB_DB_3
FSB_DB_4
FSB_DB_5
FSB_DB_6
FSB_DB_7
FSB_DB_8
FSB_DB_9
FSB_DB_10
FSB_DB_11
FSB_DB_12
FSB_DB_13
FSB_DB_14
FSB
FSB
FSB_DB_15
FSB_DB_16
FSB_DB_17
FSB_DB_18
FSB_DB_19
FSB_DB_20
FSB_DB_21
FSB_DB_22
FSB_DB_23
FSB_DB_24
FSB_DB_25
FSB_DB_26
FSB_DB_27
FSB_DB_28
FSB_DB_29
FSB_DB_30
FSB_DB_31
FSB_DB_32
FSB_DB_33
FSB_DB_34
FSB_DB_35
FSB_DB_36
FSB_DB_37
FSB_DB_38
FSB_DB_39
FSB_DB_40
FSB_DB_41
FSB_DB_42
FSB_DB_43
FSB_DB_44
FSB_DB_45
FSB_DB_46
FSB_DB_47
FSB_DB_48
FSB_DB_49
FSB_DB_50
FSB_DB_51
FSB_DB_52
FSB_DB_53
FSB_DB_54
FSB_DB_55
FSB_DB_56
FSB_DB_57
FSB_DB_58
FSB_DB_59
FSB_DB_60
FSB_DB_61
FSB_DB_62
FSB_DB_63
FSB_SWING
FSB_RCOMP
FSB_SCOMP
FSB_SCOMPB
FSB_DVREF
FSB_ACCVREF
HPL_CLKINP
HPL_CLKINN
CPU_MCH_GTLREF
R228
R228
51R0402
51R0402
C244
C244
C1U16Y3
C1U16Y3
R40
P41
R41
N40
R42
M39
N41
N42
L41
J39
L42
J41
K41
G40
F41
F42
C42
D41
F38
G37
E42
E39
E37
C39
B39
G33
A37
F33
E35
K32
H32
B34
J31
F32
M31
E31
K31
G31
K29
F31
J29
F29
L27
K27
H26
L26
J26
M26
C33
D35
E41
B41
D42
C40
C35
B40
D38
D37
B33
D33
C34
B35
A32
D32
B25
D23
C25
D25
D24
B24
R32
U32
MCH_GTLREF
C242
C242
C220P50N2
C220P50N2
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
CK_H_MCH_DP
CK_H_MCH_DN
CPU_MCH_GTLREF 3
H_ADS#3
H_HITM#3
H_HIT#3
H_BR#03,4
H_BNR#3
H_BPRI#3
C233
C233
X_C2.7P25N2
X_C2.7P25N2
HXSCOMPB
C228
C228
X_C2.7P25N2
X_C2.7P25N2
HXRCOMP
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_RS#0
H_RS#1
H_RS#2
H_A#[3..35]3 H_D#[0..63] 3
D D
H_REQ#[0..4]3
C C
B B
V_FSB_VTT HXSCOMP
V_FSB_VTT
H_ADSTB#03
H_ADSTB#13
H_DSTBP#03
H_DSTBN#03
H_DSTBP#13
H_DSTBN#13
H_DSTBP#23
H_DSTBN#23
H_DSTBP#33
H_DSTBN#33
H_DBI#[0..3]3
H_TRDY#3
H_DRDY#3
H_DEFER#3
H_LOCK#3
H_DBSY#3
H_RS#[0..2]3
H_CPURST#3,4
R216
R216
49.9R1%/2
49.9R1%/2
R212
R212
49.9R1%/2
49.9R1%/2
R231
R231
16.5R1%/2
16.5R1%/2
HXSWING SHOULD BE 1/4*VTT
V_FSB_VTT
A A
R206
R206
300R1%/2
300R1%/2
R211
R211
100R1%/2
100R1%/2
V_FSB_VTT
R220
R220
49.9R1%/2
49.9R1%/2
C238
C238
C10000P25X2
C10000P25X2
HXSWING
5
4
HXSWING
HXRCOMP
HXSCOMP
HXSCOMPB
MCH_GTLREF
CK_H_MCH_DP 15
CK_H_MCH_DN 15
EXP16_PRSNT#20
Really need or just reserve the invert?
PIN H L
EXP_SLR
EXP_EN
MCH_TCEN
DDR2MTYPE
Normal
Concurrent
Enable
4
DDR3
Reverse
Non-concurrent
Disable
V_1P25_CL_MCH
X_470/4/8P4R
X_470/4/8P4R
MCH_BSEL015,16
MCH_BSEL115,16
MCH_BSEL215,16
EXP16_PRSNT#
Description
MEMORY TYPE
PCI_E Lane Reversal
PCI_E/SDVO co-existence
TLS confidentiality
CL_VREF_MCH = 0.349V
Close to GMCH
R258
R258
1KR1%/2
1KR1%/2
CL_VREF_MCH
R261
R261
C291
C291
392R1%/2
392R1%/2
C0.1U16Y2
C0.1U16Y2
CK_PE_100M_MCH_DP15
CK_PE_100M_MCH_DN15
V_FSB_VTT
135
RN30
RN30
246
R242 X_1KR1%/2R242 X_1KR1%/2
R243 X_1KR/2R243 X_1KR/2
R244 0R/2R244 0R/2
R245 X_1KR/2R245 X_1KR/2
R241 X_1KR/2R241 X_1KR/2
3
U1MCH
U12A
F13
PEG_RXP_0
E13
PEG_RXN_0
K15
PEG_RXP_1
J15
PEG_RXN_1
F12
PEG_RXP_2
E12
PEG_RXN_2
J12
PEG_RXP_3
H12
PEG_RXN_3
J11
PEG_RXP_4
H11
PEG_RXN_4
F7
PEG_RXP_5
E7
PEG_RXN_5
E5
PEG_RXP_6
F6
PEG_RXN_6
C2
PEG_RXP_7
D2
PEG_RXN_7
G6
PEG_RXP_8
G5
PEG_RXN_8
L9
PEG_RXP_9
L8
PEG_RXN_9
M8
PEG_RXP_10
M9
PEG_RXN_10
M4
PEG_RXP_11
L4
PEG_RXN_11
M5
PEG_RXP_12
M6
PEG_RXN_12
R9
PEG_RXP_13
R10
PEG_RXN_13
T4
PEG_RXP_14
R4
PEG_RXN_14
R6
PEG_RXP_15
R7
PEG_RXN_15
W2
DMI_RXP_0
V1
DMI_RXN_0
Y8
DMI_RXP_1
Y9
DMI_RXN_1
AA7
DMI_RXP_2
AA6
DMI_RXN_2
AB3
DMI_RXP_3
AA4
DMI_RXN_3
B12
EXP_CLKINP
B13
EXP_CLKINN
G17
SDVO_CTRLDATA
E17
SDVO_CTRLCLK
BSEL0
BSEL1
BSEL2
ALLZTEST
XORTEST
MTYPE
EXP_SLR
RESERVED_12
EXP_EN
RFU_G15
RESERVED_14
TCEN
RESERVED_16
RESERVED_17
RESERVED_18
RESERVED_19
RESERVED_20
RESERVED_21
CL_DATA
CL_CLK
CL_VREF
CL_RSTB
CL_PWROK
RESERVED_22
RESERVED_23
RESERVED_24
RESERVED_25
RESERVED_V31
RESERVED_26
RESERVED_27
RESERVED_28
RESERVED_29
U12A
P35
P35
U12E
U12E
P35
P35
CK_PE_100M_MCH_DP
CK_PE_100M_MCH_DN
SDVO_CTRL_DATA
SDVO_CTRL_CLK
2
MCH_BS0
4
MCH_BS1
6
MCH_BS2
8
T18X_TP T18X_TP
T20X_TP T20X_TP
T24X_TP T24X_TP
T23X_TP T23X_TP
T19X_TP T19X_TP
T27X_TP T27X_TP
T26X_TP T26X_TP
T25X_TP T25X_TP
T22X_TP T22X_TP
T21X_TP T21X_TP
CLINK_DATA
CLINK_CLK
CL_VREF_MCH
CLINK_RST
CLINK_PWOK
T17
T17
EXP_A_RXP_0
EXP_A_RXN_0
EXP_A_RXP_1
EXP_A_RXN_1
EXP_A_RXP_2
EXP_A_RXN_2
EXP_A_RXP_3
EXP_A_RXN_3
EXP_A_RXP_4
EXP_A_RXN_4
EXP_A_RXP_5
EXP_A_RXN_5
EXP_A_RXP_6
EXP_A_RXN_6
EXP_A_RXP_7
EXP_A_RXN_7
EXP_A_RXP_8
EXP_A_RXN_8
EXP_A_RXP_9
EXP_A_RXN_9
EXP_A_RXP_10
EXP_A_RXN_10
EXP_A_RXP_11
EXP_A_RXN_11
EXP_A_RXP_12
EXP_A_RXN_12
EXP_A_RXP_13
EXP_A_RXN_13
EXP_A_RXP_14
EXP_A_RXN_14
EXP_A_RXP_15
EXP_A_RXN_15
DMI_ITP_MRP_0
DMI_ITN_MRN_0
DMI_ITP_MRP_1
DMI_ITN_MRN_1
DMI_ITP_MRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3
G20
J20
J18
K20
F20
G18
E18
K17
J17
G15
L17
E20
N18
N15
N17
L15
L18
M18
AD12
AD13
AM5
AA12
AM15
AA10
AA9
AA11
Y12
V31
U30
U31
R29
R30
EXP_A_RXP_020
EXP_A_RXN_020
EXP_A_RXP_120
EXP_A_RXN_120
EXP_A_RXP_220
EXP_A_RXN_220
EXP_A_RXP_320
EXP_A_RXN_320
EXP_A_RXP_420
EXP_A_RXN_420
EXP_A_RXP_520
EXP_A_RXN_520
EXP_A_RXP_620
EXP_A_RXN_620
EXP_A_RXP_720
EXP_A_RXN_720
EXP_A_RXP_820
EXP_A_RXN_820
EXP_A_RXP_920
EXP_A_RXN_920
EXP_A_RXP_1020
EXP_A_RXN_1020
EXP_A_RXP_1120
EXP_A_RXN_1120
EXP_A_RXP_1220
EXP_A_RXN_1220
EXP_A_RXP_1320
EXP_A_RXN_1320
EXP_A_RXP_1420
EXP_A_RXN_1420
EXP_A_RXP_1520
EXP_A_RXN_1520
DMI_ITP_MRP_010
DMI_ITN_MRN_010
DMI_ITP_MRP_110
DMI_ITN_MRN_110
DMI_ITP_MRP_210
DMI_ITN_MRN_210
DMI_ITP_MRP_310
DMI_ITN_MRN_310
SDVO_CTRL_DATA20
SDVO_CTRL_CLK20
7
8
RN31
RN31
8P4R-10KR/2
8P4R-10KR/2
1
3
5
7
MTYPE
EXP_SLR
EXP_EN
MCH_RFU_G15
MCH_TCEN
CLINK_DATA11
CLINK_CLK11
CLINK_RST11
CLINK_PWOK11
X_TP
X_TP
3
U1MCH
PCIE
PCIE
DMI
DMI
CRT_HSYNC
CRT_VSYNC
CRT_RED
CRT_GREEN
CRT_BLUE
CRT_REDB
CRT_GREENB
CRT_BLUEB
CRT_DDC_DATA
CRT_DDC_CLK
CRT_IREF
DPL_REFCLKINP
DPL_REFCLKINN
RESERVED_34
RESERVED_35
RESERVED_36
RSTINB
PWROK
ICH_SYNCB
RESERVED_37
MISC VGA
MISC VGA
RESERVED_33
RESERVED_32
RESERVED_31
RESERVED_30
5 OF 7
5 OF 7
VCC
VSS
PEG_TXP_0
PEG_TXN_0
PEG_TXP_1
PEG_TXN_1
PEG_TXP_2
PEG_TXN_2
PEG_TXP_3
PEG_TXN_3
PEG_TXP_4
PEG_TXN_4
PEG_TXP_5
PEG_TXN_5
PEG_TXP_6
PEG_TXN_6
PEG_TXP_7
PEG_TXN_7
PEG_TXP_8
PEG_TXN_8
PEG_TXP_9
PEG_TXN_9
PEG_TXP_10
PEG_TXN_10
PEG_TXP_11
PEG_TXN_11
PEG_TXP_12
PEG_TXN_12
PEG_TXP_13
PEG_TXN_13
PEG_TXP_14
PEG_TXN_14
PEG_TXP_15
PEG_TXN_15
DMI_TXP_0
DMI_TXN_0
DMI_TXP_1
DMI_TXN_1
DMI_TXP_2
DMI_TXN_2
DMI_TXP_3
DMI_TXN_3
EXP_COMPO
EXP_COMPI
2 OF 7
2 OF 7
C15
E15
B18
C19
B20
C18
D19
D20
L13
M13
A20
C14
D13
L12
M11
H18
F17
A14
AM18
AM17
J13
A42
NC
R20
R13
R12
U11
U12
2
D11
D12
B11
A10
C10
D9
B9
B7
D7
D6
B5
B6
B3
B4
F2
E2
F4
G4
J4
K3
L2
K1
N2
M2
P3
N4
R2
P1
U2
T2
V3
U4
V7
V6
W4
Y4
AC8
AC9
Y2
AA2
AC11
AC12
R238 10KR/2R238 10KR/2
CHIP_PWGD
2
EXP_A_TXP_0
EXP_A_TXN_0
EXP_A_TXP_1
EXP_A_TXN_1
EXP_A_TXP_2
EXP_A_TXN_2
EXP_A_TXP_3
EXP_A_TXN_3
EXP_A_TXP_4
EXP_A_TXN_4
EXP_A_TXP_5
EXP_A_TXN_5
EXP_A_TXP_6
EXP_A_TXN_6
EXP_A_TXP_7
EXP_A_TXN_7
EXP_A_TXP_8
EXP_A_TXN_8
EXP_A_TXP_9
EXP_A_TXN_9
EXP_A_TXP_10
EXP_A_TXN_10
EXP_A_TXP_11
EXP_A_TXN_11
EXP_A_TXP_12
EXP_A_TXN_12
EXP_A_TXP_13
EXP_A_TXN_13
EXP_A_TXP_14
EXP_A_TXN_14
EXP_A_TXP_15
EXP_A_TXN_15
DMI_MTP_IRP_0
DMI_MTN_IRN_0
DMI_MTP_IRP_1
DMI_MTN_IRN_1
DMI_MTP_IRP_2
DMI_MTN_IRN_2
DMI_MTP_IRP_3
DMI_MTN_IRN_3
GRCOMP
R237 2.2KR/2R237 2.2KR/2
R236 2.2KR/2R236 2.2KR/2
R246 24.9R1%/2R246 24.9R1%/2
may instead with V_1P25_PCIE?
VCC3
V_1P25_CORE
PLTRST# 11,16
CHIP_PWGD 11,25
ICH_SYNC# 11
1
EXP_A_TXP_0 20
EXP_A_TXN_0 20
EXP_A_TXP_1 20
EXP_A_TXN_1 20
EXP_A_TXP_2 20
EXP_A_TXN_2 20
EXP_A_TXP_3 20
EXP_A_TXN_3 20
EXP_A_TXP_4 20
EXP_A_TXN_4 20
EXP_A_TXP_5 20
EXP_A_TXN_5 20
EXP_A_TXP_6 20
EXP_A_TXN_6 20
EXP_A_TXP_7 20
EXP_A_TXN_7 20
EXP_A_TXP_8 20
EXP_A_TXN_8 20
EXP_A_TXP_9 20
EXP_A_TXN_9 20
EXP_A_TXP_10 20
EXP_A_TXN_10 20
EXP_A_TXP_11 20
EXP_A_TXN_11 20
EXP_A_TXP_12 20
EXP_A_TXN_12 20
EXP_A_TXP_13 20
EXP_A_TXN_13 20
EXP_A_TXP_14 20
EXP_A_TXN_14 20
EXP_A_TXP_15 20
EXP_A_TXN_15 20
DMI_MTP_IRP_0 10
DMI_MTN_IRN_0 10
DMI_MTP_IRP_1 10
DMI_MTN_IRN_1 10
DMI_MTP_IRP_2 10
DMI_MTN_IRN_2 10
DMI_MTP_IRP_3 10
DMI_MTN_IRN_3 10
V_1P25_CORE
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7502
MS-7502
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Thursday, July 05, 2007
Date:
Thursday, July 05, 2007
Date:
Thursday, July 05, 2007
MS-7502
Bearlake - FSB, PCIE, DMI, VGA, MSIC
Bearlake - FSB, PCIE, DMI, VGA, MSIC
Bearlake - FSB, PCIE, DMI, VGA, MSIC
1
Sheet of
Sheet of
Sheet of
633
633
633
0A
0A
0A
5
U1MCH
NC
NC
P35
P35
U1MCH
3 OF 7
3 OF 7
U12C
U12C
MAA_A0
MAA_A[0..14]13,14
D D
WE_A#13,14
CAS_A#13,14
RAS_A#13,14
SBS_A[0..2]13,14
SCS_A#013,14
SCS_A#113,14
SCS_A#213,14
SCS_A#313,14
SCKE_A013,14
SCKE_A113,14
SCKE_A213,14
SCKE_A313,14
ODT_A013,14
ODT_A113,14
ODT_A213,14
C C
B B
ODT_A313,14
P_DDR0_A13
N_DDR0_A13
P_DDR1_A13
N_DDR1_A13
P_DDR2_A13
N_DDR2_A13
P_DDR3_A13
N_DDR3_A13
P_DDR4_A13
N_DDR4_A13
P_DDR5_A13
N_DDR5_A13
T3X_TP T3X_TP
R247 0R/2R247 0R/2
T2X_TP T2X_TP
T4X_TP T4X_TP
T1X_TP T1X_TP
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13
MAA_A14
WE_A#
CAS_A#
RAS_A#
SBS_A0
SBS_A1
SBS_A2
SCS_A#0
SCS_A#1
SCS_A#2
SCS_A#3
SCKE_A0
SCKE_A1
SCKE_A2
SCKE_A3
ODT_A0
ODT_A1
ODT_A2
ODT_A3
P_DDR0_A
N_DDR0_A
P_DDR1_A
N_DDR1_A
P_DDR2_A
N_DDR2_A
P_DDR3_A
N_DDR3_A
P_DDR4_A
N_DDR4_A
P_DDR5_A
N_DDR5_A
BB30
DDR_A_MA_0
AY25
DDR_A_MA_1
BA23
DDR_A_MA_2
BB23
DDR_A_MA_3
AY23
DDR_A_MA_4
BB22
DDR_A_MA_5
BA22
DDR_A_MA_6
BB21
DDR_A_MA_7
AW21
DDR_A_MA_8
BA21
DDR_A_MA_9
BB31
DDR_A_MA_10
AY21
DDR_A_MA_11
BC20
DDR_A_MA_12
AY38
DDR_A_MA_13
BA19
DDR_A_MA_14
BA33
DDR_A_WEB
AW35
DDR_A_CASB
AY33
DDR_A_RASB
BA31
DDR_A_BS_0
AY31
DDR_A_BS_1
AY20
DDR_A_BS_2
BA34
DDR_A_CSB_0
AY35
DDR_A_CSB_1
BB33
DDR_A_CSB_2
BB38
DDR_A_CSB_3
AY19
DDR_A_CKE_0
AW18
DDR_A_CKE_1
BB19
DDR_A_CKE_2
BA18
DDR_A_CKE_3
BB35
DDR_A_ODT_0
BA38
DDR_A_ODT_1
BA35
DDR_A_ODT_2
BA39
DDR_A_ODT_3
AR31
DDR_A_CK_0
AU31
DDR_A_CKB_0
AP27
DDR_A_CK_1
AN27
DDR_A_CKB_1
AV33
DDR_A_CK_2
AW33
DDR_A_CKB_2
AP29
DDR_A_CK_3
AP31
DDR_A_CKB_3
AM26
DDR_A_CK_4
AM27
DDR_A_CKB_4
AT33
DDR_A_CK_5
AU33
DDR_A_CKB_5
BC16
DDR3_DRAMRSTB
AN15
DDR3_DRAM_PWROK
AY37
DDR3_A_CSB1
BB29
DDR3_A_MA0
BB34
DDR3_A_WEB
AW32
DDR3_B_ODT3
BC43
TEST3
BC1
TEST1
A43
TEST0
AN21
RESERVED_1
N20
NC_1
B2
NC_2
B42
NC_3
B43
NC_4
BB1
NC_5
BB2
NC_6
BB43
NC_7
BC2
NC_8
BC42
NC_9
DDR_A
DDR_A
DDR_A_DQS_0
DDR_A_DQSB_0
DDR_A_DQS_1
DDR_A_DQSB_1
DDR_A_DQS_2
DDR_A_DQSB_2
DDR_A_DQS_3
DDR_A_DQSB_3
DDR_A_DQS_4
DDR_A_DQSB_4
DDR_A_DQS_5
DDR_A_DQSB_5
DDR_A_DQS_6
DDR_A_DQSB_6
DDR_A_DQS_7
DDR_A_DQSB_7
DDR_A_DQ_10
DDR_A_DQ_11
DDR_A_DQ_12
DDR_A_DQ_13
DDR_A_DQ_14
DDR_A_DQ_15
DDR_A_DQ_16
DDR_A_DQ_17
DDR_A_DQ_18
DDR_A_DQ_19
DDR_A_DQ_20
DDR_A_DQ_21
DDR_A_DQ_22
DDR_A_DQ_23
DDR_A_DQ_24
DDR_A_DQ_25
DDR_A_DQ_26
DDR_A_DQ_27
DDR_A_DQ_28
DDR_A_DQ_29
DDR_A_DQ_30
DDR_A_DQ_31
DDR_A_DQ_32
DDR_A_DQ_33
DDR_A_DQ_34
DDR_A_DQ_35
DDR_A_DQ_36
DDR_A_DQ_37
DDR_A_DQ_38
DDR_A_DQ_39
DDR_A_DQ_40
DDR_A_DQ_41
DDR_A_DQ_42
DDR_A_DQ_43
DDR3
DDR3
DDR_A_DQ_44
DDR_A_DQ_45
DDR_A_DQ_46
DDR_A_DQ_47
DDR_A_DQ_48
DDR_A_DQ_49
DDR_A_DQ_50
DDR_A_DQ_51
DDR_A_DQ_52
DDR_A_DQ_53
DDR_A_DQ_54
DDR_A_DQ_55
DDR_A_DQ_56
DDR_A_DQ_57
DDR_A_DQ_58
DDR_A_DQ_59
DDR_A_DQ_60
DDR_A_DQ_61
DDR_A_DQ_62
DDR_A_DQ_63
4
DDR_A_DM_0
DDR_A_DM_1
DDR_A_DM_2
DDR_A_DM_3
DDR_A_DM_4
DDR_A_DM_5
DDR_A_DM_6
DDR_A_DM_7
DDR_A_DQ_0
DDR_A_DQ_1
DDR_A_DQ_2
DDR_A_DQ_3
DDR_A_DQ_4
DDR_A_DQ_5
DDR_A_DQ_6
DDR_A_DQ_7
DDR_A_DQ_8
DDR_A_DQ_9
AP2
AP3
AW2
AW1
AY7
BA6
AT20
AU18
AR41
AR40
AL41
AL40
AG42
AG41
AC42
AC41
AN2
AW3
BB6
AN18
AU43
AM43
AG40
AC40
AM1
AN3
AR2
AR3
AL3
AM2
AR5
AR4
AV4
AV3
BA4
BB3
AU2
AU1
AY2
AY3
BB5
AY6
BA9
BB9
BA5
BB4
BC7
AY9
AT18
AR18
AU21
AT21
AP17
AN17
AP20
AV20
AV42
AU40
AP42
AN39
AV40
AV41
AR42
AP41
AN41
AM39
AK42
AK41
AN40
AN42
AL42
AL39
AJ40
AH43
AF39
AE40
AJ42
AJ41
AF41
AF42
AD40
AD43
AB41
AA40
AE42
AE41
AC39
AB42
DQS_A0
DQS_A#0
DQS_A1
DQS_A#1
DQS_A2
DQS_A#2
DQS_A3
DQS_A#3
DQS_A4
DQS_A#4
DQS_A5
DQS_A#5
DQS_A6
DQS_A#6
DQS_A7
DQS_A#7
DQM_A0
DQM_A1
DQM_A2
DQM_A3
DQM_A4
DQM_A5
DQM_A6
DQM_A7
DATA_A0
DATA_A1
DATA_A2
DATA_A3
DATA_A4
DATA_A5
DATA_A6
DATA_A7
DATA_A8
DATA_A9
DATA_A10
DATA_A11
DATA_A12
DATA_A13
DATA_A14
DATA_A15
DATA_A16
DATA_A17
DATA_A18
DATA_A19
DATA_A20
DATA_A21
DATA_A22
DATA_A23
DATA_A24
DATA_A25
DATA_A26
DATA_A27
DATA_A28
DATA_A29
DATA_A30
DATA_A31
DATA_A32
DATA_A33
DATA_A34
DATA_A35
DATA_A36
DATA_A37
DATA_A38
DATA_A39
DATA_A40
DATA_A41
DATA_A42
DATA_A43
DATA_A44
DATA_A45
DATA_A46
DATA_A47
DATA_A48
DATA_A49
DATA_A50
DATA_A51
DATA_A52
DATA_A53
DATA_A54
DATA_A55
DATA_A56
DATA_A57
DATA_A58
DATA_A59
DATA_A60
DATA_A61
DATA_A62
DATA_A63
DQS_A0 13
DQS_A#0 13
DQS_A1 13
DQS_A#1 13
DQS_A2 13
DQS_A#2 13
DQS_A3 13
DQS_A#3 13
DQS_A4 13
DQS_A#4 13
DQS_A5 13
DQS_A#5 13
DQS_A6 13
DQS_A#6 13
DQS_A7 13
DQS_A#7 13
DQM_A[0..7] 13
DATA_A[0..63] 13
VCC_DDR
3
R260 1KR1%/2R260 1KR1%/2
MAA_B[0..14]14
SBS_B[0..2]14
SCS_B#014
SCS_B#114
SCS_B#214
SCS_B#314
SCKE_B014
SCKE_B114
SCKE_B214
SCKE_B314
ODT_B014
ODT_B114
ODT_B214
ODT_B314
P_DDR0_B14
N_DDR0_B14
P_DDR1_B14
N_DDR1_B14
P_DDR2_B14
N_DDR2_B14
P_DDR3_B14
N_DDR3_B14
P_DDR4_B14
N_DDR4_B14
P_DDR5_B14
N_DDR5_B14
PLACE 0.1UF CAP
CLOSE TO MCH
R259
R259
1KR1%/2
1KR1%/2
WE_B#14
CAS_B#14
RAS_B#14
C287
C287
C0.1U16Y2
C0.1U16Y2
MAA_B0
MAA_B1
MAA_B2
MAA_B3
MAA_B4
MAA_B5
MAA_B6
MAA_B7
MAA_B8
MAA_B9
MAA_B10
MAA_B11
MAA_B12
MAA_B13
MAA_B14
WE_B#
CAS_B#
RAS_B#
SBS_B0
SBS_B1
SBS_B2
SCS_B#0
SCS_B#1
SCS_B#2
SCS_B#3
SCKE_B0
SCKE_B1
SCKE_B2
SCKE_B3
ODT_B0
ODT_B1
ODT_B2
ODT_B3
P_DDR0_B
N_DDR0_B
P_DDR1_B
N_DDR1_B
P_DDR2_B
N_DDR2_B
P_DDR3_B
N_DDR3_B
P_DDR4_B
N_DDR4_B
P_DDR5_B
N_DDR5_B
MCH_VREF_A
SRCOMP0
SRCOMP1
SRCOMP2
SRCOMP3
DDR_RCOMPVOL
DDR_RCOMPVOH
AW15
BB15
BA15
AY15
BA14
BB14
AW12
BA13
BB13
AY13
BA17
AY12
BA11
AY27
BB11
BB25
AW26
AY24
BB17
AY17
AY11
BA25
BA29
BA26
BA30
AW11
BC12
BA10
BB10
BB27
AW29
BA27
AY29
AW31
AV31
AU27
AT27
AV32
AT32
AR29
AU29
AV29
AW27
AN33
AP32
AM6
BB40
BA40
AM8
AM10
BA2
AW42
AN32
AM31
AG32
AF32
AP21
AA39
AM21
AL4
AL2
U12D
U12D
DDR_B_MA_0
DDR_B_MA_1
DDR_B_MA_2
DDR_B_MA_3
DDR_B_MA_4
DDR_B_MA_5
DDR_B_MA_6
DDR_B_MA_7
DDR_B_MA_8
DDR_B_MA_9
DDR_B_MA_10
DDR_B_MA_11
DDR_B_MA_12
DDR_B_MA_13
DDR_B_MA_14
DDR_B_WEB
DDR_B_CASB
DDR_B_RASB
DDR_B_BS_0
DDR_B_BS_1
DDR_B_BS_2
DDR_B_CSB_0
DDR_B_CSB_1
DDR_B_CSB_2
DDR_B_CSB_3
DDR_B_CKE_0
DDR_B_CKE_1
DDR_B_CKE_2
DDR_B_CKE_3
DDR_B_ODT_0
DDR_B_ODT_1
DDR_B_ODT_2
DDR_B_ODT_3
DDR_B_CK_0
DDR_B_CKB_0
DDR_B_CK_1
DDR_B_CKB_1
DDR_B_CK_2
DDR_B_CKB_2
DDR_B_CK_3
DDR_B_CKB_3
DDR_B_CK_4
DDR_B_CKB_4
DDR_B_CK_5
DDR_B_CKB_5
DDR_B
DDR_B
DDR_VREF
DDR_RCOMPXPD
DDR_RCOMPXPU
DDR_RCOMPYPD
DDR_RCOMPYPU
DDR_RCOMPVOL
DDR_RCOMPVOH
RESERVED_2
RESERVED_3
RESERVED_4
RESERVED_5
RESERVED_6
RESERVED_7
RESERVED_8
RESERVED_9
RESERVED_10
4 OF 7
4 OF 7
P35
P35
U1MCH
U1MCH
2
DDR_B_DQSB_0
DDR_B_DQSB_1
DDR_B_DQSB_2
DDR_B_DQSB_3
DDR_B_DQSB_4
DDR_B_DQSB_5
DDR_B_DQSB_6
DDR_B_DQSB_7
DDR_B_DQS_0
DDR_B_DQS_1
DDR_B_DQS_2
DDR_B_DQS_3
DDR_B_DQS_4
DDR_B_DQS_5
DDR_B_DQS_6
DDR_B_DQS_7
DDR_B_DM_0
DDR_B_DM_1
DDR_B_DM_2
DDR_B_DM_3
DDR_B_DM_4
DDR_B_DM_5
DDR_B_DM_6
DDR_B_DM_7
DDR_B_DQ_0
DDR_B_DQ_1
DDR_B_DQ_2
DDR_B_DQ_3
DDR_B_DQ_4
DDR_B_DQ_5
DDR_B_DQ_6
DDR_B_DQ_7
DDR_B_DQ_8
DDR_B_DQ_9
DDR_B_DQ_10
DDR_B_DQ_11
DDR_B_DQ_12
DDR_B_DQ_13
DDR_B_DQ_14
DDR_B_DQ_15
DDR_B_DQ_16
DDR_B_DQ_17
DDR_B_DQ_18
DDR_B_DQ_19
DDR_B_DQ_20
DDR_B_DQ_21
DDR_B_DQ_22
DDR_B_DQ_23
DDR_B_DQ_24
DDR_B_DQ_25
DDR_B_DQ_26
DDR_B_DQ_27
DDR_B_DQ_28
DDR_B_DQ_29
DDR_B_DQ_30
DDR_B_DQ_31
DDR_B_DQ_32
DDR_B_DQ_33
DDR_B_DQ_34
DDR_B_DQ_35
DDR_B_DQ_36
DDR_B_DQ_37
DDR_B_DQ_38
DDR_B_DQ_39
DDR_B_DQ_40
DDR_B_DQ_41
DDR_B_DQ_42
DDR_B_DQ_43
DDR_B_DQ_44
DDR_B_DQ_45
DDR_B_DQ_46
DDR_B_DQ_47
DDR_B_DQ_48
DDR_B_DQ_49
DDR_B_DQ_50
DDR_B_DQ_51
DDR_B_DQ_52
DDR_B_DQ_53
DDR_B_DQ_54
DDR_B_DQ_55
DDR_B_DQ_56
DDR_B_DQ_57
DDR_B_DQ_58
DDR_B_DQ_59
DDR_B_DQ_60
DDR_B_DQ_61
DDR_B_DQ_62
DDR_B_DQ_63
AV6
AU5
AR12
AP12
AP15
AR15
AT24
AU26
AW39
AU39
AL35
AL34
AG35
AG36
AC36
AC37
AR7
AW9
AW13
AP23
AU37
AM37
AG39
AD38
AN7
AN8
AW5
AW7
AN5
AN6
AN9
AU7
AT11
AU11
AP13
AR13
AR11
AU9
AV12
AU12
AU15
AV13
AU17
AT17
AU13
AM13
AV15
AW17
AV24
AT23
AT26
AP26
AU23
AW23
AR24
AN26
AW37
AV38
AN36
AN37
AU35
AR35
AN35
AR37
AM35
AM38
AJ34
AL38
AR39
AM34
AL37
AL32
AG38
AJ38
AF35
AF33
AJ37
AJ35
AG33
AF34
AD36
AC33
AA34
AA36
AD34
AF38
AC34
AA33
DQS_B0
DQS_B#0
DQS_B1
DQS_B#1
DQS_B2
DQS_B#2
DQS_B3
DQS_B#3
DQS_B4
DQS_B#4
DQS_B5
DQS_B#5
DQS_B6
DQS_B#6
DQS_B7
DQS_B#7
DQM_B0DQM_B0
DQM_B1DQM_B1
DQM_B2DQM_B2
DQM_B3DQM_B3
DQM_B4DQM_B4
DQM_B5DQM_B5
DQM_B6DQM_B6
DQM_B7DQM_B7
DATA_B0DATA_B0
DATA_B1DATA_B1
DATA_B2DATA_B2
DATA_B3DATA_B3
DATA_B4DATA_B4
DATA_B5DATA_B5
DATA_B6DATA_B6
DATA_B7DATA_B7
DATA_B8DATA_B8
DATA_B9DATA_B9
DATA_B10DATA_B10
DATA_B11DATA_B11
DATA_B12DATA_B12
DATA_B13DATA_B13
DATA_B14DATA_B14
DATA_B15DATA_B15
DATA_B16DATA_B16
DATA_B17DATA_B17
DATA_B18DATA_B18
DATA_B19DATA_B19
DATA_B20DATA_B20
DATA_B21DATA_B21
DATA_B22DATA_B22
DATA_B23DATA_B23
DATA_B24DATA_B24
DATA_B25DATA_B25
DATA_B26DATA_B26
DATA_B27DATA_B27
DATA_B28DATA_B28
DATA_B29DATA_B29
DATA_B30DATA_B30
DATA_B31DATA_B31
DATA_B32DATA_B32
DATA_B33DATA_B33
DATA_B34DATA_B34
DATA_B35DATA_B35
DATA_B36DATA_B36
DATA_B37DATA_B37
DATA_B38DATA_B38
DATA_B39DATA_B39
DATA_B40DATA_B40
DATA_B41DATA_B41
DATA_B42DATA_B42
DATA_B43DATA_B43
DATA_B44DATA_B44
DATA_B45DATA_B45
DATA_B46DATA_B46
DATA_B47DATA_B47
DATA_B48DATA_B48
DATA_B49DATA_B49
DATA_B50DATA_B50
DATA_B51DATA_B51
DATA_B52DATA_B52
DATA_B53DATA_B53
DATA_B54DATA_B54
DATA_B55DATA_B55
DATA_B56DATA_B56
DATA_B57DATA_B57
DATA_B58DATA_B58
DATA_B59DATA_B59
DATA_B60DATA_B60
DATA_B61DATA_B61
DATA_B62DATA_B62
DATA_B63DATA_B63
DQS_B0 14
DQS_B#0 14
DQS_B1 14
DQS_B#1 14
DQS_B2 14
DQS_B#2 14
DQS_B3 14
DQS_B#3 14
DQS_B4 14
DQS_B#4 14
DQS_B5 14
DQS_B#5 14
DQS_B6 14
DQS_B#6 14
DQS_B7 14
DQS_B#7 14
DQM_B[0..7] 14
DATA_B[0..63] 14
1
Place close to GMCH
VCC_DDR
C219 C2.2U6.3Y3C219 C2.2U6.3Y3
C264 X_C2.2U6.3Y3C264 X_C2.2U6.3Y3
C258 C2.2U6.3Y3C258 C2.2U6.3Y3
C232 C2.2U6.3Y3C232 C2.2U6.3Y3
C208 C2.2U6.3Y3C208 C2.2U6.3Y3
C240 C2.2U6.3Y3C240 C2.2U6.3Y3
SCROMP1,3 CLOSED TO VCC_DDR
A A
VCC_DDR
5
4
R249 1KR1%/2R249 1KR1%/2
R252
R252
3.01KR1%/2
3.01KR1%/2
R251 1KR1%/2R251 1KR1%/2
C278
C278
C0.1U16Y2
C0.1U16Y2
3
DDR_RCOMPVOL
DDR_RCOMPVOL = 0.2 * VCC_DDR
C282
C282
C10000P25X2
C10000P25X2
DDR_RCOMPVOH
DDR_RCOMPVOH = 0.8 * VCC_DDR
C283
C283
C10000P25X2
C10000P25X2
MSI
MSI
MSI
2
VCC_DDR
C197
C197
C0.1U16Y2
C0.1U16Y2
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Thursday, July 05, 2007
Date:
Thursday, July 05, 2007
Date:
Thursday, July 05, 2007
R254 19.1R1%/2R254 19.1R1%/2
R253 19.1R1%/2R253 19.1R1%/2
R192 19.1R%/2R192 19.1R%/2
R193 19.1R1%/2R193 19.1R1%/2
MS-7502
MS-7502
MS-7502
Bearlake - Memory
Bearlake - Memory
Bearlake - Memory
1
SRCOMP0
SRCOMP1
SRCOMP2
SRCOMP3
Sheet of
Sheet of
Sheet of
733
733
733
0A
0A
0A
5
4
V_1P25_CORE
3
2
1
NB POWER
V_FSB_VTT
D D
L8
L8
X_L10U_100mA_0805
X_L10U_100mA_0805
X_L10U_100mA_0805
X_L10U_100mA_0805
X_L10U_100mA_0805
L7
L0.1U_50mAL7L0.1U_50mA
X_C10U10Y5
X_C10U10Y5
X_L10U_100mA_0805
X_L10U_100mA_0805
X_L10U_100mA_0805
X_L10U_100mA_0805
X_L10U_100mA_0805
X_COPPER
X_COPPER
L5
L5
CP8
CP8
X_COPPER
X_COPPER
L6
L6
CP9
CP9
X_COPPER
X_COPPER
VCCA_EXP
C262
C262
C0.1U16Y2
C0.1U16Y2
V_1P25_CORE
C C
V_1P25_CL_MCH
V_1P25_CL_MCH
V_1P25_CORE
B B
V_1P25_CORE
VCC3
A A
CP11
CP11
X_COPPER
X_COPPER
L3
L3
CP6
CP6
X_COPPER
X_COPPER
L4
L4
CP7
CP7
C259
C259
5
C245
C245
C2.2U6.3Y3
C2.2U6.3Y3
VCCA_DPLLA
VCCA_DPLLA
C249
C249
X_C10U10Y5
X_C10U10Y5
VCCA_DPLLB
C255
C255
X_C10U10Y5
X_C10U10Y5
R239
R239
1R1%/2
1R1%/2
R240
R240
1R1%/2
1R1%/2
X_C10U10Y5
X_C10U10Y5
VCCA_MPLL
R226
R226
1R1%/2
1R1%/2
R225
R225
1R1%/2
1R1%/2
VCCA_HPLL
VCCA_GPLL
C265
C265
C246
C246
C0.1U16Y2
C0.1U16Y2
C250
C250
C0.1U16Y2
C0.1U16Y2
C254
C254
C0.1U16Y2
C0.1U16Y2
C263
C263
C0.1U16Y2
C0.1U16Y2
C239 C10U10Y5C239 C10U10Y5
VCC_DDR
X_L10U_100mA_0805
X_L10U_100mA_0805
X_COPPER
X_COPPER
VCCA_GPLL
VCCA_MPLL
VCCA_HPLL
VCCA_DPLLA
VCCA_DPLLB
VCC3
L2
L2
R191 1R1%/2R191 1R1%/2
R190 1R1%/2R190 1R1%/2
C189
CP4
CP4
C189
C10U10Y5
C10U10Y5
VCC_CKDDR
4
C1U16Y3
C1U16Y3
VCCA_EXP
C196
C196
BB42
BB41
BA43
BA42
AY42
A28
A30
B27
B28
B29
B30
C27
C29
C30
D27
D28
D29
E23
E26
E27
E29
F23
F24
F26
G23
G24
G26
H23
H24
J23
J24
K23
K24
L23
L24
M23
M24
M29
N23
N24
N26
N29
P23
P24
P26
P27
P29
R23
R24
R26
R27
B21
C21
B15
A24
C23
A22
C22
B16
C17
B17
A16
U12F
U12F
VTT_FSB_1
VTT_FSB_2
VTT_FSB_3
VTT_FSB_4
VTT_FSB_5
VTT_FSB_6
VTT_FSB_7
VTT_FSB_8
VTT_FSB_9
VTT_FSB_10
VTT_FSB_11
VTT_FSB_12
VTT_FSB_13
VTT_FSB_14
VTT_FSB_15
VTT_FSB_16
VTT_FSB_17
VTT_FSB_18
VTT_FSB_19
VTT_FSB_20
VTT_FSB_21
VTT_FSB_22
VTT_FSB_23
VTT_FSB_24
VTT_FSB_25
VTT_FSB_26
VTT_FSB_27
VTT_FSB_28
VTT_FSB_29
VTT_FSB_30
VTT_FSB_31
VTT_FSB_32
VTT_FSB_33
VTT_FSB_34
VTT_FSB_35
VTT_FSB_36
VTT_FSB_37
VTT_FSB_38
VTT_FSB_39
VTT_FSB_40
VTT_FSB_41
VTT_FSB_42
VTT_FSB_43
VTT_FSB_44
VTT_FSB_45
VTT_FSB_46
VCCDQ_CRT
VCCD_CRT
VCCA_EXPPLL
VCCA_MPLL
VCCA_HPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_DAC_1
VCCA_DAC_2
VCC3_3
VCCA_EXP
VCC_CKDDR_5
VCC_CKDDR_4
VCC_CKDDR_3
VCC_CKDDR_2
VCC_CKDDR_1
VCC_DDR
AA13
AA14
AA15
AA17
AA19
AA21
AA23
AA25
AA26
AA27
AA3
AB17
AB18
AB20
AB22
AB24
AB26
AB27
AC13
AC14
AC15
AC17
AC19
AC21
AC23
AC25
AC26
AC27
AC6
AD14
AD15
AD17
AD18
AD20
AD22
AD24
AD26
AD27
AE17
AE19
AE21
AE23
AE25
AE26
AE27
AF1
AF11
AF12
AF13
AF14
AF15
AF17
AF18
AF2
AF20
AF22
AF24
AF25
AF26
AF3
AG10
AG11
AG12
AG13
AG14
AG15
AG17
AG18
AG19
AG2
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_60
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
POWER
POWER
AV18
VCC_CL
VCC_CL_70
VCC_CL_71
VCC_CL_72
VCC_CL_73
VSS
VCC_CL_75
VCC_CL_76
BC34
CP30
CP30
VCC_CL_77
VCC_DDR_21
VCC_DDR_22
Y32
AL6
AL7
AL8
AL9
V30
Y29
Y30
Y31
BC39
V_FSB_VTT
C178 C10U10Y5C178 C10U10Y5
C213 C1U6.3Y2C213 C1U6.3Y2
C223 C1U6.3Y2C223 C1U6.3Y2
C220 C0.1U16Y2C220 C0.1U16Y2
C229 C0.1U16Y2C229 C0.1U16Y2
C224 C0.1U16Y2C224 C0.1U16Y2
3
VCC_DDR_1
VCC_DDR_2
VCC_DDR_3
VCC_DDR_4
VCC_DDR_5
VCC_DDR_6
VCC_DDR_7
VCC_DDR_8
VCC_DDR_9
VCC_DDR_10
VCC_DDR_11
VCC_DDR_12
VCC_DDR_13
VCC_DDR_14
VCC_DDR_15
VCC_DDR_16
VCC_DDR_17
VCC_DDR_18
VCC_DDR_19
VCC_DDR_20
AV26
AY32
BB12
BB16
BB18
BB20
BB24
BB26
BB28
BB32
BB37
BB39
BC14
BC18
BC22
BC26
AW20
AW24
V_FSB_VTT
C204 C1U6.3Y2C204 C1U6.3Y2
C171 C1U6.3Y2C171 C1U6.3Y2
C168 C1U6.3Y2C168 C1U6.3Y2
C161 C1U6.3Y2C161 C1U6.3Y2
C206 C1U6.3Y2C206 C1U6.3Y2
C163 C1U6.3Y2C163 C1U6.3Y2
C207 C1U6.3Y2C207 C1U6.3Y2
C175 C1U6.3Y2C175 C1U6.3Y2
BC30
X_COPPER
X_COPPER
VCC_CL_62
VCC_CL_63
VCC_CL_64
VCC_CL_65
VCC_CL_66
VCC_CL_67
VCC_CL_68
VCC_CL_69
AL5
AL20
AL21
AL23
AL24
AL26
AL27
AL29
V_1P25_CORE
AL18
VCC_CL_61
AL17
VCC_CL_57
VCC_CL_58
VCC_CL_59
VCC_CL_60
AL12
AL13
AL15
C273 C10U10Y5C273 C10U10Y5
C274 C10U10Y5C274 C10U10Y5
C306 C10U10Y5C306 C10U10Y5
C275 C10U10Y5C275 C10U10Y5
C304 C10U10Y5C304 C10U10Y5
C308 C0.1U16Y2C308 C0.1U16Y2
C340 C0.1U16Y2C340 C0.1U16Y2
C276 C0.1U16Y2C276 C0.1U16Y2
AL11
VCC_CL_54
VCC_CL_55
VCC_CL_56
AL10
AK30
VCC_CL_46
VCC_CL_47
VCC_CL_48
VCC_CL_49
VCC_CL_50
VCC_CL_51
VCC_CL_52
VCC_CL_53
AK29
AK27
AK26
AK24
AK23
AK21
AK2
AK20
V_1P25_CORE
AK3
VCC_CL_41
VCC_CL_42
VCC_CL_43
VCC_CL_44
VCC_CL_45
AK14
AK15
AK17
AK18
BOTTOM
VCC_CL_37
VCC_CL_38
VCC_CL_39
VCC_CL_40
AJ3
AJ4
AK1
AJ30
AJ31
C347 C0.1U16Y2C347 C0.1U16Y2
C344 C0.1U16Y2C344 C0.1U16Y2
C329 C0.1U16Y2C329 C0.1U16Y2
C671 X_C10U10Y5C671 X_C10U10Y5
C673 X_C10U10Y5C673 X_C10U10Y5
C676 X_C10U10Y5C676 X_C10U10Y5
C675 X_C0.1U25Y3C675 X_C0.1U25Y3
C672 X_C0.1U25Y3C672 X_C0.1U25Y3
2
AG5
AG20
AG21
AG22
AG23
AG24
AG3
AG4
AG6
VCC_70
VCC_CL_36
VCC_78
VCC_71
VCC_72
VCC_73
VCC_74
VCC_75
VCC_76
VCC_77
VCC_79
VCC_CL_27
VCC_CL_28
VCC_CL_29
VCC_CL_30
VCC_CL_31
VCC_CL_32
VCC_CL_33
VCC_CL_34
VCC_CL_35
AJ2
AJ18
AJ20
AJ21
AJ23
AJ24
AJ26
AJ27
AJ29
V_1P25_CL_MCH
AH4
AH2
AH1
AG9
AG8
AG7
VCC_85
VCC_84
VCC_83
VCC_82
VCC_81
VCC_80
VCC_CL_21
VCC_CL_22
VCC_CL_23
VCC_CL_24
VCC_CL_25
VCC_CL_26
AJ13
AJ14
AJ15
AJ17
AG30
AG31
C237 C0.1U16Y2C237 C0.1U16Y2
C270 C0.1U16Y2C270 C0.1U16Y2
C271 C0.1U16Y2C271 C0.1U16Y2
C674 X_C10U10Y5C674 X_C10U10Y5
C670 X_C10U10Y5C670 X_C10U10Y5
C260 C0.1U16Y2C260 C0.1U16Y2
C261 C0.1U16Y2C261 C0.1U16Y2
AJ10
AG29
AJ12
AJ11
AJ5
VCC_88
VCC_87
VCC_86
VCC_CL_18
VCC_CL_19
VCC_CL_20
AG25
AG26
AG27
F11
C13
AJ9
AJ8
AJ7
AJ6
VCC_89
VCC_CL_17
AF31
F9
J2
J3
N12
N11
N9
VCC_97
VCC_96D4VCC_95C9VCC_94
VCC_93
VCC_92
VCC_91
VCC_90
VCC_CL_15
VCC_CL_16
AF30
AF29
VCC_99G2VCC_98
VCC_100
VCC_104L6VCC_102J6VCC_101
VCC_105
VCC_EXP_10
VCC_EXP_11
VCC_EXP_12
VCC_EXP_13
VCC_CL_1
VCC_CL_2
VCC_CL_3
VCC_CL_4
VCC_CL_5
VCC_CL_6
VCC_CL_7
VCC_CL_8
VCC_CL_9
VCC_CL_10
VCC_CL_11
VCC_CL_12
VCC_CL_13
VCC_CL_14
AF27
AD32
MSI
MSI
MSI
AD31
AD30
AD29
AA29
AA30
AA31
AA32
AC29
AC30
AC31
AC32
Separate when AMT is
supported
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Bearlake - Power
Bearlake - Power
Bearlake - Power
Date:
Thursday, July 05, 2007
Date:
Thursday, July 05, 2007
Date:
Thursday, July 05, 2007
VCC_109N8VCC_108N6VCC_107N3VCC_106
VCC_111
VCC_112
VCC_113
VCC_114
VCC_115
VCC_116
VCC_117
VCC_118
VCC_119
VCC_120
VCC_121
VCC_122
VCC_123
VCC_124
VCC_125
VCC_126
VCC_127
VCC_128
VCC_129
VCC_130
VCC_131
VCC_132
VCC_133
VCC_134
VCC_135
VCC_136
VCC_137
VCC_138
VCC_139
VCC_140
VCC_141
VCC_142
VCC_143
VCC_144
VCC_145
VCC_146
VCC_147
VCC_148
VCC_149
VCC_150
VCC_151
VCC_152
VCC_153
VCC_154
VCC_155
VCC_156
VCC_157
VCC_158
VCC_159
VCC_160
VCC_161
VCC_162
VCC_163
VCC_164
VCC_165
VCC_166
VCC_167
VCC_168
VCC_169
VCC_170
VCC_171
VCC_EXP_1
VCC_EXP_2
VCC_EXP_3
VCC_EXP_4
VCC_EXP_5
VCC_EXP_6
VCC_EXP_7
VCC_EXP_8
VCC_EXP_9
6 OF 7
6 OF 7
P35
P35
V_1P25_CL_MCH
VCC_110
1
V_1P25_CORE
P14
P15
P20
R14
R15
R17
R18
U10
U13
U14
U15
U17
U18
U19
U20
U21
U22
U23
U24
U25
U26
U3
U6
U9
V10
V12
V13
V14
V15
V17
V18
V19
V20
V21
V22
V23
V24
V25
V26
V27
V9
W17
W18
W19
W21
W23
W25
W26
W27
Y11
Y13
Y14
Y15
Y17
Y18
Y20
Y22
Y24
Y26
Y27
Y6
AC2
AC3
AC4
AD1
AD10
AD11
AD2
AD4
AD5
AD6
AD7
AD8
AD9
MS-7502
MS-7502
MS-7502
V_1P25_PCIE
need decouping caps
V_1P25_CORE
L9
X_FB80/8L9X_FB80/8
CP12
CP12
X_COPPER
X_COPPER
833
833
833
Sheet of
Sheet of
Sheet of
0A
0A
0A
5
4
3
2
1
D D
C C
B B
AA18
AA20
AA22
AA24
AA35
AA38
AA5
AA8
AB1
AB19
AB2
AB21
AB23
AB25
AB43
AC10
AC18
AC20
AC22
AC24
AC35
AC38
AC5
AC7
AD19
AD21
AD23
AD25
AD33
AD35
AD37
AD39
AD42
AE18
AE2
AE20
AE22
AE24
AE3
AE4
AF10
AF19
AF21
AF23
AF36
AF37
AF43
AG34
AG37
AH42
AJ32
AJ33
AJ36
AJ39
AK43
AL31
AL33
AL36
AM11
AM20
AM23
AM24
U12G
U12G
A12
VSS_1
A18
VSS_2
A26
VSS_3
A3
VSS_4
A34
VSS_5
A39
VSS_6
A41
VSS_7
A5
VSS_8
A7
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
AF5
VSS_57
AF6
VSS_58
AF7
VSS_59
AF8
VSS_60
AF9
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
Y5
Y7
VSS_296
VSS_297
Y37
Y42
VSS_294
VSS_295
Y33
Y35
VSS_292
VSS_293
Y23
Y25
VSS_290
VSS_291
Y19
Y21
VSS_288
VSS_289
Y10
VSS_287
W3
Y1
VSS_285
VSS_286
W22
W24
VSS_283
VSS_284
V8
W20
VSS_281
VSS_282
V5
VSS_280
V39
V43
VSS_278
VSS_279
V34
V37
VSS_276
VSS_277
V29
V32
VSS_274
VSS_275
V2
VSS_273
U8
V11
VSS_271
VSS_272
U5
U7
VSS_269
VSS_270
U35
U38
VSS_267
VSS_268
U29
VSS_266
T42
U27
VSS_264
VSS_265
R5
R8
T1
VSS_262
VSS_263
GND
GND
R33
R36
VSS_259
VSS_260
VSS_261
R3
R31
VSS_257
VSS_258
R11
R21
VSS_255
VSS_256
P30
P43
VSS_253
VSS_254
P21
VSS_252
P18
P2
VSS_250
VSS_251
N7
P17
VSS_248
VSS_249
N36
N5
VSS_246
VSS_247
N33
VSS_245
N27
N31
VSS_243
VSS_244
N13
N21
VSS_241
VSS_242
M7
N10
VSS_239
VSS_240
M37
VSS_238
M33
M35
VSS_237
M21
M27
VSS_234
VSS_235
VSS_236
M17
M20
VSS_232
VSS_233
M15
VSS_231
M1
M10
VSS_228
VSS_229
L5
L7
VSS_226
VSS_227
L33
L40
VSS_224
VSS_225
VSS_223
VSS_222
VSS_221
VSS_220
VSS_219
VSS_218
VSS_217
VSS_216
VSS_215
VSS_214
VSS_213
VSS_212
VSS_211
VSS_210
VSS_209
VSS_208
VSS_207
VSS_206
VSS_205
VSS_204
VSS_203
VSS_202
VSS_201
VSS_200
VSS_199
VSS_198
VSS_197
VSS_196
VSS_195
VSS_194
VSS_193
VSS_192
VSS_191
VSS_190
VSS_189
VSS_188
VSS_187
VSS_186
VSS_185
VSS_184
VSS_183
VSS_182
VSS_181
VSS_180
VSS_179
VSS_178
VSS_177
VSS_176
VSS_175
VSS_174
VSS_173
VSS_172
VSS_171
VSS_170
VSS_169
VSS_168
VSS_167
VSS_166
VSS_165
VSS_164
VSS_163
VSS_162
VSS_161
VSS_160
VSS_159
VSS_158
VSS_157
VSS_156
VSS_155
VSS_154
VSS_153
VSS_152
VSS_151
VSS_150
VSS_149
VSS_148
L32
L31
L3
L29
L21
L20
L11
K43
K26
K21
K2
K18
K13
K12
J9
J7
J5
J38
J35
J32
J27
J21
H31
H29
H21
H20
H17
H15
H13
G9
G7
G42
G38
G32
G21
G13
G12
G11
G1
F37
F35
F3
F27
F21
F18
F15
E9
E43
E32
E3
E24
E21
E11
E1
D40
D31
D3
D21
D17
D16
D15
C6
C5
C43
C4
C26
C11
C1
BC5
BC41
BC37
BC32
BC3
BC28
BC24
BC10
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
7 OF 7
7 OF 7
P35
B10
B14
B19
B22
B23
AM4
AM7
AM9
AN11
AN12
AM40
AM42
AN13
AM29
AM33
A A
5
AM36
AN20
4
AN23
AN24
AN29
AN31
AN38
AN4
AP18
AP24
AP43
AR17
AR20
AR21
AR23
AR26
AR27
AR32
AR33
AR38
AR6
AR9
AT12
AT13
AT15
AT29
AT31
AU20
AU24
AU32
AP1
AU38
AU4
AU42
AU6
AV11
AV17
AV2
AV7
AV9
AV35
AV37
AY4
AY40
AW41
AW43
AV21
AV23
AV27
3
AY41
B26
P35
B31
B32
B37
BA1
BB7
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7502
MS-7502
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Thursday, July 05, 2007
Date:
Thursday, July 05, 2007
Date:
2
Thursday, July 05, 2007
MS-7502
Bearlake - GND
Bearlake - GND
Bearlake - GND
1
Sheet of
Sheet of
Sheet of
933
933
933
0A
0A
0A
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