8
7
6
5
4
3
2
1
1
MS-7095 Ver : 10
VIA P4M266A + VT8237 Chipset
D D
2
3
4
CPU:
P4 Socket 478 (PSB533)
6
Willamette / Northwood / Prescott
8
System Chipset:
VIA VT8751A Rev : CE (P4M266A)
VIA VT8237 Rev : A2
On Board Chipset:
C C
LPC Super I/O : W83697HF-UB
Lan : VIA PHY VT6103L
Code : VIA VT1617A
Expansion Slots:
AGP 2.0 Slot * 1
DDR 266 Slot * 2
PCI 2.2 Slot * 3
B B
CNR Slot * 1
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
Cover Sheet
Block Diagram
Clock Generator -- ISC950917
Intel mPGA478B -- Signals
Intel mPGA478B -- Power 5
VIA VT8751A P4M266A North Bridge -- Host / VGA
VIA VT8751A P4M266A North Bridge -- Memory 7
VIA VT8751A P4M266A North Bridge -- AGP / Vlink
DIMM1 / DIMM2
DDR TERMINATOR
AGP 4X
VIA VT8237 Vre:A2 South Bridge -- PCI / USB / KB
VIA VT8237 Vre:A2 South Bridge -- IDE / AC97 / ACPI
VIA VT8237 Vre:A2 South Bridge -- VLINK / MAC / LPC
LPC I/O W83697HF-UB
KB / MS / LPT / COM Port / FAN Connector
CNR / ROM / Screw hole
PCI 1 / PCI2 / PCI3 SLOTS
IDE / VGA Connector
USB Connector
AC97 Audio CODEC VT1617A / Connector
LAN VT6103L(PHY) / RJ45
MS7-RBC ACPI Controller / Regulators
VRM 9.0 Richtek RT8800BPS
Front Panel & ATX power Com & thermal protection
HISTORY
.
.
..
.
.
.
.
.
.
.
.
A A
ORCAD Config. MODEL Config. ERP Number Function Option
MS7095 STD
STD + Lan cfg7095-sdt
8
7
STD
A
6
501/601-7095-A10 .001
5
4
.............
............
.....
....
.....
.....
.....
3
MSI
Title
Size Document Number Rev
Date: Sheet
2
Micro-Star
Cover Sheet
MS-7095
12 7 Wednesday, September 08, 2004
of
1
10
Block Diagram
VRM
AGP / ADD
Slot
AGPCLK 66MHZ
AGP BUS
INT & PWR-MNG
P4 478-Pin Processor
CTRL
ADDR
ADDR
AGTL+ BUS
VCORE
CTRL
DATA
DATA
VT8751 (P4M266A)
1
CPUCLK, CPUCLK# 100/133MHZ
NBHCLK, NBHCLK# 100/133MHZ
NBCLK66 66MHZ
GUICLK 14.318MHZ
DCLK_OUT 133MHZ
DCLK_FB 133MHZ
MDCLK0 ~ MDCLK5 133MHZ
MDCLK#0~MDCLK#5
X'TEL
14.318MHZ
ICS950910
Clock
Generator
AGPCLK 66MHZ
VLCLK66 66MHZ
SBPCLK 33MHZ
SIOPCLK 33MHZ
PCICLK1,2,3 33MHZ
LAN_PCLK 33MHZ
SIO_48M 48MHZ
USBCLK 48MHZ
SB14MHZ 14.318MHZ
APICCLK 14.318MHZ
VGA
VGA BUS
Connector
IDE Primary
A A
UltraDMA 66/100
IDE Secondary
INT & PWR-MNG
AC'97 Link / LAN / EEPROM
CNR Slot
BGA 664 Pin
VDDQ 1.5V VDIMM 2.5V
VCC2_5
V- LINK BUS
VT8237 A2
VCC3SBY 3.3V
VCC25SBY 2.5V
VCC3 3.3V
VCC2_5 2.5V
DDR BUS
PCICLK1,2,3 33MHZ
VLCLK66 66MHZ
SBPCLK 33MHZ
USBCLK 48MHZ
SB14MHZ 14.318MHZ
APICCLK 14.318MHZ
PCI BUS
MII Bus
ISA BUS
Onboard
AC'97 Codec
USB 8 PORT
LPC SIO
SIOPCLK 33MHZ
SIO_48M 48MHZ
DDR1
DDR2
PCI Slot 1
PCI Slot 2
VT6103
LAN Chip
Flash ROM
BIOS
PCI Slot 3
LAN Port
W83697HF
Audio port
USB Port 7
USB Port 5
USB Port 8 USB Port 6
USB Port 3
USB Port 4
USB Port 1
USB Port 2
Mouse Floopy Para l l el
Keyboard
Serial1,2
Title
Size Document Number Rev
1
Date: Sheet
Block Diagram
MS-7095
22 7 Wednesday, September 08, 2004
10
of
Micro-Star
MSI
5
filtering from 10K~1M
VCC3
VCC2_5
D D
C C
B B
CP17 X_COPPER
FB10 X_L80RD7A3D2
CB14
X_CD1U16V2Y5VL
FB8 X_L80RD7A3D2
CP14 X_COPPER
CB5 R197 33R2
X_CD1U16V2Y5VL
VCORE
VCC2_5
VCC3
R165
220R2
VTTGD
FB9 X_L80RD7A3D2
CP16 X_COPPER
CB9
CD1U16V2Y5VL
R159
1KR2
VTT_GD#
Q18
2N3904S
VCC3V
CB16
X_CD1U16V2Y5VL
VCC2.5A
CB7
X_CD1U16V2Y5VL
R160 10KR2
SMBCLK1 9,13,17,23
SMBDATA1 9,13,17,23
VCC2.5B
CB13
X_CD1U16V2Y5VL
DCLK_OUT 7
CB15
CD1U16V2Y5VL
CB6
CD1U16V2Y5VL
VTTGD#
SMBCLK1
SMBDATA1
VCC3V
DCLK_OUT
4
U10
51
CPU_VDD3.3
54
CPU_GND3.3
50
CPU_VDD2.5
47
CPU_GND2.5
CB20
CD1U16V2Y5VL
16
13
CB17
CD1U16V2Y5VL
CB8
CD1U16V2Y5VL
CB18 X2 14MHZ-32PF
X_CD1U16V2Y5VL
CB12
CD1U16V2Y5VL
CB10
CD1U16V2Y5VL
22
19
55
2
23
24
27
28
34
33
40
39
45 46
*SEL_CK408/K7/AGP1
PCI_VDD
PCI_GND
48_VDD
48_GND
REF_VDD
REF_GND
CORE_VDD
CORE_GND
SCLK
SDATA
DDR_VDD1
DDR_GND1
DDR_VDD2
DDR_GND2
BUF_IN FB_OUT
ICS950917
CPUCLK
CPUCLK#
CPUCLKCS
CPUCLKCS#
AGP0 3V66_VDD
AGP2 3V66_GND
~*FS1/PCI_F
PCI1
MULTSEL/PCI2
PCI3
PCI4
PCI5
TURBO#
*FS3/48MHz
*FS2/24_48MHz
*FS0/REF0
VTT_GD#/**REF1
IREF
*PD#/RESET#
DDR0
DDR#0
DDR1
DDR#1
DDR2
DDR#2
DDR3
DDR#3
DDR4
DDR#4
DDR5
DDR#5
3
CLK_CPU
53
CLK_CPU#
52
CLK_NB NBHCLK
48
CLK_NB#
49
CLK66_1
6 5
SEL_CK408
7
CLK66_2
8 9
FS1
10
CLK33_1
11
MULT
12
CLK33_3
14
CLK33_4
15
CLK33_5
17
18
TURBO#
FS3
20
FS2
21
FS0
1
56
VTTGD#
X1
3
X1
X2
4
X2
IREF
25
PD#
26
DCLK4
44
DCLK#4
43
DCLK#1
42
41
DCLK5
38
DCLK#5
37
DCLK2
36
35
DCLK0
32
DCLK#0
31
DCLK3
30
29
FB_O
R162 27D4R3F
R156 27D4R3F
R157 27D4R3F
R163 27D4R3F
R198 33R2
R188 33R2
R189 33R2
R186 33R2
RN48
7 8
5 6
3 4
1 2
8P4R-33R3
R193 10KR2
R192 33R2
R194 33R2
R201 22R2
R171 33R2
C56P50V3NPOL C226
C56P50V3NPOL C223
R181 475R3F
R182 33R2
R164 33R2
CPUCLK
CPUCLK#
NBHCLK#
NBCLK66
VLCLK66
AGPCLK
SBPCLK
APICCLK
SIOPCLK
PCICLK1
PCICLK2
PCICLK3
USBCLK
SIO_48M
SB14MHZ
GUICLK
FP_RST#
MDCLK4
MDCLK#4
MDCLK1 DCLK1
MDCLK#1
MDCLK5
MDCLK#5
MDCLK2
MDCLK#2 DCLK#2
MDCLK0
MDCLK#0
MDCLK3
MDCLK#3 DCLK#3
DCLK_FB
VCC3V
2
CPUCLK 4
CPUCLK# 4
NBHCLK 6
NBHCLK# 6
NBCLK66 8
VLCLK66 14
AGPCLK 11
SBPCLK 14
APICCLK 14
SIOPCLK 15
PCICLK1 18
PCICLK2 18
PCICLK3 18
USBCLK 12
SIO_48M 15
SB14MHZ 13
GUICLK 6
FP_RST# 23,25
MDCLK4 9
MDCLK#4 9
MDCLK1 9
MDCLK#1 9
MDCLK5 9
MDCLK#5 9
MDCLK2 9
MDCLK#2 9
MDCLK0 9
MDCLK#0 9
MDCLK3 9
MDCLK#3 9
DCLK_FB 7
Pull Hi 4.7K to
3.3V in Page 23
Pull-Down Capacitors
NBCLK66
AGPCLK
VLCLK66
SBPCLK
SIOPCLK
PCICLK1
PCICLK2
PCICLK3
USBCLK
SB14MHZ
GUICLK
APICCLK
MDCLK4
MDCLK#4
MDCLK1
MDCLK#1
MDCLK5
MDCLK#5
MDCLK2
MDCLK#2
MDCLK0
MDCLK#0
MDCLK3
MDCLK#3
DCLK_FB
CN14 X_8P4C-10P3
7
5
3
1
CN11 X_8P4C-10P3
1
3
5
7
CN12 X_8P4C-10P3
1
3
5
7
CN13 X_8P4C-10P3
1
3
5
7
used only for EMI is su e
Trace less 0.2"
1
X_C10P25V2NPOL C236
X_C10P25V2NPOL C241
X_C10P25V2NPOL C248
X_C10P25V2NPOL C242
8
6
4
2
X_C10P25V2NPOL C243
X_C10P25V2NPOL C247
X_C10P25V2NPOL C222
X_C10P25V2NPOL C240
2
4
6
8
2
4
6
8
2
4
6
8
X_C10P25V2NPOL C217
MDCLK4 DCLK4
MDCLK#4 DCLK#4
MDCLK5 DCLK5
MDCLK#5 DCLK#5
MDCLK#2 DCLK#2
MDCLK0 DCLK0
MDCLK#0 DCLK#0
MDCLK#3 DCLK#3
10
32 7 Wednesday, September 08, 2004
1
of
Voh MULT
0.7V
Ioh*Rt
2
VCC3V
VCC3V
DCLK1 MDCLK1
DCLK#1 MDCLK#1
DCLK2 MDCLK2
DCLK3 MDCLK3
MSI
Title
Size Document Number Rev
Date: Sheet
Micro-Star
Clock Generator
MS-7095
Shut Source Termination Res ist or s
CPUCLK
CPUCLK#
Trace less 0.2"
A A
* : Internal pull-up resistor
** : Internal pull-down resistor
~ : Have 2X drive strength
R161 49D9R3F
R155 49D9R3F
49.9ohm for 50ohm M/B impedance
5
CLOCK STRAPPING RESISTORS
VCC3V
FS3
FS2
FS1
FS0
FS3 FS2 FS1 FS0
R199 X_10KR2
R195 X_10KR2
R190 X_10KR2
R196 10KR2
R200 10KR2
* * ~* *
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1
4
C22P50V2NPO C238
FSB (MHz)
100 MHz
133 MHz
200 MHz
166 MHz
BSEL1
BSEL0
CB19
X_CD1U16V2Y5VL
BSEL1 4
BSEL0 4,13
Pull Hi 1K to
3.3V in Page 23
3
MULT
0
1
R191 10KR2
Iref
Rr
221
5.00mA 1.0V
475
2.32mA
Ioh
4*Iref
6*Iref
Vdd/3Rr
SEL_CK408
SEL CK408/K7 CPU output type
R187 X_10KR2
*
0 K7
1 CK408 / AGP
5
4
3
2
1
VIDPWRGD DC Specifications
VIL
CPU SIGNAL BLOCK
VSS_SENSE
D12#
H21
HD#11
AD26
D11#
G22
HD#10
AC26
ITP_CLK1
D10#
B25
HD#9
ITP_CLK0
D9#
HD#8
D8#
C24
CPUVID_GD
VID4
VID5
AE1
AD2
AD3
VID5#
VIDPWRGD
D7#
D6#
C23
B24
D22
HD#6
HD#5
HD#7
VID3
AE2
VID4#
D5#
C21
HD#4
CPU1A
E21
DBI0#
G25
DBI1#
P26
DBI2#
V21
DBI3#
AC3
IERR#
V6
MCERR#
B6
FERR#
Y4
STPCLK#
AA3
BINIT#
W5
INIT#
AB2
RSP#
H5
DBSY#
H2
DRDY#
J6
TRDY#
G1
ADS#
G4
LOCK#
G2
BNR#
F3
HIT#
E3
HITM#
D2
BPRI#
E2
DEFER#
C1
TDI
D5
TDO
F7
TMS
E6
TRST#
D4
TCK
B3
THERMDA
C4
THERMDC
A2
THERMTRIP#
AF26
GND/SKTOCC#
C3
PROCHOT#
B2
IGNNE#
B5
SMI#
C6
A20M#
AB26
SLP#
A22
RESERVED0
A7
RESERVED1
AE21
RESERVED2
AF24
RESERVED3
AF25
RESERVED4
AD1
BOOTSELECT
AE26
OPTIMIZED/COMPAT#
AD6
BSEL0
AD5
BSEL1
AB23
PWRGOOD
AB25
RESET#
AA24
D63#
AA22
D62#
AA25
D61#
Y21
D60#
Y24
D59#
Y23
D58#
W25
D57#
Y26
D56#
W26
D55#
V24
D54#
HA#[3..33]
N26
HA#22
A23#
A22#
D38#
D37#
M26
HD#37
HA#20
HA#21
A21#
D36#
N23
M24
HD#36
HD#35
HA#19
A20#
D35#
P21
HD#34
HA#18
A19#
D34#
N22
HD#33
HA#17
A18#
D33#
M23
HD#32
HA#16
A17#
D32#
H25
HD#31
HA#15
A16#
D31#
K23
HD#30
HA#14
A15#
D30#
J24
HD#29
HA#13
A14#
D29#
L22
HD#28
HA#12
A13#
D28#
M21
HD#27
A12#
D27#
HA#25
HA#27
HA#30
HA#26
A29#
D44#
T26
HA#28
A28#
D43#
R24
R25
HD#43
HD#42
A27#
D42#
P24
HD#41
A26#
D41#
HA#24
A25#
D40#
R21
N25
HD#40
HD#39
HA#23
A24#
D39#
HD#38
HA#29
HA#31
HA#32
HA#33
AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2
A35#
A34#
A33#
A32#
A31#
A30#
D53#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
V22
U21
V25
U23
U24
U26
T23
T22
T25
HD#50
HD#52
HD#53
HD#51
HD#49
HD#48
HD#47
HD#46
HD#45
HD#44
HA#11
HA#10
A11#
D26#
H24
G26
HD#26
HD#25
HA#9
A10#
D25#
L21
HD#24
HA#8
A9#
D24#
D26
HD#23
HA#7
A8#
D23#
F26
HD#22
HA#6
A7#
D22#
E25
HD#21
HA#5
A6#
D21#
F24
HD#20
HA#4
A5#
D20#
F23
HD#19
HA#3
A4#
D19#
G23
HD#18
A3#
D18#
E24
HD#17
D17#
H22
HD#16
AE25A5A4
DBR#
D16#
D15#
D14#
D25
J21
HD#15
HD#14
VCC_SENSE
D13#
D23
C26
HD#12
HD#13
HA#[3..33] 6
D D
HDBI#0
HDBI#0 6
HDBI#1
HDBI#1 6
HDBI#2
HDBI#2 6
HDBI#3
HDBI#3 6
FERR# 14
STPCLK# 14
CPUINIT# 14
HDBSY# 6
HDRDY# 6
HTRDY# 6
HADS# 6
C C
CPU_TMPA
C77
X_C220P16V3X7RL
B B
PWRGD_CPU 23
CPURST# 6
A A
HD#[0..63] 6
HLOCK# 6
HBNR# 6
HBPRI# 6
HDEFER# 6
CPU_TMPA 15
VTIN_GND 15
THERMTRIP# 25
IGNNE# 14
Near CPU
C32 X_CD1U25V3Y5VL
R22 60D4R3F
BSEL0 3,13
BSEL1 3
HD#[0..63]
HIT# 6
HITM# 6
SMI# 14
A20M# 14
SLP# 14
BOOTSELECT
BSEL0
BSEL1
PWRGD_CPU
CPURST#
IERR#
FERR#
STPCLK#
CPUINIT#
HDBSY#
HDRDY#
HTRDY#
HADS#
HLOCK#
HBNR#
HIT#
HITM#
HBPRI#
HDEFER#
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_TCK
CPU_TMPA
VTIN_GND
THERMTRIP#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#
OPTIMIZED
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
VID2
VID3#
D4#
HD#3
AE3
A25
VID1
AE4
VID2#
D3#
A23
HD#2
VID0
AE5
VID1#
VID0#
TESTHI12
TESTHI11
TESTHI10
LINT1/NMI
LINT0/INTR
D2#
D1#
B22
B21
HD#1
HD#0
GTLREF3
GTLREF2
GTLREF1
GTLREF0
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
D0#
CPUVID_GD 24
VID[0..5] 24
AA21
AA6
F20
F6
AB4
BPM5#
AA5
BPM4#
Y6
BPM3#
AC4
BPM2#
AB5
BPM1#
AC6
BPM0#
H3
REQ4#
J3
REQ3#
J4
REQ2#
K5
REQ1#
J1
REQ0#
AD25
A6
Y3
W4
U6
AB22
AA20
AC23
AC24
AC20
AC21
AA2
AD24
AF23
BCLK1#
AF22
BCLK0#
F4
RS2#
G5
RS1#
F1
RS0#
V5
AP1#
AC1
AP0#
H6
BR0#
P1
COMP1
L24
COMP0
L25
DP3#
K26
DP2#
K25
DP1#
J26
DP0#
R5
L5
W23
P23
J23
F21
W22
R22
K22
E22
E5
D1
SOCK478-DIP
C60 C220P16V3X7RL
GTLREF1
BPM#5
BPM#4
BPM#3
BPM#2
BPM#1
BPM#0
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI0
CPUCLK#
CPUCLK
HRS#2
HRS#1
HRS#0
BREQ#0
R38 51D1R3F
COMP1
R30 51D1R3F
COMP0
HADSTB#1
HADSTB#0
HDSTB3
HDSTB2
HDSTB1
HDSTB0
HDSTB#3
HDSTB#2
HDSTB#1
HDSTB#0
NMI
INTR
HREQ#[0..4]
R23 62R3
R48 62R3
R17 62R3
R26 62R3
R27 62R3
R21 62R3
R20 62R3
CPUCLK# 3
CPUCLK 3
HRS#[0..2]
BREQ#0 6
HADSTB#1 6
HADSTB#0 6
HDSTB3 6
HDSTB2 6
HDSTB1 6
HDSTB0 6
HDSTB#3 6
HDSTB#2 6
HDSTB#1 6
HDSTB#0 6
NMI 14
INTR 14
HREQ#[0..4] 6
VCORE
HRS#[0..2] 6
VIH
It must rout to the enable pin of PWM and CK-409.
VIDGD to Vccp delay time is from 1ms to 10ms.
VIDGD rising time is 150ns.
CPU GTL REFERNCE VOLTAGE BLOCK
GTLREF1
BREQ#0 6
CPURST# 6
Min Max Typ
0.9
VCORE
2/3*Vccp
C61
X_C1U10V3Y5VL
CPU ITP BLOCK
ITP_TDI
ITP_TRST#
ITP_TMS
ITP_TDO
ITP_TCK
PROCHOT#
PWRGD_CPU
BREQ#0
CPURST#
THERMTRIP#
FERR#
FERR# 14
IERR#
STPCLK#
SMI#
SLP#
CPUINIT#
INTR
NMI
A20M#
IGNNE#
CPU STRAPPING RESISTORS
VCORE
RN4
7 8
5 6
3 4
1 2
8P4R-51R3
0.3
R37
49D9R3F
R36
100R3F
R46 X_150R3
R33 680R3
R39 X_39R3
R34 X_75R3
R49 X_27R3
R45 62R3
R24 300R3
R47 51R3
R25 51R3
R13 62R3
R18 62R3
R19 X_150R3
RA1
1
5
1
2
2
3
3
4
4
6
6
7
7
8
8
9
10
9510
10P8R-150R3
BPM#3
BPM#1
BPM#4
BPM#2
BPM#0
BPM#5
VCORE
VCORE
VCORE
VCORE
MSI
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
Micro-Star
CPU Socket 478 part1
MS-7095
42 7 Wednesday, September 08, 2004
1
10
of
5
CPU VOLTAGE BLOCK
D D
VCORE
A10
A12
A14
A16
A18
A20A8AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
AD15
AD17
VCC
VSS
AF6
VCC
VSS
AF8
VCC
VSS
AD19
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
B10
B12
B14
B16
CPU1B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AF1
VSS
VCC
VSS
VSS
VSS
VSS
VSS
AF10
AF12
AF14
AF16
AF18
AF20
D10
VSS
A11
VSS
A13
VSS
A15
VSS
A17
VSS
A19
VSS
A21
VSS
A24
VSS
A26
VSS
A3
VSS
A9
VSS
AA1
VSS
AA11
VSS
AA13
VSS
AA15
VSS
C C
B B
AA17
AA19
AA23
AA26
AA4
AA7
AA9
AB10
AB12
AB14
AB16
AB18
AB20
AB21
AB24
AB3
AB6
AB8
AC11
AC13
AC15
AC17
AC19
AC2
AC22
AC25
AC5
AC7
AC9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AD10
AD12
AD14
AD16
AD18
AD21
AD4
AD23
AD8
AE11
AE13
AE15
AE17
AE19
AE22
AE24
AE7
AE9
4
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
AF19
AF2
AF21
AF5
AF7
AF9
B11
B13
B15
B17
B19B7B9
C10
C12
C14
C16
C18
C20C8D11
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B18
B23
B20
B26B4B8
C11
C13
C15
C17C2C19
C22
C25C5C7C9D12
D14
D16
D18
D20
D21D3D24D6D8E1E11
E13
E15
E17
E19
3
VID Voltage is from 1.14V to 1.32V.
It is derived from 3.3V.
It should be able to source 150mA.
It drives the power logic of BSEL[1:0] and VID[5:0].
VID to VIDGD delay time is from 1ms to 10ms.
VID to VIDGD deassertion time is 1ms for max.
D13
D15
D17
D19D7D9
E10
E12
E14
E16
E18
E20E8F11
F13
F15
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F25F5F8
G21G6G24
VSS
VSS
G3H1H23
VSS
VSS
E23
E7E9F10
F12
F14
F16
E4
E26
F18F2F22
2
VCC_VID
1.2V 150mA
C31 X_CD1U25V3Y5VL
C30 C1U10V3Y5VL
Near processor
CPU_IOPLL
VCC-VID
VSS
VSS
AF3
J22
VCC-VIDPRG
VSS
J25J5K21
VSS
AD20
VCC-IOPLL
VSS
VSS
AE23
VCCA
VSSA
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SOCK478-DIP
F17
F19
AF4
F9
VCC
VCC
VCC
VSS
VSS
VSS
VSS
H26H4J2
AD22
Y5
Y25
Y22
Y2
W6
W3
W24
W21
V4
V26
V23
V1
U5
U25
U22
U2
T6
T3
T24
T21
R4
R26
R23
R1
P5
P25
P22
P2
N6
N3
N24
N21
M5
M25
M22
M2
L4
L26
L23
L1
K6
K3
K24
C34
X_C1U10V3Y5VL
VSSA
The ESL is less than 5nH, and the ESR is less than 0.3ohm.
It support DC current if 100mA.
C21
X_C1U10V3Y5VL
L2 X_L4D7UHD1AD9R6
L1 L4D7UHD1AD9R6
DC voltage drop should
be less than 70mV.
C22
C10U6D3V6Y5VL
1
VCORE
C314
X_C10U10V5Y5VL
CPU DECOUPLING CAPACITORS
VCORE VCORE
C23 X_C10U6D3V6Y5VL
C24 X_C10U6D3V6Y5VL
C25 X_C10U6D3V6Y5VL
A A
C27 X_C10U6D3V6Y5VL
C28 X_C10U6D3V6Y5VL
C29 X_C10U6D3V6Y5VL
Place these caps within north side of processor
5
C45 C10U6D3V6Y5VL
C54 X_C10U6D3V6Y5VL
C58 C10U6D3V6Y5VL
4
VCORE VCORE VCORE
+
C53 CSP100U2V
Place these caps within socket cavity
C46 C10U6D3V6Y5VL
C55 X_C10U6D3V6Y5VL C48 C10U6D3V6Y5VL
C57 C10U6D3V6Y5VL
C62 C10U6D3V6Y5VL C26 X_C10U6D3V6Y5VL
3
C80 X_C10U10V5Y5VL
C79 X_C10U10V5Y5VL
C78 X_C10U10V5Y5VL
Place these caps within south side of processor
2
MSI
Title
Size Document Number Rev
Date: Sheet
Micro-Star
CPU Socket 478 part2
MS-7095
52 7 Wednesday, September 08, 2004
1
of
10
5
HA#[3..33] 4
VCORE
R100
49D9R3F
GTLVREF1_NB
D D
C C
B B
VCORE
R104
100R3F
R97
301R3F
HCOMPVREF
R102
150R3F
HA#[3..33]
BC4
X_CD01U16V3X7RL
HADSTB#0 4
HADSTB#1 4
HADS# 4
HBNR# 4
HBPRI# 4
BREQ#0 4
HDBSY# 4
HDEFER# 4
HDRDY# 4
HIT# 4
HITM# 4
HLOCK# 4
HTRDY# 4
HREQ#0 4
HREQ#1 4
HREQ#2 4
HREQ#3 4
HREQ#4 4
HRS#0 4
HRS#1 4
HRS#2 4
HDBI#0 4
HDBI#1 4
HDBI#2 4
HDBI#3 4
CPURST# 4
NBHCLK 3
NBHCLK# 3
BC41 CD1U25V3Y5VL (B)
BC44 CD01U16V3X7RL (B)
BC49 X_CD01U16V3X7RL (B)
BC51 CD1U25V3Y5VL (B)
BC42 X_CD01U16V3X7RL (B)
R64 20D5R3F
GTLVREF1_NB
HRCOMP
HCOMPVREF
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
AA28
HA#21
AA27
HA#22
HA#23
AA25
HA#24
HA#25
HA#26
AA26
HA#27
AB29
HA#28
AA29
HA#29
HA#30
HA#31
AB28
HA#32
AC27
HA#33
HADSTB#0
HADSTB#1
HADS#
HBNR#
HBPRI#
BREQ#0
HDBSY#
HDEFER#
HDRDY#
HIT#
HITM#
HLOCK#
HTRDY#
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
HRS#0
HRS#1
HRS#2
HDBI#0
HDBI#1
HDBI#2
HDBI#3
CPURST#
NBHCLK
NBHCLK#
BC43
CD01U16V3X7RL (B)
AB27
U5A VIA-VT8751-BGA664
N29
HA3
R27
HA4
R26
HA5
R29
HA6
N28
HA7
T29
HA8
T27
HA9
V25
HA10
R28
HA11
U28
HA12
U29
HA13
V26
HA14
T28
HA15
U26
HA16
V29
HA17
V28
HA18
V27
HA19
HA20
HA21
W28
HA22
HA23
W29
HA24
W27
HA25
HA26
HA27
HA28
Y29
HA29
Y26
HA30
HA31
HA32
HA33
T25
HADSTB0
Y27
HADSTB1
P25
ADS
M29
BNR
L29
BPRI
L26
BREQ0
K25
DBSY
M27
DEFFER
M28
DRDY
L27
HIT
J25
HITM
L25
HLOCK
M26
HTRDY
R25
HREQ0
P27
HREQ1
N27
HREQ2
P29
HREQ3
P26
HREQ4
K28
RS0
K29
RS1
K27
RS2
G27
DBI0
C25
DBI1
B22
DBI2
D16
DBI3
E14
CPURST
N25
HCLK
M25
HCLK
R24
HAVREF0
V24
HAVREF1
F24
HDVREF0
F22
HDVREF1
F19
HDVREF2
F16
HDVREF3
L24
GTLREF
F25
HRCOMP
G24
HCOMPVREF
GND
GND
GND
GND
B16
B28
C14
C16
E16
C21
VTT
GND
E23
C22
VTT
GND
K14
D15
VTT
GND
K15
D18
VTT
GND
F17
D19
VTT
GND
F18
D21
4
VTT
GND
K16
D24
VTT
GND
K17
D26
VTT
GND
3
VCORE
F23
K18
K19
K20
L20
M20
N20
P20
R20
T20
U20
K24
T24
U24
Y25
AA24
AB24
K10
GND
M18
GND
N18
GND
HDSTB0
HDSTB0
HDSTB1
HDSTB1
HDSTB2
HDSTB2
HDSTB3
HDSTB3
GND
P18
R18
HD0
HD1
HD2
HD3
HD4
HD5
HD6
HD7
HD8
HD9
HD10
HD11
HD12
HD13
HD14
HD15
HD16
HD17
HD18
HD19
HD20
HD21
HD22
HD23
HD24
HD25
HD26
HD27
HD28
HD29
HD30
HD31
HD32
HD33
HD34
HD35
HD36
HD37
HD38
HD39
HD40
HD41
HD42
HD43
HD44
HD45
HD46
HD47
HD48
HD49
HD50
HD51
HD52
HD53
HD54
HD55
HD56
HD57
HD58
HD59
HD60
HD61
HD62
HD63
VSSTT
VSSTT
GND
GND
GND
GND
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
E24
E25
E26
G26
H27
H28
K26
L28
P28
N26
T26
U25
U27
W26
Y28
AB25
AB26
AC26
AC28
J28
F29
J27
F26
E28
H25
J26
E29
J29
F27
H29
F28
E27
D29
G25
H26
A25
D27
A26
B25
C28
D25
A28
B29
D28
C27
C26
A29
C24
B26
D23
C29
A23
B24
E22
A21
A24
D22
C23
B23
A22
C20
E21
B21
A20
B20
B19
A19
A18
B18
C19
C18
E18
E17
D17
B15
A16
E15
A15
C15
D14
A14
A17
B14
G28
G29
A27
B27
D20
E20
C17
B17
P24
E19
T18
U18
V18
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
HDSTB0
HDSTB#0
HDSTB1
HDSTB#1
HDSTB2
HDSTB#2
HDSTB3
HDSTB#3
HD#[0..63]
HDSTB0 4
HDSTB#0 4
HDSTB1 4
HDSTB#1 4
HDSTB2 4
HDSTB#2 4
HDSTB3 4
HDSTB#3 4
HD#[0..63] 4
VCC2_5
L11 X_L60RD5A3D1
CP9 X_COPPER
GND_RGBPLL
VCC2_5
L10 X_L60RD5A3D1
CP8 X_COPPER
GND_RGBDAC
FPD9
FPD10
FPD11
DSOCLKI
FPD11
FPD9
FPD10
2
BC5
C1000P25V3X7RL
BC6
C1000P25V3X7RL
VCC3 +2.5VRGBPLL +2.5VRGBDAC
C6
E6
C7
FPD0
FPD1
FPD2
FPD3
FPD4
FPD5
FPD6
FPD7
FPD8
FPD9
FPD10
FPD11
GPO0
GPOUT
FPDDET
FPDDEN
FPDHS
FPDVS
FPDCLK
C11
PLLVDD
GND
E7
F8
PLLVDD
GND
F12
GND
F13
GND
M13
U5D VIA-VT8751-BGA664
C13
B13
A13
D13
E13
D12
C12
A12
B12
E12
B11
A11
E10
D11
A10
B10
D10
C10
E11
RN34
1 2
3 4
5 6
7 8
8P4R-4K7R3
DACVDD
GND
N13
DACVDD
GND
P13
GND
R13
GND
K11
T13
VCC5
GND
K12
U13
VCC5
GND
K13
V13
VCC5
GND
M14
GND
N14
GND
P14
C145
C1U10V3Y5VL
L9 X_L60RD5A3D1
CP7 X_COPPER
C148
C1U10V3Y5VL
L12 X_L60RD5A3D1
CP10 X_COPPER
C308
CD1U25V3Y5VL (B)
B6
AR
A5
AG
B5
AB
A6
RSET
B8
HSYNC
A8
VSYNC
A7
XIN
A9
INTA
B9
BISTIN
C9
SPCLK0
E9
SPCLK1
D9
SPD0
E8
SPD1
C8
DSOCLKI
D8
DSOCLKO
B7
PLLGND
D7
PLLGND
C5
DACGND
D6
DACGND
GND
GND
GND
GND
GND
R14
T14
U14
V14
BISTIN
RSET
1
+2.5VRGBPLL
+2.5VRGBDAC
CRT_R
CRT_R 19
CRT_G
CRT_G 19
CRT_B
CRT_B 19
RSET
HSYNC 19
VSYNC 19
GUICLK 3
INTA# 11,12,18
BISTIN
3VDDCCL 19
3VDDCDA 19
DSOCLKI
GND_RGBPLL
GND_RGBDAC
R105 4K7R3
R110 140R3F
VCC3
A A
5
These capacitance must be closed NB
VCORE
C133
C1U10V3Y5VL
C138
C1U10V3Y5VL
4
BC55
X_CD1U25V3Y5VL (B)
BC47
C1U10V3Y5VL (B)
BC40
X_CD1U25V3Y5VL (B)
MSI
Title
Size Document Number Rev
3
2
Date: Sheet
Micro-Star
VT8751A Host & VGA
MS-7095
62 7 Wednesday, September 08, 2004
1
10
of
5
Y10
Y11
Y12
Y13
Y14
Y15
Y16
Y17
VCCM
GND
AF10
VCCM
GND
AF13
VCCM
GND
AF16
VCCM
GND
AF19
VCCM
GND
AF22
VCCM
GND
Y18
VCCM
GND
AF25
W10
AC2
GND
AC6
GND
AD6
GND
AE4
GND
AE17
VCCM
GND
W20
AE18
VCCM
GND
VCCM
VCCM
GND
GND
AE19
AF2
AF7
NBMD0
NBMD1
NBMD2
NBMD3
NBMD4
NBMD5
D D
C C
B B
CKE[3..0] 9
A A
CKE[3..0]
NBMD6
NBMD7
NBMD8
NBMD9
NBMD10
NBMD11
NBMD12
NBMD13
NBMD14
NBMD15
NBMD16
NBMD17
NBMD18
NBMD19
NBMD20
NBMD21
NBMD22
NBMD23
NBMD24
NBMD25
NBMD26
NBMD27
NBMD28
NBMD29
NBMD30
NBMD31
NBMD32
NBMD33
NBMD34
NBMD35
NBMD36
NBMD37
NBMD38
NBMD39
NBMD40
NBMD41
NBMD42
NBMD43
NBMD44
NBMD45
NBMD46
NBMD47
NBMD48
NBMD49
NBMD50
NBMD51
NBMD52
NBMD53
NBMD54
NBMD55
NBMD56
NBMD57
NBMD58
NBMD59
NBMD60
NBMD61
NBMD62
NBMD63
NBDQM#0
NBDQM#1
NBDQM#2
NBDQM#3
NBDQM#4
NBDQM#5
NBDQM#6
NBDQM#7
CKE0
CKE1
CKE2
CKE3
U5B
AC29
MD0
AD27
MD1
AD26
MD2
AG29
MD3
AD29
MD4
AD28
MD5
AE27
MD6
AF29
MD7
AG28
MD8
AG27
MD9
AG25
MD10
AH26
MD11
AH29
MD12
AJ29
MD13
AJ27
MD14
AG26
MD15
AJ25
MD16
AF24
MD17
AF23
MD18
AH23
MD19
AJ26
MD20
AG24
MD21
AG23
MD22
AJ23
MD23
AH21
MD24
AF20
MD25
AJ19
MD26
AG18
MD27
AJ21
MD28
AG20
MD29
AF18
MD30
AH18
MD31
AH11
MD32
AG10
MD33
AG9
MD34
AJ8
MD35
AG11
MD36
AJ10
MD37
AF9
MD38
AG8
MD39
AG6
MD40
AE7
MD41
AG5
MD42
AF5
MD43
AJ6
MD44
AF6
MD45
AJ4
MD46
AJ3
MD47
AH3
MD48
AG4
MD49
AG2
MD50
AF1
MD51
AG3
MD52
AJ2
MD53
AF4
MD54
AG1
MD55
AE3
MD56
AE1
MD57
AD1
MD58
AC5
MD59
AF3
MD60
AE2
MD61
AD2
MD62
AD5
MD63
AF15
MECC0/CKE0
AF14
MECC1/CKE1
AH14
MECC2/CKE2
AG13
MECC3/CKE3
AH15
MECC4/CKE4
AJ15
MECC5/CKE5
AJ13
MECC6/CKE6
AE13
MECC7/CKE7
AE28
DQM0/CKE0
AH27
DQM1/CKE1
AJ24
DQM2/CKE2
AJ20
DQM3/CKE3
AJ9
DQM4/CKE4
AH5
DQM5/CKE5
AJ1
DQM6/CKE6
AD4
DQM7/CKE7
AJ14
DQM8
VIA-VT8751-BGA664
Y19
AF28
VCCM
GND
Y20
AH2
VCCM
GND
AA9
AH4
VCCM
GND
AA10
AH7
VCCM
GND
AA11
AH10
VCCM
GND
AA12
AH13
4
AA13
VCCM
GND
AH16
VCCM
GND
AA14
AH19
VCCM
GND
3
VDIMM
AA15
AA16
AA17
AA18
AA19
AA20
V20
MAA0
N17
VCCM
GND
P17
VCCM
VCCM
DQS0/CKE0
DQS1/CKE1
DQS2/CKE2
DQS3/CKE3
DQS4/CKE4
DQS5/CKE5
DQS6/CKE6
DQS7/CKE7
RESERVED0
RESERVED1
GND
GND
GND
R17
T17
MVREF0
MVREF1
MVREF2
MVREF3
GND
U17
V17
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
MAA14
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
MAB14
SRASA
SRASB
SCASA
SCASB
SWEA
SWEB
CS0
CS1
CS2
CS3
CS4
CS5
CS6
CS7
DQS8
MCLKF
MCLK
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
VCCM
VCCM
VCCM
VCCM
GND
GND
GND
GND
AH25
AH22
AH28
M17
MAA0
AF12
MAA1
AE16
MAA2
AJ17
MAA3
AG17
MAA4
AF17
MAA5
AE21
MAA6
AE20
MAA7
AE22
MAA8
AG22
MAA9
AF26
MAA10
AH12
MAA11
AJ7
MAA12
AG12
MAA13
AE25
MAA14
AJ22
MAB0
AJ12
MAB1
AG15
MAB2
AJ16
MAB3
AH17
MAB4
AJ18
MAB5
AF21
MAB6
AG19
MAB7
AE24
MAB8
AE23
MAB9
AF27
MAB10
AE11
MAB11
AH8
MAB12
AJ11
MAB13
AE26
MAB14
AG21
SRAS#A
AG16
SRAS#B
AD19
SCAS#A
AE10
SCAS#B
AD16
SWE#A
AE14
SWE#B
AD17
CS#0
AE9
CS#1
AF8
CS#2
AH6
CS#3
AG7
AE12
AF11
AE5
AE6
NBDQS#0
AE29
NBDQS#1
AJ28
NBDQS#2
AH24
NBDQS#3
AH20
NBDQS#4
AH9
NBDQS#5
AJ5
NBDQS#6
AH1
NBDQS#7
AD3
AG14
AD25
R73 10R3
AC25
AD23
C307 CD1U25V3Y5VL (B)
AD18
C136 C1U10V3Y5VL
AD12
C146 CD1U25V3Y5VL
AD7
AD8
AE8
Each pin placed one capacitance
M16
N16
P16
R16
T16
U16
V16
M15
N15
P15
R15
T15
U15
V15
MAA[14..0]
MAB[14..0]
SRAS#A 9,10
SRAS#B 9,10
SCAS#A 9,10
SCAS#B 9,10
SWE#A 9,10
SWE#B 9,10
CS#0 9,10
CS#1 9,10
CS#2 9,10
CS#3 9,10
MAA[14..0] 9,10
MAB[14..0] 9,10
DCLK_FB<Lddr+2"
R78 close NB DCLK_OUT 1~8"
DCLK_FB
DCLK_OUT
MVREF
MVREF DCLK_OUT
DCLK_FB 3
DCLK_OUT 3
VDIMM
R98
1KR3
R94
1KR3
C98 X_C5P50V3NPOL
2
DDRMD0 NBMD0
NBMD4 DDRMD4
NBDQS#0
NBMD2 DDRMD2
NBMD6 DDRMD6
NBMD7 DDRMD7
NBMD3 DDRMD3
NBMD12 DDRMD12
NBMD13 DDRMD13
NBDQS#1 DDRDQS#1
NBDQM#1 DDRDQM#1
NBMD10 DDRMD10
NBMD20 DDRMD20
NBDQM#2 DDRDQM#2
NBMD18 DDRMD18
NBMD19 DDRMD19
NBMD24 DDRMD24
NBMD25 DDRMD25
NBMD28 DDRMD28
NBMD30 DDRMD30
NBMD26 DDRMD26
DDRDQS#[7..0]
DDRDQM#[7..0]
DDRMD[63..0]
DDRDQS#[7..0] 9,10
DDRDQM#[7..0] 9,10
DDRMD[63..0] 9,10
DDRMD5 NBMD5
DDRMD1 NBMD1
DDRDQM#0 NBDQM#0
DDRDQS#0
DDRMD8 NBMD8
DDRMD9 NBMD9
DDRMD14 NBMD14
DDRMD15 NBMD15
DDRMD11 NBMD11
DDRMD17 NBMD17
DDRMD16 NBMD16
DDRMD21 NBMD21 NBMD50 DDRMD50
DDRDQS#2 NBDQS#2
DDRMD23 NBMD23
DDRMD22 NBMD22
DDRMD29 NBMD29
DDRDQM#3 NBDQM#3
DDRDQS#3 NBDQS#3
DDRMD27 NBMD27
DDRMD31 NBMD31
These capacitance must be closed NB
1
NBMD32 DDRMD32
NBMD36 DDRMD36
NBMD37 DDRMD37
NBMD35 DDRMD35
NBDQS#5 DDRDQS#5
NBMD47 DDRMD47
NBDQM#6 DDRDQM#6
NBDQS#6 DDRDQS#6
NBMD55 DDRMD55
NBMD54 DDRMD54
NBMD51 DDRMD51
NBMD61 DDRMD61
NBMD56 DDRMD56
NBMD57 DDRMD57
NBDQS#7 DDRDQS#7
NBDQM#7 DDRDQM#7
NBMD62 DDRMD62
NBMD58 DDRMD58
NBMD63 DDRMD63
VDIMM
C100 X_CD1U25V3Y5VL
C105 X_CD1U25V3Y5VL
C102 CD1U16V2Y5VL
C123 CD1U16V2Y5VL
BC54 C1U16V5Y5VL (B)
C144 CD1U25V3Y5VL
BC59 X_C1U16V5Y5VL (B)
C158 CD1U25V3Y5VL
BC48 C1U10V3Y5VL (B)
BC52 C1U16V5Y5VL (B)
BC56 C1U10V3Y5VL (B)
DDRMD33 NBMD33
DDRDQS#4 NBDQS#4
DDRDQM#4 NBDQM#4
DDRMD34 NBMD34
DDRMD38 NBMD38
DDRMD39 NBMD39
DDRMD40 NBMD40
DDRMD44 NBMD44
DDRMD45 NBMD45
DDRMD41 NBMD41
DDRDQM#5 NBDQM#5
DDRMD42 NBMD42
DDRMD46 NBMD46
DDRMD43 NBMD43
DDRMD48 NBMD48
DDRMD52 NBMD52
DDRMD53 NBMD53
DDRMD49 NBMD49
DDRMD60 NBMD60
DDRMD59 NBMD59
4 pcs placed on Top side 4 pcs placed on solder side
MSI
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
Micro-Star
VT8751A memory
MS-7095
1
10
72 7 Wednesday, September 08, 2004
of
5
D D
C C
VCC2_5
L7 X_L60RD5A3D1
CP5 X_COPPER
AGND1
B B
VCC2_5
L13 X_L60RD5A3D1
CP11 X_COPPER
AGND2
VCC2_5
L6 X_L60RD5A3D1
CP4 X_COPPER
BC50
X_CD1U25V3Y5VL (B)
C142
C1U10V3Y5VL
C310
C1U10V3Y5VL (B)
AVDD3
C126
C1U10V3Y5VL
AVDD1
C306
C1000P25V3X7RL (B)
L8 X_L60RD5A3D1
CP6 X_COPPER
AVDD2
C305
C1000P25V3X7RL (B)
L14 X_L60RD5A3D1
CP13 X_COPPER
R134
2KR3F
R133
1K13R3F
4
VCC2_5
VCC2_5
VCC2_5
3
VDDQ
L10M6M9
M10N9N10P9P10R9R10T6T9U6V6
K9L6L9
U5C
VLAD0
VLAD0 14
VLAD1 14
VLAD2 14
VLAD3 14
VLAD4 14
VLAD5 14
VLAD6 14
VLAD7 14
VBE0# 14
UPSTB 14
UPSTB# 14
DNSTB 14
DNSTB# 14
UPCMD 14
DNCMD 14
C176
CD1U25V3Y5VL
C177
CD1U25V3Y5VL
R298
4K7R3(B)
R121
80D6R3F
VCC2_5
VDIMM
VDIMM
SUSST# 13
PCIRST#1 15,23
PWRGD_NB# 13 SBA3 11
SUSST#
TESTIN_NB
PCIRST#1
AVDD1
AVDD2
AVDD3
AGND1
AGND2
VLAD1
VLAD2
VLAD3
VLAD4
VLAD5
VLAD6
VLAD7
VBE0#
LVREF_NB
LCOMP
AB3
AA5
AB1
AB2
AA4
AA1
AA3
AA2
AB4
U10
V10
H24
W24
Y24
AA6
AD9
AD10
AD11
AD13
AD14
AD20
AD21
AD22
AB5
AC4
W25
AC3
AC1
N24
AD24
AE15
M24
AC24
AD15
W5
VD0
W3
VD1
VD2
W1
VD3
VD4
W2
VD5
VD6
VD7
V5
VBE
UPSTB
Y3
UPSTB
DNSTB
DNSTB
Y1
UPCMD
DNCMD
Y5
VLREF
VCOMPP
U9
VCCVK
VCCVL
V9
VCCVL
VCCVL
W9
VCCVL
Y9
VCCVL
F9
VCC
F10
VCC
F11
VCC
F14
VCC
F15
VCC
F20
VCC
F21
VCC
H6
VCC
VCC
J6
VCC
J24
VCC
N6
VCC
P6
VCC
W6
VCC
VCC
Y6
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSUS25
SUST
TESTIN
RESETX
PWROK
AVCC1
AVCC2
AVCC3
AGND1
AGND2
AGND3
K6
VCCAGP
VCCAGP
VCCAGP
VCCAGP
VCCAGP
VCCAGP
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
D5E2F4F6F7H2J4L2M4P2R4U2V4W4Y2
C4
B2
B4
GND
VCCAGP
GND
VCCAGP
GND
VCCAGP
GND
VCCAGP
GND
VCCAGP
GND
VCCAGP
GND
VCCAGP
GND
Y4
VCCAGP
GND
VCCAGP
A4
T10
GD0
GD1
GD2
VCCQQ
VCCAGP
VCCAGP
VCCAGP
M12
GND
N12
VCCAGP
GND
GND
GND
P12
R12
GFRAM
GSTOP
GPAR/GCKRUN
AGP8XDET
AGPVREF0
AGPVREF1
GCOMP0
GCOMP1
GNDQQ
GND
GND
GND
GND
VIA-VT8751-BGA664
U12
V12
T12
AB6
GD3
GD4
GD5
GD6
GD7
GD8
GD9
GD10
GD11
GD12
GD13
GD14
GD15
GD16
GD17
GD18
GD19
GD20
GD21
GD22
GD23
GD24
GD25
GD26
GD27
GD28
GD29
GD30
GD31
GBE0
GBE1
GBE2
GBE3
GIRDY
GTRDY
GDSEL
GPIPE
GRBF
GWBF
GREQ
GGNT
DBIH
DBIL
ST0
ST1
ST2
SBS
SBS
GDS0
GDS0
GDS1
GDS1
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
GCLK
V2
V3
U1
V1
T3
U3
T1
T2
R3
R2
P1
P3
P4
N5
N1
N2
M3
L3
L1
K2
K3
K1
K4
J1
H1
H3
G1
G2
H4
G3
G4
F1
R1
N3
M2
K5
L4
M1
P5
N4
R5
U4
G5
H5
L5
C1
B1
F2
M5
A1
E5
F5
J5
D2
D1
T4
T5
J3
J2
C3
C2
E4
D4
D3
E1
E3
F3
R6
G6
U5
A2
B3
A3
2
GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31
GC/BE#0
GC/BE#1
GC/BE#2
GC/BE#3
GFRAME#
GIRDY#
GTRDY#
GDEVSEL#
GSTOP#
GPAR
PIPE#
RBF#
WBF#
GREQ#
GGNT#
AGPST0
AGPST1
AGPST2
SBSTB
SBSTB#
ADSTB0
ADSTB#0
ADSTB1
ADSTB#1
SBA0
SBA1
SBA2
SBA3 PWRGD_NB#
SBA4
SBA5
SBA6
SBA7
VREF_GC
NBCLK66
AGPCOMP0
AGPCOMP1
R123 60D4R3F
R122 60D4R3F
GAD[0..31]
GC/BE#[0..3]
GFRAME# 11
GIRDY# 11
GTRDY# 11
GDEVSEL# 11
GSTOP# 11
GPAR 11
PIPE# 11
RBF# 11
WBF# 11
GREQ# 11
GGNT# 11
AGPST0 11
AGPST1 11
AGPST2 11
SBSTB 11
SBSTB# 11
ADSTB0 11
ADSTB#0 11
ADSTB1 11
ADSTB#1 11
SBA0 11
SBA1 11
SBA2 11
SBA4 11
SBA5 11
SBA6 11
SBA7 11
NBCLK66 3
1
GAD[0..31] 11
VCC2_5
BC46 X_C1U16V5Y5VL (B)
BC53 C1U16V5Y5VL (B)
BC58 X_C1U16V5Y5VL (B)
BC57 X_C1U16V5Y5VL (B)
BC63 C1U16V5Y5VL (B)
BC45 C1U16V5Y5VL (B)
These capacitance must be closed NB
GC/BE#[0..3] 11
VDDQ
C167 X_CD1U25V3Y5VL
C168 X_CD1U25V3Y5VL
C169 CD1U25V3Y5VL
For Top side
VDDQ
BC60 CD1U25V3Y5VL (B)
BC61 X_C1U10V3Y5VL (B)
BC62 CD1U25V3Y5VL (B)
For solder side
VREF_GC 11
VDDQ
C309
CD1U25V3Y5VL (B)
C170
CD1U25V3Y5VL
A A
MSI
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
Micro-Star
VT8751A AGP & Vlink
MS-7095
82 7 Wednesday, September 08, 2004
1
10
of